aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/mfd
diff options
context:
space:
mode:
authorDaniel Lezcano <daniel.lezcano@linaro.org>2012-02-20 06:30:26 -0500
committerSamuel Ortiz <sameo@linux.intel.com>2012-03-06 12:46:47 -0500
commit485540dce01cf4b4d3629141399678e35e66b711 (patch)
tree5da48a9769a813d8e489abe49bdee275f2ac9b6d /drivers/mfd
parent8dfc4705828178ae25f08ce774831e4c19de8e51 (diff)
mfd: Decouple/recouple gic from the ux500 PRCMU
This patch allows to decouple and recouple the gic from the PRCMU. This is needed to put the A9 core in retention mode with the cpuidle driver. It is based on top of the "DB8500 PRCMU update" patchset. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Rickard Andersson <rickard.andersson@stericsson.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd')
-rw-r--r--drivers/mfd/db8500-prcmu.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index 128b5f4a4fb0..b320cc602668 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -821,6 +821,38 @@ u8 db8500_prcmu_get_power_state_result(void)
821 return readb(tcdm_base + PRCM_ACK_MB0_AP_PWRSTTR_STATUS); 821 return readb(tcdm_base + PRCM_ACK_MB0_AP_PWRSTTR_STATUS);
822} 822}
823 823
824#define PRCMU_A9_MASK_REQ 0x00000328
825#define PRCMU_A9_MASK_REQ_MASK 0x00000001
826#define PRCMU_GIC_DELAY 1
827
828/* This function decouple the gic from the prcmu */
829int db8500_prcmu_gic_decouple(void)
830{
831 u32 val = readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ);
832
833 /* Set bit 0 register value to 1 */
834 writel(val | PRCMU_A9_MASK_REQ_MASK, _PRCMU_BASE + PRCMU_A9_MASK_REQ);
835
836 /* Make sure the register is updated */
837 readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ);
838
839 /* Wait a few cycles for the gic mask completion */
840 udelay(PRCMU_GIC_DELAY);
841
842 return 0;
843}
844
845/* This function recouple the gic with the prcmu */
846int db8500_prcmu_gic_recouple(void)
847{
848 u32 val = readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ);
849
850 /* Set bit 0 register value to 0 */
851 writel(val & ~PRCMU_A9_MASK_REQ_MASK, _PRCMU_BASE + PRCMU_A9_MASK_REQ);
852
853 return 0;
854}
855
824/* This function should only be called while mb0_transfer.lock is held. */ 856/* This function should only be called while mb0_transfer.lock is held. */
825static void config_wakeups(void) 857static void config_wakeups(void)
826{ 858{