diff options
author | David Brownell <dbrownell@users.sourceforge.net> | 2008-10-20 17:46:28 -0400 |
---|---|---|
committer | Samuel Ortiz <samuel@sortiz.org> | 2008-10-21 19:19:37 -0400 |
commit | a30d46c042c8a17ef25de02f439fbd120ab8a8de (patch) | |
tree | c83c8136266862ecbe6d453887fabcbe564851e5 /drivers/mfd/twl4030-core.c | |
parent | 2515ddc6db8eb49a79f0fe5e67ff09ac7c81eab4 (diff) |
mfd: twl4030 IRQ handling update
- Move it into a separate file; clean and streamline it
- Restructure the init code for reuse during secondary dispatch
- Support both levels (primary, secondary) of IRQ dispatch
- Use a workqueue for irq mask/unmask and trigger configuration
Code for two subchips currently share that secondary handler code.
One is the power subchip; its IRQs are now handled by this core,
courtesy of this patch. The other is the GPIO module, which will
be supported through a later patch.
There are also minor changes to the header file, mostly related
to GPIO support; nothing yet in mainline cares about those. A
few references to OMAP-specific symbols are disabled; when they
can all be removed, the TWL4030 support ceases being OMAP-specific.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Samuel Ortiz <sameo@openedhand.com>
Diffstat (limited to 'drivers/mfd/twl4030-core.c')
-rw-r--r-- | drivers/mfd/twl4030-core.c | 421 |
1 files changed, 17 insertions, 404 deletions
diff --git a/drivers/mfd/twl4030-core.c b/drivers/mfd/twl4030-core.c index fd9a0160202c..dd843c4fbcc7 100644 --- a/drivers/mfd/twl4030-core.c +++ b/drivers/mfd/twl4030-core.c | |||
@@ -27,15 +27,11 @@ | |||
27 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 27 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
28 | */ | 28 | */ |
29 | 29 | ||
30 | #include <linux/kernel_stat.h> | ||
31 | #include <linux/init.h> | 30 | #include <linux/init.h> |
32 | #include <linux/mutex.h> | 31 | #include <linux/mutex.h> |
33 | #include <linux/interrupt.h> | ||
34 | #include <linux/irq.h> | ||
35 | #include <linux/random.h> | ||
36 | #include <linux/kthread.h> | ||
37 | #include <linux/platform_device.h> | 32 | #include <linux/platform_device.h> |
38 | #include <linux/clk.h> | 33 | #include <linux/clk.h> |
34 | #include <linux/err.h> | ||
39 | 35 | ||
40 | #include <linux/i2c.h> | 36 | #include <linux/i2c.h> |
41 | #include <linux/i2c/twl4030.h> | 37 | #include <linux/i2c/twl4030.h> |
@@ -93,26 +89,6 @@ | |||
93 | #define twl_has_usb() false | 89 | #define twl_has_usb() false |
94 | #endif | 90 | #endif |
95 | 91 | ||
96 | static inline void activate_irq(int irq) | ||
97 | { | ||
98 | #ifdef CONFIG_ARM | ||
99 | /* ARM requires an extra step to clear IRQ_NOREQUEST, which it | ||
100 | * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE. | ||
101 | */ | ||
102 | set_irq_flags(irq, IRQF_VALID); | ||
103 | #else | ||
104 | /* same effect on other architectures */ | ||
105 | set_irq_noprobe(irq); | ||
106 | #endif | ||
107 | } | ||
108 | |||
109 | /* Primary Interrupt Handler on TWL4030 Registers */ | ||
110 | |||
111 | /* Register Definitions */ | ||
112 | |||
113 | #define REG_PIH_ISR_P1 (0x1) | ||
114 | #define REG_PIH_ISR_P2 (0x2) | ||
115 | #define REG_PIH_SIR (0x3) | ||
116 | 92 | ||
117 | /* Triton Core internal information (BEGIN) */ | 93 | /* Triton Core internal information (BEGIN) */ |
118 | 94 | ||
@@ -175,138 +151,6 @@ static inline void activate_irq(int irq) | |||
175 | 151 | ||
176 | /*----------------------------------------------------------------------*/ | 152 | /*----------------------------------------------------------------------*/ |
177 | 153 | ||
178 | /** | ||
179 | * struct twl4030_mod_iregs - TWL module IMR/ISR regs to mask/clear at init | ||
180 | * @mod_no: TWL4030 module number (e.g., TWL4030_MODULE_GPIO) | ||
181 | * @sih_ctrl: address of module SIH_CTRL register | ||
182 | * @reg_cnt: number of IMR/ISR regs | ||
183 | * @imrs: pointer to array of TWL module interrupt mask register indices | ||
184 | * @isrs: pointer to array of TWL module interrupt status register indices | ||
185 | * | ||
186 | * Ties together TWL4030 modules and lists of IMR/ISR registers to mask/clear | ||
187 | * during twl_init_irq(). | ||
188 | */ | ||
189 | struct twl4030_mod_iregs { | ||
190 | const u8 mod_no; | ||
191 | const u8 sih_ctrl; | ||
192 | const u8 reg_cnt; | ||
193 | const u8 *imrs; | ||
194 | const u8 *isrs; | ||
195 | }; | ||
196 | |||
197 | /* TWL4030 INT module interrupt mask registers */ | ||
198 | static const u8 __initconst twl4030_int_imr_regs[] = { | ||
199 | TWL4030_INT_PWR_IMR1, | ||
200 | TWL4030_INT_PWR_IMR2, | ||
201 | }; | ||
202 | |||
203 | /* TWL4030 INT module interrupt status registers */ | ||
204 | static const u8 __initconst twl4030_int_isr_regs[] = { | ||
205 | TWL4030_INT_PWR_ISR1, | ||
206 | TWL4030_INT_PWR_ISR2, | ||
207 | }; | ||
208 | |||
209 | /* TWL4030 INTERRUPTS module interrupt mask registers */ | ||
210 | static const u8 __initconst twl4030_interrupts_imr_regs[] = { | ||
211 | TWL4030_INTERRUPTS_BCIIMR1A, | ||
212 | TWL4030_INTERRUPTS_BCIIMR1B, | ||
213 | TWL4030_INTERRUPTS_BCIIMR2A, | ||
214 | TWL4030_INTERRUPTS_BCIIMR2B, | ||
215 | }; | ||
216 | |||
217 | /* TWL4030 INTERRUPTS module interrupt status registers */ | ||
218 | static const u8 __initconst twl4030_interrupts_isr_regs[] = { | ||
219 | TWL4030_INTERRUPTS_BCIISR1A, | ||
220 | TWL4030_INTERRUPTS_BCIISR1B, | ||
221 | TWL4030_INTERRUPTS_BCIISR2A, | ||
222 | TWL4030_INTERRUPTS_BCIISR2B, | ||
223 | }; | ||
224 | |||
225 | /* TWL4030 MADC module interrupt mask registers */ | ||
226 | static const u8 __initconst twl4030_madc_imr_regs[] = { | ||
227 | TWL4030_MADC_IMR1, | ||
228 | TWL4030_MADC_IMR2, | ||
229 | }; | ||
230 | |||
231 | /* TWL4030 MADC module interrupt status registers */ | ||
232 | static const u8 __initconst twl4030_madc_isr_regs[] = { | ||
233 | TWL4030_MADC_ISR1, | ||
234 | TWL4030_MADC_ISR2, | ||
235 | }; | ||
236 | |||
237 | /* TWL4030 keypad module interrupt mask registers */ | ||
238 | static const u8 __initconst twl4030_keypad_imr_regs[] = { | ||
239 | TWL4030_KEYPAD_KEYP_IMR1, | ||
240 | TWL4030_KEYPAD_KEYP_IMR2, | ||
241 | }; | ||
242 | |||
243 | /* TWL4030 keypad module interrupt status registers */ | ||
244 | static const u8 __initconst twl4030_keypad_isr_regs[] = { | ||
245 | TWL4030_KEYPAD_KEYP_ISR1, | ||
246 | TWL4030_KEYPAD_KEYP_ISR2, | ||
247 | }; | ||
248 | |||
249 | /* TWL4030 GPIO module interrupt mask registers */ | ||
250 | static const u8 __initconst twl4030_gpio_imr_regs[] = { | ||
251 | REG_GPIO_IMR1A, | ||
252 | REG_GPIO_IMR1B, | ||
253 | REG_GPIO_IMR2A, | ||
254 | REG_GPIO_IMR2B, | ||
255 | REG_GPIO_IMR3A, | ||
256 | REG_GPIO_IMR3B, | ||
257 | }; | ||
258 | |||
259 | /* TWL4030 GPIO module interrupt status registers */ | ||
260 | static const u8 __initconst twl4030_gpio_isr_regs[] = { | ||
261 | REG_GPIO_ISR1A, | ||
262 | REG_GPIO_ISR1B, | ||
263 | REG_GPIO_ISR2A, | ||
264 | REG_GPIO_ISR2B, | ||
265 | REG_GPIO_ISR3A, | ||
266 | REG_GPIO_ISR3B, | ||
267 | }; | ||
268 | |||
269 | /* TWL4030 modules that have IMR/ISR registers that must be masked/cleared */ | ||
270 | static const struct twl4030_mod_iregs __initconst twl4030_mod_regs[] = { | ||
271 | { | ||
272 | .mod_no = TWL4030_MODULE_INT, | ||
273 | .sih_ctrl = TWL4030_INT_PWR_SIH_CTRL, | ||
274 | .reg_cnt = ARRAY_SIZE(twl4030_int_imr_regs), | ||
275 | .imrs = twl4030_int_imr_regs, | ||
276 | .isrs = twl4030_int_isr_regs, | ||
277 | }, | ||
278 | { | ||
279 | .mod_no = TWL4030_MODULE_INTERRUPTS, | ||
280 | .sih_ctrl = TWL4030_INTERRUPTS_BCISIHCTRL, | ||
281 | .reg_cnt = ARRAY_SIZE(twl4030_interrupts_imr_regs), | ||
282 | .imrs = twl4030_interrupts_imr_regs, | ||
283 | .isrs = twl4030_interrupts_isr_regs, | ||
284 | }, | ||
285 | { | ||
286 | .mod_no = TWL4030_MODULE_MADC, | ||
287 | .sih_ctrl = TWL4030_MADC_SIH_CTRL, | ||
288 | .reg_cnt = ARRAY_SIZE(twl4030_madc_imr_regs), | ||
289 | .imrs = twl4030_madc_imr_regs, | ||
290 | .isrs = twl4030_madc_isr_regs, | ||
291 | }, | ||
292 | { | ||
293 | .mod_no = TWL4030_MODULE_KEYPAD, | ||
294 | .sih_ctrl = TWL4030_KEYPAD_KEYP_SIH_CTRL, | ||
295 | .reg_cnt = ARRAY_SIZE(twl4030_keypad_imr_regs), | ||
296 | .imrs = twl4030_keypad_imr_regs, | ||
297 | .isrs = twl4030_keypad_isr_regs, | ||
298 | }, | ||
299 | { | ||
300 | .mod_no = TWL4030_MODULE_GPIO, | ||
301 | .sih_ctrl = REG_GPIO_SIH_CTRL, | ||
302 | .reg_cnt = ARRAY_SIZE(twl4030_gpio_imr_regs), | ||
303 | .imrs = twl4030_gpio_imr_regs, | ||
304 | .isrs = twl4030_gpio_isr_regs, | ||
305 | }, | ||
306 | }; | ||
307 | |||
308 | /*----------------------------------------------------------------*/ | ||
309 | |||
310 | /* is driver active, bound to a chip? */ | 154 | /* is driver active, bound to a chip? */ |
311 | static bool inuse; | 155 | static bool inuse; |
312 | 156 | ||
@@ -367,33 +211,6 @@ static struct twl4030mapping twl4030_map[TWL4030_MODULE_LAST + 1] = { | |||
367 | 211 | ||
368 | /*----------------------------------------------------------------------*/ | 212 | /*----------------------------------------------------------------------*/ |
369 | 213 | ||
370 | /* | ||
371 | * TWL4030 doesn't have PIH mask, hence dummy function for mask | ||
372 | * and unmask of the (eight) interrupts reported at that level ... | ||
373 | * masking is only available from SIH (secondary) modules. | ||
374 | */ | ||
375 | |||
376 | static void twl4030_i2c_ackirq(unsigned int irq) | ||
377 | { | ||
378 | } | ||
379 | |||
380 | static void twl4030_i2c_disableint(unsigned int irq) | ||
381 | { | ||
382 | } | ||
383 | |||
384 | static void twl4030_i2c_enableint(unsigned int irq) | ||
385 | { | ||
386 | } | ||
387 | |||
388 | static struct irq_chip twl4030_irq_chip = { | ||
389 | .name = "twl4030", | ||
390 | .ack = twl4030_i2c_ackirq, | ||
391 | .mask = twl4030_i2c_disableint, | ||
392 | .unmask = twl4030_i2c_enableint, | ||
393 | }; | ||
394 | |||
395 | /*----------------------------------------------------------------------*/ | ||
396 | |||
397 | /* Exported Functions */ | 214 | /* Exported Functions */ |
398 | 215 | ||
399 | /** | 216 | /** |
@@ -535,108 +352,11 @@ EXPORT_SYMBOL(twl4030_i2c_read_u8); | |||
535 | 352 | ||
536 | /*----------------------------------------------------------------------*/ | 353 | /*----------------------------------------------------------------------*/ |
537 | 354 | ||
538 | static unsigned twl4030_irq_base; | ||
539 | |||
540 | static struct completion irq_event; | ||
541 | |||
542 | /* | ||
543 | * This thread processes interrupts reported by the Primary Interrupt Handler. | ||
544 | */ | ||
545 | static int twl4030_irq_thread(void *data) | ||
546 | { | ||
547 | long irq = (long)data; | ||
548 | irq_desc_t *desc = irq_desc + irq; | ||
549 | static unsigned i2c_errors; | ||
550 | const static unsigned max_i2c_errors = 100; | ||
551 | |||
552 | current->flags |= PF_NOFREEZE; | ||
553 | |||
554 | while (!kthread_should_stop()) { | ||
555 | int ret; | ||
556 | int module_irq; | ||
557 | u8 pih_isr; | ||
558 | |||
559 | /* Wait for IRQ, then read PIH irq status (also blocking) */ | ||
560 | wait_for_completion_interruptible(&irq_event); | ||
561 | |||
562 | ret = twl4030_i2c_read_u8(TWL4030_MODULE_PIH, &pih_isr, | ||
563 | REG_PIH_ISR_P1); | ||
564 | if (ret) { | ||
565 | pr_warning("%s: I2C error %d reading PIH ISR\n", | ||
566 | DRIVER_NAME, ret); | ||
567 | if (++i2c_errors >= max_i2c_errors) { | ||
568 | printk(KERN_ERR "Maximum I2C error count" | ||
569 | " exceeded. Terminating %s.\n", | ||
570 | __func__); | ||
571 | break; | ||
572 | } | ||
573 | complete(&irq_event); | ||
574 | continue; | ||
575 | } | ||
576 | |||
577 | /* these handlers deal with the relevant SIH irq status */ | ||
578 | local_irq_disable(); | ||
579 | for (module_irq = twl4030_irq_base; | ||
580 | pih_isr; | ||
581 | pih_isr >>= 1, module_irq++) { | ||
582 | if (pih_isr & 0x1) { | ||
583 | irq_desc_t *d = irq_desc + module_irq; | ||
584 | |||
585 | d->handle_irq(module_irq, d); | ||
586 | } | ||
587 | } | ||
588 | local_irq_enable(); | ||
589 | |||
590 | desc->chip->unmask(irq); | ||
591 | } | ||
592 | |||
593 | return 0; | ||
594 | } | ||
595 | |||
596 | /* | 355 | /* |
597 | * do_twl4030_irq() is the desc->handle method for the twl4030 interrupt. | 356 | * NOTE: We know the first 8 IRQs after pdata->base_irq are |
598 | * This is a chained interrupt, so there is no desc->action method for it. | 357 | * for the PIH, and the next are for the PWR_INT SIH, since |
599 | * Now we need to query the interrupt controller in the twl4030 to determine | 358 | * that's how twl_init_irq() sets things up. |
600 | * which module is generating the interrupt request. However, we can't do i2c | ||
601 | * transactions in interrupt context, so we must defer that work to a kernel | ||
602 | * thread. All we do here is acknowledge and mask the interrupt and wakeup | ||
603 | * the kernel thread. | ||
604 | */ | 359 | */ |
605 | static void do_twl4030_irq(unsigned int irq, irq_desc_t *desc) | ||
606 | { | ||
607 | const unsigned int cpu = smp_processor_id(); | ||
608 | |||
609 | /* | ||
610 | * Earlier this was desc->triggered = 1; | ||
611 | */ | ||
612 | desc->status |= IRQ_LEVEL; | ||
613 | |||
614 | /* | ||
615 | * Acknowledge, clear _AND_ disable the interrupt. | ||
616 | */ | ||
617 | desc->chip->ack(irq); | ||
618 | |||
619 | if (!desc->depth) { | ||
620 | kstat_cpu(cpu).irqs[irq]++; | ||
621 | |||
622 | complete(&irq_event); | ||
623 | } | ||
624 | } | ||
625 | |||
626 | static struct task_struct * __init start_twl4030_irq_thread(long irq) | ||
627 | { | ||
628 | struct task_struct *thread; | ||
629 | |||
630 | init_completion(&irq_event); | ||
631 | thread = kthread_run(twl4030_irq_thread, (void *)irq, "twl4030-irq"); | ||
632 | if (!thread) | ||
633 | pr_err("%s: could not create twl4030 irq %ld thread!\n", | ||
634 | DRIVER_NAME, irq); | ||
635 | |||
636 | return thread; | ||
637 | } | ||
638 | |||
639 | /*----------------------------------------------------------------------*/ | ||
640 | 360 | ||
641 | static int add_children(struct twl4030_platform_data *pdata) | 361 | static int add_children(struct twl4030_platform_data *pdata) |
642 | { | 362 | { |
@@ -668,7 +388,7 @@ static int add_children(struct twl4030_platform_data *pdata) | |||
668 | 388 | ||
669 | if (status == 0) { | 389 | if (status == 0) { |
670 | struct resource r = { | 390 | struct resource r = { |
671 | .start = TWL4030_PWRIRQ_CHG_PRES, | 391 | .start = pdata->irq_base + 8 + 1, |
672 | .flags = IORESOURCE_IRQ, | 392 | .flags = IORESOURCE_IRQ, |
673 | }; | 393 | }; |
674 | 394 | ||
@@ -817,8 +537,7 @@ static int add_children(struct twl4030_platform_data *pdata) | |||
817 | /* RTC module IRQ */ | 537 | /* RTC module IRQ */ |
818 | if (status == 0) { | 538 | if (status == 0) { |
819 | struct resource r = { | 539 | struct resource r = { |
820 | /* REVISIT don't hard-wire this stuff */ | 540 | .start = pdata->irq_base + 8 + 3, |
821 | .start = TWL4030_PWRIRQ_RTC, | ||
822 | .flags = IORESOURCE_IRQ, | 541 | .flags = IORESOURCE_IRQ, |
823 | }; | 542 | }; |
824 | 543 | ||
@@ -863,7 +582,7 @@ static int add_children(struct twl4030_platform_data *pdata) | |||
863 | 582 | ||
864 | if (status == 0) { | 583 | if (status == 0) { |
865 | struct resource r = { | 584 | struct resource r = { |
866 | .start = TWL4030_PWRIRQ_USB_PRES, | 585 | .start = pdata->irq_base + 8 + 2, |
867 | .flags = IORESOURCE_IRQ, | 586 | .flags = IORESOURCE_IRQ, |
868 | }; | 587 | }; |
869 | 588 | ||
@@ -965,123 +684,17 @@ static void __init clocks_init(void) | |||
965 | 684 | ||
966 | /*----------------------------------------------------------------------*/ | 685 | /*----------------------------------------------------------------------*/ |
967 | 686 | ||
968 | /** | 687 | int twl_init_irq(int irq_num, unsigned irq_base, unsigned irq_end); |
969 | * twl4030_i2c_clear_isr - clear TWL4030 SIH ISR regs via read + write | 688 | int twl_exit_irq(void); |
970 | * @mod_no: TWL4030 module number | ||
971 | * @reg: register index to clear | ||
972 | * @cor: value of the <module>_SIH_CTRL.COR bit (1 or 0) | ||
973 | * | ||
974 | * Either reads (cor == 1) or writes (cor == 0) to a TWL4030 interrupt | ||
975 | * status register to ensure that any prior interrupts are cleared. | ||
976 | * Returns the status from the I2C read operation. | ||
977 | */ | ||
978 | static int __init twl4030_i2c_clear_isr(u8 mod_no, u8 reg, u8 cor) | ||
979 | { | ||
980 | u8 tmp; | ||
981 | |||
982 | return (cor) ? twl4030_i2c_read_u8(mod_no, &tmp, reg) : | ||
983 | twl4030_i2c_write_u8(mod_no, 0xff, reg); | ||
984 | } | ||
985 | |||
986 | /** | ||
987 | * twl4030_read_cor_bit - are TWL module ISRs cleared by reads or writes? | ||
988 | * @mod_no: TWL4030 module number | ||
989 | * @reg: register index to clear | ||
990 | * | ||
991 | * Returns 1 if the TWL4030 SIH interrupt status registers (ISRs) for | ||
992 | * the specified TWL module are cleared by reads, or 0 if cleared by | ||
993 | * writes. | ||
994 | */ | ||
995 | static int twl4030_read_cor_bit(u8 mod_no, u8 reg) | ||
996 | { | ||
997 | u8 tmp = 0; | ||
998 | |||
999 | WARN_ON(twl4030_i2c_read_u8(mod_no, &tmp, reg) < 0); | ||
1000 | |||
1001 | tmp &= TWL4030_SIH_CTRL_COR_MASK; | ||
1002 | tmp >>= __ffs(TWL4030_SIH_CTRL_COR_MASK); | ||
1003 | |||
1004 | return tmp; | ||
1005 | } | ||
1006 | |||
1007 | /** | ||
1008 | * twl4030_mask_clear_intrs - mask and clear all TWL4030 interrupts | ||
1009 | * @t: pointer to twl4030_mod_iregs array | ||
1010 | * @t_sz: ARRAY_SIZE(t) (starting at 1) | ||
1011 | * | ||
1012 | * Mask all TWL4030 interrupt mask registers (IMRs) and clear all | ||
1013 | * interrupt status registers (ISRs). No return value, but will WARN if | ||
1014 | * any I2C operations fail. | ||
1015 | */ | ||
1016 | static void __init twl4030_mask_clear_intrs(const struct twl4030_mod_iregs *t, | ||
1017 | const u8 t_sz) | ||
1018 | { | ||
1019 | int i, j; | ||
1020 | |||
1021 | /* | ||
1022 | * N.B. - further efficiency is possible here. Eight I2C | ||
1023 | * operations on BCI and GPIO modules are avoidable if I2C | ||
1024 | * burst read/write transactions were implemented. Would | ||
1025 | * probably save about 1ms of boot time and a small amount of | ||
1026 | * power. | ||
1027 | */ | ||
1028 | for (i = 0; i < t_sz; i++) { | ||
1029 | const struct twl4030_mod_iregs tmr = t[i]; | ||
1030 | int cor; | ||
1031 | |||
1032 | /* Are ISRs cleared by reads or writes? */ | ||
1033 | cor = twl4030_read_cor_bit(tmr.mod_no, tmr.sih_ctrl); | ||
1034 | |||
1035 | for (j = 0; j < tmr.reg_cnt; j++) { | ||
1036 | |||
1037 | /* Mask interrupts at the TWL4030 */ | ||
1038 | WARN_ON(twl4030_i2c_write_u8(tmr.mod_no, 0xff, | ||
1039 | tmr.imrs[j]) < 0); | ||
1040 | |||
1041 | /* Clear TWL4030 ISRs */ | ||
1042 | WARN_ON(twl4030_i2c_clear_isr(tmr.mod_no, | ||
1043 | tmr.isrs[j], cor) < 0); | ||
1044 | } | ||
1045 | } | ||
1046 | } | ||
1047 | |||
1048 | |||
1049 | static void twl_init_irq(int irq_num, unsigned irq_base, unsigned irq_end) | ||
1050 | { | ||
1051 | int i; | ||
1052 | |||
1053 | /* | ||
1054 | * Mask and clear all TWL4030 interrupts since initially we do | ||
1055 | * not have any TWL4030 module interrupt handlers present | ||
1056 | */ | ||
1057 | twl4030_mask_clear_intrs(twl4030_mod_regs, | ||
1058 | ARRAY_SIZE(twl4030_mod_regs)); | ||
1059 | |||
1060 | twl4030_irq_base = irq_base; | ||
1061 | |||
1062 | /* install an irq handler for each of the PIH modules */ | ||
1063 | for (i = irq_base; i < irq_end; i++) { | ||
1064 | set_irq_chip_and_handler(i, &twl4030_irq_chip, | ||
1065 | handle_simple_irq); | ||
1066 | activate_irq(i); | ||
1067 | } | ||
1068 | |||
1069 | /* install an irq handler to demultiplex the TWL4030 interrupt */ | ||
1070 | set_irq_data(irq_num, start_twl4030_irq_thread(irq_num)); | ||
1071 | set_irq_chained_handler(irq_num, do_twl4030_irq); | ||
1072 | } | ||
1073 | |||
1074 | /*----------------------------------------------------------------------*/ | ||
1075 | 689 | ||
1076 | static int twl4030_remove(struct i2c_client *client) | 690 | static int twl4030_remove(struct i2c_client *client) |
1077 | { | 691 | { |
1078 | unsigned i; | 692 | unsigned i; |
693 | int status; | ||
1079 | 694 | ||
1080 | /* FIXME undo twl_init_irq() */ | 695 | status = twl_exit_irq(); |
1081 | if (twl4030_irq_base) { | 696 | if (status < 0) |
1082 | dev_err(&client->dev, "can't yet clean up IRQs?\n"); | 697 | return status; |
1083 | return -ENOSYS; | ||
1084 | } | ||
1085 | 698 | ||
1086 | for (i = 0; i < TWL4030_NUM_SLAVES; i++) { | 699 | for (i = 0; i < TWL4030_NUM_SLAVES; i++) { |
1087 | struct twl4030_client *twl = &twl4030_modules[i]; | 700 | struct twl4030_client *twl = &twl4030_modules[i]; |
@@ -1112,7 +725,7 @@ twl4030_probe(struct i2c_client *client, const struct i2c_device_id *id) | |||
1112 | return -EIO; | 725 | return -EIO; |
1113 | } | 726 | } |
1114 | 727 | ||
1115 | if (inuse || twl4030_irq_base) { | 728 | if (inuse) { |
1116 | dev_dbg(&client->dev, "driver is already in use\n"); | 729 | dev_dbg(&client->dev, "driver is already in use\n"); |
1117 | return -EBUSY; | 730 | return -EBUSY; |
1118 | } | 731 | } |
@@ -1146,9 +759,9 @@ twl4030_probe(struct i2c_client *client, const struct i2c_device_id *id) | |||
1146 | if (client->irq | 759 | if (client->irq |
1147 | && pdata->irq_base | 760 | && pdata->irq_base |
1148 | && pdata->irq_end > pdata->irq_base) { | 761 | && pdata->irq_end > pdata->irq_base) { |
1149 | twl_init_irq(client->irq, pdata->irq_base, pdata->irq_end); | 762 | status = twl_init_irq(client->irq, pdata->irq_base, pdata->irq_end); |
1150 | dev_info(&client->dev, "IRQ %d chains IRQs %d..%d\n", | 763 | if (status < 0) |
1151 | client->irq, pdata->irq_base, pdata->irq_end - 1); | 764 | goto fail; |
1152 | } | 765 | } |
1153 | 766 | ||
1154 | status = add_children(pdata); | 767 | status = add_children(pdata); |