diff options
author | Rhyland Klein <rklein@nvidia.com> | 2012-05-08 14:42:38 -0400 |
---|---|---|
committer | Samuel Ortiz <sameo@linux.intel.com> | 2012-05-20 11:25:23 -0400 |
commit | 3f7e82759c692df473675ed06fb90b20f1f225c3 (patch) | |
tree | f8f120546e55def9cb88ff9a0b8e13d4b36bb342 /drivers/mfd/tps65910-irq.c | |
parent | 7ccfe9b1d58ef5cf8fdbd50b6ee2ae0e9aa9cb36 (diff) |
mfd: Commonize tps65910 regmap access through header
This change removes the read/write callback functions in favor of common
regmap accessors inside the header file. This change also makes use of
regmap_read/write for single register access which maps better onto what this
driver actually needs.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd/tps65910-irq.c')
-rw-r--r-- | drivers/mfd/tps65910-irq.c | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/drivers/mfd/tps65910-irq.c b/drivers/mfd/tps65910-irq.c index c9ed5c00a621..0f1ff7fbdc74 100644 --- a/drivers/mfd/tps65910-irq.c +++ b/drivers/mfd/tps65910-irq.c | |||
@@ -41,28 +41,28 @@ static inline int irq_to_tps65910_irq(struct tps65910 *tps65910, | |||
41 | static irqreturn_t tps65910_irq(int irq, void *irq_data) | 41 | static irqreturn_t tps65910_irq(int irq, void *irq_data) |
42 | { | 42 | { |
43 | struct tps65910 *tps65910 = irq_data; | 43 | struct tps65910 *tps65910 = irq_data; |
44 | unsigned int reg; | ||
44 | u32 irq_sts; | 45 | u32 irq_sts; |
45 | u32 irq_mask; | 46 | u32 irq_mask; |
46 | u8 reg; | ||
47 | int i; | 47 | int i; |
48 | 48 | ||
49 | tps65910->read(tps65910, TPS65910_INT_STS, 1, ®); | 49 | tps65910_reg_read(tps65910, TPS65910_INT_STS, ®); |
50 | irq_sts = reg; | 50 | irq_sts = reg; |
51 | tps65910->read(tps65910, TPS65910_INT_STS2, 1, ®); | 51 | tps65910_reg_read(tps65910, TPS65910_INT_STS2, ®); |
52 | irq_sts |= reg << 8; | 52 | irq_sts |= reg << 8; |
53 | switch (tps65910_chip_id(tps65910)) { | 53 | switch (tps65910_chip_id(tps65910)) { |
54 | case TPS65911: | 54 | case TPS65911: |
55 | tps65910->read(tps65910, TPS65910_INT_STS3, 1, ®); | 55 | tps65910_reg_read(tps65910, TPS65910_INT_STS3, ®); |
56 | irq_sts |= reg << 16; | 56 | irq_sts |= reg << 16; |
57 | } | 57 | } |
58 | 58 | ||
59 | tps65910->read(tps65910, TPS65910_INT_MSK, 1, ®); | 59 | tps65910_reg_read(tps65910, TPS65910_INT_MSK, ®); |
60 | irq_mask = reg; | 60 | irq_mask = reg; |
61 | tps65910->read(tps65910, TPS65910_INT_MSK2, 1, ®); | 61 | tps65910_reg_read(tps65910, TPS65910_INT_MSK2, ®); |
62 | irq_mask |= reg << 8; | 62 | irq_mask |= reg << 8; |
63 | switch (tps65910_chip_id(tps65910)) { | 63 | switch (tps65910_chip_id(tps65910)) { |
64 | case TPS65911: | 64 | case TPS65911: |
65 | tps65910->read(tps65910, TPS65910_INT_MSK3, 1, ®); | 65 | tps65910_reg_read(tps65910, TPS65910_INT_MSK3, ®); |
66 | irq_mask |= reg << 16; | 66 | irq_mask |= reg << 16; |
67 | } | 67 | } |
68 | 68 | ||
@@ -82,13 +82,13 @@ static irqreturn_t tps65910_irq(int irq, void *irq_data) | |||
82 | /* Write the STS register back to clear IRQs we handled */ | 82 | /* Write the STS register back to clear IRQs we handled */ |
83 | reg = irq_sts & 0xFF; | 83 | reg = irq_sts & 0xFF; |
84 | irq_sts >>= 8; | 84 | irq_sts >>= 8; |
85 | tps65910->write(tps65910, TPS65910_INT_STS, 1, ®); | 85 | tps65910_reg_write(tps65910, TPS65910_INT_STS, reg); |
86 | reg = irq_sts & 0xFF; | 86 | reg = irq_sts & 0xFF; |
87 | tps65910->write(tps65910, TPS65910_INT_STS2, 1, ®); | 87 | tps65910_reg_write(tps65910, TPS65910_INT_STS2, reg); |
88 | switch (tps65910_chip_id(tps65910)) { | 88 | switch (tps65910_chip_id(tps65910)) { |
89 | case TPS65911: | 89 | case TPS65911: |
90 | reg = irq_sts >> 8; | 90 | reg = irq_sts >> 8; |
91 | tps65910->write(tps65910, TPS65910_INT_STS3, 1, ®); | 91 | tps65910_reg_write(tps65910, TPS65910_INT_STS3, reg); |
92 | } | 92 | } |
93 | 93 | ||
94 | return IRQ_HANDLED; | 94 | return IRQ_HANDLED; |
@@ -105,27 +105,27 @@ static void tps65910_irq_sync_unlock(struct irq_data *data) | |||
105 | { | 105 | { |
106 | struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data); | 106 | struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data); |
107 | u32 reg_mask; | 107 | u32 reg_mask; |
108 | u8 reg; | 108 | unsigned int reg; |
109 | 109 | ||
110 | tps65910->read(tps65910, TPS65910_INT_MSK, 1, ®); | 110 | tps65910_reg_read(tps65910, TPS65910_INT_MSK, ®); |
111 | reg_mask = reg; | 111 | reg_mask = reg; |
112 | tps65910->read(tps65910, TPS65910_INT_MSK2, 1, ®); | 112 | tps65910_reg_read(tps65910, TPS65910_INT_MSK2, ®); |
113 | reg_mask |= reg << 8; | 113 | reg_mask |= reg << 8; |
114 | switch (tps65910_chip_id(tps65910)) { | 114 | switch (tps65910_chip_id(tps65910)) { |
115 | case TPS65911: | 115 | case TPS65911: |
116 | tps65910->read(tps65910, TPS65910_INT_MSK3, 1, ®); | 116 | tps65910_reg_read(tps65910, TPS65910_INT_MSK3, ®); |
117 | reg_mask |= reg << 16; | 117 | reg_mask |= reg << 16; |
118 | } | 118 | } |
119 | 119 | ||
120 | if (tps65910->irq_mask != reg_mask) { | 120 | if (tps65910->irq_mask != reg_mask) { |
121 | reg = tps65910->irq_mask & 0xFF; | 121 | reg = tps65910->irq_mask & 0xFF; |
122 | tps65910->write(tps65910, TPS65910_INT_MSK, 1, ®); | 122 | tps65910_reg_write(tps65910, TPS65910_INT_MSK, reg); |
123 | reg = tps65910->irq_mask >> 8 & 0xFF; | 123 | reg = tps65910->irq_mask >> 8 & 0xFF; |
124 | tps65910->write(tps65910, TPS65910_INT_MSK2, 1, ®); | 124 | tps65910_reg_write(tps65910, TPS65910_INT_MSK2, reg); |
125 | switch (tps65910_chip_id(tps65910)) { | 125 | switch (tps65910_chip_id(tps65910)) { |
126 | case TPS65911: | 126 | case TPS65911: |
127 | reg = tps65910->irq_mask >> 16; | 127 | reg = tps65910->irq_mask >> 16; |
128 | tps65910->write(tps65910, TPS65910_INT_MSK3, 1, ®); | 128 | tps65910_reg_write(tps65910, TPS65910_INT_MSK3, reg); |
129 | } | 129 | } |
130 | } | 130 | } |
131 | mutex_unlock(&tps65910->irq_lock); | 131 | mutex_unlock(&tps65910->irq_lock); |