diff options
author | Heiko Schocher <hs@denx.de> | 2011-01-24 04:57:20 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-03-22 04:16:34 -0400 |
commit | bf5f0019046d596d613caf74722ba4994e153899 (patch) | |
tree | ce5829b518467cfd08344a48f6587b7012eb5eac /drivers/mfd/sm501.c | |
parent | dfc906daeec03b3f2d306ae260d398d97ba232c5 (diff) |
video, sm501: add I/O functions for use on powerpc
- add read/write functions for using this driver
also on powerpc plattforms
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: linux-fbdev@vger.kernel.org
cc: devicetree-discuss@ozlabs.org
cc: Ben Dooks <ben@simtec.co.uk>
cc: Vincent Sanders <vince@simtec.co.uk>
cc: Samuel Ortiz <sameo@linux.intel.com>
cc: linux-kernel@vger.kernel.org
cc: Randy Dunlap <rdunlap@xenotime.net>
cc: Paul Mundt <lethal@linux-sh.org>
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/mfd/sm501.c')
-rw-r--r-- | drivers/mfd/sm501.c | 125 |
1 files changed, 63 insertions, 62 deletions
diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c index 5de3a760ea1e..558d5f3f6d02 100644 --- a/drivers/mfd/sm501.c +++ b/drivers/mfd/sm501.c | |||
@@ -133,10 +133,10 @@ static unsigned long decode_div(unsigned long pll2, unsigned long val, | |||
133 | 133 | ||
134 | static void sm501_dump_clk(struct sm501_devdata *sm) | 134 | static void sm501_dump_clk(struct sm501_devdata *sm) |
135 | { | 135 | { |
136 | unsigned long misct = readl(sm->regs + SM501_MISC_TIMING); | 136 | unsigned long misct = smc501_readl(sm->regs + SM501_MISC_TIMING); |
137 | unsigned long pm0 = readl(sm->regs + SM501_POWER_MODE_0_CLOCK); | 137 | unsigned long pm0 = smc501_readl(sm->regs + SM501_POWER_MODE_0_CLOCK); |
138 | unsigned long pm1 = readl(sm->regs + SM501_POWER_MODE_1_CLOCK); | 138 | unsigned long pm1 = smc501_readl(sm->regs + SM501_POWER_MODE_1_CLOCK); |
139 | unsigned long pmc = readl(sm->regs + SM501_POWER_MODE_CONTROL); | 139 | unsigned long pmc = smc501_readl(sm->regs + SM501_POWER_MODE_CONTROL); |
140 | unsigned long sdclk0, sdclk1; | 140 | unsigned long sdclk0, sdclk1; |
141 | unsigned long pll2 = 0; | 141 | unsigned long pll2 = 0; |
142 | 142 | ||
@@ -193,29 +193,29 @@ static void sm501_dump_regs(struct sm501_devdata *sm) | |||
193 | void __iomem *regs = sm->regs; | 193 | void __iomem *regs = sm->regs; |
194 | 194 | ||
195 | dev_info(sm->dev, "System Control %08x\n", | 195 | dev_info(sm->dev, "System Control %08x\n", |
196 | readl(regs + SM501_SYSTEM_CONTROL)); | 196 | smc501_readl(regs + SM501_SYSTEM_CONTROL)); |
197 | dev_info(sm->dev, "Misc Control %08x\n", | 197 | dev_info(sm->dev, "Misc Control %08x\n", |
198 | readl(regs + SM501_MISC_CONTROL)); | 198 | smc501_readl(regs + SM501_MISC_CONTROL)); |
199 | dev_info(sm->dev, "GPIO Control Low %08x\n", | 199 | dev_info(sm->dev, "GPIO Control Low %08x\n", |
200 | readl(regs + SM501_GPIO31_0_CONTROL)); | 200 | smc501_readl(regs + SM501_GPIO31_0_CONTROL)); |
201 | dev_info(sm->dev, "GPIO Control Hi %08x\n", | 201 | dev_info(sm->dev, "GPIO Control Hi %08x\n", |
202 | readl(regs + SM501_GPIO63_32_CONTROL)); | 202 | smc501_readl(regs + SM501_GPIO63_32_CONTROL)); |
203 | dev_info(sm->dev, "DRAM Control %08x\n", | 203 | dev_info(sm->dev, "DRAM Control %08x\n", |
204 | readl(regs + SM501_DRAM_CONTROL)); | 204 | smc501_readl(regs + SM501_DRAM_CONTROL)); |
205 | dev_info(sm->dev, "Arbitration Ctrl %08x\n", | 205 | dev_info(sm->dev, "Arbitration Ctrl %08x\n", |
206 | readl(regs + SM501_ARBTRTN_CONTROL)); | 206 | smc501_readl(regs + SM501_ARBTRTN_CONTROL)); |
207 | dev_info(sm->dev, "Misc Timing %08x\n", | 207 | dev_info(sm->dev, "Misc Timing %08x\n", |
208 | readl(regs + SM501_MISC_TIMING)); | 208 | smc501_readl(regs + SM501_MISC_TIMING)); |
209 | } | 209 | } |
210 | 210 | ||
211 | static void sm501_dump_gate(struct sm501_devdata *sm) | 211 | static void sm501_dump_gate(struct sm501_devdata *sm) |
212 | { | 212 | { |
213 | dev_info(sm->dev, "CurrentGate %08x\n", | 213 | dev_info(sm->dev, "CurrentGate %08x\n", |
214 | readl(sm->regs + SM501_CURRENT_GATE)); | 214 | smc501_readl(sm->regs + SM501_CURRENT_GATE)); |
215 | dev_info(sm->dev, "CurrentClock %08x\n", | 215 | dev_info(sm->dev, "CurrentClock %08x\n", |
216 | readl(sm->regs + SM501_CURRENT_CLOCK)); | 216 | smc501_readl(sm->regs + SM501_CURRENT_CLOCK)); |
217 | dev_info(sm->dev, "PowerModeControl %08x\n", | 217 | dev_info(sm->dev, "PowerModeControl %08x\n", |
218 | readl(sm->regs + SM501_POWER_MODE_CONTROL)); | 218 | smc501_readl(sm->regs + SM501_POWER_MODE_CONTROL)); |
219 | } | 219 | } |
220 | 220 | ||
221 | #else | 221 | #else |
@@ -231,7 +231,7 @@ static inline void sm501_dump_clk(struct sm501_devdata *sm) { } | |||
231 | 231 | ||
232 | static void sm501_sync_regs(struct sm501_devdata *sm) | 232 | static void sm501_sync_regs(struct sm501_devdata *sm) |
233 | { | 233 | { |
234 | readl(sm->regs); | 234 | smc501_readl(sm->regs); |
235 | } | 235 | } |
236 | 236 | ||
237 | static inline void sm501_mdelay(struct sm501_devdata *sm, unsigned int delay) | 237 | static inline void sm501_mdelay(struct sm501_devdata *sm, unsigned int delay) |
@@ -261,11 +261,11 @@ int sm501_misc_control(struct device *dev, | |||
261 | 261 | ||
262 | spin_lock_irqsave(&sm->reg_lock, save); | 262 | spin_lock_irqsave(&sm->reg_lock, save); |
263 | 263 | ||
264 | misc = readl(sm->regs + SM501_MISC_CONTROL); | 264 | misc = smc501_readl(sm->regs + SM501_MISC_CONTROL); |
265 | to = (misc & ~clear) | set; | 265 | to = (misc & ~clear) | set; |
266 | 266 | ||
267 | if (to != misc) { | 267 | if (to != misc) { |
268 | writel(to, sm->regs + SM501_MISC_CONTROL); | 268 | smc501_writel(to, sm->regs + SM501_MISC_CONTROL); |
269 | sm501_sync_regs(sm); | 269 | sm501_sync_regs(sm); |
270 | 270 | ||
271 | dev_dbg(sm->dev, "MISC_CONTROL %08lx\n", misc); | 271 | dev_dbg(sm->dev, "MISC_CONTROL %08lx\n", misc); |
@@ -294,11 +294,11 @@ unsigned long sm501_modify_reg(struct device *dev, | |||
294 | 294 | ||
295 | spin_lock_irqsave(&sm->reg_lock, save); | 295 | spin_lock_irqsave(&sm->reg_lock, save); |
296 | 296 | ||
297 | data = readl(sm->regs + reg); | 297 | data = smc501_readl(sm->regs + reg); |
298 | data |= set; | 298 | data |= set; |
299 | data &= ~clear; | 299 | data &= ~clear; |
300 | 300 | ||
301 | writel(data, sm->regs + reg); | 301 | smc501_writel(data, sm->regs + reg); |
302 | sm501_sync_regs(sm); | 302 | sm501_sync_regs(sm); |
303 | 303 | ||
304 | spin_unlock_irqrestore(&sm->reg_lock, save); | 304 | spin_unlock_irqrestore(&sm->reg_lock, save); |
@@ -322,9 +322,9 @@ int sm501_unit_power(struct device *dev, unsigned int unit, unsigned int to) | |||
322 | 322 | ||
323 | mutex_lock(&sm->clock_lock); | 323 | mutex_lock(&sm->clock_lock); |
324 | 324 | ||
325 | mode = readl(sm->regs + SM501_POWER_MODE_CONTROL); | 325 | mode = smc501_readl(sm->regs + SM501_POWER_MODE_CONTROL); |
326 | gate = readl(sm->regs + SM501_CURRENT_GATE); | 326 | gate = smc501_readl(sm->regs + SM501_CURRENT_GATE); |
327 | clock = readl(sm->regs + SM501_CURRENT_CLOCK); | 327 | clock = smc501_readl(sm->regs + SM501_CURRENT_CLOCK); |
328 | 328 | ||
329 | mode &= 3; /* get current power mode */ | 329 | mode &= 3; /* get current power mode */ |
330 | 330 | ||
@@ -356,14 +356,14 @@ int sm501_unit_power(struct device *dev, unsigned int unit, unsigned int to) | |||
356 | 356 | ||
357 | switch (mode) { | 357 | switch (mode) { |
358 | case 1: | 358 | case 1: |
359 | writel(gate, sm->regs + SM501_POWER_MODE_0_GATE); | 359 | smc501_writel(gate, sm->regs + SM501_POWER_MODE_0_GATE); |
360 | writel(clock, sm->regs + SM501_POWER_MODE_0_CLOCK); | 360 | smc501_writel(clock, sm->regs + SM501_POWER_MODE_0_CLOCK); |
361 | mode = 0; | 361 | mode = 0; |
362 | break; | 362 | break; |
363 | case 2: | 363 | case 2: |
364 | case 0: | 364 | case 0: |
365 | writel(gate, sm->regs + SM501_POWER_MODE_1_GATE); | 365 | smc501_writel(gate, sm->regs + SM501_POWER_MODE_1_GATE); |
366 | writel(clock, sm->regs + SM501_POWER_MODE_1_CLOCK); | 366 | smc501_writel(clock, sm->regs + SM501_POWER_MODE_1_CLOCK); |
367 | mode = 1; | 367 | mode = 1; |
368 | break; | 368 | break; |
369 | 369 | ||
@@ -372,7 +372,7 @@ int sm501_unit_power(struct device *dev, unsigned int unit, unsigned int to) | |||
372 | goto already; | 372 | goto already; |
373 | } | 373 | } |
374 | 374 | ||
375 | writel(mode, sm->regs + SM501_POWER_MODE_CONTROL); | 375 | smc501_writel(mode, sm->regs + SM501_POWER_MODE_CONTROL); |
376 | sm501_sync_regs(sm); | 376 | sm501_sync_regs(sm); |
377 | 377 | ||
378 | dev_dbg(sm->dev, "gate %08lx, clock %08lx, mode %08lx\n", | 378 | dev_dbg(sm->dev, "gate %08lx, clock %08lx, mode %08lx\n", |
@@ -519,9 +519,9 @@ unsigned long sm501_set_clock(struct device *dev, | |||
519 | unsigned long req_freq) | 519 | unsigned long req_freq) |
520 | { | 520 | { |
521 | struct sm501_devdata *sm = dev_get_drvdata(dev); | 521 | struct sm501_devdata *sm = dev_get_drvdata(dev); |
522 | unsigned long mode = readl(sm->regs + SM501_POWER_MODE_CONTROL); | 522 | unsigned long mode = smc501_readl(sm->regs + SM501_POWER_MODE_CONTROL); |
523 | unsigned long gate = readl(sm->regs + SM501_CURRENT_GATE); | 523 | unsigned long gate = smc501_readl(sm->regs + SM501_CURRENT_GATE); |
524 | unsigned long clock = readl(sm->regs + SM501_CURRENT_CLOCK); | 524 | unsigned long clock = smc501_readl(sm->regs + SM501_CURRENT_CLOCK); |
525 | unsigned char reg; | 525 | unsigned char reg; |
526 | unsigned int pll_reg = 0; | 526 | unsigned int pll_reg = 0; |
527 | unsigned long sm501_freq; /* the actual frequency achieved */ | 527 | unsigned long sm501_freq; /* the actual frequency achieved */ |
@@ -592,9 +592,9 @@ unsigned long sm501_set_clock(struct device *dev, | |||
592 | 592 | ||
593 | mutex_lock(&sm->clock_lock); | 593 | mutex_lock(&sm->clock_lock); |
594 | 594 | ||
595 | mode = readl(sm->regs + SM501_POWER_MODE_CONTROL); | 595 | mode = smc501_readl(sm->regs + SM501_POWER_MODE_CONTROL); |
596 | gate = readl(sm->regs + SM501_CURRENT_GATE); | 596 | gate = smc501_readl(sm->regs + SM501_CURRENT_GATE); |
597 | clock = readl(sm->regs + SM501_CURRENT_CLOCK); | 597 | clock = smc501_readl(sm->regs + SM501_CURRENT_CLOCK); |
598 | 598 | ||
599 | clock = clock & ~(0xFF << clksrc); | 599 | clock = clock & ~(0xFF << clksrc); |
600 | clock |= reg<<clksrc; | 600 | clock |= reg<<clksrc; |
@@ -603,14 +603,14 @@ unsigned long sm501_set_clock(struct device *dev, | |||
603 | 603 | ||
604 | switch (mode) { | 604 | switch (mode) { |
605 | case 1: | 605 | case 1: |
606 | writel(gate, sm->regs + SM501_POWER_MODE_0_GATE); | 606 | smc501_writel(gate, sm->regs + SM501_POWER_MODE_0_GATE); |
607 | writel(clock, sm->regs + SM501_POWER_MODE_0_CLOCK); | 607 | smc501_writel(clock, sm->regs + SM501_POWER_MODE_0_CLOCK); |
608 | mode = 0; | 608 | mode = 0; |
609 | break; | 609 | break; |
610 | case 2: | 610 | case 2: |
611 | case 0: | 611 | case 0: |
612 | writel(gate, sm->regs + SM501_POWER_MODE_1_GATE); | 612 | smc501_writel(gate, sm->regs + SM501_POWER_MODE_1_GATE); |
613 | writel(clock, sm->regs + SM501_POWER_MODE_1_CLOCK); | 613 | smc501_writel(clock, sm->regs + SM501_POWER_MODE_1_CLOCK); |
614 | mode = 1; | 614 | mode = 1; |
615 | break; | 615 | break; |
616 | 616 | ||
@@ -619,10 +619,11 @@ unsigned long sm501_set_clock(struct device *dev, | |||
619 | return -1; | 619 | return -1; |
620 | } | 620 | } |
621 | 621 | ||
622 | writel(mode, sm->regs + SM501_POWER_MODE_CONTROL); | 622 | smc501_writel(mode, sm->regs + SM501_POWER_MODE_CONTROL); |
623 | 623 | ||
624 | if (pll_reg) | 624 | if (pll_reg) |
625 | writel(pll_reg, sm->regs + SM501_PROGRAMMABLE_PLL_CONTROL); | 625 | smc501_writel(pll_reg, |
626 | sm->regs + SM501_PROGRAMMABLE_PLL_CONTROL); | ||
626 | 627 | ||
627 | sm501_sync_regs(sm); | 628 | sm501_sync_regs(sm); |
628 | 629 | ||
@@ -902,7 +903,7 @@ static int sm501_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
902 | struct sm501_gpio_chip *smgpio = to_sm501_gpio(chip); | 903 | struct sm501_gpio_chip *smgpio = to_sm501_gpio(chip); |
903 | unsigned long result; | 904 | unsigned long result; |
904 | 905 | ||
905 | result = readl(smgpio->regbase + SM501_GPIO_DATA_LOW); | 906 | result = smc501_readl(smgpio->regbase + SM501_GPIO_DATA_LOW); |
906 | result >>= offset; | 907 | result >>= offset; |
907 | 908 | ||
908 | return result & 1UL; | 909 | return result & 1UL; |
@@ -915,13 +916,13 @@ static void sm501_gpio_ensure_gpio(struct sm501_gpio_chip *smchip, | |||
915 | 916 | ||
916 | /* check and modify if this pin is not set as gpio. */ | 917 | /* check and modify if this pin is not set as gpio. */ |
917 | 918 | ||
918 | if (readl(smchip->control) & bit) { | 919 | if (smc501_readl(smchip->control) & bit) { |
919 | dev_info(sm501_gpio_to_dev(smchip->ourgpio)->dev, | 920 | dev_info(sm501_gpio_to_dev(smchip->ourgpio)->dev, |
920 | "changing mode of gpio, bit %08lx\n", bit); | 921 | "changing mode of gpio, bit %08lx\n", bit); |
921 | 922 | ||
922 | ctrl = readl(smchip->control); | 923 | ctrl = smc501_readl(smchip->control); |
923 | ctrl &= ~bit; | 924 | ctrl &= ~bit; |
924 | writel(ctrl, smchip->control); | 925 | smc501_writel(ctrl, smchip->control); |
925 | 926 | ||
926 | sm501_sync_regs(sm501_gpio_to_dev(smchip->ourgpio)); | 927 | sm501_sync_regs(sm501_gpio_to_dev(smchip->ourgpio)); |
927 | } | 928 | } |
@@ -942,10 +943,10 @@ static void sm501_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
942 | 943 | ||
943 | spin_lock_irqsave(&smgpio->lock, save); | 944 | spin_lock_irqsave(&smgpio->lock, save); |
944 | 945 | ||
945 | val = readl(regs + SM501_GPIO_DATA_LOW) & ~bit; | 946 | val = smc501_readl(regs + SM501_GPIO_DATA_LOW) & ~bit; |
946 | if (value) | 947 | if (value) |
947 | val |= bit; | 948 | val |= bit; |
948 | writel(val, regs); | 949 | smc501_writel(val, regs); |
949 | 950 | ||
950 | sm501_sync_regs(sm501_gpio_to_dev(smgpio)); | 951 | sm501_sync_regs(sm501_gpio_to_dev(smgpio)); |
951 | sm501_gpio_ensure_gpio(smchip, bit); | 952 | sm501_gpio_ensure_gpio(smchip, bit); |
@@ -967,8 +968,8 @@ static int sm501_gpio_input(struct gpio_chip *chip, unsigned offset) | |||
967 | 968 | ||
968 | spin_lock_irqsave(&smgpio->lock, save); | 969 | spin_lock_irqsave(&smgpio->lock, save); |
969 | 970 | ||
970 | ddr = readl(regs + SM501_GPIO_DDR_LOW); | 971 | ddr = smc501_readl(regs + SM501_GPIO_DDR_LOW); |
971 | writel(ddr & ~bit, regs + SM501_GPIO_DDR_LOW); | 972 | smc501_writel(ddr & ~bit, regs + SM501_GPIO_DDR_LOW); |
972 | 973 | ||
973 | sm501_sync_regs(sm501_gpio_to_dev(smgpio)); | 974 | sm501_sync_regs(sm501_gpio_to_dev(smgpio)); |
974 | sm501_gpio_ensure_gpio(smchip, bit); | 975 | sm501_gpio_ensure_gpio(smchip, bit); |
@@ -994,18 +995,18 @@ static int sm501_gpio_output(struct gpio_chip *chip, | |||
994 | 995 | ||
995 | spin_lock_irqsave(&smgpio->lock, save); | 996 | spin_lock_irqsave(&smgpio->lock, save); |
996 | 997 | ||
997 | val = readl(regs + SM501_GPIO_DATA_LOW); | 998 | val = smc501_readl(regs + SM501_GPIO_DATA_LOW); |
998 | if (value) | 999 | if (value) |
999 | val |= bit; | 1000 | val |= bit; |
1000 | else | 1001 | else |
1001 | val &= ~bit; | 1002 | val &= ~bit; |
1002 | writel(val, regs); | 1003 | smc501_writel(val, regs); |
1003 | 1004 | ||
1004 | ddr = readl(regs + SM501_GPIO_DDR_LOW); | 1005 | ddr = smc501_readl(regs + SM501_GPIO_DDR_LOW); |
1005 | writel(ddr | bit, regs + SM501_GPIO_DDR_LOW); | 1006 | smc501_writel(ddr | bit, regs + SM501_GPIO_DDR_LOW); |
1006 | 1007 | ||
1007 | sm501_sync_regs(sm501_gpio_to_dev(smgpio)); | 1008 | sm501_sync_regs(sm501_gpio_to_dev(smgpio)); |
1008 | writel(val, regs + SM501_GPIO_DATA_LOW); | 1009 | smc501_writel(val, regs + SM501_GPIO_DATA_LOW); |
1009 | 1010 | ||
1010 | sm501_sync_regs(sm501_gpio_to_dev(smgpio)); | 1011 | sm501_sync_regs(sm501_gpio_to_dev(smgpio)); |
1011 | spin_unlock_irqrestore(&smgpio->lock, save); | 1012 | spin_unlock_irqrestore(&smgpio->lock, save); |
@@ -1231,7 +1232,7 @@ static ssize_t sm501_dbg_regs(struct device *dev, | |||
1231 | 1232 | ||
1232 | for (reg = 0x00; reg < 0x70; reg += 4) { | 1233 | for (reg = 0x00; reg < 0x70; reg += 4) { |
1233 | ret = sprintf(ptr, "%08x = %08x\n", | 1234 | ret = sprintf(ptr, "%08x = %08x\n", |
1234 | reg, readl(sm->regs + reg)); | 1235 | reg, smc501_readl(sm->regs + reg)); |
1235 | ptr += ret; | 1236 | ptr += ret; |
1236 | } | 1237 | } |
1237 | 1238 | ||
@@ -1255,10 +1256,10 @@ static inline void sm501_init_reg(struct sm501_devdata *sm, | |||
1255 | { | 1256 | { |
1256 | unsigned long tmp; | 1257 | unsigned long tmp; |
1257 | 1258 | ||
1258 | tmp = readl(sm->regs + reg); | 1259 | tmp = smc501_readl(sm->regs + reg); |
1259 | tmp &= ~r->mask; | 1260 | tmp &= ~r->mask; |
1260 | tmp |= r->set; | 1261 | tmp |= r->set; |
1261 | writel(tmp, sm->regs + reg); | 1262 | smc501_writel(tmp, sm->regs + reg); |
1262 | } | 1263 | } |
1263 | 1264 | ||
1264 | /* sm501_init_regs | 1265 | /* sm501_init_regs |
@@ -1299,7 +1300,7 @@ static void sm501_init_regs(struct sm501_devdata *sm, | |||
1299 | 1300 | ||
1300 | static int sm501_check_clocks(struct sm501_devdata *sm) | 1301 | static int sm501_check_clocks(struct sm501_devdata *sm) |
1301 | { | 1302 | { |
1302 | unsigned long pwrmode = readl(sm->regs + SM501_CURRENT_CLOCK); | 1303 | unsigned long pwrmode = smc501_readl(sm->regs + SM501_CURRENT_CLOCK); |
1303 | unsigned long msrc = (pwrmode & SM501_POWERMODE_M_SRC); | 1304 | unsigned long msrc = (pwrmode & SM501_POWERMODE_M_SRC); |
1304 | unsigned long m1src = (pwrmode & SM501_POWERMODE_M1_SRC); | 1305 | unsigned long m1src = (pwrmode & SM501_POWERMODE_M1_SRC); |
1305 | 1306 | ||
@@ -1334,7 +1335,7 @@ static int __devinit sm501_init_dev(struct sm501_devdata *sm) | |||
1334 | 1335 | ||
1335 | INIT_LIST_HEAD(&sm->devices); | 1336 | INIT_LIST_HEAD(&sm->devices); |
1336 | 1337 | ||
1337 | devid = readl(sm->regs + SM501_DEVICEID); | 1338 | devid = smc501_readl(sm->regs + SM501_DEVICEID); |
1338 | 1339 | ||
1339 | if ((devid & SM501_DEVICEID_IDMASK) != SM501_DEVICEID_SM501) { | 1340 | if ((devid & SM501_DEVICEID_IDMASK) != SM501_DEVICEID_SM501) { |
1340 | dev_err(sm->dev, "incorrect device id %08lx\n", devid); | 1341 | dev_err(sm->dev, "incorrect device id %08lx\n", devid); |
@@ -1342,9 +1343,9 @@ static int __devinit sm501_init_dev(struct sm501_devdata *sm) | |||
1342 | } | 1343 | } |
1343 | 1344 | ||
1344 | /* disable irqs */ | 1345 | /* disable irqs */ |
1345 | writel(0, sm->regs + SM501_IRQ_MASK); | 1346 | smc501_writel(0, sm->regs + SM501_IRQ_MASK); |
1346 | 1347 | ||
1347 | dramctrl = readl(sm->regs + SM501_DRAM_CONTROL); | 1348 | dramctrl = smc501_readl(sm->regs + SM501_DRAM_CONTROL); |
1348 | mem_avail = sm501_mem_local[(dramctrl >> 13) & 0x7]; | 1349 | mem_avail = sm501_mem_local[(dramctrl >> 13) & 0x7]; |
1349 | 1350 | ||
1350 | dev_info(sm->dev, "SM501 At %p: Version %08lx, %ld Mb, IRQ %d\n", | 1351 | dev_info(sm->dev, "SM501 At %p: Version %08lx, %ld Mb, IRQ %d\n", |
@@ -1489,7 +1490,7 @@ static int sm501_plat_suspend(struct platform_device *pdev, pm_message_t state) | |||
1489 | struct sm501_devdata *sm = platform_get_drvdata(pdev); | 1490 | struct sm501_devdata *sm = platform_get_drvdata(pdev); |
1490 | 1491 | ||
1491 | sm->in_suspend = 1; | 1492 | sm->in_suspend = 1; |
1492 | sm->pm_misc = readl(sm->regs + SM501_MISC_CONTROL); | 1493 | sm->pm_misc = smc501_readl(sm->regs + SM501_MISC_CONTROL); |
1493 | 1494 | ||
1494 | sm501_dump_regs(sm); | 1495 | sm501_dump_regs(sm); |
1495 | 1496 | ||
@@ -1513,9 +1514,9 @@ static int sm501_plat_resume(struct platform_device *pdev) | |||
1513 | 1514 | ||
1514 | /* check to see if we are in the same state as when suspended */ | 1515 | /* check to see if we are in the same state as when suspended */ |
1515 | 1516 | ||
1516 | if (readl(sm->regs + SM501_MISC_CONTROL) != sm->pm_misc) { | 1517 | if (smc501_readl(sm->regs + SM501_MISC_CONTROL) != sm->pm_misc) { |
1517 | dev_info(sm->dev, "SM501_MISC_CONTROL changed over sleep\n"); | 1518 | dev_info(sm->dev, "SM501_MISC_CONTROL changed over sleep\n"); |
1518 | writel(sm->pm_misc, sm->regs + SM501_MISC_CONTROL); | 1519 | smc501_writel(sm->pm_misc, sm->regs + SM501_MISC_CONTROL); |
1519 | 1520 | ||
1520 | /* our suspend causes the controller state to change, | 1521 | /* our suspend causes the controller state to change, |
1521 | * either by something attempting setup, power loss, | 1522 | * either by something attempting setup, power loss, |