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authorWei WANG <wei_wang@realsil.com.cn>2013-08-20 21:46:25 -0400
committerSamuel Ortiz <sameo@linux.intel.com>2013-08-30 08:24:07 -0400
commit84d72f9cc21d6e41c620dd34b8248734cd02d995 (patch)
treef84a291737af9885fb573adc4844fc4e0c0c74c5 /drivers/mfd/rtl8411.c
parent828fa1e60117535d9b1e1b09444842ae66e8424d (diff)
mfd: mmc: rtsx: Change default tx phase
The default phase can meet most cards' requirement, but it is not the optimal one. In some extreme situation, the rx phase point produced by the following tuning process will drift quite a distance. Before tuning UHS card, this patch will set a more proper initial tx phase point, which is calculated from statistic data, and can achieve a much better tx signal quality. Signed-off-by: Wei WANG <wei_wang@realsil.com.cn> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Chris Ball <cjb@laptop.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd/rtl8411.c')
-rw-r--r--drivers/mfd/rtl8411.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/mfd/rtl8411.c b/drivers/mfd/rtl8411.c
index e4c1833154ea..52801351864d 100644
--- a/drivers/mfd/rtl8411.c
+++ b/drivers/mfd/rtl8411.c
@@ -452,6 +452,8 @@ void rtl8411_init_params(struct rtsx_pcr *pcr)
452 pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B; 452 pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
453 pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D; 453 pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
454 pcr->aspm_en = ASPM_L1_EN; 454 pcr->aspm_en = ASPM_L1_EN;
455 pcr->tx_initial_phase = SET_CLOCK_PHASE(23, 7, 14);
456 pcr->rx_initial_phase = SET_CLOCK_PHASE(4, 3, 10);
455 457
456 pcr->ic_version = rtl8411_get_ic_version(pcr); 458 pcr->ic_version = rtl8411_get_ic_version(pcr);
457 pcr->sd_pull_ctl_enable_tbl = rtl8411_sd_pull_ctl_enable_tbl; 459 pcr->sd_pull_ctl_enable_tbl = rtl8411_sd_pull_ctl_enable_tbl;
@@ -471,6 +473,8 @@ void rtl8411b_init_params(struct rtsx_pcr *pcr)
471 pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B; 473 pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
472 pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D; 474 pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
473 pcr->aspm_en = ASPM_L1_EN; 475 pcr->aspm_en = ASPM_L1_EN;
476 pcr->tx_initial_phase = SET_CLOCK_PHASE(23, 7, 14);
477 pcr->rx_initial_phase = SET_CLOCK_PHASE(4, 3, 10);
474 478
475 pcr->ic_version = rtl8411_get_ic_version(pcr); 479 pcr->ic_version = rtl8411_get_ic_version(pcr);
476 480