diff options
| author | Antonio Ospite <ao2@ao2.it> | 2014-06-04 08:03:46 -0400 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2014-06-19 09:23:36 -0400 |
| commit | b39fc89034b465bdfab13d62b37f1fe49c7577bf (patch) | |
| tree | 0129400366ff740e94d3c91791b7de9e4baefe7e /drivers/mfd/intel_msic.c | |
| parent | 2fba5376ed7d8cdebd873ee124b8e5dd3c936f92 (diff) | |
mfd: fix comment
Signed-off-by: Antonio Ospite <ao2@ao2.it>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'drivers/mfd/intel_msic.c')
| -rw-r--r-- | drivers/mfd/intel_msic.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mfd/intel_msic.c b/drivers/mfd/intel_msic.c index 049fd23af54a..443e7cddff28 100644 --- a/drivers/mfd/intel_msic.c +++ b/drivers/mfd/intel_msic.c | |||
| @@ -27,7 +27,7 @@ | |||
| 27 | 27 | ||
| 28 | /* | 28 | /* |
| 29 | * MSIC interrupt tree is readable from SRAM at INTEL_MSIC_IRQ_PHYS_BASE. | 29 | * MSIC interrupt tree is readable from SRAM at INTEL_MSIC_IRQ_PHYS_BASE. |
| 30 | * Since IRQ block starts from address 0x002 we need to substract that from | 30 | * Since IRQ block starts from address 0x002 we need to subtract that from |
| 31 | * the actual IRQ status register address. | 31 | * the actual IRQ status register address. |
| 32 | */ | 32 | */ |
| 33 | #define MSIC_IRQ_STATUS(x) (INTEL_MSIC_IRQ_PHYS_BASE + ((x) - 2)) | 33 | #define MSIC_IRQ_STATUS(x) (INTEL_MSIC_IRQ_PHYS_BASE + ((x) - 2)) |