diff options
author | Daniel Ribeiro <drwyrm@gmail.com> | 2009-06-23 11:33:10 -0400 |
---|---|---|
committer | Samuel Ortiz <sameo@linux.intel.com> | 2009-09-17 03:46:46 -0400 |
commit | ecd78cbdb989fd593bf4fd69cdb572200e70a553 (patch) | |
tree | f09604e607e78fea4c42cb2a7ce10e3f627cf87e /drivers/mfd/ezx-pcap.c | |
parent | 9f7b07d6cc3ed14783c9427a5b2a69794eb2de64 (diff) |
mfd: add set_ts_bits for pcap
Some TS controller bits are on the same register as the ADC control, save
TS specific bits and export a set_ts_bits function so the TS driver can set
it with the adc_mutex lock held.
Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd/ezx-pcap.c')
-rw-r--r-- | drivers/mfd/ezx-pcap.c | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/drivers/mfd/ezx-pcap.c b/drivers/mfd/ezx-pcap.c index de7e63706abb..c5122024f05a 100644 --- a/drivers/mfd/ezx-pcap.c +++ b/drivers/mfd/ezx-pcap.c | |||
@@ -195,6 +195,19 @@ static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
195 | } | 195 | } |
196 | 196 | ||
197 | /* ADC */ | 197 | /* ADC */ |
198 | void pcap_set_ts_bits(struct pcap_chip *pcap, u32 bits) | ||
199 | { | ||
200 | u32 tmp; | ||
201 | |||
202 | mutex_lock(&pcap->adc_mutex); | ||
203 | ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); | ||
204 | tmp &= ~(PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR); | ||
205 | tmp |= bits & (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR); | ||
206 | ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); | ||
207 | mutex_unlock(&pcap->adc_mutex); | ||
208 | } | ||
209 | EXPORT_SYMBOL_GPL(pcap_set_ts_bits); | ||
210 | |||
198 | static void pcap_disable_adc(struct pcap_chip *pcap) | 211 | static void pcap_disable_adc(struct pcap_chip *pcap) |
199 | { | 212 | { |
200 | u32 tmp; | 213 | u32 tmp; |
@@ -217,15 +230,16 @@ static void pcap_adc_trigger(struct pcap_chip *pcap) | |||
217 | mutex_unlock(&pcap->adc_mutex); | 230 | mutex_unlock(&pcap->adc_mutex); |
218 | return; | 231 | return; |
219 | } | 232 | } |
220 | mutex_unlock(&pcap->adc_mutex); | 233 | /* start conversion on requested bank, save TS_M bits */ |
221 | 234 | ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); | |
222 | /* start conversion on requested bank */ | 235 | tmp &= (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR); |
223 | tmp = pcap->adc_queue[head]->flags | PCAP_ADC_ADEN; | 236 | tmp |= pcap->adc_queue[head]->flags | PCAP_ADC_ADEN; |
224 | 237 | ||
225 | if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1) | 238 | if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1) |
226 | tmp |= PCAP_ADC_AD_SEL1; | 239 | tmp |= PCAP_ADC_AD_SEL1; |
227 | 240 | ||
228 | ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); | 241 | ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); |
242 | mutex_unlock(&pcap->adc_mutex); | ||
229 | ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC); | 243 | ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC); |
230 | } | 244 | } |
231 | 245 | ||