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authorJacob Pan <jacob.jun.pan@linux.intel.com>2014-11-11 14:30:09 -0500
committerLee Jones <lee.jones@linaro.org>2014-11-18 10:34:13 -0500
commitff3bbc5c637ab0843b3a9df717b6cca4e8243f0c (patch)
tree49a807c62b3ab7e22acdb8e061d9f2a71477aa3c /drivers/mfd/axp20x.c
parent29ec0a25c8d732d4f51689060ddabb0de3356cc8 (diff)
mfd/axp20x: avoid irq numbering collision
IRQ numbers in axp20x devices are defined with high-order bit first in each IRQ enable/status registers. On Intel platforms it is more common to number IRQs with least significant bit first. Therefore, sharing IRQ# between the two is very difficult. Since AXP288 is a customized PMIC for Intel platform and the amount of shared IRQs are very small, we use separate IRQ numbering. This also fixes collision and a duplicate in WBTO interrupt. e.g. For the 16 interrupts controlled in IRQ enabled registers 1 & 2, on axp20x for ARM, the PMIC local IRQ numbers and register bits are mapped as: IRQ#: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 --------------------------------------------------------- ARM: 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Intel: 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Signed-off-by: Todd Brandt <todd.e.brandt@linux.intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Acked-by: Jonathan Cameron <jic23@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers/mfd/axp20x.c')
-rw-r--r--drivers/mfd/axp20x.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
index b2fb7f492c86..9c4714e13c3c 100644
--- a/drivers/mfd/axp20x.c
+++ b/drivers/mfd/axp20x.c
@@ -183,21 +183,21 @@ static const struct regmap_irq axp20x_regmap_irqs[] = {
183 183
184/* some IRQs are compatible with axp20x models */ 184/* some IRQs are compatible with axp20x models */
185static const struct regmap_irq axp288_regmap_irqs[] = { 185static const struct regmap_irq axp288_regmap_irqs[] = {
186 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), 186 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
187 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), 187 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3),
188 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), 188 INIT_REGMAP_IRQ(AXP288, OV, 0, 4),
189 189
190 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), 190 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2),
191 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), 191 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3),
192 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4), 192 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4),
193 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5), 193 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5),
194 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), 194 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6),
195 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), 195 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7),
196 196
197 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0), 197 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0),
198 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1), 198 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1),
199 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2), 199 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2),
200 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 3), 200 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3),
201 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4), 201 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4),
202 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5), 202 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5),
203 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6), 203 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6),
@@ -215,7 +215,7 @@ static const struct regmap_irq axp288_regmap_irqs[] = {
215 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4), 215 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4),
216 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5), 216 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5),
217 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6), 217 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6),
218 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), 218 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7),
219 219
220 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0), 220 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0),
221 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), 221 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),