diff options
author | Mauro Carvalho Chehab <mchehab@infradead.org> | 2008-07-27 21:23:18 -0400 |
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committer | Mauro Carvalho Chehab <mchehab@infradead.org> | 2008-07-27 21:23:18 -0400 |
commit | c2f90e9536887fb76fb6a2aa239a70fc49beda10 (patch) | |
tree | f87e6b29248c45a92ec6b4b8ffe675bb52e6104b /drivers/mfd/asic3.c | |
parent | f3409f71a76838b1bc985f753eed787a3f17bc2c (diff) | |
parent | c9272c4f9fbe2087beb3392f526dc5b19efaa56b (diff) |
Merge ../linux-2.6
Diffstat (limited to 'drivers/mfd/asic3.c')
-rw-r--r-- | drivers/mfd/asic3.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c index eabf0bfccab4..c6408a62d95e 100644 --- a/drivers/mfd/asic3.c +++ b/drivers/mfd/asic3.c | |||
@@ -256,28 +256,28 @@ static int asic3_gpio_irq_type(unsigned int irq, unsigned int type) | |||
256 | bank + ASIC3_GPIO_TRIGGER_TYPE); | 256 | bank + ASIC3_GPIO_TRIGGER_TYPE); |
257 | asic->irq_bothedge[(irq - asic->irq_base) >> 4] &= ~bit; | 257 | asic->irq_bothedge[(irq - asic->irq_base) >> 4] &= ~bit; |
258 | 258 | ||
259 | if (type == IRQT_RISING) { | 259 | if (type == IRQ_TYPE_EDGE_RISING) { |
260 | trigger |= bit; | 260 | trigger |= bit; |
261 | edge |= bit; | 261 | edge |= bit; |
262 | } else if (type == IRQT_FALLING) { | 262 | } else if (type == IRQ_TYPE_EDGE_FALLING) { |
263 | trigger |= bit; | 263 | trigger |= bit; |
264 | edge &= ~bit; | 264 | edge &= ~bit; |
265 | } else if (type == IRQT_BOTHEDGE) { | 265 | } else if (type == IRQ_TYPE_EDGE_BOTH) { |
266 | trigger |= bit; | 266 | trigger |= bit; |
267 | if (asic3_gpio_get(&asic->gpio, irq - asic->irq_base)) | 267 | if (asic3_gpio_get(&asic->gpio, irq - asic->irq_base)) |
268 | edge &= ~bit; | 268 | edge &= ~bit; |
269 | else | 269 | else |
270 | edge |= bit; | 270 | edge |= bit; |
271 | asic->irq_bothedge[(irq - asic->irq_base) >> 4] |= bit; | 271 | asic->irq_bothedge[(irq - asic->irq_base) >> 4] |= bit; |
272 | } else if (type == IRQT_LOW) { | 272 | } else if (type == IRQ_TYPE_LEVEL_LOW) { |
273 | trigger &= ~bit; | 273 | trigger &= ~bit; |
274 | level &= ~bit; | 274 | level &= ~bit; |
275 | } else if (type == IRQT_HIGH) { | 275 | } else if (type == IRQ_TYPE_LEVEL_HIGH) { |
276 | trigger &= ~bit; | 276 | trigger &= ~bit; |
277 | level |= bit; | 277 | level |= bit; |
278 | } else { | 278 | } else { |
279 | /* | 279 | /* |
280 | * if type == IRQT_NOEDGE, we should mask interrupts, but | 280 | * if type == IRQ_TYPE_NONE, we should mask interrupts, but |
281 | * be careful to not unmask them if mask was also called. | 281 | * be careful to not unmask them if mask was also called. |
282 | * Probably need internal state for mask. | 282 | * Probably need internal state for mask. |
283 | */ | 283 | */ |
@@ -343,7 +343,7 @@ static int __init asic3_irq_probe(struct platform_device *pdev) | |||
343 | ASIC3_INTMASK_GINTMASK); | 343 | ASIC3_INTMASK_GINTMASK); |
344 | 344 | ||
345 | set_irq_chained_handler(asic->irq_nr, asic3_irq_demux); | 345 | set_irq_chained_handler(asic->irq_nr, asic3_irq_demux); |
346 | set_irq_type(asic->irq_nr, IRQT_RISING); | 346 | set_irq_type(asic->irq_nr, IRQ_TYPE_EDGE_RISING); |
347 | set_irq_data(asic->irq_nr, asic); | 347 | set_irq_data(asic->irq_nr, asic); |
348 | 348 | ||
349 | return 0; | 349 | return 0; |