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authorKoji Matsuoka <koji.matsuoka.xm@renesas.com>2014-10-21 01:10:27 -0400
committerMauro Carvalho Chehab <mchehab@osg.samsung.com>2014-12-12 07:29:01 -0500
commit4c28078c0eed3f9130f758e74934763207defa19 (patch)
treebc68d7304c966270e5904bf924e9e66e9b9aa0fb /drivers/media
parent76deaff8085304e9f6a4ce165b61ff467bbcd888 (diff)
[media] rcar_vin: Add scaling support
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> [g.liakhovetski@gmx.de: minor stylistic and formatting corrections] Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Diffstat (limited to 'drivers/media')
-rw-r--r--drivers/media/platform/soc_camera/rcar_vin.c451
1 files changed, 442 insertions, 9 deletions
diff --git a/drivers/media/platform/soc_camera/rcar_vin.c b/drivers/media/platform/soc_camera/rcar_vin.c
index c60560a4445a..c71ef2b526a0 100644
--- a/drivers/media/platform/soc_camera/rcar_vin.c
+++ b/drivers/media/platform/soc_camera/rcar_vin.c
@@ -64,6 +64,30 @@
64#define VNDMR_REG 0x58 /* Video n Data Mode Register */ 64#define VNDMR_REG 0x58 /* Video n Data Mode Register */
65#define VNDMR2_REG 0x5C /* Video n Data Mode Register 2 */ 65#define VNDMR2_REG 0x5C /* Video n Data Mode Register 2 */
66#define VNUVAOF_REG 0x60 /* Video n UV Address Offset Register */ 66#define VNUVAOF_REG 0x60 /* Video n UV Address Offset Register */
67#define VNC1A_REG 0x80 /* Video n Coefficient Set C1A Register */
68#define VNC1B_REG 0x84 /* Video n Coefficient Set C1B Register */
69#define VNC1C_REG 0x88 /* Video n Coefficient Set C1C Register */
70#define VNC2A_REG 0x90 /* Video n Coefficient Set C2A Register */
71#define VNC2B_REG 0x94 /* Video n Coefficient Set C2B Register */
72#define VNC2C_REG 0x98 /* Video n Coefficient Set C2C Register */
73#define VNC3A_REG 0xA0 /* Video n Coefficient Set C3A Register */
74#define VNC3B_REG 0xA4 /* Video n Coefficient Set C3B Register */
75#define VNC3C_REG 0xA8 /* Video n Coefficient Set C3C Register */
76#define VNC4A_REG 0xB0 /* Video n Coefficient Set C4A Register */
77#define VNC4B_REG 0xB4 /* Video n Coefficient Set C4B Register */
78#define VNC4C_REG 0xB8 /* Video n Coefficient Set C4C Register */
79#define VNC5A_REG 0xC0 /* Video n Coefficient Set C5A Register */
80#define VNC5B_REG 0xC4 /* Video n Coefficient Set C5B Register */
81#define VNC5C_REG 0xC8 /* Video n Coefficient Set C5C Register */
82#define VNC6A_REG 0xD0 /* Video n Coefficient Set C6A Register */
83#define VNC6B_REG 0xD4 /* Video n Coefficient Set C6B Register */
84#define VNC6C_REG 0xD8 /* Video n Coefficient Set C6C Register */
85#define VNC7A_REG 0xE0 /* Video n Coefficient Set C7A Register */
86#define VNC7B_REG 0xE4 /* Video n Coefficient Set C7B Register */
87#define VNC7C_REG 0xE8 /* Video n Coefficient Set C7C Register */
88#define VNC8A_REG 0xF0 /* Video n Coefficient Set C8A Register */
89#define VNC8B_REG 0xF4 /* Video n Coefficient Set C8B Register */
90#define VNC8C_REG 0xF8 /* Video n Coefficient Set C8C Register */
67 91
68/* Register bit fields for R-Car VIN */ 92/* Register bit fields for R-Car VIN */
69/* Video n Main Control Register bits */ 93/* Video n Main Control Register bits */
@@ -117,6 +141,324 @@ enum chip_id {
117 RCAR_E1, 141 RCAR_E1,
118}; 142};
119 143
144struct vin_coeff {
145 unsigned short xs_value;
146 u32 coeff_set[24];
147};
148
149static const struct vin_coeff vin_coeff_set[] = {
150 { 0x0000, {
151 0x00000000, 0x00000000, 0x00000000,
152 0x00000000, 0x00000000, 0x00000000,
153 0x00000000, 0x00000000, 0x00000000,
154 0x00000000, 0x00000000, 0x00000000,
155 0x00000000, 0x00000000, 0x00000000,
156 0x00000000, 0x00000000, 0x00000000,
157 0x00000000, 0x00000000, 0x00000000,
158 0x00000000, 0x00000000, 0x00000000 },
159 },
160 { 0x1000, {
161 0x000fa400, 0x000fa400, 0x09625902,
162 0x000003f8, 0x00000403, 0x3de0d9f0,
163 0x001fffed, 0x00000804, 0x3cc1f9c3,
164 0x001003de, 0x00000c01, 0x3cb34d7f,
165 0x002003d2, 0x00000c00, 0x3d24a92d,
166 0x00200bca, 0x00000bff, 0x3df600d2,
167 0x002013cc, 0x000007ff, 0x3ed70c7e,
168 0x00100fde, 0x00000000, 0x3f87c036 },
169 },
170 { 0x1200, {
171 0x002ffff1, 0x002ffff1, 0x02a0a9c8,
172 0x002003e7, 0x001ffffa, 0x000185bc,
173 0x002007dc, 0x000003ff, 0x3e52859c,
174 0x00200bd4, 0x00000002, 0x3d53996b,
175 0x00100fd0, 0x00000403, 0x3d04ad2d,
176 0x00000bd5, 0x00000403, 0x3d35ace7,
177 0x3ff003e4, 0x00000801, 0x3dc674a1,
178 0x3fffe800, 0x00000800, 0x3e76f461 },
179 },
180 { 0x1400, {
181 0x00100be3, 0x00100be3, 0x04d1359a,
182 0x00000fdb, 0x002003ed, 0x0211fd93,
183 0x00000fd6, 0x002003f4, 0x0002d97b,
184 0x000007d6, 0x002ffffb, 0x3e93b956,
185 0x3ff003da, 0x001003ff, 0x3db49926,
186 0x3fffefe9, 0x00100001, 0x3d655cee,
187 0x3fffd400, 0x00000003, 0x3d65f4b6,
188 0x000fb421, 0x00000402, 0x3dc6547e },
189 },
190 { 0x1600, {
191 0x00000bdd, 0x00000bdd, 0x06519578,
192 0x3ff007da, 0x00000be3, 0x03c24973,
193 0x3ff003d9, 0x00000be9, 0x01b30d5f,
194 0x3ffff7df, 0x001003f1, 0x0003c542,
195 0x000fdfec, 0x001003f7, 0x3ec4711d,
196 0x000fc400, 0x002ffffd, 0x3df504f1,
197 0x001fa81a, 0x002ffc00, 0x3d957cc2,
198 0x002f8c3c, 0x00100000, 0x3db5c891 },
199 },
200 { 0x1800, {
201 0x3ff003dc, 0x3ff003dc, 0x0791e558,
202 0x000ff7dd, 0x3ff007de, 0x05328554,
203 0x000fe7e3, 0x3ff00be2, 0x03232546,
204 0x000fd7ee, 0x000007e9, 0x0143bd30,
205 0x001fb800, 0x000007ee, 0x00044511,
206 0x002fa015, 0x000007f4, 0x3ef4bcee,
207 0x002f8832, 0x001003f9, 0x3e4514c7,
208 0x001f7853, 0x001003fd, 0x3de54c9f },
209 },
210 { 0x1a00, {
211 0x000fefe0, 0x000fefe0, 0x08721d3c,
212 0x001fdbe7, 0x000ffbde, 0x0652a139,
213 0x001fcbf0, 0x000003df, 0x0463292e,
214 0x002fb3ff, 0x3ff007e3, 0x0293a91d,
215 0x002f9c12, 0x3ff00be7, 0x01241905,
216 0x001f8c29, 0x000007ed, 0x3fe470eb,
217 0x000f7c46, 0x000007f2, 0x3f04b8ca,
218 0x3fef7865, 0x000007f6, 0x3e74e4a8 },
219 },
220 { 0x1c00, {
221 0x001fd3e9, 0x001fd3e9, 0x08f23d26,
222 0x002fbff3, 0x001fe3e4, 0x0712ad23,
223 0x002fa800, 0x000ff3e0, 0x05631d1b,
224 0x001f9810, 0x000ffbe1, 0x03b3890d,
225 0x000f8c23, 0x000003e3, 0x0233e8fa,
226 0x3fef843b, 0x000003e7, 0x00f430e4,
227 0x3fbf8456, 0x3ff00bea, 0x00046cc8,
228 0x3f8f8c72, 0x3ff00bef, 0x3f3490ac },
229 },
230 { 0x1e00, {
231 0x001fbbf4, 0x001fbbf4, 0x09425112,
232 0x001fa800, 0x002fc7ed, 0x0792b110,
233 0x000f980e, 0x001fdbe6, 0x0613110a,
234 0x3fff8c20, 0x001fe7e3, 0x04a368fd,
235 0x3fcf8c33, 0x000ff7e2, 0x0343b8ed,
236 0x3f9f8c4a, 0x000fffe3, 0x0203f8da,
237 0x3f5f9c61, 0x000003e6, 0x00e428c5,
238 0x3f1fb07b, 0x000003eb, 0x3fe440af },
239 },
240 { 0x2000, {
241 0x000fa400, 0x000fa400, 0x09625902,
242 0x3fff980c, 0x001fb7f5, 0x0812b0ff,
243 0x3fdf901c, 0x001fc7ed, 0x06b2fcfa,
244 0x3faf902d, 0x001fd3e8, 0x055348f1,
245 0x3f7f983f, 0x001fe3e5, 0x04038ce3,
246 0x3f3fa454, 0x001fefe3, 0x02e3c8d1,
247 0x3f0fb86a, 0x001ff7e4, 0x01c3e8c0,
248 0x3ecfd880, 0x000fffe6, 0x00c404ac },
249 },
250 { 0x2200, {
251 0x3fdf9c0b, 0x3fdf9c0b, 0x09725cf4,
252 0x3fbf9818, 0x3fffa400, 0x0842a8f1,
253 0x3f8f9827, 0x000fb3f7, 0x0702f0ec,
254 0x3f5fa037, 0x000fc3ef, 0x05d330e4,
255 0x3f2fac49, 0x001fcfea, 0x04a364d9,
256 0x3effc05c, 0x001fdbe7, 0x038394ca,
257 0x3ecfdc6f, 0x001fe7e6, 0x0273b0bb,
258 0x3ea00083, 0x001fefe6, 0x0183c0a9 },
259 },
260 { 0x2400, {
261 0x3f9fa014, 0x3f9fa014, 0x098260e6,
262 0x3f7f9c23, 0x3fcf9c0a, 0x08629ce5,
263 0x3f4fa431, 0x3fefa400, 0x0742d8e1,
264 0x3f1fb440, 0x3fffb3f8, 0x062310d9,
265 0x3eefc850, 0x000fbbf2, 0x050340d0,
266 0x3ecfe062, 0x000fcbec, 0x041364c2,
267 0x3ea00073, 0x001fd3ea, 0x03037cb5,
268 0x3e902086, 0x001fdfe8, 0x022388a5 },
269 },
270 { 0x2600, {
271 0x3f5fa81e, 0x3f5fa81e, 0x096258da,
272 0x3f3fac2b, 0x3f8fa412, 0x088290d8,
273 0x3f0fbc38, 0x3fafa408, 0x0772c8d5,
274 0x3eefcc47, 0x3fcfa800, 0x0672f4ce,
275 0x3ecfe456, 0x3fefaffa, 0x05531cc6,
276 0x3eb00066, 0x3fffbbf3, 0x047334bb,
277 0x3ea01c77, 0x000fc7ee, 0x039348ae,
278 0x3ea04486, 0x000fd3eb, 0x02b350a1 },
279 },
280 { 0x2800, {
281 0x3f2fb426, 0x3f2fb426, 0x094250ce,
282 0x3f0fc032, 0x3f4fac1b, 0x086284cd,
283 0x3eefd040, 0x3f7fa811, 0x0782acc9,
284 0x3ecfe84c, 0x3f9fa807, 0x06a2d8c4,
285 0x3eb0005b, 0x3fbfac00, 0x05b2f4bc,
286 0x3eb0186a, 0x3fdfb3fa, 0x04c308b4,
287 0x3eb04077, 0x3fefbbf4, 0x03f31ca8,
288 0x3ec06884, 0x000fbff2, 0x03031c9e },
289 },
290 { 0x2a00, {
291 0x3f0fc42d, 0x3f0fc42d, 0x090240c4,
292 0x3eefd439, 0x3f2fb822, 0x08526cc2,
293 0x3edfe845, 0x3f4fb018, 0x078294bf,
294 0x3ec00051, 0x3f6fac0f, 0x06b2b4bb,
295 0x3ec0185f, 0x3f8fac07, 0x05e2ccb4,
296 0x3ec0386b, 0x3fafac00, 0x0502e8ac,
297 0x3ed05c77, 0x3fcfb3fb, 0x0432f0a3,
298 0x3ef08482, 0x3fdfbbf6, 0x0372f898 },
299 },
300 { 0x2c00, {
301 0x3eefdc31, 0x3eefdc31, 0x08e238b8,
302 0x3edfec3d, 0x3f0fc828, 0x082258b9,
303 0x3ed00049, 0x3f1fc01e, 0x077278b6,
304 0x3ed01455, 0x3f3fb815, 0x06c294b2,
305 0x3ed03460, 0x3f5fb40d, 0x0602acac,
306 0x3ef0506c, 0x3f7fb006, 0x0542c0a4,
307 0x3f107476, 0x3f9fb400, 0x0472c89d,
308 0x3f309c80, 0x3fbfb7fc, 0x03b2cc94 },
309 },
310 { 0x2e00, {
311 0x3eefec37, 0x3eefec37, 0x088220b0,
312 0x3ee00041, 0x3effdc2d, 0x07f244ae,
313 0x3ee0144c, 0x3f0fd023, 0x07625cad,
314 0x3ef02c57, 0x3f1fc81a, 0x06c274a9,
315 0x3f004861, 0x3f3fbc13, 0x060288a6,
316 0x3f20686b, 0x3f5fb80c, 0x05529c9e,
317 0x3f408c74, 0x3f6fb805, 0x04b2ac96,
318 0x3f80ac7e, 0x3f8fb800, 0x0402ac8e },
319 },
320 { 0x3000, {
321 0x3ef0003a, 0x3ef0003a, 0x084210a6,
322 0x3ef01045, 0x3effec32, 0x07b228a7,
323 0x3f00284e, 0x3f0fdc29, 0x073244a4,
324 0x3f104058, 0x3f0fd420, 0x06a258a2,
325 0x3f305c62, 0x3f2fc818, 0x0612689d,
326 0x3f508069, 0x3f3fc011, 0x05728496,
327 0x3f80a072, 0x3f4fc00a, 0x04d28c90,
328 0x3fc0c07b, 0x3f6fbc04, 0x04429088 },
329 },
330 { 0x3200, {
331 0x3f00103e, 0x3f00103e, 0x07f1fc9e,
332 0x3f102447, 0x3f000035, 0x0782149d,
333 0x3f203c4f, 0x3f0ff02c, 0x07122c9c,
334 0x3f405458, 0x3f0fe424, 0x06924099,
335 0x3f607061, 0x3f1fd41d, 0x06024c97,
336 0x3f909068, 0x3f2fcc16, 0x05726490,
337 0x3fc0b070, 0x3f3fc80f, 0x04f26c8a,
338 0x0000d077, 0x3f4fc409, 0x04627484 },
339 },
340 { 0x3400, {
341 0x3f202040, 0x3f202040, 0x07a1e898,
342 0x3f303449, 0x3f100c38, 0x0741fc98,
343 0x3f504c50, 0x3f10002f, 0x06e21495,
344 0x3f706459, 0x3f1ff028, 0x06722492,
345 0x3fa08060, 0x3f1fe421, 0x05f2348f,
346 0x3fd09c67, 0x3f1fdc19, 0x05824c89,
347 0x0000bc6e, 0x3f2fd014, 0x04f25086,
348 0x0040dc74, 0x3f3fcc0d, 0x04825c7f },
349 },
350 { 0x3600, {
351 0x3f403042, 0x3f403042, 0x0761d890,
352 0x3f504848, 0x3f301c3b, 0x0701f090,
353 0x3f805c50, 0x3f200c33, 0x06a2008f,
354 0x3fa07458, 0x3f10002b, 0x06520c8d,
355 0x3fd0905e, 0x3f1ff424, 0x05e22089,
356 0x0000ac65, 0x3f1fe81d, 0x05823483,
357 0x0030cc6a, 0x3f2fdc18, 0x04f23c81,
358 0x0080e871, 0x3f2fd412, 0x0482407c },
359 },
360 { 0x3800, {
361 0x3f604043, 0x3f604043, 0x0721c88a,
362 0x3f80544a, 0x3f502c3c, 0x06d1d88a,
363 0x3fb06851, 0x3f301c35, 0x0681e889,
364 0x3fd08456, 0x3f30082f, 0x0611fc88,
365 0x00009c5d, 0x3f200027, 0x05d20884,
366 0x0030b863, 0x3f2ff421, 0x05621880,
367 0x0070d468, 0x3f2fe81b, 0x0502247c,
368 0x00c0ec6f, 0x3f2fe015, 0x04a22877 },
369 },
370 { 0x3a00, {
371 0x3f904c44, 0x3f904c44, 0x06e1b884,
372 0x3fb0604a, 0x3f70383e, 0x0691c885,
373 0x3fe07451, 0x3f502c36, 0x0661d483,
374 0x00009055, 0x3f401831, 0x0601ec81,
375 0x0030a85b, 0x3f300c2a, 0x05b1f480,
376 0x0070c061, 0x3f300024, 0x0562047a,
377 0x00b0d867, 0x3f3ff41e, 0x05020c77,
378 0x00f0f46b, 0x3f2fec19, 0x04a21474 },
379 },
380 { 0x3c00, {
381 0x3fb05c43, 0x3fb05c43, 0x06c1b07e,
382 0x3fe06c4b, 0x3f902c3f, 0x0681c081,
383 0x0000844f, 0x3f703838, 0x0631cc7d,
384 0x00309855, 0x3f602433, 0x05d1d47e,
385 0x0060b459, 0x3f50142e, 0x0581e47b,
386 0x00a0c85f, 0x3f400828, 0x0531f078,
387 0x00e0e064, 0x3f300021, 0x0501fc73,
388 0x00b0fc6a, 0x3f3ff41d, 0x04a20873 },
389 },
390 { 0x3e00, {
391 0x3fe06444, 0x3fe06444, 0x0681a07a,
392 0x00007849, 0x3fc0503f, 0x0641b07a,
393 0x0020904d, 0x3fa0403a, 0x05f1c07a,
394 0x0060a453, 0x3f803034, 0x05c1c878,
395 0x0090b858, 0x3f70202f, 0x0571d477,
396 0x00d0d05d, 0x3f501829, 0x0531e073,
397 0x0110e462, 0x3f500825, 0x04e1e471,
398 0x01510065, 0x3f40001f, 0x04a1f06d },
399 },
400 { 0x4000, {
401 0x00007044, 0x00007044, 0x06519476,
402 0x00208448, 0x3fe05c3f, 0x0621a476,
403 0x0050984d, 0x3fc04c3a, 0x05e1b075,
404 0x0080ac52, 0x3fa03c35, 0x05a1b875,
405 0x00c0c056, 0x3f803030, 0x0561c473,
406 0x0100d45b, 0x3f70202b, 0x0521d46f,
407 0x0140e860, 0x3f601427, 0x04d1d46e,
408 0x01810064, 0x3f500822, 0x0491dc6b },
409 },
410 { 0x5000, {
411 0x0110a442, 0x0110a442, 0x0551545e,
412 0x0140b045, 0x00e0983f, 0x0531585f,
413 0x0160c047, 0x00c08c3c, 0x0511645e,
414 0x0190cc4a, 0x00908039, 0x04f1685f,
415 0x01c0dc4c, 0x00707436, 0x04d1705e,
416 0x0200e850, 0x00506833, 0x04b1785b,
417 0x0230f453, 0x00305c30, 0x0491805a,
418 0x02710056, 0x0010542d, 0x04718059 },
419 },
420 { 0x6000, {
421 0x01c0bc40, 0x01c0bc40, 0x04c13052,
422 0x01e0c841, 0x01a0b43d, 0x04c13851,
423 0x0210cc44, 0x0180a83c, 0x04a13453,
424 0x0230d845, 0x0160a03a, 0x04913c52,
425 0x0260e047, 0x01409838, 0x04714052,
426 0x0280ec49, 0x01208c37, 0x04514c50,
427 0x02b0f44b, 0x01008435, 0x04414c50,
428 0x02d1004c, 0x00e07c33, 0x0431544f },
429 },
430 { 0x7000, {
431 0x0230c83e, 0x0230c83e, 0x04711c4c,
432 0x0250d03f, 0x0210c43c, 0x0471204b,
433 0x0270d840, 0x0200b83c, 0x0451244b,
434 0x0290dc42, 0x01e0b43a, 0x0441244c,
435 0x02b0e443, 0x01c0b038, 0x0441284b,
436 0x02d0ec44, 0x01b0a438, 0x0421304a,
437 0x02f0f445, 0x0190a036, 0x04213449,
438 0x0310f847, 0x01709c34, 0x04213848 },
439 },
440 { 0x8000, {
441 0x0280d03d, 0x0280d03d, 0x04310c48,
442 0x02a0d43e, 0x0270c83c, 0x04311047,
443 0x02b0dc3e, 0x0250c83a, 0x04311447,
444 0x02d0e040, 0x0240c03a, 0x04211446,
445 0x02e0e840, 0x0220bc39, 0x04111847,
446 0x0300e842, 0x0210b438, 0x04012445,
447 0x0310f043, 0x0200b037, 0x04012045,
448 0x0330f444, 0x01e0ac36, 0x03f12445 },
449 },
450 { 0xefff, {
451 0x0340dc3a, 0x0340dc3a, 0x03b0ec40,
452 0x0340e03a, 0x0330e039, 0x03c0f03e,
453 0x0350e03b, 0x0330dc39, 0x03c0ec3e,
454 0x0350e43a, 0x0320dc38, 0x03c0f43e,
455 0x0360e43b, 0x0320d839, 0x03b0f03e,
456 0x0360e83b, 0x0310d838, 0x03c0fc3b,
457 0x0370e83b, 0x0310d439, 0x03a0f83d,
458 0x0370e83c, 0x0300d438, 0x03b0fc3c },
459 }
460};
461
120enum rcar_vin_state { 462enum rcar_vin_state {
121 STOPPED = 0, 463 STOPPED = 0,
122 RUNNING, 464 RUNNING,
@@ -161,6 +503,9 @@ struct rcar_vin_cam {
161 /* Client output, as seen by the VIN */ 503 /* Client output, as seen by the VIN */
162 unsigned int width; 504 unsigned int width;
163 unsigned int height; 505 unsigned int height;
506 /* User window from S_FMT */
507 unsigned int out_width;
508 unsigned int out_height;
164 /* 509 /*
165 * User window from S_CROP / G_CROP, produced by client cropping and 510 * User window from S_CROP / G_CROP, produced by client cropping and
166 * scaling, VIN scaling and VIN cropping, mapped back onto the client 511 * scaling, VIN scaling and VIN cropping, mapped back onto the client
@@ -667,6 +1012,60 @@ static void rcar_vin_clock_stop(struct soc_camera_host *ici)
667 /* VIN does not have "mclk" */ 1012 /* VIN does not have "mclk" */
668} 1013}
669 1014
1015static void set_coeff(struct rcar_vin_priv *priv, unsigned short xs)
1016{
1017 int i;
1018 const struct vin_coeff *p_prev_set = NULL;
1019 const struct vin_coeff *p_set = NULL;
1020
1021 /* Look for suitable coefficient values */
1022 for (i = 0; i < ARRAY_SIZE(vin_coeff_set); i++) {
1023 p_prev_set = p_set;
1024 p_set = &vin_coeff_set[i];
1025
1026 if (xs < p_set->xs_value)
1027 break;
1028 }
1029
1030 /* Use previous value if its XS value is closer */
1031 if (p_prev_set && p_set &&
1032 xs - p_prev_set->xs_value < p_set->xs_value - xs)
1033 p_set = p_prev_set;
1034
1035 /* Set coefficient registers */
1036 iowrite32(p_set->coeff_set[0], priv->base + VNC1A_REG);
1037 iowrite32(p_set->coeff_set[1], priv->base + VNC1B_REG);
1038 iowrite32(p_set->coeff_set[2], priv->base + VNC1C_REG);
1039
1040 iowrite32(p_set->coeff_set[3], priv->base + VNC2A_REG);
1041 iowrite32(p_set->coeff_set[4], priv->base + VNC2B_REG);
1042 iowrite32(p_set->coeff_set[5], priv->base + VNC2C_REG);
1043
1044 iowrite32(p_set->coeff_set[6], priv->base + VNC3A_REG);
1045 iowrite32(p_set->coeff_set[7], priv->base + VNC3B_REG);
1046 iowrite32(p_set->coeff_set[8], priv->base + VNC3C_REG);
1047
1048 iowrite32(p_set->coeff_set[9], priv->base + VNC4A_REG);
1049 iowrite32(p_set->coeff_set[10], priv->base + VNC4B_REG);
1050 iowrite32(p_set->coeff_set[11], priv->base + VNC4C_REG);
1051
1052 iowrite32(p_set->coeff_set[12], priv->base + VNC5A_REG);
1053 iowrite32(p_set->coeff_set[13], priv->base + VNC5B_REG);
1054 iowrite32(p_set->coeff_set[14], priv->base + VNC5C_REG);
1055
1056 iowrite32(p_set->coeff_set[15], priv->base + VNC6A_REG);
1057 iowrite32(p_set->coeff_set[16], priv->base + VNC6B_REG);
1058 iowrite32(p_set->coeff_set[17], priv->base + VNC6C_REG);
1059
1060 iowrite32(p_set->coeff_set[18], priv->base + VNC7A_REG);
1061 iowrite32(p_set->coeff_set[19], priv->base + VNC7B_REG);
1062 iowrite32(p_set->coeff_set[20], priv->base + VNC7C_REG);
1063
1064 iowrite32(p_set->coeff_set[21], priv->base + VNC8A_REG);
1065 iowrite32(p_set->coeff_set[22], priv->base + VNC8B_REG);
1066 iowrite32(p_set->coeff_set[23], priv->base + VNC8C_REG);
1067}
1068
670/* rect is guaranteed to not exceed the scaled camera rectangle */ 1069/* rect is guaranteed to not exceed the scaled camera rectangle */
671static int rcar_vin_set_rect(struct soc_camera_device *icd) 1070static int rcar_vin_set_rect(struct soc_camera_device *icd)
672{ 1071{
@@ -676,6 +1075,7 @@ static int rcar_vin_set_rect(struct soc_camera_device *icd)
676 unsigned int left_offset, top_offset; 1075 unsigned int left_offset, top_offset;
677 unsigned char dsize = 0; 1076 unsigned char dsize = 0;
678 struct v4l2_rect *cam_subrect = &cam->subrect; 1077 struct v4l2_rect *cam_subrect = &cam->subrect;
1078 u32 value;
679 1079
680 dev_dbg(icd->parent, "Crop %ux%u@%u:%u\n", 1080 dev_dbg(icd->parent, "Crop %ux%u@%u:%u\n",
681 icd->user_width, icd->user_height, cam->vin_left, cam->vin_top); 1081 icd->user_width, icd->user_height, cam->vin_left, cam->vin_top);
@@ -695,40 +1095,64 @@ static int rcar_vin_set_rect(struct soc_camera_device *icd)
695 1095
696 /* Set Start/End Pixel/Line Pre-Clip */ 1096 /* Set Start/End Pixel/Line Pre-Clip */
697 iowrite32(left_offset << dsize, priv->base + VNSPPRC_REG); 1097 iowrite32(left_offset << dsize, priv->base + VNSPPRC_REG);
698 iowrite32((left_offset + cam->width - 1) << dsize, 1098 iowrite32((left_offset + cam_subrect->width - 1) << dsize,
699 priv->base + VNEPPRC_REG); 1099 priv->base + VNEPPRC_REG);
700 switch (priv->field) { 1100 switch (priv->field) {
701 case V4L2_FIELD_INTERLACED: 1101 case V4L2_FIELD_INTERLACED:
702 case V4L2_FIELD_INTERLACED_TB: 1102 case V4L2_FIELD_INTERLACED_TB:
703 case V4L2_FIELD_INTERLACED_BT: 1103 case V4L2_FIELD_INTERLACED_BT:
704 iowrite32(top_offset / 2, priv->base + VNSLPRC_REG); 1104 iowrite32(top_offset / 2, priv->base + VNSLPRC_REG);
705 iowrite32((top_offset + cam->height) / 2 - 1, 1105 iowrite32((top_offset + cam_subrect->height) / 2 - 1,
706 priv->base + VNELPRC_REG); 1106 priv->base + VNELPRC_REG);
707 break; 1107 break;
708 default: 1108 default:
709 iowrite32(top_offset, priv->base + VNSLPRC_REG); 1109 iowrite32(top_offset, priv->base + VNSLPRC_REG);
710 iowrite32(top_offset + cam->height - 1, 1110 iowrite32(top_offset + cam_subrect->height - 1,
711 priv->base + VNELPRC_REG); 1111 priv->base + VNELPRC_REG);
712 break; 1112 break;
713 } 1113 }
714 1114
1115 /* Set scaling coefficient */
1116 value = 0;
1117 if (cam_subrect->height != cam->out_height)
1118 value = (4096 * cam_subrect->height) / cam->out_height;
1119 dev_dbg(icd->parent, "YS Value: %x\n", value);
1120 iowrite32(value, priv->base + VNYS_REG);
1121
1122 value = 0;
1123 if (cam_subrect->width != cam->out_width)
1124 value = (4096 * cam_subrect->width) / cam->out_width;
1125
1126 /* Horizontal upscaling is up to double size */
1127 if (0 < value && value < 2048)
1128 value = 2048;
1129
1130 dev_dbg(icd->parent, "XS Value: %x\n", value);
1131 iowrite32(value, priv->base + VNXS_REG);
1132
1133 /* Horizontal upscaling is carried out by scaling down from double size */
1134 if (value < 4096)
1135 value *= 2;
1136
1137 set_coeff(priv, value);
1138
715 /* Set Start/End Pixel/Line Post-Clip */ 1139 /* Set Start/End Pixel/Line Post-Clip */
716 iowrite32(0, priv->base + VNSPPOC_REG); 1140 iowrite32(0, priv->base + VNSPPOC_REG);
717 iowrite32(0, priv->base + VNSLPOC_REG); 1141 iowrite32(0, priv->base + VNSLPOC_REG);
718 iowrite32((cam_subrect->width - 1) << dsize, priv->base + VNEPPOC_REG); 1142 iowrite32((cam->out_width - 1) << dsize, priv->base + VNEPPOC_REG);
719 switch (priv->field) { 1143 switch (priv->field) {
720 case V4L2_FIELD_INTERLACED: 1144 case V4L2_FIELD_INTERLACED:
721 case V4L2_FIELD_INTERLACED_TB: 1145 case V4L2_FIELD_INTERLACED_TB:
722 case V4L2_FIELD_INTERLACED_BT: 1146 case V4L2_FIELD_INTERLACED_BT:
723 iowrite32(cam_subrect->height / 2 - 1, 1147 iowrite32(cam->out_height / 2 - 1,
724 priv->base + VNELPOC_REG); 1148 priv->base + VNELPOC_REG);
725 break; 1149 break;
726 default: 1150 default:
727 iowrite32(cam_subrect->height - 1, priv->base + VNELPOC_REG); 1151 iowrite32(cam->out_height - 1, priv->base + VNELPOC_REG);
728 break; 1152 break;
729 } 1153 }
730 1154
731 iowrite32(ALIGN(cam->width, 0x10), priv->base + VNIS_REG); 1155 iowrite32(ALIGN(cam->out_width, 0x10), priv->base + VNIS_REG);
732 1156
733 return 0; 1157 return 0;
734} 1158}
@@ -1007,6 +1431,8 @@ static int rcar_vin_get_formats(struct soc_camera_device *icd, unsigned int idx,
1007 cam->subrect = rect; 1431 cam->subrect = rect;
1008 cam->width = mf.width; 1432 cam->width = mf.width;
1009 cam->height = mf.height; 1433 cam->height = mf.height;
1434 cam->out_width = mf.width;
1435 cam->out_height = mf.height;
1010 1436
1011 icd->host_priv = cam; 1437 icd->host_priv = cam;
1012 } else { 1438 } else {
@@ -1267,6 +1693,9 @@ static int rcar_vin_set_fmt(struct soc_camera_device *icd,
1267 dev_dbg(dev, "W: %u : %u, H: %u : %u\n", 1693 dev_dbg(dev, "W: %u : %u, H: %u : %u\n",
1268 vin_sub_width, pix->width, vin_sub_height, pix->height); 1694 vin_sub_width, pix->width, vin_sub_height, pix->height);
1269 1695
1696 cam->out_width = pix->width;
1697 cam->out_height = pix->height;
1698
1270 icd->current_fmt = xlate; 1699 icd->current_fmt = xlate;
1271 1700
1272 priv->field = field; 1701 priv->field = field;
@@ -1318,8 +1747,12 @@ static int rcar_vin_try_fmt(struct soc_camera_device *icd,
1318 if (ret < 0) 1747 if (ret < 0)
1319 return ret; 1748 return ret;
1320 1749
1321 pix->width = mf.width; 1750 /* Adjust only if VIN cannot scale */
1322 pix->height = mf.height; 1751 if (pix->width > mf.width * 2)
1752 pix->width = mf.width * 2;
1753 if (pix->height > mf.height * 3)
1754 pix->height = mf.height * 3;
1755
1323 pix->field = mf.field; 1756 pix->field = mf.field;
1324 pix->colorspace = mf.colorspace; 1757 pix->colorspace = mf.colorspace;
1325 1758