aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/media
diff options
context:
space:
mode:
authorMaxim Levitsky <maximlevitsky@gmail.com>2010-07-31 10:59:25 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2010-08-08 22:43:00 -0400
commit9ea53b74df9c4681f5bb2da6b2e10e37d87ea6d6 (patch)
tree7f3dc2e209bdcca8388e0aac88c0b7ea2022c6c8 /drivers/media
parented4d3876d18d95406e0258a6421b1f4eda51d629 (diff)
V4L/DVB: STAGING: remove lirc_ene0100 driver
Add latest unported version of this driver to media/IR. Next patch will port it to ir core. Signed-off-by: Maxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media')
-rw-r--r--drivers/media/IR/ene_ir.c1176
-rw-r--r--drivers/media/IR/ene_ir.h240
2 files changed, 1416 insertions, 0 deletions
diff --git a/drivers/media/IR/ene_ir.c b/drivers/media/IR/ene_ir.c
new file mode 100644
index 000000000000..9d11caf55b03
--- /dev/null
+++ b/drivers/media/IR/ene_ir.c
@@ -0,0 +1,1176 @@
1/*
2 * driver for ENE KB3926 B/C/D CIR (also known as ENE0100/ENE0200/ENE0201)
3 *
4 * Copyright (C) 2010 Maxim Levitsky <maximlevitsky@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
19 * USA
20 */
21
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/pnp.h>
25#include <linux/io.h>
26#include <linux/interrupt.h>
27#include <linux/sched.h>
28#include <linux/uaccess.h>
29#include "lirc_ene0100.h"
30
31
32static int sample_period = -1;
33static int enable_idle = 1;
34static int enable_duty_carrier;
35static int input = 1;
36static int debug;
37static int txsim;
38
39static void ene_rx_set_idle(struct ene_device *dev, int idle);
40static int ene_irq_status(struct ene_device *dev);
41static void ene_send_sample(struct ene_device *dev, unsigned long sample);
42
43/* read a hardware register */
44static u8 ene_hw_read_reg(struct ene_device *dev, u16 reg)
45{
46 u8 retval;
47 outb(reg >> 8, dev->hw_io + ENE_ADDR_HI);
48 outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO);
49 retval = inb(dev->hw_io + ENE_IO);
50
51 ene_dbg_verbose("reg %04x == %02x", reg, retval);
52 return retval;
53}
54
55/* write a hardware register */
56static void ene_hw_write_reg(struct ene_device *dev, u16 reg, u8 value)
57{
58 outb(reg >> 8, dev->hw_io + ENE_ADDR_HI);
59 outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO);
60 outb(value, dev->hw_io + ENE_IO);
61
62 ene_dbg_verbose("reg %04x <- %02x", reg, value);
63}
64
65/* change specific bits in hardware register */
66static void ene_hw_write_reg_mask(struct ene_device *dev,
67 u16 reg, u8 value, u8 mask)
68{
69 u8 regvalue;
70
71 outb(reg >> 8, dev->hw_io + ENE_ADDR_HI);
72 outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO);
73
74 regvalue = inb(dev->hw_io + ENE_IO) & ~mask;
75 regvalue |= (value & mask);
76 outb(regvalue, dev->hw_io + ENE_IO);
77
78 ene_dbg_verbose("reg %04x <- %02x (mask=%02x)", reg, value, mask);
79}
80
81/* detect hardware features */
82static int ene_hw_detect(struct ene_device *dev)
83{
84 u8 chip_major, chip_minor;
85 u8 hw_revision, old_ver;
86 u8 tmp;
87 u8 fw_capabilities;
88
89 tmp = ene_hw_read_reg(dev, ENE_HW_UNK);
90 ene_hw_write_reg(dev, ENE_HW_UNK, tmp & ~ENE_HW_UNK_CLR);
91
92 chip_major = ene_hw_read_reg(dev, ENE_HW_VER_MAJOR);
93 chip_minor = ene_hw_read_reg(dev, ENE_HW_VER_MINOR);
94
95 ene_hw_write_reg(dev, ENE_HW_UNK, tmp);
96 hw_revision = ene_hw_read_reg(dev, ENE_HW_VERSION);
97 old_ver = ene_hw_read_reg(dev, ENE_HW_VER_OLD);
98
99 if (hw_revision == 0xFF) {
100
101 ene_printk(KERN_WARNING, "device seems to be disabled\n");
102 ene_printk(KERN_WARNING,
103 "send a mail to lirc-list@lists.sourceforge.net\n");
104 ene_printk(KERN_WARNING, "please attach output of acpidump\n");
105 return -ENODEV;
106 }
107
108 if (chip_major == 0x33) {
109 ene_printk(KERN_WARNING, "chips 0x33xx aren't supported\n");
110 return -ENODEV;
111 }
112
113 if (chip_major == 0x39 && chip_minor == 0x26 && hw_revision == 0xC0) {
114 dev->hw_revision = ENE_HW_C;
115 } else if (old_ver == 0x24 && hw_revision == 0xC0) {
116 dev->hw_revision = ENE_HW_B;
117 ene_printk(KERN_NOTICE, "KB3926B detected\n");
118 } else {
119 dev->hw_revision = ENE_HW_D;
120 ene_printk(KERN_WARNING,
121 "unknown ENE chip detected, assuming KB3926D\n");
122 ene_printk(KERN_WARNING,
123 "driver support might be not complete");
124
125 }
126
127 ene_printk(KERN_DEBUG,
128 "chip is 0x%02x%02x - kbver = 0x%02x, rev = 0x%02x\n",
129 chip_major, chip_minor, old_ver, hw_revision);
130
131 /* detect features hardware supports */
132 if (dev->hw_revision < ENE_HW_C)
133 return 0;
134
135 fw_capabilities = ene_hw_read_reg(dev, ENE_FW2);
136 ene_dbg("Firmware capabilities: %02x", fw_capabilities);
137
138 dev->hw_gpio40_learning = fw_capabilities & ENE_FW2_GP40_AS_LEARN;
139 dev->hw_learning_and_tx_capable = fw_capabilities & ENE_FW2_LEARNING;
140
141 dev->hw_fan_as_normal_input = dev->hw_learning_and_tx_capable &&
142 (fw_capabilities & ENE_FW2_FAN_AS_NRML_IN);
143
144 ene_printk(KERN_NOTICE, "hardware features:\n");
145 ene_printk(KERN_NOTICE,
146 "learning and transmit %s, gpio40_learn %s, fan_in %s\n",
147 dev->hw_learning_and_tx_capable ? "on" : "off",
148 dev->hw_gpio40_learning ? "on" : "off",
149 dev->hw_fan_as_normal_input ? "on" : "off");
150
151 if (dev->hw_learning_and_tx_capable) {
152 ene_printk(KERN_WARNING,
153 "Device supports transmitting, but that support is\n");
154 ene_printk(KERN_WARNING,
155 "lightly tested. Please test it and mail\n");
156 ene_printk(KERN_WARNING,
157 "lirc-list@lists.sourceforge.net\n");
158 }
159 return 0;
160}
161
162/* this enables/disables IR input via gpio40*/
163static void ene_enable_gpio40_recieve(struct ene_device *dev, int enable)
164{
165 ene_hw_write_reg_mask(dev, ENE_CIR_CONF2, enable ?
166 0 : ENE_CIR_CONF2_GPIO40DIS,
167 ENE_CIR_CONF2_GPIO40DIS);
168}
169
170/* this enables/disables IR via standard input */
171static void ene_enable_normal_recieve(struct ene_device *dev, int enable)
172{
173 ene_hw_write_reg(dev, ENE_CIR_CONF1, enable ? ENE_CIR_CONF1_RX_ON : 0);
174}
175
176/* this enables/disables IR input via unused fan tachtometer input */
177static void ene_enable_fan_recieve(struct ene_device *dev, int enable)
178{
179 if (!enable)
180 ene_hw_write_reg(dev, ENE_FAN_AS_IN1, 0);
181 else {
182 ene_hw_write_reg(dev, ENE_FAN_AS_IN1, ENE_FAN_AS_IN1_EN);
183 ene_hw_write_reg(dev, ENE_FAN_AS_IN2, ENE_FAN_AS_IN2_EN);
184 }
185 dev->rx_fan_input_inuse = enable;
186}
187
188
189/* Sense current recieved carrier */
190static int ene_rx_sense_carrier(struct ene_device *dev)
191{
192 int period = ene_hw_read_reg(dev, ENE_RX_CARRIER);
193 int carrier;
194 ene_dbg("RX: hardware carrier period = %02x", period);
195
196 if (!(period & ENE_RX_CARRIER_VALID))
197 return 0;
198
199 period &= ~ENE_RX_CARRIER_VALID;
200
201 if (!period)
202 return 0;
203
204 carrier = 2000000 / period;
205 ene_dbg("RX: sensed carrier = %d Hz", carrier);
206 return carrier;
207}
208
209/* determine which input to use*/
210static void ene_rx_set_inputs(struct ene_device *dev)
211{
212 int learning_mode = dev->learning_enabled || dev->rx_carrier_sense;
213
214 ene_dbg("RX: setup reciever, learning mode = %d", learning_mode);
215
216 ene_enable_normal_recieve(dev, 1);
217
218 /* old hardware doesn't support learning mode for sure */
219 if (dev->hw_revision <= ENE_HW_B)
220 return;
221
222 /* reciever not learning capable, still set gpio40 correctly */
223 if (!dev->hw_learning_and_tx_capable) {
224 ene_enable_gpio40_recieve(dev, !dev->hw_gpio40_learning);
225 return;
226 }
227
228 /* enable learning mode */
229 if (learning_mode) {
230 ene_enable_gpio40_recieve(dev, dev->hw_gpio40_learning);
231
232 /* fan input is not used for learning */
233 if (dev->hw_fan_as_normal_input)
234 ene_enable_fan_recieve(dev, 0);
235
236 /* disable learning mode */
237 } else {
238 if (dev->hw_fan_as_normal_input) {
239 ene_enable_fan_recieve(dev, 1);
240 ene_enable_normal_recieve(dev, 0);
241 } else
242 ene_enable_gpio40_recieve(dev,
243 !dev->hw_gpio40_learning);
244 }
245
246 /* set few additional settings for this mode */
247 ene_hw_write_reg_mask(dev, ENE_CIR_CONF1, learning_mode ?
248 ENE_CIR_CONF1_LEARN1 : 0, ENE_CIR_CONF1_LEARN1);
249
250 ene_hw_write_reg_mask(dev, ENE_CIR_CONF2, learning_mode ?
251 ENE_CIR_CONF2_LEARN2 : 0, ENE_CIR_CONF2_LEARN2);
252}
253
254/* Enable the device for receive */
255static void ene_rx_enable(struct ene_device *dev)
256{
257 u8 reg_value;
258
259 if (dev->hw_revision < ENE_HW_C) {
260 ene_hw_write_reg(dev, ENEB_IRQ, dev->irq << 1);
261 ene_hw_write_reg(dev, ENEB_IRQ_UNK1, 0x01);
262 } else {
263 reg_value = ene_hw_read_reg(dev, ENEC_IRQ) & 0xF0;
264 reg_value |= ENEC_IRQ_UNK_EN;
265 reg_value &= ~ENEC_IRQ_STATUS;
266 reg_value |= (dev->irq & ENEC_IRQ_MASK);
267 ene_hw_write_reg(dev, ENEC_IRQ, reg_value);
268 ene_hw_write_reg(dev, ENE_TX_UNK1, 0x63);
269 }
270
271 ene_hw_write_reg(dev, ENE_CIR_CONF2, 0x00);
272 ene_rx_set_inputs(dev);
273
274 /* set sampling period */
275 ene_hw_write_reg(dev, ENE_CIR_SAMPLE_PERIOD, sample_period);
276
277 /* ack any pending irqs - just in case */
278 ene_irq_status(dev);
279
280 /* enter idle mode */
281 ene_rx_set_idle(dev, 1);
282
283 /* enable firmware bits */
284 ene_hw_write_reg_mask(dev, ENE_FW1,
285 ENE_FW1_ENABLE | ENE_FW1_IRQ,
286 ENE_FW1_ENABLE | ENE_FW1_IRQ);
287}
288
289/* Disable the device reciever */
290static void ene_rx_disable(struct ene_device *dev)
291{
292 /* disable inputs */
293 ene_enable_normal_recieve(dev, 0);
294
295 if (dev->hw_fan_as_normal_input)
296 ene_enable_fan_recieve(dev, 0);
297
298 /* disable hardware IRQ and firmware flag */
299 ene_hw_write_reg_mask(dev, ENE_FW1, 0, ENE_FW1_ENABLE | ENE_FW1_IRQ);
300
301 ene_rx_set_idle(dev, 1);
302}
303
304/* send current sample to the user */
305static void ene_rx_flush(struct ene_device *dev, int timeout)
306{
307 unsigned long value;
308
309 value = dev->rx_sample_pulse ? LIRC_PULSE(dev->rx_sample) :
310 LIRC_SPACE(dev->rx_sample);
311 ene_send_sample(dev, value);
312 dev->rx_sample = 0;
313 dev->rx_sample_pulse = 0;
314}
315
316/* recieve new sample and process it */
317static void ene_rx_sample(struct ene_device *dev, int sample, int is_pulse)
318{
319 ene_dbg("RX: sample %8d (%s)", sample, is_pulse ? "pulse" : "space");
320
321 /* ignore spaces in idle mode, can get them on revC */
322 /* also ignore a space in front of first pulse */
323 if (dev->rx_idle && !is_pulse)
324 return;
325
326 /* get out of idle mode now */
327 if (dev->rx_idle)
328 ene_rx_set_idle(dev, 0);
329
330 if (!dev->rx_sample) {
331 dev->rx_sample = sample;
332 dev->rx_sample_pulse = is_pulse;
333 } else if (is_pulse == dev->rx_sample_pulse)
334 dev->rx_sample += sample;
335 else {
336 ene_rx_flush(dev, 0);
337 dev->rx_sample = sample;
338 dev->rx_sample_pulse = is_pulse;
339 }
340
341 if (is_pulse)
342 return;
343
344 /* overflow sample from fan input recieved, enable idle mode */
345 if (dev->rx_fan_input_inuse &&
346 sample == ENE_FAN_VALUE_MASK * ENE_SAMPLE_PERIOD_FAN) {
347 ene_rx_set_idle(dev, 1);
348 return;
349 }
350
351 if (!dev->rx_fan_input_inuse) {
352 /* Report timeout if enabled */
353 if (dev->rx_timeout && dev->rx_send_timeout_packet &&
354 !dev->rx_timeout_sent &&
355 dev->rx_sample > dev->rx_timeout) {
356 ene_dbg("RX: sending timeout sample");
357 ene_send_sample(dev, LIRC_TIMEOUT(dev->rx_sample));
358 dev->rx_timeout_sent = 1;
359 }
360
361 /* too large sample accumulated via normal input.
362 note that on revC, hardware idle mode turns on automaticly,
363 so max gap should be less that the gap after which
364 hw stops sending samples */
365 if (dev->rx_sample > ENE_MAXGAP) {
366 ene_rx_set_idle(dev, 1);
367 return;
368 }
369 }
370}
371
372/* enable or disable idle mode */
373static void ene_rx_set_idle(struct ene_device *dev, int idle)
374{
375 struct timeval now;
376 int disable_sampler = 0;
377
378
379 /* Also put hardware sampler in 'idle' mode on revB*/
380 /* revC and higher do that automaticly (firmware does?) */
381 if ((dev->hw_revision < ENE_HW_C) && enable_idle)
382 if (idle)
383 disable_sampler = 1;
384
385 ene_hw_write_reg_mask(dev, ENE_CIR_SAMPLE_PERIOD,
386 disable_sampler ? 0 : ENE_CIR_SAMPLE_OVERFLOW,
387 ENE_CIR_SAMPLE_OVERFLOW);
388 dev->rx_idle = idle;
389
390 /* remember when we have entered the idle mode */
391 if (idle) {
392 ene_dbg("RX: going into idle mode");
393 do_gettimeofday(&dev->rx_gap_start);
394 return;
395 }
396
397 ene_dbg("RX: back from idle mode");
398
399 /* send the gap between keypresses now */
400 do_gettimeofday(&now);
401
402 if (dev->rx_sample_pulse) {
403 ene_dbg("RX: somehow we recieved a pulse before idle mode???");
404 return;
405 }
406
407 /* manually calculate and recieve the gap between keypresses */
408 if (now.tv_sec - dev->rx_gap_start.tv_sec > 16)
409 dev->rx_sample = LIRC_SPACE(LIRC_VALUE_MASK);
410 else
411 dev->rx_sample +=
412 1000000ull * (now.tv_sec - dev->rx_gap_start.tv_sec)
413 + now.tv_usec - dev->rx_gap_start.tv_usec;
414
415 if (dev->rx_sample > LIRC_SPACE(LIRC_VALUE_MASK))
416 dev->rx_sample = LIRC_SPACE(LIRC_VALUE_MASK);
417
418 ene_rx_flush(dev, 0);
419 dev->rx_timeout_sent = 0;
420}
421
422/* prepare transmission */
423static void ene_tx_prepare(struct ene_device *dev)
424{
425 u8 conf1;
426
427 conf1 = ene_hw_read_reg(dev, ENE_CIR_CONF1);
428 dev->saved_conf1 = conf1;
429
430 if (dev->hw_revision == ENE_HW_C)
431 conf1 &= ~ENE_CIR_CONF1_TX_CLEAR;
432
433 /* Enable TX engine */
434 conf1 |= ENE_CIR_CONF1_TX_ON;
435
436 /* Set carrier */
437 if (dev->tx_period) {
438
439 int tx_period_in500ns = dev->tx_period * 2;
440
441 int tx_pulse_width_in_500ns =
442 tx_period_in500ns / (100 / dev->tx_duty_cycle);
443
444 if (!tx_pulse_width_in_500ns)
445 tx_pulse_width_in_500ns = 1;
446
447 ene_dbg("TX: pulse distance = %d * 500 ns", tx_period_in500ns);
448 ene_dbg("TX: pulse width = %d * 500 ns",
449 tx_pulse_width_in_500ns);
450
451 ene_hw_write_reg(dev, ENE_TX_PERIOD, ENE_TX_PERIOD_UNKBIT |
452 tx_period_in500ns);
453
454 ene_hw_write_reg(dev, ENE_TX_PERIOD_PULSE,
455 tx_pulse_width_in_500ns);
456
457 conf1 |= ENE_CIR_CONF1_TX_CARR;
458 } else
459 conf1 &= ~ENE_CIR_CONF1_TX_CARR;
460
461 ene_hw_write_reg(dev, ENE_CIR_CONF1, conf1);
462 dev->tx_underway = 1;
463
464}
465
466/* end transmission */
467static void ene_tx_complete(struct ene_device *dev)
468{
469 ene_hw_write_reg(dev, ENE_CIR_CONF1, dev->saved_conf1);
470 dev->tx_underway = 0;
471}
472
473/* set transmit mask */
474static void ene_tx_set_transmiter_mask(struct ene_device *dev)
475{
476 u8 txport1 = ene_hw_read_reg(dev, ENE_TX_PORT1) & ~ENE_TX_PORT1_EN;
477 u8 txport2 = ene_hw_read_reg(dev, ENE_TX_PORT2) & ~ENE_TX_PORT2_EN;
478
479 if (dev->transmitter_mask & 0x01)
480 txport1 |= ENE_TX_PORT1_EN;
481
482 if (dev->transmitter_mask & 0x02)
483 txport2 |= ENE_TX_PORT2_EN;
484
485 ene_hw_write_reg(dev, ENE_TX_PORT1, txport1);
486 ene_hw_write_reg(dev, ENE_TX_PORT2, txport2);
487}
488
489/* TX one sample - must be called with dev->hw_lock*/
490static void ene_tx_sample(struct ene_device *dev)
491{
492 u8 raw_tx;
493 u32 sample;
494
495 if (!dev->tx_underway) {
496 ene_dbg("TX: attempt to transmit while hw isn't setup");
497 return;
498 }
499
500 /* Grab next TX sample */
501 if (!dev->tx_sample) {
502again:
503 if (dev->tx_pos == dev->tx_len + 1) {
504 if (!dev->tx_done) {
505 ene_dbg("TX: no more data to send");
506 dev->tx_done = 1;
507 goto exit;
508 } else {
509 ene_dbg("TX: last sample sent by hardware");
510 ene_tx_complete(dev);
511 complete(&dev->tx_complete);
512 return;
513 }
514 }
515
516 sample = dev->tx_buffer[dev->tx_pos++];
517 dev->tx_sample_pulse = !dev->tx_sample_pulse;
518
519 ene_dbg("TX: sample %8d (%s)", sample, dev->tx_sample_pulse ?
520 "pulse" : "space");
521
522 dev->tx_sample = DIV_ROUND_CLOSEST(sample, ENE_TX_SMPL_PERIOD);
523
524 /* guard against too short samples */
525 if (!dev->tx_sample)
526 goto again;
527 }
528
529 raw_tx = min(dev->tx_sample , (unsigned int)ENE_TX_SMLP_MASK);
530 dev->tx_sample -= raw_tx;
531
532 if (dev->tx_sample_pulse)
533 raw_tx |= ENE_TX_PULSE_MASK;
534
535 ene_hw_write_reg(dev, ENE_TX_INPUT1 + dev->tx_reg, raw_tx);
536 dev->tx_reg = !dev->tx_reg;
537exit:
538 /* simulate TX done interrupt */
539 if (txsim)
540 mod_timer(&dev->tx_sim_timer, jiffies + HZ / 500);
541}
542
543/* timer to simulate tx done interrupt */
544static void ene_tx_irqsim(unsigned long data)
545{
546 struct ene_device *dev = (struct ene_device *)data;
547 unsigned long flags;
548
549 spin_lock_irqsave(&dev->hw_lock, flags);
550 ene_tx_sample(dev);
551 spin_unlock_irqrestore(&dev->hw_lock, flags);
552}
553
554
555/* read irq status and ack it */
556static int ene_irq_status(struct ene_device *dev)
557{
558 u8 irq_status;
559 u8 fw_flags1, fw_flags2;
560 int cur_rx_pointer;
561 int retval = 0;
562
563 fw_flags2 = ene_hw_read_reg(dev, ENE_FW2);
564 cur_rx_pointer = !!(fw_flags2 & ENE_FW2_BUF_HIGH);
565
566 if (dev->hw_revision < ENE_HW_C) {
567 irq_status = ene_hw_read_reg(dev, ENEB_IRQ_STATUS);
568
569 if (!(irq_status & ENEB_IRQ_STATUS_IR))
570 return 0;
571
572 ene_hw_write_reg(dev, ENEB_IRQ_STATUS,
573 irq_status & ~ENEB_IRQ_STATUS_IR);
574 dev->rx_pointer = cur_rx_pointer;
575 return ENE_IRQ_RX;
576 }
577
578 irq_status = ene_hw_read_reg(dev, ENEC_IRQ);
579
580 if (!(irq_status & ENEC_IRQ_STATUS))
581 return 0;
582
583 /* original driver does that twice - a workaround ? */
584 ene_hw_write_reg(dev, ENEC_IRQ, irq_status & ~ENEC_IRQ_STATUS);
585 ene_hw_write_reg(dev, ENEC_IRQ, irq_status & ~ENEC_IRQ_STATUS);
586
587 /* clear unknown flag in F8F9 */
588 if (fw_flags2 & ENE_FW2_IRQ_CLR)
589 ene_hw_write_reg(dev, ENE_FW2, fw_flags2 & ~ENE_FW2_IRQ_CLR);
590
591 /* check if this is a TX interrupt */
592 fw_flags1 = ene_hw_read_reg(dev, ENE_FW1);
593 if (fw_flags1 & ENE_FW1_TXIRQ) {
594 ene_hw_write_reg(dev, ENE_FW1, fw_flags1 & ~ENE_FW1_TXIRQ);
595 retval |= ENE_IRQ_TX;
596 }
597
598 /* Check if this is RX interrupt */
599 if (dev->rx_pointer != cur_rx_pointer) {
600 retval |= ENE_IRQ_RX;
601 dev->rx_pointer = cur_rx_pointer;
602
603 } else if (!(retval & ENE_IRQ_TX)) {
604 ene_dbg("RX: interrupt without change in RX pointer(%d)",
605 dev->rx_pointer);
606 retval |= ENE_IRQ_RX;
607 }
608
609 if ((retval & ENE_IRQ_RX) && (retval & ENE_IRQ_TX))
610 ene_dbg("both RX and TX interrupt at same time");
611
612 return retval;
613}
614
615/* interrupt handler */
616static irqreturn_t ene_isr(int irq, void *data)
617{
618 u16 hw_value;
619 int i, hw_sample;
620 int pulse;
621 int irq_status;
622 unsigned long flags;
623 int carrier = 0;
624 irqreturn_t retval = IRQ_NONE;
625 struct ene_device *dev = (struct ene_device *)data;
626
627
628 spin_lock_irqsave(&dev->hw_lock, flags);
629 irq_status = ene_irq_status(dev);
630
631 if (!irq_status)
632 goto unlock;
633
634 retval = IRQ_HANDLED;
635
636 if (irq_status & ENE_IRQ_TX) {
637
638 if (!dev->hw_learning_and_tx_capable) {
639 ene_dbg("TX interrupt on unsupported device!");
640 goto unlock;
641 }
642 ene_tx_sample(dev);
643 }
644
645 if (!(irq_status & ENE_IRQ_RX))
646 goto unlock;
647
648
649 if ((debug && dev->learning_enabled) || dev->rx_carrier_sense)
650 carrier = ene_rx_sense_carrier(dev);
651
652 if (dev->rx_carrier_sense && carrier)
653 ene_send_sample(dev, LIRC_FREQUENCY(carrier));
654
655
656 for (i = 0; i < ENE_SAMPLES_SIZE; i++) {
657 hw_value = ene_hw_read_reg(dev,
658 ENE_SAMPLE_BUFFER + dev->rx_pointer * 4 + i);
659
660 if (dev->rx_fan_input_inuse) {
661 /* read high part of the sample */
662 hw_value |= ene_hw_read_reg(dev,
663 ENE_SAMPLE_BUFFER_FAN +
664 dev->rx_pointer * 4 + i) << 8;
665 pulse = hw_value & ENE_FAN_SMPL_PULS_MSK;
666
667 /* clear space bit, and other unused bits */
668 hw_value &= ENE_FAN_VALUE_MASK;
669 hw_sample = hw_value * ENE_SAMPLE_PERIOD_FAN;
670
671 } else {
672 pulse = !(hw_value & ENE_SAMPLE_SPC_MASK);
673 hw_value &= ENE_SAMPLE_VALUE_MASK;
674 hw_sample = hw_value * sample_period;
675 }
676 /* no more data */
677 if (!(hw_value))
678 break;
679
680 ene_rx_sample(dev, hw_sample, pulse);
681 }
682unlock:
683 spin_unlock_irqrestore(&dev->hw_lock, flags);
684 return retval;
685}
686
687/* Initialize default settings */
688static void ene_setup_settings(struct ene_device *dev)
689{
690 dev->rx_send_timeout_packet = 0;
691 dev->rx_timeout = ENE_MAXGAP;
692 dev->tx_period = 32;
693 dev->tx_duty_cycle = 25; /*%*/
694 dev->transmitter_mask = 3;
695
696 /* Force learning mode if (input == 2), otherwise
697 let user set it with LIRC_SET_REC_CARRIER */
698 dev->learning_enabled =
699 (input == 2 && dev->hw_learning_and_tx_capable);
700
701 /* Clear accumulated sample bufer */
702 dev->rx_sample = 0;
703 dev->rx_sample_pulse = 0;
704 dev->rx_pointer = -1;
705 dev->rx_carrier_sense = 0;
706
707}
708
709/* outside interface: called on first open*/
710static int ene_open(void *data)
711{
712 struct ene_device *dev = (struct ene_device *)data;
713 unsigned long flags;
714
715 spin_lock_irqsave(&dev->hw_lock, flags);
716 dev->in_use = 1;
717 ene_setup_settings(dev);
718 ene_rx_enable(dev);
719 spin_unlock_irqrestore(&dev->hw_lock, flags);
720 return 0;
721}
722
723/* outside interface: called on device close*/
724static void ene_close(void *data)
725{
726 struct ene_device *dev = (struct ene_device *)data;
727 unsigned long flags;
728 spin_lock_irqsave(&dev->hw_lock, flags);
729
730 ene_rx_disable(dev);
731 dev->in_use = 0;
732 spin_unlock_irqrestore(&dev->hw_lock, flags);
733}
734
735/* outside interface for settings */
736static int ene_ioctl(struct inode *node, struct file *file,
737 unsigned int cmd, unsigned long arg)
738{
739 int lvalue = 0, retval, tmp;
740 unsigned long flags;
741 struct ene_device *dev = lirc_get_pdata(file);
742
743
744 switch (cmd) {
745 case LIRC_SET_SEND_CARRIER:
746 case LIRC_SET_SEND_DUTY_CYCLE:
747 case LIRC_SET_TRANSMITTER_MASK:
748 case LIRC_SET_MEASURE_CARRIER_MODE:
749 case LIRC_SET_REC_CARRIER:
750 /* All these aren't possible without this */
751 if (!dev->hw_learning_and_tx_capable)
752 return -ENOSYS;
753 /* Fall through */
754 case LIRC_SET_REC_TIMEOUT:
755 case LIRC_SET_REC_TIMEOUT_REPORTS:
756 retval = get_user(lvalue, (unsigned int *) arg);
757 if (retval)
758 return retval;
759 }
760
761 switch (cmd) {
762 case LIRC_SET_SEND_CARRIER:
763 ene_dbg("TX: attempt to set tx carrier to %d kHz", lvalue);
764 tmp = 1000000 / lvalue; /* (1 / freq) (* # usec in 1 sec) */
765
766 if (tmp && (tmp > ENE_TX_PERIOD_MAX ||
767 tmp < ENE_TX_PERIOD_MIN)) {
768
769 ene_dbg("TX: out of range %d-%d carrier, "
770 "falling back to 32 kHz",
771 1000 / ENE_TX_PERIOD_MIN,
772 1000 / ENE_TX_PERIOD_MAX);
773
774 tmp = 32; /* this is just a coincidence!!! */
775 }
776 ene_dbg("TX: set carrier to %d kHz", lvalue);
777
778 spin_lock_irqsave(&dev->hw_lock, flags);
779 dev->tx_period = tmp;
780 spin_unlock_irqrestore(&dev->hw_lock, flags);
781 break;
782 case LIRC_SET_SEND_DUTY_CYCLE:
783 ene_dbg("TX: attempt to set duty cycle to %d%%", lvalue);
784
785 if ((lvalue >= 100) || (lvalue <= 0)) {
786 retval = -EINVAL;
787 break;
788 }
789 spin_lock_irqsave(&dev->hw_lock, flags);
790 dev->tx_duty_cycle = lvalue;
791 spin_unlock_irqrestore(&dev->hw_lock, flags);
792 break;
793 case LIRC_SET_TRANSMITTER_MASK:
794 ene_dbg("TX: attempt to set transmitter mask %02x", lvalue);
795
796 /* invalid txmask */
797 if (!lvalue || lvalue & ~0x3) {
798 ene_dbg("TX: invalid mask");
799 /* this supposed to return num of transmitters */
800 retval = 2;
801 break;
802 }
803 spin_lock_irqsave(&dev->hw_lock, flags);
804 dev->transmitter_mask = lvalue;
805 spin_unlock_irqrestore(&dev->hw_lock, flags);
806 break;
807 case LIRC_SET_REC_CARRIER:
808 tmp = (lvalue > ENE_NORMAL_RX_HI || lvalue < ENE_NORMAL_RX_LOW);
809
810 if (tmp != dev->learning_enabled) {
811 spin_lock_irqsave(&dev->hw_lock, flags);
812 dev->learning_enabled = tmp;
813 ene_rx_set_inputs(dev);
814 spin_unlock_irqrestore(&dev->hw_lock, flags);
815 }
816 break;
817 case LIRC_SET_REC_TIMEOUT:
818 spin_lock_irqsave(&dev->hw_lock, flags);
819 dev->rx_timeout = lvalue;
820 spin_unlock_irqrestore(&dev->hw_lock, flags);
821 ene_dbg("RX: set rx report timeout to %d", dev->rx_timeout);
822 break;
823 case LIRC_SET_REC_TIMEOUT_REPORTS:
824 spin_lock_irqsave(&dev->hw_lock, flags);
825 dev->rx_send_timeout_packet = lvalue;
826 spin_unlock_irqrestore(&dev->hw_lock, flags);
827 ene_dbg("RX: %sable timeout reports",
828 dev->rx_send_timeout_packet ? "en" : "dis");
829 break;
830 case LIRC_SET_MEASURE_CARRIER_MODE:
831 if (dev->rx_carrier_sense == lvalue)
832 break;
833 spin_lock_irqsave(&dev->hw_lock, flags);
834 dev->rx_carrier_sense = lvalue;
835 ene_rx_set_inputs(dev);
836 spin_unlock_irqrestore(&dev->hw_lock, flags);
837 break;
838 case LIRC_GET_REC_RESOLUTION:
839 tmp = dev->rx_fan_input_inuse ?
840 ENE_SAMPLE_PERIOD_FAN : sample_period;
841 retval = put_user(tmp, (unsigned long *) arg);
842 break;
843 default:
844 retval = -ENOIOCTLCMD;
845 break;
846 }
847
848 return retval;
849}
850
851/* outside interface: transmit */
852static ssize_t ene_transmit(struct file *file, const char *buf,
853 size_t n, loff_t *ppos)
854{
855 struct ene_device *dev = lirc_get_pdata(file);
856 unsigned long flags;
857
858 if (!dev)
859 return -EFAULT;
860
861 if (!dev->hw_learning_and_tx_capable)
862 return -ENODEV;
863
864 if (n % sizeof(int))
865 return -EINVAL;
866
867 if (n > ENE_TXBUF_SIZE * sizeof(int))
868 return -ENOMEM;
869
870 if (copy_from_user(dev->tx_buffer, buf, n))
871 return -EFAULT;
872
873 dev->tx_len = n / sizeof(int);
874 dev->tx_pos = 0;
875 dev->tx_reg = 0;
876 dev->tx_done = 0;
877 dev->tx_sample = 0;
878 dev->tx_sample_pulse = 0;
879
880 ene_dbg("TX: %d samples", dev->tx_len);
881
882 spin_lock_irqsave(&dev->hw_lock, flags);
883
884 ene_tx_set_transmiter_mask(dev);
885 ene_tx_prepare(dev);
886
887 /* Transmit first two samples */
888 ene_tx_sample(dev);
889 ene_tx_sample(dev);
890
891 spin_unlock_irqrestore(&dev->hw_lock, flags);
892
893 if (wait_for_completion_timeout(&dev->tx_complete, 2 * HZ) == 0) {
894 ene_dbg("TX: timeout");
895 spin_lock_irqsave(&dev->hw_lock, flags);
896 ene_tx_complete(dev);
897 spin_unlock_irqrestore(&dev->hw_lock, flags);
898 } else
899 ene_dbg("TX: done");
900
901 return n;
902}
903
904/* Sends one sample to the user */
905static void ene_send_sample(struct ene_device *dev, unsigned long sample)
906{
907 if (!lirc_buffer_full(dev->lirc_driver->rbuf)) {
908 lirc_buffer_write(dev->lirc_driver->rbuf, (void *)&sample);
909 wake_up(&dev->lirc_driver->rbuf->wait_poll);
910 }
911}
912
913
914static const struct file_operations ene_fops = {
915 .owner = THIS_MODULE,
916 .write = ene_transmit,
917 .ioctl = ene_ioctl,
918};
919
920/* main load function */
921static int ene_probe(struct pnp_dev *pnp_dev,
922 const struct pnp_device_id *dev_id)
923{
924 struct ene_device *dev;
925 struct lirc_driver *lirc_driver;
926 int error = -ENOMEM;
927
928 dev = kzalloc(sizeof(struct ene_device), GFP_KERNEL);
929
930 if (!dev)
931 goto err1;
932
933 dev->pnp_dev = pnp_dev;
934 pnp_set_drvdata(pnp_dev, dev);
935
936 /* prepare lirc interface */
937 error = -ENOMEM;
938 lirc_driver = kzalloc(sizeof(struct lirc_driver), GFP_KERNEL);
939
940 if (!lirc_driver)
941 goto err2;
942
943 dev->lirc_driver = lirc_driver;
944
945 strcpy(lirc_driver->name, ENE_DRIVER_NAME);
946 lirc_driver->minor = -1;
947 lirc_driver->code_length = sizeof(int) * 8;
948 lirc_driver->features = LIRC_CAN_REC_MODE2 |
949 LIRC_CAN_GET_REC_RESOLUTION |
950 LIRC_CAN_SET_REC_TIMEOUT;
951 lirc_driver->data = dev;
952 lirc_driver->set_use_inc = ene_open;
953 lirc_driver->set_use_dec = ene_close;
954 lirc_driver->dev = &pnp_dev->dev;
955 lirc_driver->owner = THIS_MODULE;
956 lirc_driver->fops = &ene_fops;
957 lirc_driver->min_timeout = ENE_MINGAP;
958 lirc_driver->max_timeout = ENE_MAXGAP;
959 lirc_driver->rbuf = kzalloc(sizeof(struct lirc_buffer), GFP_KERNEL);
960
961 if (!lirc_driver->rbuf)
962 goto err3;
963
964 if (lirc_buffer_init(lirc_driver->rbuf, sizeof(int), sizeof(int) * 512))
965 goto err4;
966
967 /* validate resources */
968 if (!pnp_port_valid(pnp_dev, 0) ||
969 pnp_port_len(pnp_dev, 0) < ENE_MAX_IO)
970 goto err5;
971
972 if (!pnp_irq_valid(pnp_dev, 0))
973 goto err5;
974
975 dev->hw_io = pnp_port_start(pnp_dev, 0);
976 dev->irq = pnp_irq(pnp_dev, 0);
977 spin_lock_init(&dev->hw_lock);
978
979 /* claim the resources */
980 error = -EBUSY;
981 if (!request_region(dev->hw_io, ENE_MAX_IO, ENE_DRIVER_NAME))
982 goto err5;
983
984 if (request_irq(dev->irq, ene_isr,
985 IRQF_SHARED, ENE_DRIVER_NAME, (void *)dev))
986 goto err6;
987
988 /* detect hardware version and features */
989 error = ene_hw_detect(dev);
990 if (error)
991 goto err7;
992
993 ene_setup_settings(dev);
994
995 if (!dev->hw_learning_and_tx_capable && txsim) {
996 dev->hw_learning_and_tx_capable = 1;
997 setup_timer(&dev->tx_sim_timer, ene_tx_irqsim,
998 (long unsigned int)dev);
999 ene_printk(KERN_WARNING,
1000 "Simulation of TX activated\n");
1001 }
1002
1003 if (dev->hw_learning_and_tx_capable) {
1004 lirc_driver->features |= LIRC_CAN_SEND_PULSE |
1005 LIRC_CAN_SET_SEND_CARRIER |
1006 LIRC_CAN_SET_TRANSMITTER_MASK;
1007
1008 if (enable_duty_carrier)
1009 lirc_driver->features |= LIRC_CAN_SET_SEND_DUTY_CYCLE;
1010
1011 if (input == 0)
1012 lirc_driver->features |= LIRC_CAN_SET_REC_CARRIER;
1013
1014 init_completion(&dev->tx_complete);
1015 }
1016
1017 /* don't allow too short/long sample periods */
1018 if (sample_period < 5 || sample_period > 0x7F)
1019 sample_period = -1;
1020
1021 /* choose default sample period */
1022 if (sample_period == -1) {
1023
1024 sample_period = 50;
1025
1026 /* on revB, hardware idle mode eats first sample
1027 if we set too low sample period */
1028 if (dev->hw_revision == ENE_HW_B && enable_idle)
1029 sample_period = 75;
1030 }
1031
1032 device_set_wakeup_capable(&pnp_dev->dev, 1);
1033 device_set_wakeup_enable(&pnp_dev->dev, 1);
1034
1035 error = -ENODEV;
1036 if (lirc_register_driver(lirc_driver))
1037 goto err7;
1038
1039 ene_printk(KERN_NOTICE, "driver has been succesfully loaded\n");
1040 return 0;
1041
1042err7:
1043 free_irq(dev->irq, dev);
1044err6:
1045 release_region(dev->hw_io, ENE_MAX_IO);
1046err5:
1047 lirc_buffer_free(lirc_driver->rbuf);
1048err4:
1049 kfree(lirc_driver->rbuf);
1050err3:
1051 kfree(lirc_driver);
1052err2:
1053 kfree(dev);
1054err1:
1055 return error;
1056}
1057
1058/* main unload function */
1059static void ene_remove(struct pnp_dev *pnp_dev)
1060{
1061 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1062 unsigned long flags;
1063
1064 spin_lock_irqsave(&dev->hw_lock, flags);
1065 ene_rx_disable(dev);
1066 spin_unlock_irqrestore(&dev->hw_lock, flags);
1067
1068 free_irq(dev->irq, dev);
1069 release_region(dev->hw_io, ENE_MAX_IO);
1070 lirc_unregister_driver(dev->lirc_driver->minor);
1071 lirc_buffer_free(dev->lirc_driver->rbuf);
1072 kfree(dev->lirc_driver);
1073 kfree(dev);
1074}
1075
1076/* enable wake on IR (wakes on specific button on original remote) */
1077static void ene_enable_wake(struct ene_device *dev, int enable)
1078{
1079 enable = enable && device_may_wakeup(&dev->pnp_dev->dev);
1080
1081 ene_dbg("wake on IR %s", enable ? "enabled" : "disabled");
1082
1083 ene_hw_write_reg_mask(dev, ENE_FW1, enable ?
1084 ENE_FW1_WAKE : 0, ENE_FW1_WAKE);
1085}
1086
1087#ifdef CONFIG_PM
1088static int ene_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
1089{
1090 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1091 ene_enable_wake(dev, 1);
1092 return 0;
1093}
1094
1095static int ene_resume(struct pnp_dev *pnp_dev)
1096{
1097 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1098 if (dev->in_use)
1099 ene_rx_enable(dev);
1100
1101 ene_enable_wake(dev, 0);
1102 return 0;
1103}
1104#endif
1105
1106static void ene_shutdown(struct pnp_dev *pnp_dev)
1107{
1108 struct ene_device *dev = pnp_get_drvdata(pnp_dev);
1109 ene_enable_wake(dev, 1);
1110}
1111
1112static const struct pnp_device_id ene_ids[] = {
1113 {.id = "ENE0100",},
1114 {.id = "ENE0200",},
1115 {.id = "ENE0201",},
1116 {},
1117};
1118
1119static struct pnp_driver ene_driver = {
1120 .name = ENE_DRIVER_NAME,
1121 .id_table = ene_ids,
1122 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1123
1124 .probe = ene_probe,
1125 .remove = __devexit_p(ene_remove),
1126#ifdef CONFIG_PM
1127 .suspend = ene_suspend,
1128 .resume = ene_resume,
1129#endif
1130 .shutdown = ene_shutdown,
1131};
1132
1133static int __init ene_init(void)
1134{
1135 return pnp_register_driver(&ene_driver);
1136}
1137
1138static void ene_exit(void)
1139{
1140 pnp_unregister_driver(&ene_driver);
1141}
1142
1143module_param(sample_period, int, S_IRUGO);
1144MODULE_PARM_DESC(sample_period, "Hardware sample period (50 us default)");
1145
1146module_param(enable_idle, bool, S_IRUGO | S_IWUSR);
1147MODULE_PARM_DESC(enable_idle,
1148 "Enables turning off signal sampling after long inactivity time; "
1149 "if disabled might help detecting input signal (default: enabled)"
1150 " (KB3926B only)");
1151
1152module_param(input, bool, S_IRUGO);
1153MODULE_PARM_DESC(input, "select which input to use "
1154 "0 - auto, 1 - standard, 2 - wideband(KB3926C+)");
1155
1156module_param(debug, int, S_IRUGO | S_IWUSR);
1157MODULE_PARM_DESC(debug, "Enable debug (debug=2 verbose debug output)");
1158
1159module_param(txsim, bool, S_IRUGO);
1160MODULE_PARM_DESC(txsim,
1161 "Simulate TX features on unsupported hardware (dangerous)");
1162
1163module_param(enable_duty_carrier, bool, S_IRUGO);
1164MODULE_PARM_DESC(enable_duty_carrier,
1165 "Enable a code that might allow to to set TX carrier duty cycle");
1166
1167MODULE_DEVICE_TABLE(pnp, ene_ids);
1168MODULE_DESCRIPTION
1169 ("LIRC driver for KB3926B/KB3926C/KB3926D "
1170 "(aka ENE0100/ENE0200/ENE0201) CIR port");
1171
1172MODULE_AUTHOR("Maxim Levitsky");
1173MODULE_LICENSE("GPL");
1174
1175module_init(ene_init);
1176module_exit(ene_exit);
diff --git a/drivers/media/IR/ene_ir.h b/drivers/media/IR/ene_ir.h
new file mode 100644
index 000000000000..b464a680d8ae
--- /dev/null
+++ b/drivers/media/IR/ene_ir.h
@@ -0,0 +1,240 @@
1/*
2 * driver for ENE KB3926 B/C/D CIR (also known as ENE0100/ENE0200/ENE0201)
3 *
4 * Copyright (C) 2010 Maxim Levitsky <maximlevitsky@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
19 * USA
20 */
21#include <linux/spinlock.h>
22#include <media/lirc.h>
23#include <media/lirc_dev.h>
24
25/* hardware address */
26#define ENE_STATUS 0 /* hardware status - unused */
27#define ENE_ADDR_HI 1 /* hi byte of register address */
28#define ENE_ADDR_LO 2 /* low byte of register address */
29#define ENE_IO 3 /* read/write window */
30#define ENE_MAX_IO 4
31
32/* 8 bytes of samples, divided in 2 halfs*/
33#define ENE_SAMPLE_BUFFER 0xF8F0 /* regular sample buffer */
34#define ENE_SAMPLE_SPC_MASK 0x80 /* sample is space */
35#define ENE_SAMPLE_VALUE_MASK 0x7F
36#define ENE_SAMPLE_OVERFLOW 0x7F
37#define ENE_SAMPLES_SIZE 4
38
39/* fan input sample buffer */
40#define ENE_SAMPLE_BUFFER_FAN 0xF8FB /* this buffer holds high byte of */
41 /* each sample of normal buffer */
42#define ENE_FAN_SMPL_PULS_MSK 0x8000 /* this bit of combined sample */
43 /* if set, says that sample is pulse */
44#define ENE_FAN_VALUE_MASK 0x0FFF /* mask for valid bits of the value */
45
46/* first firmware register */
47#define ENE_FW1 0xF8F8
48#define ENE_FW1_ENABLE 0x01 /* enable fw processing */
49#define ENE_FW1_TXIRQ 0x02 /* TX interrupt pending */
50#define ENE_FW1_WAKE 0x40 /* enable wake from S3 */
51#define ENE_FW1_IRQ 0x80 /* enable interrupt */
52
53/* second firmware register */
54#define ENE_FW2 0xF8F9
55#define ENE_FW2_BUF_HIGH 0x01 /* which half of the buffer to read */
56#define ENE_FW2_IRQ_CLR 0x04 /* clear this on IRQ */
57#define ENE_FW2_GP40_AS_LEARN 0x08 /* normal input is used as */
58 /* learning input */
59#define ENE_FW2_FAN_AS_NRML_IN 0x40 /* fan is used as normal input */
60#define ENE_FW2_LEARNING 0x80 /* hardware supports learning and TX */
61
62/* transmitter ports */
63#define ENE_TX_PORT2 0xFC01 /* this enables one or both */
64#define ENE_TX_PORT2_EN 0x20 /* TX ports */
65#define ENE_TX_PORT1 0xFC08
66#define ENE_TX_PORT1_EN 0x02
67
68/* IRQ registers block (for revision B) */
69#define ENEB_IRQ 0xFD09 /* IRQ number */
70#define ENEB_IRQ_UNK1 0xFD17 /* unknown setting = 1 */
71#define ENEB_IRQ_STATUS 0xFD80 /* irq status */
72#define ENEB_IRQ_STATUS_IR 0x20 /* IR irq */
73
74/* fan as input settings - only if learning capable */
75#define ENE_FAN_AS_IN1 0xFE30 /* fan init reg 1 */
76#define ENE_FAN_AS_IN1_EN 0xCD
77#define ENE_FAN_AS_IN2 0xFE31 /* fan init reg 2 */
78#define ENE_FAN_AS_IN2_EN 0x03
79#define ENE_SAMPLE_PERIOD_FAN 61 /* fan input has fixed sample period */
80
81/* IRQ registers block (for revision C,D) */
82#define ENEC_IRQ 0xFE9B /* new irq settings register */
83#define ENEC_IRQ_MASK 0x0F /* irq number mask */
84#define ENEC_IRQ_UNK_EN 0x10 /* always enabled */
85#define ENEC_IRQ_STATUS 0x20 /* irq status and ACK */
86
87/* CIR block settings */
88#define ENE_CIR_CONF1 0xFEC0
89#define ENE_CIR_CONF1_TX_CLEAR 0x01 /* clear that on revC */
90 /* while transmitting */
91#define ENE_CIR_CONF1_RX_ON 0x07 /* normal reciever enabled */
92#define ENE_CIR_CONF1_LEARN1 0x08 /* enabled on learning mode */
93#define ENE_CIR_CONF1_TX_ON 0x30 /* enabled on transmit */
94#define ENE_CIR_CONF1_TX_CARR 0x80 /* send TX carrier or not */
95
96#define ENE_CIR_CONF2 0xFEC1 /* unknown setting = 0 */
97#define ENE_CIR_CONF2_LEARN2 0x10 /* set on enable learning */
98#define ENE_CIR_CONF2_GPIO40DIS 0x20 /* disable input via gpio40 */
99
100#define ENE_CIR_SAMPLE_PERIOD 0xFEC8 /* sample period in us */
101#define ENE_CIR_SAMPLE_OVERFLOW 0x80 /* interrupt on overflows if set */
102
103
104/* Two byte tx buffer */
105#define ENE_TX_INPUT1 0xFEC9
106#define ENE_TX_INPUT2 0xFECA
107#define ENE_TX_PULSE_MASK 0x80 /* Transmitted sample is pulse */
108#define ENE_TX_SMLP_MASK 0x7F
109#define ENE_TX_SMPL_PERIOD 50 /* transmit sample period - fixed */
110
111
112/* Unknown TX setting - TX sample period ??? */
113#define ENE_TX_UNK1 0xFECB /* set to 0x63 */
114
115/* Current recieved carrier period */
116#define ENE_RX_CARRIER 0xFECC /* RX period (500 ns) */
117#define ENE_RX_CARRIER_VALID 0x80 /* Register content valid */
118
119
120/* TX period (1/carrier) */
121#define ENE_TX_PERIOD 0xFECE /* TX period (500 ns) */
122#define ENE_TX_PERIOD_UNKBIT 0x80 /* This bit set on transmit*/
123#define ENE_TX_PERIOD_PULSE 0xFECF /* TX pulse period (500 ns)*/
124
125/* Hardware versions */
126#define ENE_HW_VERSION 0xFF00 /* hardware revision */
127#define ENE_HW_UNK 0xFF1D
128#define ENE_HW_UNK_CLR 0x04
129#define ENE_HW_VER_MAJOR 0xFF1E /* chip version */
130#define ENE_HW_VER_MINOR 0xFF1F
131#define ENE_HW_VER_OLD 0xFD00
132
133/* Normal/Learning carrier ranges - only valid if we have learning input*/
134/* TODO: test */
135#define ENE_NORMAL_RX_LOW 34
136#define ENE_NORMAL_RX_HI 38
137
138/* Tx carrier range */
139/* Hardware might be able to do more, but this range is enough for
140 all purposes */
141#define ENE_TX_PERIOD_MAX 32 /* corresponds to 29.4 kHz */
142#define ENE_TX_PERIOD_MIN 16 /* corrsponds to 62.5 kHz */
143
144
145
146/* Minimal and maximal gaps */
147
148/* Normal case:
149 Minimal gap is 0x7F * sample period
150 Maximum gap depends on hardware.
151 For KB3926B, it is unlimited, for newer models its around
152 250000, after which HW stops sending samples, and that is
153 not possible to change */
154
155/* Fan case:
156 Both minimal and maximal gaps are same, and equal to 0xFFF * 0x61
157 And there is nothing to change this setting
158*/
159
160#define ENE_MAXGAP 250000
161#define ENE_MINGAP (127 * sample_period)
162
163/******************************************************************************/
164
165#define ENE_DRIVER_NAME "enecir"
166#define ENE_TXBUF_SIZE (500 * sizeof(int)) /* 500 samples (arbitary) */
167
168#define ENE_IRQ_RX 1
169#define ENE_IRQ_TX 2
170
171#define ENE_HW_B 1 /* 3926B */
172#define ENE_HW_C 2 /* 3926C */
173#define ENE_HW_D 3 /* 3926D */
174
175#define ene_printk(level, text, ...) \
176 printk(level ENE_DRIVER_NAME ": " text, ## __VA_ARGS__)
177
178#define ene_dbg(text, ...) \
179 if (debug) \
180 printk(KERN_DEBUG \
181 ENE_DRIVER_NAME ": " text "\n" , ## __VA_ARGS__)
182
183#define ene_dbg_verbose(text, ...) \
184 if (debug > 1) \
185 printk(KERN_DEBUG \
186 ENE_DRIVER_NAME ": " text "\n" , ## __VA_ARGS__)
187
188
189struct ene_device {
190 struct pnp_dev *pnp_dev;
191 struct lirc_driver *lirc_driver;
192 int in_use;
193
194 /* hw IO settings */
195 unsigned long hw_io;
196 int irq;
197 spinlock_t hw_lock;
198
199 /* HW features */
200 int hw_revision; /* hardware revision */
201 int hw_learning_and_tx_capable; /* learning capable */
202 int hw_gpio40_learning; /* gpio40 is learning */
203 int hw_fan_as_normal_input; /* fan input is used as */
204 /* regular input */
205 /* HW state*/
206 int rx_pointer; /* hw pointer to rx buffer */
207 int rx_fan_input_inuse; /* is fan input in use for rx*/
208 int tx_reg; /* current reg used for TX */
209 u8 saved_conf1; /* saved FEC0 reg */
210 int learning_enabled; /* learning input enabled */
211
212 /* RX sample handling */
213 int rx_sample; /* current recieved sample */
214 int rx_sample_pulse; /* recieved sample is pulse */
215 int rx_idle; /* idle mode for RX activated */
216 struct timeval rx_gap_start; /* time of start of idle */
217 int rx_timeout; /* time in ms of RX timeout */
218 int rx_send_timeout_packet; /* do we send RX timeout */
219 int rx_timeout_sent; /* we sent the timeout packet */
220 int rx_carrier_sense; /* sense carrier */
221
222 /* TX sample handling */
223 unsigned int tx_sample; /* current sample for TX */
224 int tx_sample_pulse; /* current sample is pulse */
225
226 /* TX buffer */
227 int tx_buffer[ENE_TXBUF_SIZE]; /* input samples buffer*/
228 int tx_pos; /* position in that bufer */
229 int tx_len; /* current len of tx buffer */
230 int tx_underway; /* TX is under way*/
231 int tx_done; /* done transmitting */
232 /* one more sample pending*/
233 struct completion tx_complete; /* TX completion */
234 struct timer_list tx_sim_timer;
235
236 /*TX settings */
237 int tx_period;
238 int tx_duty_cycle;
239 int transmitter_mask;
240};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-01 02:45:02 -0500