diff options
author | Antti Palosaari <crope@iki.fi> | 2008-05-17 21:58:04 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@infradead.org> | 2008-07-20 06:06:06 -0400 |
commit | 4388c3b4fe0362e8bb3fe3a09b312db929b8c730 (patch) | |
tree | 28a34571da0769dc53fe030aadfb081142d54398 /drivers/media | |
parent | 34cb61693e204897a6ae37d56a1e07d0cdd8cdbf (diff) |
V4L/DVB (7912): TDA10023: make few parameters configurable
- separate TDA10021 and TDA10023 attach
- configurable Xtal settings
- configurable input freq offset + baseband conversion type settings
Signed-off-by: Antti Palosaari <crope@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media')
-rw-r--r-- | drivers/media/dvb/frontends/tda10023.c | 193 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/tda1002x.h | 31 | ||||
-rw-r--r-- | drivers/media/dvb/ttpci/budget-av.c | 12 |
3 files changed, 145 insertions, 91 deletions
diff --git a/drivers/media/dvb/frontends/tda10023.c b/drivers/media/dvb/frontends/tda10023.c index c6ff5b82ff80..2996b73cf4b4 100644 --- a/drivers/media/dvb/frontends/tda10023.c +++ b/drivers/media/dvb/frontends/tda10023.c | |||
@@ -38,75 +38,29 @@ | |||
38 | #include "dvb_frontend.h" | 38 | #include "dvb_frontend.h" |
39 | #include "tda1002x.h" | 39 | #include "tda1002x.h" |
40 | 40 | ||
41 | #define REG0_INIT_VAL 0x23 | ||
41 | 42 | ||
42 | struct tda10023_state { | 43 | struct tda10023_state { |
43 | struct i2c_adapter* i2c; | 44 | struct i2c_adapter* i2c; |
44 | /* configuration settings */ | 45 | /* configuration settings */ |
45 | const struct tda1002x_config* config; | 46 | const struct tda10023_config *config; |
46 | struct dvb_frontend frontend; | 47 | struct dvb_frontend frontend; |
47 | 48 | ||
48 | u8 pwm; | 49 | u8 pwm; |
49 | u8 reg0; | 50 | u8 reg0; |
50 | }; | ||
51 | 51 | ||
52 | /* clock settings */ | ||
53 | u32 xtal; | ||
54 | u8 pll_m; | ||
55 | u8 pll_p; | ||
56 | u8 pll_n; | ||
57 | u32 sysclk; | ||
58 | }; | ||
52 | 59 | ||
53 | #define dprintk(x...) | 60 | #define dprintk(x...) |
54 | 61 | ||
55 | static int verbose; | 62 | static int verbose; |
56 | 63 | ||
57 | #define XTAL 28920000UL | ||
58 | #define PLL_M 8UL | ||
59 | #define PLL_P 4UL | ||
60 | #define PLL_N 1UL | ||
61 | #define SYSCLK (XTAL*PLL_M/(PLL_N*PLL_P)) // -> 57840000 | ||
62 | |||
63 | static u8 tda10023_inittab[]={ | ||
64 | // reg mask val | ||
65 | 0x2a,0xff,0x02, // PLL3, Bypass, Power Down | ||
66 | 0xff,0x64,0x00, // Sleep 100ms | ||
67 | 0x2a,0xff,0x03, // PLL3, Bypass, Power Down | ||
68 | 0xff,0x64,0x00, // Sleep 100ms | ||
69 | 0x28,0xff,PLL_M-1, // PLL1 M=8 | ||
70 | 0x29,0xff,((PLL_P-1)<<6)|(PLL_N-1), // PLL2 | ||
71 | 0x00,0xff,0x23, // GPR FSAMPLING=1 | ||
72 | 0x2a,0xff,0x08, // PLL3 PSACLK=1 | ||
73 | 0xff,0x64,0x00, // Sleep 100ms | ||
74 | 0x1f,0xff,0x00, // RESET | ||
75 | 0xff,0x64,0x00, // Sleep 100ms | ||
76 | 0xe6,0x0c,0x04, // RSCFG_IND | ||
77 | 0x10,0xc0,0x80, // DECDVBCFG1 PBER=1 | ||
78 | |||
79 | 0x0e,0xff,0x82, // GAIN1 | ||
80 | 0x03,0x08,0x08, // CLKCONF DYN=1 | ||
81 | 0x2e,0xbf,0x30, // AGCCONF2 TRIAGC=0,POSAGC=ENAGCIF=1 PPWMTUN=0 PPWMIF=0 | ||
82 | 0x01,0xff,0x30, // AGCREF | ||
83 | 0x1e,0x84,0x84, // CONTROL SACLK_ON=1 | ||
84 | 0x1b,0xff,0xc8, // ADC TWOS=1 | ||
85 | 0x3b,0xff,0xff, // IFMAX | ||
86 | 0x3c,0xff,0x00, // IFMIN | ||
87 | 0x34,0xff,0x00, // PWMREF | ||
88 | 0x35,0xff,0xff, // TUNMAX | ||
89 | 0x36,0xff,0x00, // TUNMIN | ||
90 | 0x06,0xff,0x7f, // EQCONF1 POSI=7 ENADAPT=ENEQUAL=DFE=1 // 0x77 | ||
91 | 0x1c,0x30,0x30, // EQCONF2 STEPALGO=SGNALGO=1 | ||
92 | 0x37,0xff,0xf6, // DELTAF_LSB | ||
93 | 0x38,0xff,0xff, // DELTAF_MSB | ||
94 | 0x02,0xff,0x93, // AGCCONF1 IFS=1 KAGCIF=2 KAGCTUN=3 | ||
95 | 0x2d,0xff,0xf6, // SWEEP SWPOS=1 SWDYN=7 SWSTEP=1 SWLEN=2 | ||
96 | 0x04,0x10,0x00, // SWRAMP=1 | ||
97 | 0x12,0xff,0xa1, // INTP1 POCLKP=1 FEL=1 MFS=0 | ||
98 | 0x2b,0x01,0xa1, // INTS1 | ||
99 | 0x20,0xff,0x04, // INTP2 SWAPP=? MSBFIRSTP=? INTPSEL=? | ||
100 | 0x2c,0xff,0x0d, // INTP/S TRIP=0 TRIS=0 | ||
101 | 0xc4,0xff,0x00, | ||
102 | 0xc3,0x30,0x00, | ||
103 | 0xb5,0xff,0x19, // ERAGC_THD | ||
104 | 0x00,0x03,0x01, // GPR, CLBS soft reset | ||
105 | 0x00,0x03,0x03, // GPR, CLBS soft reset | ||
106 | 0xff,0x64,0x00, // Sleep 100ms | ||
107 | 0xff,0xff,0xff | ||
108 | }; | ||
109 | |||
110 | static u8 tda10023_readreg (struct tda10023_state* state, u8 reg) | 64 | static u8 tda10023_readreg (struct tda10023_state* state, u8 reg) |
111 | { | 65 | { |
112 | u8 b0 [] = { reg }; | 66 | u8 b0 [] = { reg }; |
@@ -219,30 +173,34 @@ static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr) | |||
219 | s16 SFIL=0; | 173 | s16 SFIL=0; |
220 | u16 NDEC = 0; | 174 | u16 NDEC = 0; |
221 | 175 | ||
222 | if (sr < (u32)(SYSCLK/98.40)) { | 176 | /* avoid floating point operations multiplying syscloc and divider |
177 | by 10 */ | ||
178 | u32 sysclk_x_10 = state->sysclk * 10; | ||
179 | |||
180 | if (sr < (u32)(sysclk_x_10/984)) { | ||
223 | NDEC=3; | 181 | NDEC=3; |
224 | SFIL=1; | 182 | SFIL=1; |
225 | } else if (sr<(u32)(SYSCLK/64.0)) { | 183 | } else if (sr < (u32)(sysclk_x_10/640)) { |
226 | NDEC=3; | 184 | NDEC=3; |
227 | SFIL=0; | 185 | SFIL=0; |
228 | } else if (sr<(u32)(SYSCLK/49.2)) { | 186 | } else if (sr < (u32)(sysclk_x_10/492)) { |
229 | NDEC=2; | 187 | NDEC=2; |
230 | SFIL=1; | 188 | SFIL=1; |
231 | } else if (sr<(u32)(SYSCLK/32.0)) { | 189 | } else if (sr < (u32)(sysclk_x_10/320)) { |
232 | NDEC=2; | 190 | NDEC=2; |
233 | SFIL=0; | 191 | SFIL=0; |
234 | } else if (sr<(u32)(SYSCLK/24.6)) { | 192 | } else if (sr < (u32)(sysclk_x_10/246)) { |
235 | NDEC=1; | 193 | NDEC=1; |
236 | SFIL=1; | 194 | SFIL=1; |
237 | } else if (sr<(u32)(SYSCLK/16.0)) { | 195 | } else if (sr < (u32)(sysclk_x_10/160)) { |
238 | NDEC=1; | 196 | NDEC=1; |
239 | SFIL=0; | 197 | SFIL=0; |
240 | } else if (sr<(u32)(SYSCLK/12.3)) { | 198 | } else if (sr < (u32)(sysclk_x_10/123)) { |
241 | NDEC=0; | 199 | NDEC=0; |
242 | SFIL=1; | 200 | SFIL=1; |
243 | } | 201 | } |
244 | 202 | ||
245 | BDRI=SYSCLK*16; | 203 | BDRI = (state->sysclk)*16; |
246 | BDRI>>=NDEC; | 204 | BDRI>>=NDEC; |
247 | BDRI +=sr/2; | 205 | BDRI +=sr/2; |
248 | BDRI /=sr; | 206 | BDRI /=sr; |
@@ -255,11 +213,12 @@ static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr) | |||
255 | 213 | ||
256 | BDRX=1<<(24+NDEC); | 214 | BDRX=1<<(24+NDEC); |
257 | BDRX*=sr; | 215 | BDRX*=sr; |
258 | do_div(BDRX,SYSCLK); // BDRX/=SYSCLK; | 216 | do_div(BDRX, state->sysclk); /* BDRX/=SYSCLK; */ |
259 | 217 | ||
260 | BDR=(s32)BDRX; | 218 | BDR=(s32)BDRX; |
261 | } | 219 | } |
262 | // printk("Symbolrate %i, BDR %i BDRI %i, NDEC %i\n",sr,BDR,BDRI,NDEC); | 220 | dprintk("Symbolrate %i, BDR %i BDRI %i, NDEC %i\n", |
221 | sr, BDR, BDRI, NDEC); | ||
263 | tda10023_writebit (state, 0x03, 0xc0, NDEC<<6); | 222 | tda10023_writebit (state, 0x03, 0xc0, NDEC<<6); |
264 | tda10023_writereg (state, 0x0a, BDR&255); | 223 | tda10023_writereg (state, 0x0a, BDR&255); |
265 | tda10023_writereg (state, 0x0b, (BDR>>8)&255); | 224 | tda10023_writereg (state, 0x0b, (BDR>>8)&255); |
@@ -272,8 +231,63 @@ static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr) | |||
272 | static int tda10023_init (struct dvb_frontend *fe) | 231 | static int tda10023_init (struct dvb_frontend *fe) |
273 | { | 232 | { |
274 | struct tda10023_state* state = fe->demodulator_priv; | 233 | struct tda10023_state* state = fe->demodulator_priv; |
234 | u8 tda10023_inittab[] = { | ||
235 | /* reg mask val */ | ||
236 | /* 000 */ 0x2a, 0xff, 0x02, /* PLL3, Bypass, Power Down */ | ||
237 | /* 003 */ 0xff, 0x64, 0x00, /* Sleep 100ms */ | ||
238 | /* 006 */ 0x2a, 0xff, 0x03, /* PLL3, Bypass, Power Down */ | ||
239 | /* 009 */ 0xff, 0x64, 0x00, /* Sleep 100ms */ | ||
240 | /* PLL1 */ | ||
241 | /* 012 */ 0x28, 0xff, (state->pll_m-1), | ||
242 | /* PLL2 */ | ||
243 | /* 015 */ 0x29, 0xff, ((state->pll_p-1)<<6)|(state->pll_n-1), | ||
244 | /* GPR FSAMPLING=1 */ | ||
245 | /* 018 */ 0x00, 0xff, REG0_INIT_VAL, | ||
246 | /* 021 */ 0x2a, 0xff, 0x08, /* PLL3 PSACLK=1 */ | ||
247 | /* 024 */ 0xff, 0x64, 0x00, /* Sleep 100ms */ | ||
248 | /* 027 */ 0x1f, 0xff, 0x00, /* RESET */ | ||
249 | /* 030 */ 0xff, 0x64, 0x00, /* Sleep 100ms */ | ||
250 | /* 033 */ 0xe6, 0x0c, 0x04, /* RSCFG_IND */ | ||
251 | /* 036 */ 0x10, 0xc0, 0x80, /* DECDVBCFG1 PBER=1 */ | ||
252 | |||
253 | /* 039 */ 0x0e, 0xff, 0x82, /* GAIN1 */ | ||
254 | /* 042 */ 0x03, 0x08, 0x08, /* CLKCONF DYN=1 */ | ||
255 | /* 045 */ 0x2e, 0xbf, 0x30, /* AGCCONF2 TRIAGC=0,POSAGC=ENAGCIF=1 | ||
256 | PPWMTUN=0 PPWMIF=0 */ | ||
257 | /* 048 */ 0x01, 0xff, 0x30, /* AGCREF */ | ||
258 | /* 051 */ 0x1e, 0x84, 0x84, /* CONTROL SACLK_ON=1 */ | ||
259 | /* 054 */ 0x1b, 0xff, 0xc8, /* ADC TWOS=1 */ | ||
260 | /* 057 */ 0x3b, 0xff, 0xff, /* IFMAX */ | ||
261 | /* 060 */ 0x3c, 0xff, 0x00, /* IFMIN */ | ||
262 | /* 063 */ 0x34, 0xff, 0x00, /* PWMREF */ | ||
263 | /* 066 */ 0x35, 0xff, 0xff, /* TUNMAX */ | ||
264 | /* 069 */ 0x36, 0xff, 0x00, /* TUNMIN */ | ||
265 | /* 072 */ 0x06, 0xff, 0x7f, /* EQCONF1 POSI=7 ENADAPT=ENEQUAL=DFE=1 */ | ||
266 | /* 075 */ 0x1c, 0x30, 0x30, /* EQCONF2 STEPALGO=SGNALGO=1 */ | ||
267 | /* 078 */ 0x37, 0xff, 0xf6, /* DELTAF_LSB */ | ||
268 | /* 081 */ 0x38, 0xff, 0xff, /* DELTAF_MSB */ | ||
269 | /* 084 */ 0x02, 0xff, 0x93, /* AGCCONF1 IFS=1 KAGCIF=2 KAGCTUN=3 */ | ||
270 | /* 087 */ 0x2d, 0xff, 0xf6, /* SWEEP SWPOS=1 SWDYN=7 SWSTEP=1 SWLEN=2 */ | ||
271 | /* 090 */ 0x04, 0x10, 0x00, /* SWRAMP=1 */ | ||
272 | /* 093 */ 0x12, 0xff, 0xa1, /* INTP1 POCLKP=1 FEL=1 MFS=0 */ | ||
273 | /* 096 */ 0x2b, 0x01, 0xa1, /* INTS1 */ | ||
274 | /* 099 */ 0x20, 0xff, 0x04, /* INTP2 SWAPP=? MSBFIRSTP=? INTPSEL=? */ | ||
275 | /* 102 */ 0x2c, 0xff, 0x0d, /* INTP/S TRIP=0 TRIS=0 */ | ||
276 | /* 105 */ 0xc4, 0xff, 0x00, | ||
277 | /* 108 */ 0xc3, 0x30, 0x00, | ||
278 | /* 111 */ 0xb5, 0xff, 0x19, /* ERAGC_THD */ | ||
279 | /* 114 */ 0x00, 0x03, 0x01, /* GPR, CLBS soft reset */ | ||
280 | /* 117 */ 0x00, 0x03, 0x03, /* GPR, CLBS soft reset */ | ||
281 | /* 120 */ 0xff, 0x64, 0x00, /* Sleep 100ms */ | ||
282 | /* 123 */ 0xff, 0xff, 0xff | ||
283 | }; | ||
284 | dprintk("DVB: TDA10023(%d): init chip\n", fe->dvb->num); | ||
275 | 285 | ||
276 | dprintk("DVB: TDA10023(%d): init chip\n", fe->adapter->num); | 286 | /* override default values if set in config */ |
287 | if (state->config->deltaf) { | ||
288 | tda10023_inittab[80] = (state->config->deltaf & 0xff); | ||
289 | tda10023_inittab[83] = (state->config->deltaf >> 8); | ||
290 | } | ||
277 | 291 | ||
278 | tda10023_writetab(state, tda10023_inittab); | 292 | tda10023_writetab(state, tda10023_inittab); |
279 | 293 | ||
@@ -460,12 +474,11 @@ static void tda10023_release(struct dvb_frontend* fe) | |||
460 | 474 | ||
461 | static struct dvb_frontend_ops tda10023_ops; | 475 | static struct dvb_frontend_ops tda10023_ops; |
462 | 476 | ||
463 | struct dvb_frontend* tda10023_attach(const struct tda1002x_config* config, | 477 | struct dvb_frontend *tda10023_attach(const struct tda10023_config *config, |
464 | struct i2c_adapter* i2c, | 478 | struct i2c_adapter *i2c, |
465 | u8 pwm) | 479 | u8 pwm) |
466 | { | 480 | { |
467 | struct tda10023_state* state = NULL; | 481 | struct tda10023_state* state = NULL; |
468 | int i; | ||
469 | 482 | ||
470 | /* allocate memory for the internal state */ | 483 | /* allocate memory for the internal state */ |
471 | state = kzalloc(sizeof(struct tda10023_state), GFP_KERNEL); | 484 | state = kzalloc(sizeof(struct tda10023_state), GFP_KERNEL); |
@@ -474,22 +487,40 @@ struct dvb_frontend* tda10023_attach(const struct tda1002x_config* config, | |||
474 | /* setup the state */ | 487 | /* setup the state */ |
475 | state->config = config; | 488 | state->config = config; |
476 | state->i2c = i2c; | 489 | state->i2c = i2c; |
477 | memcpy(&state->frontend.ops, &tda10023_ops, sizeof(struct dvb_frontend_ops)); | ||
478 | state->pwm = pwm; | ||
479 | for (i=0; i < ARRAY_SIZE(tda10023_inittab);i+=3) { | ||
480 | if (tda10023_inittab[i] == 0x00) { | ||
481 | state->reg0 = tda10023_inittab[i+2]; | ||
482 | break; | ||
483 | } | ||
484 | } | ||
485 | 490 | ||
486 | // Wakeup if in standby | 491 | /* wakeup if in standby */ |
487 | tda10023_writereg (state, 0x00, 0x33); | 492 | tda10023_writereg (state, 0x00, 0x33); |
488 | /* check if the demod is there */ | 493 | /* check if the demod is there */ |
489 | if ((tda10023_readreg(state, 0x1a) & 0xf0) != 0x70) goto error; | 494 | if ((tda10023_readreg(state, 0x1a) & 0xf0) != 0x70) goto error; |
490 | 495 | ||
491 | /* create dvb_frontend */ | 496 | /* create dvb_frontend */ |
492 | memcpy(&state->frontend.ops, &tda10023_ops, sizeof(struct dvb_frontend_ops)); | 497 | memcpy(&state->frontend.ops, &tda10023_ops, sizeof(struct dvb_frontend_ops)); |
498 | state->pwm = pwm; | ||
499 | state->reg0 = REG0_INIT_VAL; | ||
500 | if (state->config->xtal) { | ||
501 | state->xtal = state->config->xtal; | ||
502 | state->pll_m = state->config->pll_m; | ||
503 | state->pll_p = state->config->pll_p; | ||
504 | state->pll_n = state->config->pll_n; | ||
505 | } else { | ||
506 | /* set default values if not defined in config */ | ||
507 | state->xtal = 28920000; | ||
508 | state->pll_m = 8; | ||
509 | state->pll_p = 4; | ||
510 | state->pll_n = 1; | ||
511 | } | ||
512 | |||
513 | /* calc sysclk */ | ||
514 | state->sysclk = (state->xtal * state->pll_m / \ | ||
515 | (state->pll_n * state->pll_p)); | ||
516 | |||
517 | state->frontend.ops.info.symbol_rate_min = (state->sysclk/2)/64; | ||
518 | state->frontend.ops.info.symbol_rate_max = (state->sysclk/2)/4; | ||
519 | |||
520 | dprintk("DVB: TDA10023 %s: xtal:%d pll_m:%d pll_p:%d pll_n:%d\n", | ||
521 | __func__, state->xtal, state->pll_m, state->pll_p, | ||
522 | state->pll_n); | ||
523 | |||
493 | state->frontend.demodulator_priv = state; | 524 | state->frontend.demodulator_priv = state; |
494 | return &state->frontend; | 525 | return &state->frontend; |
495 | 526 | ||
@@ -504,10 +535,10 @@ static struct dvb_frontend_ops tda10023_ops = { | |||
504 | .name = "Philips TDA10023 DVB-C", | 535 | .name = "Philips TDA10023 DVB-C", |
505 | .type = FE_QAM, | 536 | .type = FE_QAM, |
506 | .frequency_stepsize = 62500, | 537 | .frequency_stepsize = 62500, |
507 | .frequency_min = 47000000, | 538 | .frequency_min = 47000000, |
508 | .frequency_max = 862000000, | 539 | .frequency_max = 862000000, |
509 | .symbol_rate_min = (SYSCLK/2)/64, /* SACLK/64 == (SYSCLK/2)/64 */ | 540 | .symbol_rate_min = 0, /* set in tda10023_attach */ |
510 | .symbol_rate_max = (SYSCLK/2)/4, /* SACLK/4 */ | 541 | .symbol_rate_max = 0, /* set in tda10023_attach */ |
511 | .caps = 0x400 | //FE_CAN_QAM_4 | 542 | .caps = 0x400 | //FE_CAN_QAM_4 |
512 | FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 | | 543 | FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 | |
513 | FE_CAN_QAM_128 | FE_CAN_QAM_256 | | 544 | FE_CAN_QAM_128 | FE_CAN_QAM_256 | |
diff --git a/drivers/media/dvb/frontends/tda1002x.h b/drivers/media/dvb/frontends/tda1002x.h index 1bcc0d44b90b..4522b7ef53c9 100644 --- a/drivers/media/dvb/frontends/tda1002x.h +++ b/drivers/media/dvb/frontends/tda1002x.h | |||
@@ -26,11 +26,25 @@ | |||
26 | 26 | ||
27 | #include <linux/dvb/frontend.h> | 27 | #include <linux/dvb/frontend.h> |
28 | 28 | ||
29 | struct tda1002x_config | 29 | struct tda1002x_config { |
30 | { | 30 | /* the demodulator's i2c address */ |
31 | u8 demod_address; | ||
32 | u8 invert; | ||
33 | }; | ||
34 | |||
35 | struct tda10023_config { | ||
31 | /* the demodulator's i2c address */ | 36 | /* the demodulator's i2c address */ |
32 | u8 demod_address; | 37 | u8 demod_address; |
33 | u8 invert; | 38 | u8 invert; |
39 | |||
40 | /* clock settings */ | ||
41 | u32 xtal; /* defaults: 28920000 */ | ||
42 | u8 pll_m; /* defaults: 8 */ | ||
43 | u8 pll_p; /* defaults: 4 */ | ||
44 | u8 pll_n; /* defaults: 1 */ | ||
45 | |||
46 | /* input freq offset + baseband conversion type */ | ||
47 | u16 deltaf; | ||
34 | }; | 48 | }; |
35 | 49 | ||
36 | #if defined(CONFIG_DVB_TDA10021) || (defined(CONFIG_DVB_TDA10021_MODULE) && defined(MODULE)) | 50 | #if defined(CONFIG_DVB_TDA10021) || (defined(CONFIG_DVB_TDA10021_MODULE) && defined(MODULE)) |
@@ -45,12 +59,15 @@ static inline struct dvb_frontend* tda10021_attach(const struct tda1002x_config* | |||
45 | } | 59 | } |
46 | #endif // CONFIG_DVB_TDA10021 | 60 | #endif // CONFIG_DVB_TDA10021 |
47 | 61 | ||
48 | #if defined(CONFIG_DVB_TDA10023) || (defined(CONFIG_DVB_TDA10023_MODULE) && defined(MODULE)) | 62 | #if defined(CONFIG_DVB_TDA10023) || \ |
49 | extern struct dvb_frontend* tda10023_attach(const struct tda1002x_config* config, | 63 | (defined(CONFIG_DVB_TDA10023_MODULE) && defined(MODULE)) |
50 | struct i2c_adapter* i2c, u8 pwm); | 64 | extern struct dvb_frontend *tda10023_attach( |
65 | const struct tda10023_config *config, | ||
66 | struct i2c_adapter *i2c, u8 pwm); | ||
51 | #else | 67 | #else |
52 | static inline struct dvb_frontend* tda10023_attach(const struct tda1002x_config* config, | 68 | static inline struct dvb_frontend *tda10023_attach( |
53 | struct i2c_adapter* i2c, u8 pwm) | 69 | const struct tda1002x_config *config, |
70 | struct i2c_adapter *i2c, u8 pwm) | ||
54 | { | 71 | { |
55 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); | 72 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); |
56 | return NULL; | 73 | return NULL; |
diff --git a/drivers/media/dvb/ttpci/budget-av.c b/drivers/media/dvb/ttpci/budget-av.c index b30a5288e484..b7d1f2f18d3a 100644 --- a/drivers/media/dvb/ttpci/budget-av.c +++ b/drivers/media/dvb/ttpci/budget-av.c | |||
@@ -667,6 +667,11 @@ static struct tda1002x_config philips_cu1216_config_altaddress = { | |||
667 | .invert = 0, | 667 | .invert = 0, |
668 | }; | 668 | }; |
669 | 669 | ||
670 | static struct tda10023_config philips_cu1216_tda10023_config = { | ||
671 | .demod_address = 0x0c, | ||
672 | .invert = 1, | ||
673 | }; | ||
674 | |||
670 | static int philips_tu1216_tuner_init(struct dvb_frontend *fe) | 675 | static int philips_tu1216_tuner_init(struct dvb_frontend *fe) |
671 | { | 676 | { |
672 | struct budget *budget = (struct budget *) fe->dvb->priv; | 677 | struct budget *budget = (struct budget *) fe->dvb->priv; |
@@ -1019,9 +1024,10 @@ static void frontend_init(struct budget_av *budget_av) | |||
1019 | case SUBID_DVBC_KNC1_PLUS_MK3: | 1024 | case SUBID_DVBC_KNC1_PLUS_MK3: |
1020 | budget_av->reinitialise_demod = 1; | 1025 | budget_av->reinitialise_demod = 1; |
1021 | budget_av->budget.dev->i2c_bitrate = SAA7146_I2C_BUS_BIT_RATE_240; | 1026 | budget_av->budget.dev->i2c_bitrate = SAA7146_I2C_BUS_BIT_RATE_240; |
1022 | fe = dvb_attach(tda10023_attach, &philips_cu1216_config, | 1027 | fe = dvb_attach(tda10023_attach, |
1023 | &budget_av->budget.i2c_adap, | 1028 | &philips_cu1216_tda10023_config, |
1024 | read_pwm(budget_av)); | 1029 | &budget_av->budget.i2c_adap, |
1030 | read_pwm(budget_av)); | ||
1025 | if (fe) { | 1031 | if (fe) { |
1026 | fe->ops.tuner_ops.set_params = philips_cu1216_tuner_set_params; | 1032 | fe->ops.tuner_ops.set_params = philips_cu1216_tuner_set_params; |
1027 | } | 1033 | } |