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authorSantiago Nunez-Corrales <santiago.nunez@ridgerun.com>2009-12-21 14:14:04 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2010-02-26 13:11:01 -0500
commit0b67553657330b5ad5c78a974ce84273a515fe4e (patch)
treed4588247bbc52bbdfc02f7c188d72b63c80fea2d /drivers/media
parentd2da2611cc7641a194a868f41fbe4a83cb46964c (diff)
V4L/DVB: TVP7002 driver for DM365
This patch provides the implementation of the TVP7002 decoder driver for DM365. Implemented using the V4L2 DV presets API. Removed shadow register values. Testing shows that the device needs not to be powered down and up for correct behaviour. Improved readability. Uses helper function for preset information. [mchehab@redhat.com: Fix bad Whitespacing] Signed-off-by: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media')
-rw-r--r--drivers/media/video/tvp7002.c1191
1 files changed, 1191 insertions, 0 deletions
diff --git a/drivers/media/video/tvp7002.c b/drivers/media/video/tvp7002.c
new file mode 100644
index 000000000000..0f0270b1ad7a
--- /dev/null
+++ b/drivers/media/video/tvp7002.c
@@ -0,0 +1,1191 @@
1/* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
2 * Digitizer with Horizontal PLL registers
3 *
4 * Copyright (C) 2009 Texas Instruments Inc
5 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
6 *
7 * This code is partially based upon the TVP5150 driver
8 * written by Mauro Carvalho Chehab (mchehab@infradead.org),
9 * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
10 * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
11 * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27#include <linux/delay.h>
28#include <linux/i2c.h>
29#include <linux/videodev2.h>
30#include <media/tvp7002.h>
31#include <media/v4l2-device.h>
32#include <media/v4l2-chip-ident.h>
33#include <media/v4l2-common.h>
34#include "tvp7002_reg.h"
35
36MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
37MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>");
38MODULE_LICENSE("GPL");
39
40/* Module Name */
41#define TVP7002_MODULE_NAME "tvp7002"
42
43/* I2C retry attempts */
44#define I2C_RETRY_COUNT (5)
45
46/* End of registers */
47#define TVP7002_EOR 0x5c
48
49/* Read write definition for registers */
50#define TVP7002_READ 0
51#define TVP7002_WRITE 1
52#define TVP7002_RESERVED 2
53
54/* Interlaced vs progressive mask and shift */
55#define TVP7002_IP_SHIFT 5
56#define TVP7002_INPR_MASK (0x01 << TVP7002_IP_SHIFT)
57
58/* Shift for CPL and LPF registers */
59#define TVP7002_CL_SHIFT 8
60#define TVP7002_CL_MASK 0x0f
61
62/* Debug functions */
63static int debug;
64module_param(debug, bool, 0644);
65MODULE_PARM_DESC(debug, "Debug level (0-2)");
66
67/* Structure for register values */
68struct i2c_reg_value {
69 u8 reg;
70 u8 value;
71 u8 type;
72};
73
74/*
75 * Register default values (according to tvp7002 datasheet)
76 * In the case of read-only registers, the value (0xff) is
77 * never written. R/W functionality is controlled by the
78 * writable bit in the register struct definition.
79 */
80static const struct i2c_reg_value tvp7002_init_default[] = {
81 { TVP7002_CHIP_REV, 0xff, TVP7002_READ },
82 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
83 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
84 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
85 { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
86 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
87 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
88 { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
89 { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
90 { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
91 { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
92 { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
93 { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
94 { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
95 { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
96 { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
97 { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
98 { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
99 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
100 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
101 { TVP7002_SYNC_DETECT_STAT, 0xff, TVP7002_READ },
102 { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE },
103 { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE },
104 { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE },
105 { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE },
106 { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE },
107 { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE },
108 { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE },
109 { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE },
110 { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE },
111 { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE },
112 { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE },
113 { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE },
114 { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE },
115 { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE },
116 { TVP7002_B_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
117 { TVP7002_G_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
118 { TVP7002_R_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
119 { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE },
120 { TVP7002_DGTL_ALC_OUT_MSBS, 0xff, TVP7002_READ },
121 { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE },
122 { 0x29, 0x08, TVP7002_RESERVED },
123 { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE },
124 /* PWR_CTL is controlled only by the probe and reset functions */
125 { TVP7002_PWR_CTL, 0x00, TVP7002_RESERVED },
126 { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE },
127 { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
128 { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE },
129 { TVP7002_RGB_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
130 { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE },
131 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
132 { 0x32, 0x18, TVP7002_RESERVED },
133 { 0x33, 0x60, TVP7002_RESERVED },
134 { TVP7002_MVIS_STRIPPER_W, 0xff, TVP7002_RESERVED },
135 { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE },
136 { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE },
137 { TVP7002_L_FRAME_STAT_LSBS, 0xff, TVP7002_READ },
138 { TVP7002_L_FRAME_STAT_MSBS, 0xff, TVP7002_READ },
139 { TVP7002_CLK_L_STAT_LSBS, 0xff, TVP7002_READ },
140 { TVP7002_CLK_L_STAT_MSBS, 0xff, TVP7002_READ },
141 { TVP7002_HSYNC_W, 0xff, TVP7002_READ },
142 { TVP7002_VSYNC_W, 0xff, TVP7002_READ },
143 { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE },
144 { 0x3e, 0x60, TVP7002_RESERVED },
145 { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE },
146 { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE },
147 { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
148 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE },
149 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
150 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
151 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
152 { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE },
153 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
154 { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
155 { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
156 { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE },
157 { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE },
158 { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE },
159 { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE },
160 { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE },
161 { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE },
162 { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE },
163 { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE },
164 { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE },
165 { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE },
166 { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE },
167 { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE },
168 { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE },
169 { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE },
170 { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE },
171 { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE },
172 { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE },
173 { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE },
174 /* This signals end of register values */
175 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
176};
177
178/* Register parameters for 480P */
179static const struct i2c_reg_value tvp7002_parms_480P[] = {
180 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
181 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x0a, TVP7002_WRITE },
182 { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
183 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
184 { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
185 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
186 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE },
187 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
188 { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE },
189 { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE },
190 { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE },
191 { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE },
192 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
193 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
194 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
195 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
196 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
197 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
198};
199
200/* Register parameters for 576P */
201static const struct i2c_reg_value tvp7002_parms_576P[] = {
202 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE },
203 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
204 { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE },
205 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
206 { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE },
207 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
208 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE },
209 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
210 { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
211 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
212 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
213 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
214 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
215 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
216 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
217 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
218 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
219 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
220};
221
222/* Register parameters for 1080I60 */
223static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
224 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
225 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x08, TVP7002_WRITE },
226 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
227 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
228 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
229 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
230 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
231 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
232 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
233 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
234 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
235 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
236 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
237 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
238 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
239 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
240 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
241 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
242};
243
244/* Register parameters for 1080P60 */
245static const struct i2c_reg_value tvp7002_parms_1080P60[] = {
246 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
247 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x08, TVP7002_WRITE },
248 { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
249 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
250 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
251 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
252 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
253 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
254 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
255 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
256 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
257 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
258 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
259 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
260 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
261 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
262 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
263 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
264};
265
266/* Register parameters for 1080I50 */
267static const struct i2c_reg_value tvp7002_parms_1080I50[] = {
268 { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE },
269 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
270 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
271 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
272 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
273 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
274 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
275 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
276 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
277 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
278 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
279 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
280 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
281 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
282 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
283 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
284 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
285 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
286};
287
288/* Register parameters for 720P60 */
289static const struct i2c_reg_value tvp7002_parms_720P60[] = {
290 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
291 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x02, TVP7002_WRITE },
292 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
293 { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
294 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
295 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
296 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
297 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
298 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
299 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
300 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
301 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
302 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
303 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
304 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
305 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
306 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
307 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
308};
309
310/* Register parameters for 720P50 */
311static const struct i2c_reg_value tvp7002_parms_720P50[] = {
312 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
313 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x0c, TVP7002_WRITE },
314 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
315 { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
316 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
317 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
318 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
319 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
320 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
321 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
322 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
323 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
324 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
325 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
326 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
327 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
328 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
329 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
330};
331
332/* Struct list for available formats */
333static const struct v4l2_fmtdesc tvp7002_fmt_list[] = {
334 {
335 .index = 0,
336 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
337 .flags = 0,
338 .description = "8-bit UYVY 4:2:2 Format",
339 .pixelformat = V4L2_PIX_FMT_UYVY,
340 },
341};
342
343#define NUM_FORMATS ARRAY_SIZE(tvp7002_fmt_list)
344
345/* Preset definition for handling device operation */
346struct tvp7002_preset_definition {
347 u32 preset;
348 const struct i2c_reg_value *p_settings;
349 enum v4l2_colorspace color_space;
350 enum v4l2_field scanmode;
351 u16 progressive;
352 u16 lines_per_frame;
353 u16 cpl_min;
354 u16 cpl_max;
355};
356
357/* Struct list for digital video presets */
358static const struct tvp7002_preset_definition tvp7002_presets[] = {
359 {
360 V4L2_DV_720P60,
361 tvp7002_parms_720P60,
362 V4L2_COLORSPACE_REC709,
363 V4L2_FIELD_NONE,
364 1,
365 0x2EE,
366 135,
367 153
368 },
369 {
370 V4L2_DV_1080I60,
371 tvp7002_parms_1080I60,
372 V4L2_COLORSPACE_REC709,
373 V4L2_FIELD_INTERLACED,
374 0,
375 0x465,
376 181,
377 205
378 },
379 {
380 V4L2_DV_1080I50,
381 tvp7002_parms_1080I50,
382 V4L2_COLORSPACE_REC709,
383 V4L2_FIELD_INTERLACED,
384 0,
385 0x465,
386 217,
387 245
388 },
389 {
390 V4L2_DV_720P50,
391 tvp7002_parms_720P50,
392 V4L2_COLORSPACE_REC709,
393 V4L2_FIELD_NONE,
394 1,
395 0x2EE,
396 163,
397 183
398 },
399 {
400 V4L2_DV_1080P60,
401 tvp7002_parms_1080P60,
402 V4L2_COLORSPACE_REC709,
403 V4L2_FIELD_NONE,
404 1,
405 0x465,
406 90,
407 102
408 },
409 {
410 V4L2_DV_480P59_94,
411 tvp7002_parms_480P,
412 V4L2_COLORSPACE_SMPTE170M,
413 V4L2_FIELD_NONE,
414 1,
415 0x20D,
416 0xffff,
417 0xffff
418 },
419 {
420 V4L2_DV_576P50,
421 tvp7002_parms_576P,
422 V4L2_COLORSPACE_SMPTE170M,
423 V4L2_FIELD_NONE,
424 1,
425 0x271,
426 0xffff,
427 0xffff
428 }
429};
430
431#define NUM_PRESETS ARRAY_SIZE(tvp7002_presets)
432
433/* Device definition */
434struct tvp7002 {
435 struct v4l2_subdev sd;
436 const struct tvp7002_config *pdata;
437
438 int ver;
439 int streaming;
440
441 struct v4l2_pix_format pix;
442 const struct tvp7002_preset_definition *current_preset;
443 u8 gain;
444};
445
446/*
447 * to_tvp7002 - Obtain device handler TVP7002
448 * @sd: ptr to v4l2_subdev struct
449 *
450 * Returns device handler tvp7002.
451 */
452static inline struct tvp7002 *to_tvp7002(struct v4l2_subdev *sd)
453{
454 return container_of(sd, struct tvp7002, sd);
455}
456
457/*
458 * tvp7002_read - Read a value from a register in an TVP7002
459 * @sd: ptr to v4l2_subdev struct
460 * @reg: TVP7002 register address
461 * @dst: pointer to 8-bit destination
462 *
463 * Returns value read if successful, or non-zero (-1) otherwise.
464 */
465static int tvp7002_read(struct v4l2_subdev *sd, u8 addr, u8 *dst)
466{
467 struct i2c_client *c = v4l2_get_subdevdata(sd);
468 int retry;
469 int error;
470
471 for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
472 error = i2c_smbus_read_byte_data(c, addr);
473
474 if (error >= 0) {
475 *dst = (u8)error;
476 return 0;
477 }
478
479 msleep_interruptible(10);
480 }
481 v4l2_err(sd, "TVP7002 read error %d\n", error);
482 return error;
483}
484
485/*
486 * tvp7002_read_err() - Read a register value with error code
487 * @sd: pointer to standard V4L2 sub-device structure
488 * @reg: destination register
489 * @val: value to be read
490 * @error: pointer to error value
491 *
492 * Read a value in a register and save error value in pointer.
493 * Also update the register table if successful
494 */
495static inline void tvp7002_read_err(struct v4l2_subdev *sd, u8 reg,
496 u8 *dst, int *err)
497{
498 if (!*err)
499 *err = tvp7002_read(sd, reg, dst);
500}
501
502/*
503 * tvp7002_write() - Write a value to a register in TVP7002
504 * @sd: ptr to v4l2_subdev struct
505 * @addr: TVP7002 register address
506 * @value: value to be written to the register
507 *
508 * Write a value to a register in an TVP7002 decoder device.
509 * Returns zero if successful, or non-zero otherwise.
510 */
511static int tvp7002_write(struct v4l2_subdev *sd, u8 addr, u8 value)
512{
513 struct i2c_client *c;
514 int retry;
515 int error;
516
517 c = v4l2_get_subdevdata(sd);
518
519 for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
520 error = i2c_smbus_write_byte_data(c, addr, value);
521
522 if (error >= 0)
523 return 0;
524
525 v4l2_warn(sd, "Write: retry ... %d\n", retry);
526 msleep_interruptible(10);
527 }
528 v4l2_err(sd, "TVP7002 write error %d\n", error);
529 return error;
530}
531
532/*
533 * tvp7002_write_err() - Write a register value with error code
534 * @sd: pointer to standard V4L2 sub-device structure
535 * @reg: destination register
536 * @val: value to be written
537 * @error: pointer to error value
538 *
539 * Write a value in a register and save error value in pointer.
540 * Also update the register table if successful
541 */
542static inline void tvp7002_write_err(struct v4l2_subdev *sd, u8 reg,
543 u8 val, int *err)
544{
545 if (!*err)
546 *err = tvp7002_write(sd, reg, val);
547}
548
549/*
550 * tvp7002_g_chip_ident() - Get chip identification number
551 * @sd: ptr to v4l2_subdev struct
552 * @chip: ptr to v4l2_dbg_chip_ident struct
553 *
554 * Obtains the chip's identification number.
555 * Returns zero or -EINVAL if read operation fails.
556 */
557static int tvp7002_g_chip_ident(struct v4l2_subdev *sd,
558 struct v4l2_dbg_chip_ident *chip)
559{
560 u8 rev;
561 int error;
562 struct i2c_client *client = v4l2_get_subdevdata(sd);
563
564 error = tvp7002_read(sd, TVP7002_CHIP_REV, &rev);
565
566 if (error < 0)
567 return error;
568
569 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP7002, rev);
570}
571
572/*
573 * tvp7002_write_inittab() - Write initialization values
574 * @sd: ptr to v4l2_subdev struct
575 * @regs: ptr to i2c_reg_value struct
576 *
577 * Write initialization values.
578 * Returns zero or -EINVAL if read operation fails.
579 */
580static int tvp7002_write_inittab(struct v4l2_subdev *sd,
581 const struct i2c_reg_value *regs)
582{
583 int error = 0;
584
585 /* Initialize the first (defined) registers */
586 while (TVP7002_EOR != regs->reg) {
587 if (TVP7002_WRITE == regs->type)
588 tvp7002_write_err(sd, regs->reg, regs->value, &error);
589 regs++;
590 }
591
592 return error;
593}
594
595/*
596 * tvp7002_s_dv_preset() - Set digital video preset
597 * @sd: ptr to v4l2_subdev struct
598 * @std: ptr to v4l2_dv_preset struct
599 *
600 * Set the digital video preset for a TVP7002 decoder device.
601 * Returns zero when successful or -EINVAL if register access fails.
602 */
603static int tvp7002_s_dv_preset(struct v4l2_subdev *sd,
604 struct v4l2_dv_preset *dv_preset)
605{
606 struct tvp7002 *device = to_tvp7002(sd);
607 u32 preset;
608 int i;
609
610 for (i = 0; i < NUM_PRESETS; i++) {
611 preset = tvp7002_presets[i].preset;
612 if (preset == dv_preset->preset) {
613 device->current_preset = &tvp7002_presets[i];
614 return tvp7002_write_inittab(sd, tvp7002_presets[i].p_settings);
615 }
616 }
617
618 return -EINVAL;
619}
620
621/*
622 * tvp7002_g_ctrl() - Get a control
623 * @sd: ptr to v4l2_subdev struct
624 * @ctrl: ptr to v4l2_control struct
625 *
626 * Get a control for a TVP7002 decoder device.
627 * Returns zero when successful or -EINVAL if register access fails.
628 */
629static int tvp7002_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
630{
631 struct tvp7002 *device = to_tvp7002(sd);
632
633 switch (ctrl->id) {
634 case V4L2_CID_GAIN:
635 ctrl->value = device->gain;
636 return 0;
637 default:
638 return -EINVAL;
639 }
640}
641
642/*
643 * tvp7002_s_ctrl() - Set a control
644 * @sd: ptr to v4l2_subdev struct
645 * @ctrl: ptr to v4l2_control struct
646 *
647 * Set a control in TVP7002 decoder device.
648 * Returns zero when successful or -EINVAL if register access fails.
649 */
650static int tvp7002_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
651{
652 struct tvp7002 *device = to_tvp7002(sd);
653 int error = 0;
654
655 switch (ctrl->id) {
656 case V4L2_CID_GAIN:
657 tvp7002_write_err(sd, TVP7002_R_FINE_GAIN,
658 ctrl->value & 0xff, &error);
659 tvp7002_write_err(sd, TVP7002_G_FINE_GAIN,
660 ctrl->value & 0xff, &error);
661 tvp7002_write_err(sd, TVP7002_B_FINE_GAIN,
662 ctrl->value & 0xff, &error);
663
664 if (error < 0)
665 return error;
666
667 /* Set only after knowing there is no error */
668 device->gain = ctrl->value & 0xff;
669 return 0;
670 default:
671 return -EINVAL;
672 }
673}
674
675/*
676 * tvp7002_queryctrl() - Query a control
677 * @sd: ptr to v4l2_subdev struct
678 * @ctrl: ptr to v4l2_queryctrl struct
679 *
680 * Query a control of a TVP7002 decoder device.
681 * Returns zero when successful or -EINVAL if register read fails.
682 */
683static int tvp7002_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
684{
685 switch (qc->id) {
686 case V4L2_CID_GAIN:
687 /*
688 * Gain is supported [0-255, default=0, step=1]
689 */
690 return v4l2_ctrl_query_fill(qc, 0, 255, 1, 0);
691 default:
692 return -EINVAL;
693 }
694}
695
696/*
697 * tvp7002_try_fmt_cap() - V4L2 decoder interface handler for try_fmt
698 * @sd: pointer to standard V4L2 sub-device structure
699 * @f: pointer to standard V4L2 VIDIOC_TRY_FMT ioctl structure
700 *
701 * Implement the VIDIOC_TRY_FMT ioctl for the CAPTURE buffer type. This
702 * ioctl is used to negotiate the image capture size and pixel format
703 * without actually making it take effect.
704 */
705static int tvp7002_try_fmt_cap(struct v4l2_subdev *sd, struct v4l2_format *f)
706{
707 struct tvp7002 *device = to_tvp7002(sd);
708 struct v4l2_dv_enum_preset e_preset;
709 struct v4l2_pix_format *pix;
710 int error = 0;
711
712 pix = &f->fmt.pix;
713
714 /* Calculate height and width based on current standard */
715 error = v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset);
716 if (error)
717 return -EINVAL;
718
719 pix->width = e_preset.width;
720 pix->height = e_preset.height;
721 pix->pixelformat = V4L2_PIX_FMT_UYVY;
722 pix->field = device->current_preset->scanmode;
723 pix->bytesperline = pix->width * 2;
724 pix->sizeimage = pix->bytesperline * pix->height;
725 pix->colorspace = device->current_preset->color_space;
726 pix->priv = 0;
727
728 v4l2_dbg(1, debug, sd, "Try FMT: pixelformat - %s, bytesperline - %d"
729 "Width - %d, Height - %d", "8-bit UYVY 4:2:2 Format",
730 pix->bytesperline, pix->width, pix->height);
731 return error;
732}
733
734/*
735 * tvp7002_s_fmt() - V4L2 decoder interface handler for s_fmt
736 * @sd: pointer to standard V4L2 sub-device structure
737 * @f: pointer to standard V4L2 VIDIOC_S_FMT ioctl structure
738 *
739 * If the requested format is supported, configures the HW to use that
740 * format, returns error code if format not supported or HW can't be
741 * correctly configured.
742 */
743static int tvp7002_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
744{
745 struct tvp7002 *decoder = to_tvp7002(sd);
746 int rval;
747
748 rval = tvp7002_try_fmt_cap(sd, f);
749 if (!rval)
750 decoder->pix = f->fmt.pix;
751 return rval;
752}
753
754/*
755 * tvp7002_g_fmt() - V4L2 decoder interface handler for tvp7002_g_fmt
756 * @sd: pointer to standard V4L2 sub-device structure
757 * @f: pointer to standard V4L2 v4l2_format structure
758 *
759 * Returns the decoder's current pixel format in the v4l2_format
760 * parameter.
761 */
762static int tvp7002_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
763{
764 struct tvp7002 *decoder = to_tvp7002(sd);
765
766 f->fmt.pix = decoder->pix;
767
768 v4l2_dbg(1, debug, sd, "Current FMT: bytesperline - %d"
769 "Width - %d, Height - %d",
770 decoder->pix.bytesperline,
771 decoder->pix.width, decoder->pix.height);
772 return 0;
773}
774
775/*
776 * tvp7002_query_dv_preset() - query DV preset
777 * @sd: pointer to standard V4L2 sub-device structure
778 * @std_id: standard V4L2 v4l2_dv_preset
779 *
780 * Returns the current DV preset by TVP7002. If no active input is
781 * detected, returns -EINVAL
782 */
783static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,
784 struct v4l2_dv_preset *qpreset)
785{
786 const struct tvp7002_preset_definition *presets = tvp7002_presets;
787 struct v4l2_dv_enum_preset e_preset;
788 struct tvp7002 *device;
789 u8 progressive;
790 u32 lpfr;
791 u32 cpln;
792 int error = 0;
793 u8 lpf_lsb;
794 u8 lpf_msb;
795 u8 cpl_lsb;
796 u8 cpl_msb;
797 int index;
798
799 device = to_tvp7002(sd);
800
801 /* Read standards from device registers */
802 tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &lpf_lsb, &error);
803 tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_MSBS, &lpf_msb, &error);
804
805 if (error < 0)
806 return error;
807
808 tvp7002_read_err(sd, TVP7002_CLK_L_STAT_LSBS, &cpl_lsb, &error);
809 tvp7002_read_err(sd, TVP7002_CLK_L_STAT_MSBS, &cpl_msb, &error);
810
811 if (error < 0)
812 return error;
813
814 /* Get lines per frame, clocks per line and interlaced/progresive */
815 lpfr = lpf_lsb | ((TVP7002_CL_MASK & lpf_msb) << TVP7002_CL_SHIFT);
816 cpln = cpl_lsb | ((TVP7002_CL_MASK & cpl_msb) << TVP7002_CL_SHIFT);
817 progressive = (lpf_msb & TVP7002_INPR_MASK) >> TVP7002_IP_SHIFT;
818
819 /* Do checking of video modes */
820 for (index = 0; index < NUM_PRESETS; index++, presets++)
821 if (lpfr == presets->lines_per_frame &&
822 progressive == presets->progressive) {
823 if (presets->cpl_min == 0xffff)
824 break;
825 if (cpln >= presets->cpl_min && cpln <= presets->cpl_max)
826 break;
827 }
828
829 if (index == NUM_PRESETS) {
830 v4l2_err(sd, "querystd error, lpf = %x, cpl = %x\n",
831 lpfr, cpln);
832 return -EINVAL;
833 }
834
835 if (v4l_fill_dv_preset_info(presets->preset, &e_preset))
836 return -EINVAL;
837
838 /* Set values in found preset */
839 qpreset->preset = presets->preset;
840
841 /* Update lines per frame and clocks per line info */
842 v4l2_dbg(1, debug, sd, "Current preset: %d %d",
843 e_preset.width, e_preset.height);
844 return 0;
845}
846
847#ifdef CONFIG_VIDEO_ADV_DEBUG
848/*
849 * tvp7002_g_register() - Get the value of a register
850 * @sd: ptr to v4l2_subdev struct
851 * @vreg: ptr to v4l2_dbg_register struct
852 *
853 * Get the value of a TVP7002 decoder device register.
854 * Returns zero when successful, -EINVAL if register read fails or
855 * access to I2C client fails, -EPERM if the call is not allowed
856 * by diabled CAP_SYS_ADMIN.
857 */
858static int tvp7002_g_register(struct v4l2_subdev *sd,
859 struct v4l2_dbg_register *reg)
860{
861 struct i2c_client *client = v4l2_get_subdevdata(sd);
862
863 if (!v4l2_chip_match_i2c_client(client, &reg->match))
864 return -EINVAL;
865 if (!capable(CAP_SYS_ADMIN))
866 return -EPERM;
867
868 return reg->val < 0 ? -EINVAL : 0;
869}
870
871/*
872 * tvp7002_s_register() - set a control
873 * @sd: ptr to v4l2_subdev struct
874 * @ctrl: ptr to v4l2_control struct
875 *
876 * Get the value of a TVP7002 decoder device register.
877 * Returns zero when successful, -EINVAL if register read fails or
878 * -EPERM if call not allowed.
879 */
880static int tvp7002_s_register(struct v4l2_subdev *sd,
881 struct v4l2_dbg_register *reg)
882{
883 struct i2c_client *client = v4l2_get_subdevdata(sd);
884 struct tvp7002 *device = to_tvp7002(sd);
885 int wres;
886
887 if (!v4l2_chip_match_i2c_client(client, &reg->match))
888 return -EINVAL;
889 if (!capable(CAP_SYS_ADMIN))
890 return -EPERM;
891
892 wres = tvp7002_write(sd, reg->reg & 0xff, reg->val & 0xff);
893
894 /* Update the register value in device's table */
895 if (!wres)
896 device->registers[reg->reg].value = reg->val;
897
898 return wres < 0 ? -EINVAL : 0;
899}
900#endif
901
902/*
903 * tvp7002_enum_fmt() - Enum supported formats
904 * @sd: pointer to standard V4L2 sub-device structure
905 * @enable: pointer to format struct
906 *
907 * Enumerate supported formats.
908 */
909
910static int tvp7002_enum_fmt(struct v4l2_subdev *sd,
911 struct v4l2_fmtdesc *fmtdesc)
912{
913 /* Check requested format index is within range */
914 if (fmtdesc->index < 0 || fmtdesc->index >= NUM_FORMATS)
915 return -EINVAL;
916 *fmtdesc = tvp7002_fmt_list[fmtdesc->index];
917
918 return 0;
919}
920
921/*
922 * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream
923 * @sd: pointer to standard V4L2 sub-device structure
924 * @enable: streaming enable or disable
925 *
926 * Sets streaming to enable or disable, if possible.
927 */
928static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable)
929{
930 struct tvp7002 *device = to_tvp7002(sd);
931 int error = 0;
932
933 if (device->streaming == enable)
934 return 0;
935
936 if (enable) {
937 /* Set output state on (low impedance means stream on) */
938 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x00);
939 device->streaming = enable;
940 } else {
941 /* Set output state off (high impedance means stream off) */
942 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x03);
943 if (error)
944 v4l2_dbg(1, debug, sd, "Unable to stop streaming\n");
945
946 device->streaming = enable;
947 }
948
949 return error;
950}
951
952/*
953 * tvp7002_log_status() - Print information about register settings
954 * @sd: ptr to v4l2_subdev struct
955 *
956 * Log register values of a TVP7002 decoder device.
957 * Returns zero or -EINVAL if read operation fails.
958 */
959static int tvp7002_log_status(struct v4l2_subdev *sd)
960{
961 const struct tvp7002_preset_definition *presets = tvp7002_presets;
962 struct tvp7002 *device = to_tvp7002(sd);
963 struct v4l2_dv_enum_preset e_preset;
964 struct v4l2_dv_preset detected;
965 int i;
966
967 detected.preset = V4L2_DV_INVALID;
968 /* Find my current standard*/
969 tvp7002_query_dv_preset(sd, &detected);
970
971 /* Print standard related code values */
972 for (i = 0; i < NUM_PRESETS; i++, presets++)
973 if (presets->preset == detected.preset)
974 break;
975
976 if (v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset))
977 return -EINVAL;
978
979 v4l2_info(sd, "Selected DV Preset: %s\n", e_preset.name);
980 v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
981 v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
982 if (i == NUM_PRESETS) {
983 v4l2_info(sd, "Detected DV Preset: None\n");
984 } else {
985 if (v4l_fill_dv_preset_info(presets->preset, &e_preset))
986 return -EINVAL;
987 v4l2_info(sd, "Detected DV Preset: %s\n", e_preset.name);
988 v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
989 v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
990 }
991 v4l2_info(sd, "Streaming enabled: %s\n",
992 device->streaming ? "yes" : "no");
993
994 /* Print the current value of the gain control */
995 v4l2_info(sd, "Gain: %u\n", device->gain);
996
997 return 0;
998}
999
1000/* V4L2 core operation handlers */
1001static const struct v4l2_subdev_core_ops tvp7002_core_ops = {
1002 .g_chip_ident = tvp7002_g_chip_ident,
1003 .log_status = tvp7002_log_status,
1004 .g_ctrl = tvp7002_g_ctrl,
1005 .s_ctrl = tvp7002_s_ctrl,
1006 .queryctrl = tvp7002_queryctrl,
1007#ifdef CONFIG_VIDEO_ADV_DEBUG
1008 .g_register = tvp7002_g_register,
1009 .s_register = tvp7002_s_register,
1010#endif
1011};
1012
1013/* Specific video subsystem operation handlers */
1014static const struct v4l2_subdev_video_ops tvp7002_video_ops = {
1015 .s_dv_preset = tvp7002_s_dv_preset,
1016 .query_dv_preset = tvp7002_query_dv_preset,
1017 .s_stream = tvp7002_s_stream,
1018 .g_fmt = tvp7002_g_fmt,
1019 .s_fmt = tvp7002_s_fmt,
1020 .enum_fmt = tvp7002_enum_fmt,
1021};
1022
1023/* V4L2 top level operation handlers */
1024static const struct v4l2_subdev_ops tvp7002_ops = {
1025 .core = &tvp7002_core_ops,
1026 .video = &tvp7002_video_ops,
1027};
1028
1029static struct tvp7002 tvp7002_dev = {
1030 .streaming = 0,
1031
1032 .pix = {
1033 .width = 1280,
1034 .height = 720,
1035 .pixelformat = V4L2_PIX_FMT_UYVY,
1036 .field = V4L2_FIELD_NONE,
1037 .bytesperline = 1280 * 2,
1038 .sizeimage = 1280 * 2 * 720,
1039 .colorspace = V4L2_COLORSPACE_REC709,
1040 },
1041
1042 .current_preset = tvp7002_presets,
1043 .gain = 0,
1044};
1045
1046/*
1047 * tvp7002_probe - Probe a TVP7002 device
1048 * @sd: ptr to v4l2_subdev struct
1049 * @ctrl: ptr to i2c_device_id struct
1050 *
1051 * Initialize the TVP7002 device
1052 * Returns zero when successful, -EINVAL if register read fails or
1053 * -EIO if i2c access is not available.
1054 */
1055static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
1056{
1057 struct v4l2_subdev *sd;
1058 struct tvp7002 *device;
1059 struct v4l2_dv_preset preset;
1060 int polarity_a;
1061 int polarity_b;
1062 u8 revision;
1063
1064 int error;
1065
1066 /* Check if the adapter supports the needed features */
1067 if (!i2c_check_functionality(c->adapter,
1068 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
1069 return -EIO;
1070
1071 if (!c->dev.platform_data) {
1072 v4l_err(c, "No platform data!!\n");
1073 return -ENODEV;
1074 }
1075
1076 device = kmalloc(sizeof(struct tvp7002), GFP_KERNEL);
1077
1078 if (!device)
1079 return -ENOMEM;
1080
1081 *device = tvp7002_dev;
1082 sd = &device->sd;
1083 device->pdata = c->dev.platform_data;
1084
1085 /* Tell v4l2 the device is ready */
1086 v4l2_i2c_subdev_init(sd, c, &tvp7002_ops);
1087 v4l_info(c, "tvp7002 found @ 0x%02x (%s)\n",
1088 c->addr, c->adapter->name);
1089
1090 error = tvp7002_read(sd, TVP7002_CHIP_REV, &revision);
1091 if (error < 0)
1092 goto found_error;
1093
1094 /* Get revision number */
1095 v4l2_info(sd, "Rev. %02x detected.\n", revision);
1096 if (revision != 0x02)
1097 v4l2_info(sd, "Unknown revision detected.\n");
1098
1099 /* Initializes TVP7002 to its default values */
1100 error = tvp7002_write_inittab(sd, tvp7002_init_default);
1101
1102 if (error < 0)
1103 goto found_error;
1104
1105 /* Set polarity information after registers have been set */
1106 polarity_a = 0x20 | device->pdata->hs_polarity << 5
1107 | device->pdata->vs_polarity << 2;
1108 error = tvp7002_write(sd, TVP7002_SYNC_CTL_1, polarity_a);
1109 if (error < 0)
1110 goto found_error;
1111
1112 polarity_b = 0x01 | device->pdata->fid_polarity << 2
1113 | device->pdata->sog_polarity << 1
1114 | device->pdata->clk_polarity;
1115 error = tvp7002_write(sd, TVP7002_MISC_CTL_3, polarity_b);
1116 if (error < 0)
1117 goto found_error;
1118
1119 /* Set registers according to default video mode */
1120 preset.preset = device->current_preset->preset;
1121 error = tvp7002_s_dv_preset(sd, &preset);
1122
1123found_error:
1124 if (error < 0)
1125 kfree(device);
1126
1127 return error;
1128}
1129
1130/*
1131 * tvp7002_remove - Remove TVP7002 device support
1132 * @c: ptr to i2c_client struct
1133 *
1134 * Reset the TVP7002 device
1135 * Returns zero.
1136 */
1137static int tvp7002_remove(struct i2c_client *c)
1138{
1139 struct v4l2_subdev *sd = i2c_get_clientdata(c);
1140 struct tvp7002 *device = to_tvp7002(sd);
1141
1142 v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter"
1143 "on address 0x%x\n", c->addr);
1144
1145 v4l2_device_unregister_subdev(sd);
1146 kfree(device);
1147 return 0;
1148}
1149
1150/* I2C Device ID table */
1151static const struct i2c_device_id tvp7002_id[] = {
1152 { "tvp7002", 0 },
1153 { }
1154};
1155MODULE_DEVICE_TABLE(i2c, tvp7002_id);
1156
1157/* I2C driver data */
1158static struct i2c_driver tvp7002_driver = {
1159 .driver = {
1160 .owner = THIS_MODULE,
1161 .name = TVP7002_MODULE_NAME,
1162 },
1163 .probe = tvp7002_probe,
1164 .remove = tvp7002_remove,
1165 .id_table = tvp7002_id,
1166};
1167
1168/*
1169 * tvp7002_init - Initialize driver via I2C interface
1170 *
1171 * Register the TVP7002 driver.
1172 * Return 0 on success or error code on failure.
1173 */
1174static int __init tvp7002_init(void)
1175{
1176 return i2c_add_driver(&tvp7002_driver);
1177}
1178
1179/*
1180 * tvp7002_exit - Remove driver via I2C interface
1181 *
1182 * Unregister the TVP7002 driver.
1183 * Returns nothing.
1184 */
1185static void __exit tvp7002_exit(void)
1186{
1187 i2c_del_driver(&tvp7002_driver);
1188}
1189
1190module_init(tvp7002_init);
1191module_exit(tvp7002_exit);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-25 09:12:31 -0500