diff options
author | Steven Toth <stoth@hauppauge.com> | 2008-01-10 00:16:41 -0500 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@infradead.org> | 2008-01-25 16:04:48 -0500 |
commit | 69ad6e56bade948793957a295b3bf1376cffdf65 (patch) | |
tree | 4208441a6c6f21c79041a34206f36094db72d05f /drivers/media/video | |
parent | 5206d6ec36e2c66090c3c02c95b8d70c356a9ad3 (diff) |
V4L/DVB (7005): cx23885: SRAM reallocation prior to analog video implementation
We need to clear space large enough for the video and encoder fifos.
Signed-off-by: Steven Toth <stoth@hauppauge.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/video')
-rw-r--r-- | drivers/media/video/cx23885/cx23885-core.c | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/drivers/media/video/cx23885/cx23885-core.c b/drivers/media/video/cx23885/cx23885-core.c index a602ac800a4f..31723dd7cbdc 100644 --- a/drivers/media/video/cx23885/cx23885-core.c +++ b/drivers/media/video/cx23885/cx23885-core.c | |||
@@ -75,12 +75,12 @@ static LIST_HEAD(cx23885_devlist); | |||
75 | 75 | ||
76 | static struct sram_channel cx23885_sram_channels[] = { | 76 | static struct sram_channel cx23885_sram_channels[] = { |
77 | [SRAM_CH01] = { | 77 | [SRAM_CH01] = { |
78 | .name = "test ch1", | 78 | .name = "VID A", |
79 | .cmds_start = 0x10000, | 79 | .cmds_start = 0x10000, |
80 | .ctrl_start = 0x10500, | 80 | .ctrl_start = 0x105b0, |
81 | .cdt = 0x10900, | 81 | .cdt = 0x107b0, |
82 | .fifo_start = 0x3000, | 82 | .fifo_start = 0x40, |
83 | .fifo_size = 0x1000, | 83 | .fifo_size = 0x2800, |
84 | .ptr1_reg = DMA1_PTR1, | 84 | .ptr1_reg = DMA1_PTR1, |
85 | .ptr2_reg = DMA1_PTR2, | 85 | .ptr2_reg = DMA1_PTR2, |
86 | .cnt1_reg = DMA1_CNT1, | 86 | .cnt1_reg = DMA1_CNT1, |
@@ -102,8 +102,8 @@ static struct sram_channel cx23885_sram_channels[] = { | |||
102 | [SRAM_CH03] = { | 102 | [SRAM_CH03] = { |
103 | .name = "TS1 B", | 103 | .name = "TS1 B", |
104 | .cmds_start = 0x100A0, | 104 | .cmds_start = 0x100A0, |
105 | .ctrl_start = 0x10780, | 105 | .ctrl_start = 0x10630, |
106 | .cdt = 0x10400, | 106 | .cdt = 0x10870, |
107 | .fifo_start = 0x5000, | 107 | .fifo_start = 0x5000, |
108 | .fifo_size = 0x1000, | 108 | .fifo_size = 0x1000, |
109 | .ptr1_reg = DMA3_PTR1, | 109 | .ptr1_reg = DMA3_PTR1, |
@@ -139,7 +139,7 @@ static struct sram_channel cx23885_sram_channels[] = { | |||
139 | .name = "TS2 C", | 139 | .name = "TS2 C", |
140 | .cmds_start = 0x10140, | 140 | .cmds_start = 0x10140, |
141 | .ctrl_start = 0x10680, | 141 | .ctrl_start = 0x10680, |
142 | .cdt = 0x10480, | 142 | .cdt = 0x108d0, |
143 | .fifo_start = 0x6000, | 143 | .fifo_start = 0x6000, |
144 | .fifo_size = 0x1000, | 144 | .fifo_size = 0x1000, |
145 | .ptr1_reg = DMA5_PTR1, | 145 | .ptr1_reg = DMA5_PTR1, |
@@ -207,12 +207,12 @@ static struct sram_channel cx23885_sram_channels[] = { | |||
207 | 207 | ||
208 | static struct sram_channel cx23887_sram_channels[] = { | 208 | static struct sram_channel cx23887_sram_channels[] = { |
209 | [SRAM_CH01] = { | 209 | [SRAM_CH01] = { |
210 | .name = "test ch1", | 210 | .name = "VID A", |
211 | .cmds_start = 0x0, | 211 | .cmds_start = 0x10000, |
212 | .ctrl_start = 0x0, | 212 | .ctrl_start = 0x105b0, |
213 | .cdt = 0x0, | 213 | .cdt = 0x107b0, |
214 | .fifo_start = 0x0, | 214 | .fifo_start = 0x40, |
215 | .fifo_size = 0x0, | 215 | .fifo_size = 0x2800, |
216 | .ptr1_reg = DMA1_PTR1, | 216 | .ptr1_reg = DMA1_PTR1, |
217 | .ptr2_reg = DMA1_PTR2, | 217 | .ptr2_reg = DMA1_PTR2, |
218 | .cnt1_reg = DMA1_CNT1, | 218 | .cnt1_reg = DMA1_CNT1, |
@@ -231,12 +231,12 @@ static struct sram_channel cx23887_sram_channels[] = { | |||
231 | .cnt2_reg = DMA2_CNT2, | 231 | .cnt2_reg = DMA2_CNT2, |
232 | }, | 232 | }, |
233 | [SRAM_CH03] = { | 233 | [SRAM_CH03] = { |
234 | .name = "ch3", | 234 | .name = "TS1 B", |
235 | .cmds_start = 0x0, | 235 | .cmds_start = 0x100A0, |
236 | .ctrl_start = 0x0, | 236 | .ctrl_start = 0x10780, |
237 | .cdt = 0x0, | 237 | .cdt = 0x10400, |
238 | .fifo_start = 0x0, | 238 | .fifo_start = 0x5000, |
239 | .fifo_size = 0x0, | 239 | .fifo_size = 0x1000, |
240 | .ptr1_reg = DMA3_PTR1, | 240 | .ptr1_reg = DMA3_PTR1, |
241 | .ptr2_reg = DMA3_PTR2, | 241 | .ptr2_reg = DMA3_PTR2, |
242 | .cnt1_reg = DMA3_CNT1, | 242 | .cnt1_reg = DMA3_CNT1, |