diff options
author | Trent Piepho <xyzzy@speakeasy.org> | 2007-04-04 16:11:04 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@infradead.org> | 2007-04-27 14:45:27 -0400 |
commit | c680dd603857d7218b84751e9f6f0654bbfbefa2 (patch) | |
tree | 58ce390afc6bc720a57550a2171aa1af9a4b7df9 /drivers/media/video/sn9c102 | |
parent | 0ee32871c18a3662d8958a8e9998eb4d2ae94159 (diff) |
V4L/DVB (5502): Sn9c102: more efficient register writing code
There were many places in the driver which had long sequences of constant
register initializations. These were done with one function call per
register. The register address and value were immediate values in the
function calls.
This is very inefficient, as each register and value take twice the space
when they are code, as each includes a push instruction to put it on
the stack. There there is the overhead, both size and time, for a
function call for each register. It's also quite a few lines of C code
to do this.
The patch creates a function that writes multiple registers from a list,
and a macro that makes it easy to construct a such a list as a const
static local to send to the function.
This gets rid of quite a bit of C code, and shrinks the driver by around
8k, while at the same time being more efficient.
Acked-by: Luca Risolia <luca.risolia@studio.unibo.it>
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/video/sn9c102')
-rw-r--r-- | drivers/media/video/sn9c102/sn9c102_core.c | 41 | ||||
-rw-r--r-- | drivers/media/video/sn9c102/sn9c102_hv7131d.c | 18 | ||||
-rw-r--r-- | drivers/media/video/sn9c102/sn9c102_hv7131r.c | 288 | ||||
-rw-r--r-- | drivers/media/video/sn9c102/sn9c102_mi0343.c | 17 | ||||
-rw-r--r-- | drivers/media/video/sn9c102/sn9c102_mi0360.c | 49 | ||||
-rw-r--r-- | drivers/media/video/sn9c102/sn9c102_ov7630.c | 72 | ||||
-rw-r--r-- | drivers/media/video/sn9c102/sn9c102_ov7660.c | 231 | ||||
-rw-r--r-- | drivers/media/video/sn9c102/sn9c102_pas106b.c | 18 | ||||
-rw-r--r-- | drivers/media/video/sn9c102/sn9c102_pas202bcb.c | 74 | ||||
-rw-r--r-- | drivers/media/video/sn9c102/sn9c102_sensor.h | 12 | ||||
-rw-r--r-- | drivers/media/video/sn9c102/sn9c102_tas5110c1b.c | 12 | ||||
-rw-r--r-- | drivers/media/video/sn9c102/sn9c102_tas5110d.c | 11 | ||||
-rw-r--r-- | drivers/media/video/sn9c102/sn9c102_tas5130d1b.c | 14 |
13 files changed, 320 insertions, 537 deletions
diff --git a/drivers/media/video/sn9c102/sn9c102_core.c b/drivers/media/video/sn9c102/sn9c102_core.c index f09caf2b6e75..028f173c1cce 100644 --- a/drivers/media/video/sn9c102/sn9c102_core.c +++ b/drivers/media/video/sn9c102/sn9c102_core.c | |||
@@ -209,27 +209,40 @@ static void sn9c102_queue_unusedframes(struct sn9c102_device* cam) | |||
209 | } | 209 | } |
210 | 210 | ||
211 | /*****************************************************************************/ | 211 | /*****************************************************************************/ |
212 | 212 | /* | |
213 | int sn9c102_write_regs(struct sn9c102_device* cam, u8* buff, u16 index) | 213 | * Write a sequence of count value/register pairs. Returns -1 after the |
214 | * first failed write, or 0 for no errors. | ||
215 | */ | ||
216 | int sn9c102_write_regs(struct sn9c102_device* cam, const u8 valreg[][2], | ||
217 | int count) | ||
214 | { | 218 | { |
215 | struct usb_device* udev = cam->usbdev; | 219 | struct usb_device* udev = cam->usbdev; |
220 | u8* value = cam->control_buffer; /* Needed for DMA'able memory */ | ||
216 | int i, res; | 221 | int i, res; |
217 | 222 | ||
218 | if (index + sizeof(buff) >= ARRAY_SIZE(cam->reg)) | 223 | for (i = 0; i < count; i++) { |
219 | return -1; | 224 | u8 index = valreg[i][1]; |
225 | |||
226 | /* | ||
227 | * index is a u8, so it must be <256 and can't be out of range. | ||
228 | * If we put in a check anyway, gcc annoys us with a warning | ||
229 | * that our check is useless. People get all uppity when they | ||
230 | * see warnings in the kernel compile. | ||
231 | */ | ||
232 | |||
233 | *value = valreg[i][0]; | ||
234 | res = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), | ||
235 | 0x08, 0x41, index, 0, | ||
236 | value, 1, SN9C102_CTRL_TIMEOUT); | ||
237 | if (res < 0) { | ||
238 | DBG(3, "Failed to write a register (value 0x%02X, " | ||
239 | "index 0x%02X, error %d)", *value, index, res); | ||
240 | return -1; | ||
241 | } | ||
220 | 242 | ||
221 | res = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0x08, 0x41, | 243 | cam->reg[index] = *value; |
222 | index, 0, buff, sizeof(buff), | ||
223 | SN9C102_CTRL_TIMEOUT*sizeof(buff)); | ||
224 | if (res < 0) { | ||
225 | DBG(3, "Failed to write registers (index 0x%02X, error %d)", | ||
226 | index, res); | ||
227 | return -1; | ||
228 | } | 244 | } |
229 | 245 | ||
230 | for (i = 0; i < sizeof(buff); i++) | ||
231 | cam->reg[index+i] = buff[i]; | ||
232 | |||
233 | return 0; | 246 | return 0; |
234 | } | 247 | } |
235 | 248 | ||
diff --git a/drivers/media/video/sn9c102/sn9c102_hv7131d.c b/drivers/media/video/sn9c102/sn9c102_hv7131d.c index 9b2e2d68c739..28a861aed044 100644 --- a/drivers/media/video/sn9c102/sn9c102_hv7131d.c +++ b/drivers/media/video/sn9c102/sn9c102_hv7131d.c | |||
@@ -24,14 +24,11 @@ | |||
24 | 24 | ||
25 | static int hv7131d_init(struct sn9c102_device* cam) | 25 | static int hv7131d_init(struct sn9c102_device* cam) |
26 | { | 26 | { |
27 | int err = 0; | 27 | int err; |
28 | 28 | ||
29 | err += sn9c102_write_reg(cam, 0x00, 0x10); | 29 | err = sn9c102_write_const_regs(cam, {0x00, 0x10}, {0x00, 0x11}, |
30 | err += sn9c102_write_reg(cam, 0x00, 0x11); | 30 | {0x00, 0x14}, {0x60, 0x17}, |
31 | err += sn9c102_write_reg(cam, 0x00, 0x14); | 31 | {0x0e, 0x18}, {0xf2, 0x19}); |
32 | err += sn9c102_write_reg(cam, 0x60, 0x17); | ||
33 | err += sn9c102_write_reg(cam, 0x0e, 0x18); | ||
34 | err += sn9c102_write_reg(cam, 0xf2, 0x19); | ||
35 | 32 | ||
36 | err += sn9c102_i2c_write(cam, 0x01, 0x04); | 33 | err += sn9c102_i2c_write(cam, 0x01, 0x04); |
37 | err += sn9c102_i2c_write(cam, 0x02, 0x00); | 34 | err += sn9c102_i2c_write(cam, 0x02, 0x00); |
@@ -247,11 +244,10 @@ static struct sn9c102_sensor hv7131d = { | |||
247 | 244 | ||
248 | int sn9c102_probe_hv7131d(struct sn9c102_device* cam) | 245 | int sn9c102_probe_hv7131d(struct sn9c102_device* cam) |
249 | { | 246 | { |
250 | int r0 = 0, r1 = 0, err = 0; | 247 | int r0 = 0, r1 = 0, err; |
251 | 248 | ||
252 | err += sn9c102_write_reg(cam, 0x01, 0x01); | 249 | err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x00, 0x01}, |
253 | err += sn9c102_write_reg(cam, 0x00, 0x01); | 250 | {0x28, 0x17}); |
254 | err += sn9c102_write_reg(cam, 0x28, 0x17); | ||
255 | if (err) | 251 | if (err) |
256 | return -EIO; | 252 | return -EIO; |
257 | 253 | ||
diff --git a/drivers/media/video/sn9c102/sn9c102_hv7131r.c b/drivers/media/video/sn9c102/sn9c102_hv7131r.c index c4a3e3991e88..5a495baa5f95 100644 --- a/drivers/media/video/sn9c102/sn9c102_hv7131r.c +++ b/drivers/media/video/sn9c102/sn9c102_hv7131r.c | |||
@@ -28,192 +28,102 @@ static int hv7131r_init(struct sn9c102_device* cam) | |||
28 | 28 | ||
29 | switch (sn9c102_get_bridge(cam)) { | 29 | switch (sn9c102_get_bridge(cam)) { |
30 | case BRIDGE_SN9C103: | 30 | case BRIDGE_SN9C103: |
31 | err += sn9c102_write_reg(cam, 0x00, 0x03); | 31 | err = sn9c102_write_const_regs(cam, {0x00, 0x03}, {0x1a, 0x04}, |
32 | err += sn9c102_write_reg(cam, 0x1a, 0x04); | 32 | {0x20, 0x05}, {0x20, 0x06}, |
33 | err += sn9c102_write_reg(cam, 0x20, 0x05); | 33 | {0x03, 0x10}, {0x00, 0x14}, |
34 | err += sn9c102_write_reg(cam, 0x20, 0x06); | 34 | {0x60, 0x17}, {0x0a, 0x18}, |
35 | err += sn9c102_write_reg(cam, 0x03, 0x10); | 35 | {0xf0, 0x19}, {0x1d, 0x1a}, |
36 | err += sn9c102_write_reg(cam, 0x00, 0x14); | 36 | {0x10, 0x1b}, {0x02, 0x1c}, |
37 | err += sn9c102_write_reg(cam, 0x60, 0x17); | 37 | {0x03, 0x1d}, {0x0f, 0x1e}, |
38 | err += sn9c102_write_reg(cam, 0x0a, 0x18); | 38 | {0x0c, 0x1f}, {0x00, 0x20}, |
39 | err += sn9c102_write_reg(cam, 0xf0, 0x19); | 39 | {0x10, 0x21}, {0x20, 0x22}, |
40 | err += sn9c102_write_reg(cam, 0x1d, 0x1a); | 40 | {0x30, 0x23}, {0x40, 0x24}, |
41 | err += sn9c102_write_reg(cam, 0x10, 0x1b); | 41 | {0x50, 0x25}, {0x60, 0x26}, |
42 | err += sn9c102_write_reg(cam, 0x02, 0x1c); | 42 | {0x70, 0x27}, {0x80, 0x28}, |
43 | err += sn9c102_write_reg(cam, 0x03, 0x1d); | 43 | {0x90, 0x29}, {0xa0, 0x2a}, |
44 | err += sn9c102_write_reg(cam, 0x0f, 0x1e); | 44 | {0xb0, 0x2b}, {0xc0, 0x2c}, |
45 | err += sn9c102_write_reg(cam, 0x0c, 0x1f); | 45 | {0xd0, 0x2d}, {0xe0, 0x2e}, |
46 | err += sn9c102_write_reg(cam, 0x00, 0x20); | 46 | {0xf0, 0x2f}, {0xff, 0x30}); |
47 | err += sn9c102_write_reg(cam, 0x10, 0x21); | 47 | |
48 | err += sn9c102_write_reg(cam, 0x20, 0x22); | ||
49 | err += sn9c102_write_reg(cam, 0x30, 0x23); | ||
50 | err += sn9c102_write_reg(cam, 0x40, 0x24); | ||
51 | err += sn9c102_write_reg(cam, 0x50, 0x25); | ||
52 | err += sn9c102_write_reg(cam, 0x60, 0x26); | ||
53 | err += sn9c102_write_reg(cam, 0x70, 0x27); | ||
54 | err += sn9c102_write_reg(cam, 0x80, 0x28); | ||
55 | err += sn9c102_write_reg(cam, 0x90, 0x29); | ||
56 | err += sn9c102_write_reg(cam, 0xa0, 0x2a); | ||
57 | err += sn9c102_write_reg(cam, 0xb0, 0x2b); | ||
58 | err += sn9c102_write_reg(cam, 0xc0, 0x2c); | ||
59 | err += sn9c102_write_reg(cam, 0xd0, 0x2d); | ||
60 | err += sn9c102_write_reg(cam, 0xe0, 0x2e); | ||
61 | err += sn9c102_write_reg(cam, 0xf0, 0x2f); | ||
62 | err += sn9c102_write_reg(cam, 0xff, 0x30); | ||
63 | break; | 48 | break; |
64 | case BRIDGE_SN9C105: | 49 | case BRIDGE_SN9C105: |
65 | case BRIDGE_SN9C120: | 50 | case BRIDGE_SN9C120: |
66 | err += sn9c102_write_reg(cam, 0x44, 0x01); | 51 | err = sn9c102_write_const_regs(cam, {0x44, 0x01}, {0x40, 0x02}, |
67 | err += sn9c102_write_reg(cam, 0x40, 0x02); | 52 | {0x00, 0x03}, {0x1a, 0x04}, |
68 | err += sn9c102_write_reg(cam, 0x00, 0x03); | 53 | {0x44, 0x05}, {0x3e, 0x06}, |
69 | err += sn9c102_write_reg(cam, 0x1a, 0x04); | 54 | {0x1a, 0x07}, {0x03, 0x10}, |
70 | err += sn9c102_write_reg(cam, 0x44, 0x05); | 55 | {0x08, 0x14}, {0xa3, 0x17}, |
71 | err += sn9c102_write_reg(cam, 0x3e, 0x06); | 56 | {0x4b, 0x18}, {0x00, 0x19}, |
72 | err += sn9c102_write_reg(cam, 0x1a, 0x07); | 57 | {0x1d, 0x1a}, {0x10, 0x1b}, |
73 | err += sn9c102_write_reg(cam, 0x03, 0x10); | 58 | {0x02, 0x1c}, {0x03, 0x1d}, |
74 | err += sn9c102_write_reg(cam, 0x08, 0x14); | 59 | {0x0f, 0x1e}, {0x0c, 0x1f}, |
75 | err += sn9c102_write_reg(cam, 0xa3, 0x17); | 60 | {0x00, 0x20}, {0x29, 0x21}, |
76 | err += sn9c102_write_reg(cam, 0x4b, 0x18); | 61 | {0x40, 0x22}, {0x54, 0x23}, |
77 | err += sn9c102_write_reg(cam, 0x00, 0x19); | 62 | {0x66, 0x24}, {0x76, 0x25}, |
78 | err += sn9c102_write_reg(cam, 0x1d, 0x1a); | 63 | {0x85, 0x26}, {0x94, 0x27}, |
79 | err += sn9c102_write_reg(cam, 0x10, 0x1b); | 64 | {0xa1, 0x28}, {0xae, 0x29}, |
80 | err += sn9c102_write_reg(cam, 0x02, 0x1c); | 65 | {0xbb, 0x2a}, {0xc7, 0x2b}, |
81 | err += sn9c102_write_reg(cam, 0x03, 0x1d); | 66 | {0xd3, 0x2c}, {0xde, 0x2d}, |
82 | err += sn9c102_write_reg(cam, 0x0f, 0x1e); | 67 | {0xea, 0x2e}, {0xf4, 0x2f}, |
83 | err += sn9c102_write_reg(cam, 0x0c, 0x1f); | 68 | {0xff, 0x30}, {0x00, 0x3F}, |
84 | err += sn9c102_write_reg(cam, 0x00, 0x20); | 69 | {0xC7, 0x40}, {0x01, 0x41}, |
85 | err += sn9c102_write_reg(cam, 0x29, 0x21); | 70 | {0x44, 0x42}, {0x00, 0x43}, |
86 | err += sn9c102_write_reg(cam, 0x40, 0x22); | 71 | {0x44, 0x44}, {0x00, 0x45}, |
87 | err += sn9c102_write_reg(cam, 0x54, 0x23); | 72 | {0x44, 0x46}, {0x00, 0x47}, |
88 | err += sn9c102_write_reg(cam, 0x66, 0x24); | 73 | {0xC7, 0x48}, {0x01, 0x49}, |
89 | err += sn9c102_write_reg(cam, 0x76, 0x25); | 74 | {0xC7, 0x4A}, {0x01, 0x4B}, |
90 | err += sn9c102_write_reg(cam, 0x85, 0x26); | 75 | {0xC7, 0x4C}, {0x01, 0x4D}, |
91 | err += sn9c102_write_reg(cam, 0x94, 0x27); | 76 | {0x44, 0x4E}, {0x00, 0x4F}, |
92 | err += sn9c102_write_reg(cam, 0xa1, 0x28); | 77 | {0x44, 0x50}, {0x00, 0x51}, |
93 | err += sn9c102_write_reg(cam, 0xae, 0x29); | 78 | {0x44, 0x52}, {0x00, 0x53}, |
94 | err += sn9c102_write_reg(cam, 0xbb, 0x2a); | 79 | {0xC7, 0x54}, {0x01, 0x55}, |
95 | err += sn9c102_write_reg(cam, 0xc7, 0x2b); | 80 | {0xC7, 0x56}, {0x01, 0x57}, |
96 | err += sn9c102_write_reg(cam, 0xd3, 0x2c); | 81 | {0xC7, 0x58}, {0x01, 0x59}, |
97 | err += sn9c102_write_reg(cam, 0xde, 0x2d); | 82 | {0x44, 0x5A}, {0x00, 0x5B}, |
98 | err += sn9c102_write_reg(cam, 0xea, 0x2e); | 83 | {0x44, 0x5C}, {0x00, 0x5D}, |
99 | err += sn9c102_write_reg(cam, 0xf4, 0x2f); | 84 | {0x44, 0x5E}, {0x00, 0x5F}, |
100 | err += sn9c102_write_reg(cam, 0xff, 0x30); | 85 | {0xC7, 0x60}, {0x01, 0x61}, |
101 | err += sn9c102_write_reg(cam, 0x00, 0x3F); | 86 | {0xC7, 0x62}, {0x01, 0x63}, |
102 | err += sn9c102_write_reg(cam, 0xC7, 0x40); | 87 | {0xC7, 0x64}, {0x01, 0x65}, |
103 | err += sn9c102_write_reg(cam, 0x01, 0x41); | 88 | {0x44, 0x66}, {0x00, 0x67}, |
104 | err += sn9c102_write_reg(cam, 0x44, 0x42); | 89 | {0x44, 0x68}, {0x00, 0x69}, |
105 | err += sn9c102_write_reg(cam, 0x00, 0x43); | 90 | {0x44, 0x6A}, {0x00, 0x6B}, |
106 | err += sn9c102_write_reg(cam, 0x44, 0x44); | 91 | {0xC7, 0x6C}, {0x01, 0x6D}, |
107 | err += sn9c102_write_reg(cam, 0x00, 0x45); | 92 | {0xC7, 0x6E}, {0x01, 0x6F}, |
108 | err += sn9c102_write_reg(cam, 0x44, 0x46); | 93 | {0xC7, 0x70}, {0x01, 0x71}, |
109 | err += sn9c102_write_reg(cam, 0x00, 0x47); | 94 | {0x44, 0x72}, {0x00, 0x73}, |
110 | err += sn9c102_write_reg(cam, 0xC7, 0x48); | 95 | {0x44, 0x74}, {0x00, 0x75}, |
111 | err += sn9c102_write_reg(cam, 0x01, 0x49); | 96 | {0x44, 0x76}, {0x00, 0x77}, |
112 | err += sn9c102_write_reg(cam, 0xC7, 0x4A); | 97 | {0xC7, 0x78}, {0x01, 0x79}, |
113 | err += sn9c102_write_reg(cam, 0x01, 0x4B); | 98 | {0xC7, 0x7A}, {0x01, 0x7B}, |
114 | err += sn9c102_write_reg(cam, 0xC7, 0x4C); | 99 | {0xC7, 0x7C}, {0x01, 0x7D}, |
115 | err += sn9c102_write_reg(cam, 0x01, 0x4D); | 100 | {0x44, 0x7E}, {0x00, 0x7F}, |
116 | err += sn9c102_write_reg(cam, 0x44, 0x4E); | 101 | {0x14, 0x84}, {0x00, 0x85}, |
117 | err += sn9c102_write_reg(cam, 0x00, 0x4F); | 102 | {0x27, 0x86}, {0x00, 0x87}, |
118 | err += sn9c102_write_reg(cam, 0x44, 0x50); | 103 | {0x07, 0x88}, {0x00, 0x89}, |
119 | err += sn9c102_write_reg(cam, 0x00, 0x51); | 104 | {0xEC, 0x8A}, {0x0f, 0x8B}, |
120 | err += sn9c102_write_reg(cam, 0x44, 0x52); | 105 | {0xD8, 0x8C}, {0x0f, 0x8D}, |
121 | err += sn9c102_write_reg(cam, 0x00, 0x53); | 106 | {0x3D, 0x8E}, {0x00, 0x8F}, |
122 | err += sn9c102_write_reg(cam, 0xC7, 0x54); | 107 | {0x3D, 0x90}, {0x00, 0x91}, |
123 | err += sn9c102_write_reg(cam, 0x01, 0x55); | 108 | {0xCD, 0x92}, {0x0f, 0x93}, |
124 | err += sn9c102_write_reg(cam, 0xC7, 0x56); | 109 | {0xf7, 0x94}, {0x0f, 0x95}, |
125 | err += sn9c102_write_reg(cam, 0x01, 0x57); | 110 | {0x0C, 0x96}, {0x00, 0x97}, |
126 | err += sn9c102_write_reg(cam, 0xC7, 0x58); | 111 | {0x00, 0x98}, {0x66, 0x99}, |
127 | err += sn9c102_write_reg(cam, 0x01, 0x59); | 112 | {0x05, 0x9A}, {0x00, 0x9B}, |
128 | err += sn9c102_write_reg(cam, 0x44, 0x5A); | 113 | {0x04, 0x9C}, {0x00, 0x9D}, |
129 | err += sn9c102_write_reg(cam, 0x00, 0x5B); | 114 | {0x08, 0x9E}, {0x00, 0x9F}, |
130 | err += sn9c102_write_reg(cam, 0x44, 0x5C); | 115 | {0x2D, 0xC0}, {0x2D, 0xC1}, |
131 | err += sn9c102_write_reg(cam, 0x00, 0x5D); | 116 | {0x3A, 0xC2}, {0x05, 0xC3}, |
132 | err += sn9c102_write_reg(cam, 0x44, 0x5E); | 117 | {0x04, 0xC4}, {0x3F, 0xC5}, |
133 | err += sn9c102_write_reg(cam, 0x00, 0x5F); | 118 | {0x00, 0xC6}, {0x00, 0xC7}, |
134 | err += sn9c102_write_reg(cam, 0xC7, 0x60); | 119 | {0x50, 0xC8}, {0x3C, 0xC9}, |
135 | err += sn9c102_write_reg(cam, 0x01, 0x61); | 120 | {0x28, 0xCA}, {0xD8, 0xCB}, |
136 | err += sn9c102_write_reg(cam, 0xC7, 0x62); | 121 | {0x14, 0xCC}, {0xEC, 0xCD}, |
137 | err += sn9c102_write_reg(cam, 0x01, 0x63); | 122 | {0x32, 0xCE}, {0xDD, 0xCF}, |
138 | err += sn9c102_write_reg(cam, 0xC7, 0x64); | 123 | {0x32, 0xD0}, {0xDD, 0xD1}, |
139 | err += sn9c102_write_reg(cam, 0x01, 0x65); | 124 | {0x6A, 0xD2}, {0x50, 0xD3}, |
140 | err += sn9c102_write_reg(cam, 0x44, 0x66); | 125 | {0x00, 0xD4}, {0x00, 0xD5}, |
141 | err += sn9c102_write_reg(cam, 0x00, 0x67); | 126 | {0x00, 0xD6}); |
142 | err += sn9c102_write_reg(cam, 0x44, 0x68); | ||
143 | err += sn9c102_write_reg(cam, 0x00, 0x69); | ||
144 | err += sn9c102_write_reg(cam, 0x44, 0x6A); | ||
145 | err += sn9c102_write_reg(cam, 0x00, 0x6B); | ||
146 | err += sn9c102_write_reg(cam, 0xC7, 0x6C); | ||
147 | err += sn9c102_write_reg(cam, 0x01, 0x6D); | ||
148 | err += sn9c102_write_reg(cam, 0xC7, 0x6E); | ||
149 | err += sn9c102_write_reg(cam, 0x01, 0x6F); | ||
150 | err += sn9c102_write_reg(cam, 0xC7, 0x70); | ||
151 | err += sn9c102_write_reg(cam, 0x01, 0x71); | ||
152 | err += sn9c102_write_reg(cam, 0x44, 0x72); | ||
153 | err += sn9c102_write_reg(cam, 0x00, 0x73); | ||
154 | err += sn9c102_write_reg(cam, 0x44, 0x74); | ||
155 | err += sn9c102_write_reg(cam, 0x00, 0x75); | ||
156 | err += sn9c102_write_reg(cam, 0x44, 0x76); | ||
157 | err += sn9c102_write_reg(cam, 0x00, 0x77); | ||
158 | err += sn9c102_write_reg(cam, 0xC7, 0x78); | ||
159 | err += sn9c102_write_reg(cam, 0x01, 0x79); | ||
160 | err += sn9c102_write_reg(cam, 0xC7, 0x7A); | ||
161 | err += sn9c102_write_reg(cam, 0x01, 0x7B); | ||
162 | err += sn9c102_write_reg(cam, 0xC7, 0x7C); | ||
163 | err += sn9c102_write_reg(cam, 0x01, 0x7D); | ||
164 | err += sn9c102_write_reg(cam, 0x44, 0x7E); | ||
165 | err += sn9c102_write_reg(cam, 0x00, 0x7F); | ||
166 | err += sn9c102_write_reg(cam, 0x14, 0x84); | ||
167 | err += sn9c102_write_reg(cam, 0x00, 0x85); | ||
168 | err += sn9c102_write_reg(cam, 0x27, 0x86); | ||
169 | err += sn9c102_write_reg(cam, 0x00, 0x87); | ||
170 | err += sn9c102_write_reg(cam, 0x07, 0x88); | ||
171 | err += sn9c102_write_reg(cam, 0x00, 0x89); | ||
172 | err += sn9c102_write_reg(cam, 0xEC, 0x8A); | ||
173 | err += sn9c102_write_reg(cam, 0x0f, 0x8B); | ||
174 | err += sn9c102_write_reg(cam, 0xD8, 0x8C); | ||
175 | err += sn9c102_write_reg(cam, 0x0f, 0x8D); | ||
176 | err += sn9c102_write_reg(cam, 0x3D, 0x8E); | ||
177 | err += sn9c102_write_reg(cam, 0x00, 0x8F); | ||
178 | err += sn9c102_write_reg(cam, 0x3D, 0x90); | ||
179 | err += sn9c102_write_reg(cam, 0x00, 0x91); | ||
180 | err += sn9c102_write_reg(cam, 0xCD, 0x92); | ||
181 | err += sn9c102_write_reg(cam, 0x0f, 0x93); | ||
182 | err += sn9c102_write_reg(cam, 0xf7, 0x94); | ||
183 | err += sn9c102_write_reg(cam, 0x0f, 0x95); | ||
184 | err += sn9c102_write_reg(cam, 0x0C, 0x96); | ||
185 | err += sn9c102_write_reg(cam, 0x00, 0x97); | ||
186 | err += sn9c102_write_reg(cam, 0x00, 0x98); | ||
187 | err += sn9c102_write_reg(cam, 0x66, 0x99); | ||
188 | err += sn9c102_write_reg(cam, 0x05, 0x9A); | ||
189 | err += sn9c102_write_reg(cam, 0x00, 0x9B); | ||
190 | err += sn9c102_write_reg(cam, 0x04, 0x9C); | ||
191 | err += sn9c102_write_reg(cam, 0x00, 0x9D); | ||
192 | err += sn9c102_write_reg(cam, 0x08, 0x9E); | ||
193 | err += sn9c102_write_reg(cam, 0x00, 0x9F); | ||
194 | err += sn9c102_write_reg(cam, 0x2D, 0xC0); | ||
195 | err += sn9c102_write_reg(cam, 0x2D, 0xC1); | ||
196 | err += sn9c102_write_reg(cam, 0x3A, 0xC2); | ||
197 | err += sn9c102_write_reg(cam, 0x05, 0xC3); | ||
198 | err += sn9c102_write_reg(cam, 0x04, 0xC4); | ||
199 | err += sn9c102_write_reg(cam, 0x3F, 0xC5); | ||
200 | err += sn9c102_write_reg(cam, 0x00, 0xC6); | ||
201 | err += sn9c102_write_reg(cam, 0x00, 0xC7); | ||
202 | err += sn9c102_write_reg(cam, 0x50, 0xC8); | ||
203 | err += sn9c102_write_reg(cam, 0x3C, 0xC9); | ||
204 | err += sn9c102_write_reg(cam, 0x28, 0xCA); | ||
205 | err += sn9c102_write_reg(cam, 0xD8, 0xCB); | ||
206 | err += sn9c102_write_reg(cam, 0x14, 0xCC); | ||
207 | err += sn9c102_write_reg(cam, 0xEC, 0xCD); | ||
208 | err += sn9c102_write_reg(cam, 0x32, 0xCE); | ||
209 | err += sn9c102_write_reg(cam, 0xDD, 0xCF); | ||
210 | err += sn9c102_write_reg(cam, 0x32, 0xD0); | ||
211 | err += sn9c102_write_reg(cam, 0xDD, 0xD1); | ||
212 | err += sn9c102_write_reg(cam, 0x6A, 0xD2); | ||
213 | err += sn9c102_write_reg(cam, 0x50, 0xD3); | ||
214 | err += sn9c102_write_reg(cam, 0x00, 0xD4); | ||
215 | err += sn9c102_write_reg(cam, 0x00, 0xD5); | ||
216 | err += sn9c102_write_reg(cam, 0x00, 0xD6); | ||
217 | break; | 127 | break; |
218 | default: | 128 | default: |
219 | break; | 129 | break; |
@@ -434,14 +344,12 @@ static struct sn9c102_sensor hv7131r = { | |||
434 | 344 | ||
435 | int sn9c102_probe_hv7131r(struct sn9c102_device* cam) | 345 | int sn9c102_probe_hv7131r(struct sn9c102_device* cam) |
436 | { | 346 | { |
437 | int devid, err = 0; | 347 | int devid, err; |
348 | |||
349 | err = sn9c102_write_const_regs(cam, {0x09, 0x01}, {0x44, 0x02}, | ||
350 | {0x34, 0x01}, {0x20, 0x17}, | ||
351 | {0x34, 0x01}, {0x46, 0x01}); | ||
438 | 352 | ||
439 | err += sn9c102_write_reg(cam, 0x09, 0x01); | ||
440 | err += sn9c102_write_reg(cam, 0x44, 0x02); | ||
441 | err += sn9c102_write_reg(cam, 0x34, 0x01); | ||
442 | err += sn9c102_write_reg(cam, 0x20, 0x17); | ||
443 | err += sn9c102_write_reg(cam, 0x34, 0x01); | ||
444 | err += sn9c102_write_reg(cam, 0x46, 0x01); | ||
445 | if (err) | 353 | if (err) |
446 | return -EIO; | 354 | return -EIO; |
447 | 355 | ||
diff --git a/drivers/media/video/sn9c102/sn9c102_mi0343.c b/drivers/media/video/sn9c102/sn9c102_mi0343.c index 441156d61106..9200845d011b 100644 --- a/drivers/media/video/sn9c102/sn9c102_mi0343.c +++ b/drivers/media/video/sn9c102/sn9c102_mi0343.c | |||
@@ -27,13 +27,10 @@ static int mi0343_init(struct sn9c102_device* cam) | |||
27 | struct sn9c102_sensor* s = sn9c102_get_sensor(cam); | 27 | struct sn9c102_sensor* s = sn9c102_get_sensor(cam); |
28 | int err = 0; | 28 | int err = 0; |
29 | 29 | ||
30 | err += sn9c102_write_reg(cam, 0x00, 0x10); | 30 | err = sn9c102_write_const_regs(cam, {0x00, 0x10}, {0x00, 0x11}, |
31 | err += sn9c102_write_reg(cam, 0x00, 0x11); | 31 | {0x0a, 0x14}, {0x40, 0x01}, |
32 | err += sn9c102_write_reg(cam, 0x0a, 0x14); | 32 | {0x20, 0x17}, {0x07, 0x18}, |
33 | err += sn9c102_write_reg(cam, 0x40, 0x01); | 33 | {0xa0, 0x19}); |
34 | err += sn9c102_write_reg(cam, 0x20, 0x17); | ||
35 | err += sn9c102_write_reg(cam, 0x07, 0x18); | ||
36 | err += sn9c102_write_reg(cam, 0xa0, 0x19); | ||
37 | 34 | ||
38 | err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0d, | 35 | err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0d, |
39 | 0x00, 0x01, 0, 0); | 36 | 0x00, 0x01, 0, 0); |
@@ -338,9 +335,9 @@ int sn9c102_probe_mi0343(struct sn9c102_device* cam) | |||
338 | u8 data[5+1]; | 335 | u8 data[5+1]; |
339 | int err = 0; | 336 | int err = 0; |
340 | 337 | ||
341 | err += sn9c102_write_reg(cam, 0x01, 0x01); | 338 | err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x00, 0x01}, |
342 | err += sn9c102_write_reg(cam, 0x00, 0x01); | 339 | {0x28, 0x17}); |
343 | err += sn9c102_write_reg(cam, 0x28, 0x17); | 340 | |
344 | if (err) | 341 | if (err) |
345 | return -EIO; | 342 | return -EIO; |
346 | 343 | ||
diff --git a/drivers/media/video/sn9c102/sn9c102_mi0360.c b/drivers/media/video/sn9c102/sn9c102_mi0360.c index 7154dd0534ff..64698acb0b15 100644 --- a/drivers/media/video/sn9c102/sn9c102_mi0360.c +++ b/drivers/media/video/sn9c102/sn9c102_mi0360.c | |||
@@ -27,34 +27,20 @@ static int mi0360_init(struct sn9c102_device* cam) | |||
27 | struct sn9c102_sensor* s = sn9c102_get_sensor(cam); | 27 | struct sn9c102_sensor* s = sn9c102_get_sensor(cam); |
28 | int err = 0; | 28 | int err = 0; |
29 | 29 | ||
30 | err += sn9c102_write_reg(cam, 0x00, 0x10); | 30 | err = sn9c102_write_const_regs(cam, {0x00, 0x10}, {0x00, 0x11}, |
31 | err += sn9c102_write_reg(cam, 0x00, 0x11); | 31 | {0x0a, 0x14}, {0x40, 0x01}, |
32 | err += sn9c102_write_reg(cam, 0x0a, 0x14); | 32 | {0x20, 0x17}, {0x07, 0x18}, |
33 | err += sn9c102_write_reg(cam, 0x40, 0x01); | 33 | {0xa0, 0x19}, {0x02, 0x1c}, |
34 | err += sn9c102_write_reg(cam, 0x20, 0x17); | 34 | {0x03, 0x1d}, {0x0f, 0x1e}, |
35 | err += sn9c102_write_reg(cam, 0x07, 0x18); | 35 | {0x0c, 0x1f}, {0x00, 0x20}, |
36 | err += sn9c102_write_reg(cam, 0xa0, 0x19); | 36 | {0x10, 0x21}, {0x20, 0x22}, |
37 | err += sn9c102_write_reg(cam, 0x02, 0x1c); | 37 | {0x30, 0x23}, {0x40, 0x24}, |
38 | err += sn9c102_write_reg(cam, 0x03, 0x1d); | 38 | {0x50, 0x25}, {0x60, 0x26}, |
39 | err += sn9c102_write_reg(cam, 0x0f, 0x1e); | 39 | {0x70, 0x27}, {0x80, 0x28}, |
40 | err += sn9c102_write_reg(cam, 0x0c, 0x1f); | 40 | {0x90, 0x29}, {0xa0, 0x2a}, |
41 | err += sn9c102_write_reg(cam, 0x00, 0x20); | 41 | {0xb0, 0x2b}, {0xc0, 0x2c}, |
42 | err += sn9c102_write_reg(cam, 0x10, 0x21); | 42 | {0xd0, 0x2d}, {0xe0, 0x2e}, |
43 | err += sn9c102_write_reg(cam, 0x20, 0x22); | 43 | {0xf0, 0x2f}, {0xff, 0x30}); |
44 | err += sn9c102_write_reg(cam, 0x30, 0x23); | ||
45 | err += sn9c102_write_reg(cam, 0x40, 0x24); | ||
46 | err += sn9c102_write_reg(cam, 0x50, 0x25); | ||
47 | err += sn9c102_write_reg(cam, 0x60, 0x26); | ||
48 | err += sn9c102_write_reg(cam, 0x70, 0x27); | ||
49 | err += sn9c102_write_reg(cam, 0x80, 0x28); | ||
50 | err += sn9c102_write_reg(cam, 0x90, 0x29); | ||
51 | err += sn9c102_write_reg(cam, 0xa0, 0x2a); | ||
52 | err += sn9c102_write_reg(cam, 0xb0, 0x2b); | ||
53 | err += sn9c102_write_reg(cam, 0xc0, 0x2c); | ||
54 | err += sn9c102_write_reg(cam, 0xd0, 0x2d); | ||
55 | err += sn9c102_write_reg(cam, 0xe0, 0x2e); | ||
56 | err += sn9c102_write_reg(cam, 0xf0, 0x2f); | ||
57 | err += sn9c102_write_reg(cam, 0xff, 0x30); | ||
58 | 44 | ||
59 | err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0d, | 45 | err += sn9c102_i2c_try_raw_write(cam, s, 4, s->i2c_slave_id, 0x0d, |
60 | 0x00, 0x01, 0, 0); | 46 | 0x00, 0x01, 0, 0); |
@@ -332,11 +318,10 @@ static struct sn9c102_sensor mi0360 = { | |||
332 | int sn9c102_probe_mi0360(struct sn9c102_device* cam) | 318 | int sn9c102_probe_mi0360(struct sn9c102_device* cam) |
333 | { | 319 | { |
334 | u8 data[5+1]; | 320 | u8 data[5+1]; |
335 | int err = 0; | 321 | int err; |
336 | 322 | ||
337 | err += sn9c102_write_reg(cam, 0x01, 0x01); | 323 | err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x00, 0x01}, |
338 | err += sn9c102_write_reg(cam, 0x00, 0x01); | 324 | {0x28, 0x17}); |
339 | err += sn9c102_write_reg(cam, 0x28, 0x17); | ||
340 | if (err) | 325 | if (err) |
341 | return -EIO; | 326 | return -EIO; |
342 | 327 | ||
diff --git a/drivers/media/video/sn9c102/sn9c102_ov7630.c b/drivers/media/video/sn9c102/sn9c102_ov7630.c index ad9fb2ca2735..31b6080b0615 100644 --- a/drivers/media/video/sn9c102/sn9c102_ov7630.c +++ b/drivers/media/video/sn9c102/sn9c102_ov7630.c | |||
@@ -29,10 +29,9 @@ static int ov7630_init(struct sn9c102_device* cam) | |||
29 | switch (sn9c102_get_bridge(cam)) { | 29 | switch (sn9c102_get_bridge(cam)) { |
30 | case BRIDGE_SN9C101: | 30 | case BRIDGE_SN9C101: |
31 | case BRIDGE_SN9C102: | 31 | case BRIDGE_SN9C102: |
32 | err += sn9c102_write_reg(cam, 0x00, 0x14); | 32 | err = sn9c102_write_const_regs(cam, {0x00, 0x14}, |
33 | err += sn9c102_write_reg(cam, 0x60, 0x17); | 33 | {0x60, 0x17}, {0x0f, 0x18}, |
34 | err += sn9c102_write_reg(cam, 0x0f, 0x18); | 34 | {0x50, 0x19}); |
35 | err += sn9c102_write_reg(cam, 0x50, 0x19); | ||
36 | 35 | ||
37 | err += sn9c102_i2c_write(cam, 0x12, 0x8d); | 36 | err += sn9c102_i2c_write(cam, 0x12, 0x8d); |
38 | err += sn9c102_i2c_write(cam, 0x12, 0x0d); | 37 | err += sn9c102_i2c_write(cam, 0x12, 0x0d); |
@@ -62,42 +61,26 @@ static int ov7630_init(struct sn9c102_device* cam) | |||
62 | err += sn9c102_i2c_write(cam, 0x71, 0x00); | 61 | err += sn9c102_i2c_write(cam, 0x71, 0x00); |
63 | err += sn9c102_i2c_write(cam, 0x74, 0x21); | 62 | err += sn9c102_i2c_write(cam, 0x74, 0x21); |
64 | err += sn9c102_i2c_write(cam, 0x7d, 0xf7); | 63 | err += sn9c102_i2c_write(cam, 0x7d, 0xf7); |
64 | |||
65 | break; | 65 | break; |
66 | case BRIDGE_SN9C103: | 66 | case BRIDGE_SN9C103: |
67 | err += sn9c102_write_reg(cam, 0x00, 0x02); | 67 | err = sn9c102_write_const_regs(cam, {0x00, 0x02}, {0x00, 0x03}, |
68 | err += sn9c102_write_reg(cam, 0x00, 0x03); | 68 | {0x1a, 0x04}, {0x20, 0x05}, |
69 | err += sn9c102_write_reg(cam, 0x1a, 0x04); | 69 | {0x20, 0x06}, {0x20, 0x07}, |
70 | err += sn9c102_write_reg(cam, 0x20, 0x05); | 70 | {0x03, 0x10}, {0x0a, 0x14}, |
71 | err += sn9c102_write_reg(cam, 0x20, 0x06); | 71 | {0x60, 0x17}, {0x0f, 0x18}, |
72 | err += sn9c102_write_reg(cam, 0x20, 0x07); | 72 | {0x50, 0x19}, {0x1d, 0x1a}, |
73 | err += sn9c102_write_reg(cam, 0x03, 0x10); | 73 | {0x10, 0x1b}, {0x02, 0x1c}, |
74 | err += sn9c102_write_reg(cam, 0x0a, 0x14); | 74 | {0x03, 0x1d}, {0x0f, 0x1e}, |
75 | err += sn9c102_write_reg(cam, 0x60, 0x17); | 75 | {0x0c, 0x1f}, {0x00, 0x20}, |
76 | err += sn9c102_write_reg(cam, 0x0f, 0x18); | 76 | {0x10, 0x21}, {0x20, 0x22}, |
77 | err += sn9c102_write_reg(cam, 0x50, 0x19); | 77 | {0x30, 0x23}, {0x40, 0x24}, |
78 | err += sn9c102_write_reg(cam, 0x1d, 0x1a); | 78 | {0x50, 0x25}, {0x60, 0x26}, |
79 | err += sn9c102_write_reg(cam, 0x10, 0x1b); | 79 | {0x70, 0x27}, {0x80, 0x28}, |
80 | err += sn9c102_write_reg(cam, 0x02, 0x1c); | 80 | {0x90, 0x29}, {0xa0, 0x2a}, |
81 | err += sn9c102_write_reg(cam, 0x03, 0x1d); | 81 | {0xb0, 0x2b}, {0xc0, 0x2c}, |
82 | err += sn9c102_write_reg(cam, 0x0f, 0x1e); | 82 | {0xd0, 0x2d}, {0xe0, 0x2e}, |
83 | err += sn9c102_write_reg(cam, 0x0c, 0x1f); | 83 | {0xf0, 0x2f}, {0xff, 0x30}); |
84 | err += sn9c102_write_reg(cam, 0x00, 0x20); | ||
85 | err += sn9c102_write_reg(cam, 0x10, 0x21); | ||
86 | err += sn9c102_write_reg(cam, 0x20, 0x22); | ||
87 | err += sn9c102_write_reg(cam, 0x30, 0x23); | ||
88 | err += sn9c102_write_reg(cam, 0x40, 0x24); | ||
89 | err += sn9c102_write_reg(cam, 0x50, 0x25); | ||
90 | err += sn9c102_write_reg(cam, 0x60, 0x26); | ||
91 | err += sn9c102_write_reg(cam, 0x70, 0x27); | ||
92 | err += sn9c102_write_reg(cam, 0x80, 0x28); | ||
93 | err += sn9c102_write_reg(cam, 0x90, 0x29); | ||
94 | err += sn9c102_write_reg(cam, 0xa0, 0x2a); | ||
95 | err += sn9c102_write_reg(cam, 0xb0, 0x2b); | ||
96 | err += sn9c102_write_reg(cam, 0xc0, 0x2c); | ||
97 | err += sn9c102_write_reg(cam, 0xd0, 0x2d); | ||
98 | err += sn9c102_write_reg(cam, 0xe0, 0x2e); | ||
99 | err += sn9c102_write_reg(cam, 0xf0, 0x2f); | ||
100 | err += sn9c102_write_reg(cam, 0xff, 0x30); | ||
101 | 84 | ||
102 | err += sn9c102_i2c_write(cam, 0x12, 0x8d); | 85 | err += sn9c102_i2c_write(cam, 0x12, 0x8d); |
103 | err += sn9c102_i2c_write(cam, 0x12, 0x0d); | 86 | err += sn9c102_i2c_write(cam, 0x12, 0x0d); |
@@ -425,15 +408,14 @@ int sn9c102_probe_ov7630(struct sn9c102_device* cam) | |||
425 | switch (sn9c102_get_bridge(cam)) { | 408 | switch (sn9c102_get_bridge(cam)) { |
426 | case BRIDGE_SN9C101: | 409 | case BRIDGE_SN9C101: |
427 | case BRIDGE_SN9C102: | 410 | case BRIDGE_SN9C102: |
428 | err += sn9c102_write_reg(cam, 0x01, 0x01); | 411 | err = sn9c102_write_const_regs(cam, {0x01, 0x01}, |
429 | err += sn9c102_write_reg(cam, 0x00, 0x01); | 412 | {0x00, 0x01}, {0x28, 0x17}); |
430 | err += sn9c102_write_reg(cam, 0x28, 0x17); | 413 | |
431 | break; | 414 | break; |
432 | case BRIDGE_SN9C103: /* do _not_ change anything! */ | 415 | case BRIDGE_SN9C103: /* do _not_ change anything! */ |
433 | err += sn9c102_write_reg(cam, 0x09, 0x01); | 416 | err = sn9c102_write_const_regs(cam, {0x09, 0x01}, |
434 | err += sn9c102_write_reg(cam, 0x42, 0x01); | 417 | {0x42, 0x01}, {0x28, 0x17}, |
435 | err += sn9c102_write_reg(cam, 0x28, 0x17); | 418 | {0x44, 0x02}); |
436 | err += sn9c102_write_reg(cam, 0x44, 0x02); | ||
437 | pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a); | 419 | pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a); |
438 | if (err || pid < 0) { /* try a different initialization */ | 420 | if (err || pid < 0) { /* try a different initialization */ |
439 | err = sn9c102_write_reg(cam, 0x01, 0x01); | 421 | err = sn9c102_write_reg(cam, 0x01, 0x01); |
diff --git a/drivers/media/video/sn9c102/sn9c102_ov7660.c b/drivers/media/video/sn9c102/sn9c102_ov7660.c index eef90ff3d474..c898e948fe8d 100644 --- a/drivers/media/video/sn9c102/sn9c102_ov7660.c +++ b/drivers/media/video/sn9c102/sn9c102_ov7660.c | |||
@@ -26,153 +26,80 @@ static int ov7660_init(struct sn9c102_device* cam) | |||
26 | { | 26 | { |
27 | int err = 0; | 27 | int err = 0; |
28 | 28 | ||
29 | err += sn9c102_write_reg(cam, 0x40, 0x02); | 29 | err = sn9c102_write_const_regs(cam, {0x40, 0x02}, {0x00, 0x03}, |
30 | err += sn9c102_write_reg(cam, 0x00, 0x03); | 30 | {0x1a, 0x04}, {0x03, 0x10}, |
31 | err += sn9c102_write_reg(cam, 0x1a, 0x04); | 31 | {0x08, 0x14}, {0x20, 0x17}, |
32 | err += sn9c102_write_reg(cam, 0x03, 0x10); | 32 | {0x8b, 0x18}, {0x00, 0x19}, |
33 | err += sn9c102_write_reg(cam, 0x08, 0x14); | 33 | {0x1d, 0x1a}, {0x10, 0x1b}, |
34 | err += sn9c102_write_reg(cam, 0x20, 0x17); | 34 | {0x02, 0x1c}, {0x03, 0x1d}, |
35 | err += sn9c102_write_reg(cam, 0x8b, 0x18); | 35 | {0x0f, 0x1e}, {0x0c, 0x1f}, |
36 | err += sn9c102_write_reg(cam, 0x00, 0x19); | 36 | {0x00, 0x20}, {0x29, 0x21}, |
37 | err += sn9c102_write_reg(cam, 0x1d, 0x1a); | 37 | {0x40, 0x22}, {0x54, 0x23}, |
38 | err += sn9c102_write_reg(cam, 0x10, 0x1b); | 38 | {0x66, 0x24}, {0x76, 0x25}, |
39 | err += sn9c102_write_reg(cam, 0x02, 0x1c); | 39 | {0x85, 0x26}, {0x94, 0x27}, |
40 | err += sn9c102_write_reg(cam, 0x03, 0x1d); | 40 | {0xa1, 0x28}, {0xae, 0x29}, |
41 | err += sn9c102_write_reg(cam, 0x0f, 0x1e); | 41 | {0xbb, 0x2a}, {0xc7, 0x2b}, |
42 | err += sn9c102_write_reg(cam, 0x0c, 0x1f); | 42 | {0xd3, 0x2c}, {0xde, 0x2d}, |
43 | err += sn9c102_write_reg(cam, 0x00, 0x20); | 43 | {0xea, 0x2e}, {0xf4, 0x2f}, |
44 | err += sn9c102_write_reg(cam, 0x29, 0x21); | 44 | {0xff, 0x30}, {0x00, 0x3F}, |
45 | err += sn9c102_write_reg(cam, 0x40, 0x22); | 45 | {0xC7, 0x40}, {0x01, 0x41}, |
46 | err += sn9c102_write_reg(cam, 0x54, 0x23); | 46 | {0x44, 0x42}, {0x00, 0x43}, |
47 | err += sn9c102_write_reg(cam, 0x66, 0x24); | 47 | {0x44, 0x44}, {0x00, 0x45}, |
48 | err += sn9c102_write_reg(cam, 0x76, 0x25); | 48 | {0x44, 0x46}, {0x00, 0x47}, |
49 | err += sn9c102_write_reg(cam, 0x85, 0x26); | 49 | {0xC7, 0x48}, {0x01, 0x49}, |
50 | err += sn9c102_write_reg(cam, 0x94, 0x27); | 50 | {0xC7, 0x4A}, {0x01, 0x4B}, |
51 | err += sn9c102_write_reg(cam, 0xa1, 0x28); | 51 | {0xC7, 0x4C}, {0x01, 0x4D}, |
52 | err += sn9c102_write_reg(cam, 0xae, 0x29); | 52 | {0x44, 0x4E}, {0x00, 0x4F}, |
53 | err += sn9c102_write_reg(cam, 0xbb, 0x2a); | 53 | {0x44, 0x50}, {0x00, 0x51}, |
54 | err += sn9c102_write_reg(cam, 0xc7, 0x2b); | 54 | {0x44, 0x52}, {0x00, 0x53}, |
55 | err += sn9c102_write_reg(cam, 0xd3, 0x2c); | 55 | {0xC7, 0x54}, {0x01, 0x55}, |
56 | err += sn9c102_write_reg(cam, 0xde, 0x2d); | 56 | {0xC7, 0x56}, {0x01, 0x57}, |
57 | err += sn9c102_write_reg(cam, 0xea, 0x2e); | 57 | {0xC7, 0x58}, {0x01, 0x59}, |
58 | err += sn9c102_write_reg(cam, 0xf4, 0x2f); | 58 | {0x44, 0x5A}, {0x00, 0x5B}, |
59 | err += sn9c102_write_reg(cam, 0xff, 0x30); | 59 | {0x44, 0x5C}, {0x00, 0x5D}, |
60 | err += sn9c102_write_reg(cam, 0x00, 0x3F); | 60 | {0x44, 0x5E}, {0x00, 0x5F}, |
61 | err += sn9c102_write_reg(cam, 0xC7, 0x40); | 61 | {0xC7, 0x60}, {0x01, 0x61}, |
62 | err += sn9c102_write_reg(cam, 0x01, 0x41); | 62 | {0xC7, 0x62}, {0x01, 0x63}, |
63 | err += sn9c102_write_reg(cam, 0x44, 0x42); | 63 | {0xC7, 0x64}, {0x01, 0x65}, |
64 | err += sn9c102_write_reg(cam, 0x00, 0x43); | 64 | {0x44, 0x66}, {0x00, 0x67}, |
65 | err += sn9c102_write_reg(cam, 0x44, 0x44); | 65 | {0x44, 0x68}, {0x00, 0x69}, |
66 | err += sn9c102_write_reg(cam, 0x00, 0x45); | 66 | {0x44, 0x6A}, {0x00, 0x6B}, |
67 | err += sn9c102_write_reg(cam, 0x44, 0x46); | 67 | {0xC7, 0x6C}, {0x01, 0x6D}, |
68 | err += sn9c102_write_reg(cam, 0x00, 0x47); | 68 | {0xC7, 0x6E}, {0x01, 0x6F}, |
69 | err += sn9c102_write_reg(cam, 0xC7, 0x48); | 69 | {0xC7, 0x70}, {0x01, 0x71}, |
70 | err += sn9c102_write_reg(cam, 0x01, 0x49); | 70 | {0x44, 0x72}, {0x00, 0x73}, |
71 | err += sn9c102_write_reg(cam, 0xC7, 0x4A); | 71 | {0x44, 0x74}, {0x00, 0x75}, |
72 | err += sn9c102_write_reg(cam, 0x01, 0x4B); | 72 | {0x44, 0x76}, {0x00, 0x77}, |
73 | err += sn9c102_write_reg(cam, 0xC7, 0x4C); | 73 | {0xC7, 0x78}, {0x01, 0x79}, |
74 | err += sn9c102_write_reg(cam, 0x01, 0x4D); | 74 | {0xC7, 0x7A}, {0x01, 0x7B}, |
75 | err += sn9c102_write_reg(cam, 0x44, 0x4E); | 75 | {0xC7, 0x7C}, {0x01, 0x7D}, |
76 | err += sn9c102_write_reg(cam, 0x00, 0x4F); | 76 | {0x44, 0x7E}, {0x00, 0x7F}, |
77 | err += sn9c102_write_reg(cam, 0x44, 0x50); | 77 | {0x14, 0x84}, {0x00, 0x85}, |
78 | err += sn9c102_write_reg(cam, 0x00, 0x51); | 78 | {0x27, 0x86}, {0x00, 0x87}, |
79 | err += sn9c102_write_reg(cam, 0x44, 0x52); | 79 | {0x07, 0x88}, {0x00, 0x89}, |
80 | err += sn9c102_write_reg(cam, 0x00, 0x53); | 80 | {0xEC, 0x8A}, {0x0f, 0x8B}, |
81 | err += sn9c102_write_reg(cam, 0xC7, 0x54); | 81 | {0xD8, 0x8C}, {0x0f, 0x8D}, |
82 | err += sn9c102_write_reg(cam, 0x01, 0x55); | 82 | {0x3D, 0x8E}, {0x00, 0x8F}, |
83 | err += sn9c102_write_reg(cam, 0xC7, 0x56); | 83 | {0x3D, 0x90}, {0x00, 0x91}, |
84 | err += sn9c102_write_reg(cam, 0x01, 0x57); | 84 | {0xCD, 0x92}, {0x0f, 0x93}, |
85 | err += sn9c102_write_reg(cam, 0xC7, 0x58); | 85 | {0xf7, 0x94}, {0x0f, 0x95}, |
86 | err += sn9c102_write_reg(cam, 0x01, 0x59); | 86 | {0x0C, 0x96}, {0x00, 0x97}, |
87 | err += sn9c102_write_reg(cam, 0x44, 0x5A); | 87 | {0x00, 0x98}, {0x66, 0x99}, |
88 | err += sn9c102_write_reg(cam, 0x00, 0x5B); | 88 | {0x05, 0x9A}, {0x00, 0x9B}, |
89 | err += sn9c102_write_reg(cam, 0x44, 0x5C); | 89 | {0x04, 0x9C}, {0x00, 0x9D}, |
90 | err += sn9c102_write_reg(cam, 0x00, 0x5D); | 90 | {0x08, 0x9E}, {0x00, 0x9F}, |
91 | err += sn9c102_write_reg(cam, 0x44, 0x5E); | 91 | {0x2D, 0xC0}, {0x2D, 0xC1}, |
92 | err += sn9c102_write_reg(cam, 0x00, 0x5F); | 92 | {0x3A, 0xC2}, {0x05, 0xC3}, |
93 | err += sn9c102_write_reg(cam, 0xC7, 0x60); | 93 | {0x04, 0xC4}, {0x3F, 0xC5}, |
94 | err += sn9c102_write_reg(cam, 0x01, 0x61); | 94 | {0x00, 0xC6}, {0x00, 0xC7}, |
95 | err += sn9c102_write_reg(cam, 0xC7, 0x62); | 95 | {0x50, 0xC8}, {0x3C, 0xC9}, |
96 | err += sn9c102_write_reg(cam, 0x01, 0x63); | 96 | {0x28, 0xCA}, {0xD8, 0xCB}, |
97 | err += sn9c102_write_reg(cam, 0xC7, 0x64); | 97 | {0x14, 0xCC}, {0xEC, 0xCD}, |
98 | err += sn9c102_write_reg(cam, 0x01, 0x65); | 98 | {0x32, 0xCE}, {0xDD, 0xCF}, |
99 | err += sn9c102_write_reg(cam, 0x44, 0x66); | 99 | {0x32, 0xD0}, {0xDD, 0xD1}, |
100 | err += sn9c102_write_reg(cam, 0x00, 0x67); | 100 | {0x6A, 0xD2}, {0x50, 0xD3}, |
101 | err += sn9c102_write_reg(cam, 0x44, 0x68); | 101 | {0x00, 0xD4}, {0x00, 0xD5}, |
102 | err += sn9c102_write_reg(cam, 0x00, 0x69); | 102 | {0x00, 0xD6}); |
103 | err += sn9c102_write_reg(cam, 0x44, 0x6A); | ||
104 | err += sn9c102_write_reg(cam, 0x00, 0x6B); | ||
105 | err += sn9c102_write_reg(cam, 0xC7, 0x6C); | ||
106 | err += sn9c102_write_reg(cam, 0x01, 0x6D); | ||
107 | err += sn9c102_write_reg(cam, 0xC7, 0x6E); | ||
108 | err += sn9c102_write_reg(cam, 0x01, 0x6F); | ||
109 | err += sn9c102_write_reg(cam, 0xC7, 0x70); | ||
110 | err += sn9c102_write_reg(cam, 0x01, 0x71); | ||
111 | err += sn9c102_write_reg(cam, 0x44, 0x72); | ||
112 | err += sn9c102_write_reg(cam, 0x00, 0x73); | ||
113 | err += sn9c102_write_reg(cam, 0x44, 0x74); | ||
114 | err += sn9c102_write_reg(cam, 0x00, 0x75); | ||
115 | err += sn9c102_write_reg(cam, 0x44, 0x76); | ||
116 | err += sn9c102_write_reg(cam, 0x00, 0x77); | ||
117 | err += sn9c102_write_reg(cam, 0xC7, 0x78); | ||
118 | err += sn9c102_write_reg(cam, 0x01, 0x79); | ||
119 | err += sn9c102_write_reg(cam, 0xC7, 0x7A); | ||
120 | err += sn9c102_write_reg(cam, 0x01, 0x7B); | ||
121 | err += sn9c102_write_reg(cam, 0xC7, 0x7C); | ||
122 | err += sn9c102_write_reg(cam, 0x01, 0x7D); | ||
123 | err += sn9c102_write_reg(cam, 0x44, 0x7E); | ||
124 | err += sn9c102_write_reg(cam, 0x00, 0x7F); | ||
125 | err += sn9c102_write_reg(cam, 0x14, 0x84); | ||
126 | err += sn9c102_write_reg(cam, 0x00, 0x85); | ||
127 | err += sn9c102_write_reg(cam, 0x27, 0x86); | ||
128 | err += sn9c102_write_reg(cam, 0x00, 0x87); | ||
129 | err += sn9c102_write_reg(cam, 0x07, 0x88); | ||
130 | err += sn9c102_write_reg(cam, 0x00, 0x89); | ||
131 | err += sn9c102_write_reg(cam, 0xEC, 0x8A); | ||
132 | err += sn9c102_write_reg(cam, 0x0f, 0x8B); | ||
133 | err += sn9c102_write_reg(cam, 0xD8, 0x8C); | ||
134 | err += sn9c102_write_reg(cam, 0x0f, 0x8D); | ||
135 | err += sn9c102_write_reg(cam, 0x3D, 0x8E); | ||
136 | err += sn9c102_write_reg(cam, 0x00, 0x8F); | ||
137 | err += sn9c102_write_reg(cam, 0x3D, 0x90); | ||
138 | err += sn9c102_write_reg(cam, 0x00, 0x91); | ||
139 | err += sn9c102_write_reg(cam, 0xCD, 0x92); | ||
140 | err += sn9c102_write_reg(cam, 0x0f, 0x93); | ||
141 | err += sn9c102_write_reg(cam, 0xf7, 0x94); | ||
142 | err += sn9c102_write_reg(cam, 0x0f, 0x95); | ||
143 | err += sn9c102_write_reg(cam, 0x0C, 0x96); | ||
144 | err += sn9c102_write_reg(cam, 0x00, 0x97); | ||
145 | err += sn9c102_write_reg(cam, 0x00, 0x98); | ||
146 | err += sn9c102_write_reg(cam, 0x66, 0x99); | ||
147 | err += sn9c102_write_reg(cam, 0x05, 0x9A); | ||
148 | err += sn9c102_write_reg(cam, 0x00, 0x9B); | ||
149 | err += sn9c102_write_reg(cam, 0x04, 0x9C); | ||
150 | err += sn9c102_write_reg(cam, 0x00, 0x9D); | ||
151 | err += sn9c102_write_reg(cam, 0x08, 0x9E); | ||
152 | err += sn9c102_write_reg(cam, 0x00, 0x9F); | ||
153 | err += sn9c102_write_reg(cam, 0x2D, 0xC0); | ||
154 | err += sn9c102_write_reg(cam, 0x2D, 0xC1); | ||
155 | err += sn9c102_write_reg(cam, 0x3A, 0xC2); | ||
156 | err += sn9c102_write_reg(cam, 0x05, 0xC3); | ||
157 | err += sn9c102_write_reg(cam, 0x04, 0xC4); | ||
158 | err += sn9c102_write_reg(cam, 0x3F, 0xC5); | ||
159 | err += sn9c102_write_reg(cam, 0x00, 0xC6); | ||
160 | err += sn9c102_write_reg(cam, 0x00, 0xC7); | ||
161 | err += sn9c102_write_reg(cam, 0x50, 0xC8); | ||
162 | err += sn9c102_write_reg(cam, 0x3C, 0xC9); | ||
163 | err += sn9c102_write_reg(cam, 0x28, 0xCA); | ||
164 | err += sn9c102_write_reg(cam, 0xD8, 0xCB); | ||
165 | err += sn9c102_write_reg(cam, 0x14, 0xCC); | ||
166 | err += sn9c102_write_reg(cam, 0xEC, 0xCD); | ||
167 | err += sn9c102_write_reg(cam, 0x32, 0xCE); | ||
168 | err += sn9c102_write_reg(cam, 0xDD, 0xCF); | ||
169 | err += sn9c102_write_reg(cam, 0x32, 0xD0); | ||
170 | err += sn9c102_write_reg(cam, 0xDD, 0xD1); | ||
171 | err += sn9c102_write_reg(cam, 0x6A, 0xD2); | ||
172 | err += sn9c102_write_reg(cam, 0x50, 0xD3); | ||
173 | err += sn9c102_write_reg(cam, 0x00, 0xD4); | ||
174 | err += sn9c102_write_reg(cam, 0x00, 0xD5); | ||
175 | err += sn9c102_write_reg(cam, 0x00, 0xD6); | ||
176 | 103 | ||
177 | err += sn9c102_i2c_write(cam, 0x12, 0x80); | 104 | err += sn9c102_i2c_write(cam, 0x12, 0x80); |
178 | err += sn9c102_i2c_write(cam, 0x11, 0x09); | 105 | err += sn9c102_i2c_write(cam, 0x11, 0x09); |
@@ -569,13 +496,11 @@ static struct sn9c102_sensor ov7660 = { | |||
569 | 496 | ||
570 | int sn9c102_probe_ov7660(struct sn9c102_device* cam) | 497 | int sn9c102_probe_ov7660(struct sn9c102_device* cam) |
571 | { | 498 | { |
572 | int pid, ver, err = 0; | 499 | int pid, ver, err; |
573 | 500 | ||
574 | err += sn9c102_write_reg(cam, 0x01, 0xf1); | 501 | err = sn9c102_write_const_regs(cam, {0x01, 0xf1}, {0x00, 0xf1}, |
575 | err += sn9c102_write_reg(cam, 0x00, 0xf1); | 502 | {0x01, 0x01}, {0x00, 0x01}, |
576 | err += sn9c102_write_reg(cam, 0x01, 0x01); | 503 | {0x28, 0x17}); |
577 | err += sn9c102_write_reg(cam, 0x00, 0x01); | ||
578 | err += sn9c102_write_reg(cam, 0x28, 0x17); | ||
579 | 504 | ||
580 | pid = sn9c102_i2c_try_read(cam, &ov7660, 0x0a); | 505 | pid = sn9c102_i2c_try_read(cam, &ov7660, 0x0a); |
581 | ver = sn9c102_i2c_try_read(cam, &ov7660, 0x0b); | 506 | ver = sn9c102_i2c_try_read(cam, &ov7660, 0x0b); |
diff --git a/drivers/media/video/sn9c102/sn9c102_pas106b.c b/drivers/media/video/sn9c102/sn9c102_pas106b.c index a67057210cab..67151964801f 100644 --- a/drivers/media/video/sn9c102/sn9c102_pas106b.c +++ b/drivers/media/video/sn9c102/sn9c102_pas106b.c | |||
@@ -27,12 +27,9 @@ static int pas106b_init(struct sn9c102_device* cam) | |||
27 | { | 27 | { |
28 | int err = 0; | 28 | int err = 0; |
29 | 29 | ||
30 | err += sn9c102_write_reg(cam, 0x00, 0x10); | 30 | err = sn9c102_write_const_regs(cam, {0x00, 0x10}, {0x00, 0x11}, |
31 | err += sn9c102_write_reg(cam, 0x00, 0x11); | 31 | {0x00, 0x14}, {0x20, 0x17}, |
32 | err += sn9c102_write_reg(cam, 0x00, 0x14); | 32 | {0x20, 0x19}, {0x09, 0x18}); |
33 | err += sn9c102_write_reg(cam, 0x20, 0x17); | ||
34 | err += sn9c102_write_reg(cam, 0x20, 0x19); | ||
35 | err += sn9c102_write_reg(cam, 0x09, 0x18); | ||
36 | 33 | ||
37 | err += sn9c102_i2c_write(cam, 0x02, 0x0c); | 34 | err += sn9c102_i2c_write(cam, 0x02, 0x0c); |
38 | err += sn9c102_i2c_write(cam, 0x05, 0x5a); | 35 | err += sn9c102_i2c_write(cam, 0x05, 0x5a); |
@@ -276,16 +273,17 @@ static struct sn9c102_sensor pas106b = { | |||
276 | 273 | ||
277 | int sn9c102_probe_pas106b(struct sn9c102_device* cam) | 274 | int sn9c102_probe_pas106b(struct sn9c102_device* cam) |
278 | { | 275 | { |
279 | int r0 = 0, r1 = 0, err = 0; | 276 | int r0 = 0, r1 = 0, err; |
280 | unsigned int pid = 0; | 277 | unsigned int pid = 0; |
281 | 278 | ||
282 | /* | 279 | /* |
283 | Minimal initialization to enable the I2C communication | 280 | Minimal initialization to enable the I2C communication |
284 | NOTE: do NOT change the values! | 281 | NOTE: do NOT change the values! |
285 | */ | 282 | */ |
286 | err += sn9c102_write_reg(cam, 0x01, 0x01); /* sensor power down */ | 283 | err = sn9c102_write_const_regs(cam, |
287 | err += sn9c102_write_reg(cam, 0x00, 0x01); /* sensor power on */ | 284 | {0x01, 0x01}, /* sensor power down */ |
288 | err += sn9c102_write_reg(cam, 0x28, 0x17); /* sensor clock at 24 MHz */ | 285 | {0x00, 0x01}, /* sensor power on */ |
286 | {0x28, 0x17});/* sensor clock 24 MHz */ | ||
289 | if (err) | 287 | if (err) |
290 | return -EIO; | 288 | return -EIO; |
291 | 289 | ||
diff --git a/drivers/media/video/sn9c102/sn9c102_pas202bcb.c b/drivers/media/video/sn9c102/sn9c102_pas202bcb.c index 4447d7cb1e92..c1b8d6b63b47 100644 --- a/drivers/media/video/sn9c102/sn9c102_pas202bcb.c +++ b/drivers/media/video/sn9c102/sn9c102_pas202bcb.c | |||
@@ -35,47 +35,29 @@ static int pas202bcb_init(struct sn9c102_device* cam) | |||
35 | switch (sn9c102_get_bridge(cam)) { | 35 | switch (sn9c102_get_bridge(cam)) { |
36 | case BRIDGE_SN9C101: | 36 | case BRIDGE_SN9C101: |
37 | case BRIDGE_SN9C102: | 37 | case BRIDGE_SN9C102: |
38 | err += sn9c102_write_reg(cam, 0x00, 0x10); | 38 | err = sn9c102_write_const_regs(cam, {0x00, 0x10}, |
39 | err += sn9c102_write_reg(cam, 0x00, 0x11); | 39 | {0x00, 0x11}, {0x00, 0x14}, |
40 | err += sn9c102_write_reg(cam, 0x00, 0x14); | 40 | {0x20, 0x17}, {0x30, 0x19}, |
41 | err += sn9c102_write_reg(cam, 0x20, 0x17); | 41 | {0x09, 0x18}); |
42 | err += sn9c102_write_reg(cam, 0x30, 0x19); | ||
43 | err += sn9c102_write_reg(cam, 0x09, 0x18); | ||
44 | break; | 42 | break; |
45 | case BRIDGE_SN9C103: | 43 | case BRIDGE_SN9C103: |
46 | err += sn9c102_write_reg(cam, 0x00, 0x02); | 44 | err = sn9c102_write_const_regs(cam, {0x00, 0x02}, |
47 | err += sn9c102_write_reg(cam, 0x00, 0x03); | 45 | {0x00, 0x03}, {0x1a, 0x04}, |
48 | err += sn9c102_write_reg(cam, 0x1a, 0x04); | 46 | {0x20, 0x05}, {0x20, 0x06}, |
49 | err += sn9c102_write_reg(cam, 0x20, 0x05); | 47 | {0x20, 0x07}, {0x00, 0x10}, |
50 | err += sn9c102_write_reg(cam, 0x20, 0x06); | 48 | {0x00, 0x11}, {0x00, 0x14}, |
51 | err += sn9c102_write_reg(cam, 0x20, 0x07); | 49 | {0x20, 0x17}, {0x30, 0x19}, |
52 | err += sn9c102_write_reg(cam, 0x00, 0x10); | 50 | {0x09, 0x18}, {0x02, 0x1c}, |
53 | err += sn9c102_write_reg(cam, 0x00, 0x11); | 51 | {0x03, 0x1d}, {0x0f, 0x1e}, |
54 | err += sn9c102_write_reg(cam, 0x00, 0x14); | 52 | {0x0c, 0x1f}, {0x00, 0x20}, |
55 | err += sn9c102_write_reg(cam, 0x20, 0x17); | 53 | {0x10, 0x21}, {0x20, 0x22}, |
56 | err += sn9c102_write_reg(cam, 0x30, 0x19); | 54 | {0x30, 0x23}, {0x40, 0x24}, |
57 | err += sn9c102_write_reg(cam, 0x09, 0x18); | 55 | {0x50, 0x25}, {0x60, 0x26}, |
58 | err += sn9c102_write_reg(cam, 0x02, 0x1c); | 56 | {0x70, 0x27}, {0x80, 0x28}, |
59 | err += sn9c102_write_reg(cam, 0x03, 0x1d); | 57 | {0x90, 0x29}, {0xa0, 0x2a}, |
60 | err += sn9c102_write_reg(cam, 0x0f, 0x1e); | 58 | {0xb0, 0x2b}, {0xc0, 0x2c}, |
61 | err += sn9c102_write_reg(cam, 0x0c, 0x1f); | 59 | {0xd0, 0x2d}, {0xe0, 0x2e}, |
62 | err += sn9c102_write_reg(cam, 0x00, 0x20); | 60 | {0xf0, 0x2f}, {0xff, 0x30}); |
63 | err += sn9c102_write_reg(cam, 0x10, 0x21); | ||
64 | err += sn9c102_write_reg(cam, 0x20, 0x22); | ||
65 | err += sn9c102_write_reg(cam, 0x30, 0x23); | ||
66 | err += sn9c102_write_reg(cam, 0x40, 0x24); | ||
67 | err += sn9c102_write_reg(cam, 0x50, 0x25); | ||
68 | err += sn9c102_write_reg(cam, 0x60, 0x26); | ||
69 | err += sn9c102_write_reg(cam, 0x70, 0x27); | ||
70 | err += sn9c102_write_reg(cam, 0x80, 0x28); | ||
71 | err += sn9c102_write_reg(cam, 0x90, 0x29); | ||
72 | err += sn9c102_write_reg(cam, 0xa0, 0x2a); | ||
73 | err += sn9c102_write_reg(cam, 0xb0, 0x2b); | ||
74 | err += sn9c102_write_reg(cam, 0xc0, 0x2c); | ||
75 | err += sn9c102_write_reg(cam, 0xd0, 0x2d); | ||
76 | err += sn9c102_write_reg(cam, 0xe0, 0x2e); | ||
77 | err += sn9c102_write_reg(cam, 0xf0, 0x2f); | ||
78 | err += sn9c102_write_reg(cam, 0xff, 0x30); | ||
79 | break; | 61 | break; |
80 | default: | 62 | default: |
81 | break; | 63 | break; |
@@ -325,15 +307,15 @@ int sn9c102_probe_pas202bcb(struct sn9c102_device* cam) | |||
325 | switch (sn9c102_get_bridge(cam)) { | 307 | switch (sn9c102_get_bridge(cam)) { |
326 | case BRIDGE_SN9C101: | 308 | case BRIDGE_SN9C101: |
327 | case BRIDGE_SN9C102: | 309 | case BRIDGE_SN9C102: |
328 | err += sn9c102_write_reg(cam, 0x01, 0x01); /* power down */ | 310 | err = sn9c102_write_const_regs(cam, |
329 | err += sn9c102_write_reg(cam, 0x40, 0x01); /* power on */ | 311 | {0x01, 0x01}, /* power down */ |
330 | err += sn9c102_write_reg(cam, 0x28, 0x17); /* clock 24 MHz */ | 312 | {0x40, 0x01}, /* power on */ |
313 | {0x28, 0x17});/* clock 24 MHz */ | ||
331 | break; | 314 | break; |
332 | case BRIDGE_SN9C103: /* do _not_ change anything! */ | 315 | case BRIDGE_SN9C103: /* do _not_ change anything! */ |
333 | err += sn9c102_write_reg(cam, 0x09, 0x01); | 316 | err = sn9c102_write_const_regs(cam, {0x09, 0x01}, |
334 | err += sn9c102_write_reg(cam, 0x44, 0x01); | 317 | {0x44, 0x01}, {0x44, 0x02}, |
335 | err += sn9c102_write_reg(cam, 0x44, 0x02); | 318 | {0x29, 0x17}); |
336 | err += sn9c102_write_reg(cam, 0x29, 0x17); | ||
337 | break; | 319 | break; |
338 | default: | 320 | default: |
339 | break; | 321 | break; |
diff --git a/drivers/media/video/sn9c102/sn9c102_sensor.h b/drivers/media/video/sn9c102/sn9c102_sensor.h index 05f2942639c3..1bbf64c897a2 100644 --- a/drivers/media/video/sn9c102/sn9c102_sensor.h +++ b/drivers/media/video/sn9c102/sn9c102_sensor.h | |||
@@ -114,9 +114,17 @@ extern int sn9c102_i2c_write(struct sn9c102_device*, u8 address, u8 value); | |||
114 | extern int sn9c102_i2c_read(struct sn9c102_device*, u8 address); | 114 | extern int sn9c102_i2c_read(struct sn9c102_device*, u8 address); |
115 | 115 | ||
116 | /* I/O on registers in the bridge. Could be used by the sensor methods too */ | 116 | /* I/O on registers in the bridge. Could be used by the sensor methods too */ |
117 | extern int sn9c102_write_regs(struct sn9c102_device*, u8* buff, u16 index); | ||
118 | extern int sn9c102_write_reg(struct sn9c102_device*, u8 value, u16 index); | ||
119 | extern int sn9c102_pread_reg(struct sn9c102_device*, u16 index); | 117 | extern int sn9c102_pread_reg(struct sn9c102_device*, u16 index); |
118 | extern int sn9c102_write_reg(struct sn9c102_device*, u8 value, u16 index); | ||
119 | extern int sn9c102_write_regs(struct sn9c102_device*, const u8 valreg[][2], | ||
120 | int count); | ||
121 | /* | ||
122 | * Write multiple registers with constant values. For example: | ||
123 | * sn9c102_write_const_regs(cam, {0x00, 0x14}, {0x60, 0x17}, {0x0f, 0x18}); | ||
124 | */ | ||
125 | #define sn9c102_write_const_regs(device, data...) \ | ||
126 | ({ const static u8 _data[][2] = {data}; \ | ||
127 | sn9c102_write_regs(device, _data, ARRAY_SIZE(_data)); }) | ||
120 | 128 | ||
121 | /*****************************************************************************/ | 129 | /*****************************************************************************/ |
122 | 130 | ||
diff --git a/drivers/media/video/sn9c102/sn9c102_tas5110c1b.c b/drivers/media/video/sn9c102/sn9c102_tas5110c1b.c index a265767e5f31..0e7ec8662c70 100644 --- a/drivers/media/video/sn9c102/sn9c102_tas5110c1b.c +++ b/drivers/media/video/sn9c102/sn9c102_tas5110c1b.c | |||
@@ -26,14 +26,10 @@ static int tas5110c1b_init(struct sn9c102_device* cam) | |||
26 | { | 26 | { |
27 | int err = 0; | 27 | int err = 0; |
28 | 28 | ||
29 | err += sn9c102_write_reg(cam, 0x01, 0x01); | 29 | err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x44, 0x01}, |
30 | err += sn9c102_write_reg(cam, 0x44, 0x01); | 30 | {0x00, 0x10}, {0x00, 0x11}, |
31 | err += sn9c102_write_reg(cam, 0x00, 0x10); | 31 | {0x0a, 0x14}, {0x60, 0x17}, |
32 | err += sn9c102_write_reg(cam, 0x00, 0x11); | 32 | {0x06, 0x18}, {0xfb, 0x19}); |
33 | err += sn9c102_write_reg(cam, 0x0a, 0x14); | ||
34 | err += sn9c102_write_reg(cam, 0x60, 0x17); | ||
35 | err += sn9c102_write_reg(cam, 0x06, 0x18); | ||
36 | err += sn9c102_write_reg(cam, 0xfb, 0x19); | ||
37 | 33 | ||
38 | err += sn9c102_i2c_write(cam, 0xc0, 0x80); | 34 | err += sn9c102_i2c_write(cam, 0xc0, 0x80); |
39 | 35 | ||
diff --git a/drivers/media/video/sn9c102/sn9c102_tas5110d.c b/drivers/media/video/sn9c102/sn9c102_tas5110d.c index 4681cfa1bf57..83a39e8b5e71 100644 --- a/drivers/media/video/sn9c102/sn9c102_tas5110d.c +++ b/drivers/media/video/sn9c102/sn9c102_tas5110d.c | |||
@@ -24,14 +24,11 @@ | |||
24 | 24 | ||
25 | static int tas5110d_init(struct sn9c102_device* cam) | 25 | static int tas5110d_init(struct sn9c102_device* cam) |
26 | { | 26 | { |
27 | int err = 0; | 27 | int err; |
28 | 28 | ||
29 | err += sn9c102_write_reg(cam, 0x01, 0x01); | 29 | err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x04, 0x01}, |
30 | err += sn9c102_write_reg(cam, 0x04, 0x01); | 30 | {0x0a, 0x14}, {0x60, 0x17}, |
31 | err += sn9c102_write_reg(cam, 0x0a, 0x14); | 31 | {0x06, 0x18}, {0xfb, 0x19}); |
32 | err += sn9c102_write_reg(cam, 0x60, 0x17); | ||
33 | err += sn9c102_write_reg(cam, 0x06, 0x18); | ||
34 | err += sn9c102_write_reg(cam, 0xfb, 0x19); | ||
35 | 32 | ||
36 | err += sn9c102_i2c_write(cam, 0x9a, 0xca); | 33 | err += sn9c102_i2c_write(cam, 0x9a, 0xca); |
37 | 34 | ||
diff --git a/drivers/media/video/sn9c102/sn9c102_tas5130d1b.c b/drivers/media/video/sn9c102/sn9c102_tas5130d1b.c index a7f711396152..50406503fc40 100644 --- a/drivers/media/video/sn9c102/sn9c102_tas5130d1b.c +++ b/drivers/media/video/sn9c102/sn9c102_tas5130d1b.c | |||
@@ -24,16 +24,12 @@ | |||
24 | 24 | ||
25 | static int tas5130d1b_init(struct sn9c102_device* cam) | 25 | static int tas5130d1b_init(struct sn9c102_device* cam) |
26 | { | 26 | { |
27 | int err = 0; | 27 | int err; |
28 | 28 | ||
29 | err += sn9c102_write_reg(cam, 0x01, 0x01); | 29 | err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x20, 0x17}, |
30 | err += sn9c102_write_reg(cam, 0x20, 0x17); | 30 | {0x04, 0x01}, {0x01, 0x10}, |
31 | err += sn9c102_write_reg(cam, 0x04, 0x01); | 31 | {0x00, 0x11}, {0x00, 0x14}, |
32 | err += sn9c102_write_reg(cam, 0x01, 0x10); | 32 | {0x60, 0x17}, {0x07, 0x18}); |
33 | err += sn9c102_write_reg(cam, 0x00, 0x11); | ||
34 | err += sn9c102_write_reg(cam, 0x00, 0x14); | ||
35 | err += sn9c102_write_reg(cam, 0x60, 0x17); | ||
36 | err += sn9c102_write_reg(cam, 0x07, 0x18); | ||
37 | 33 | ||
38 | return err; | 34 | return err; |
39 | } | 35 | } |