diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/media/video/saa7134/saa7134-reg.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'drivers/media/video/saa7134/saa7134-reg.h')
-rw-r--r-- | drivers/media/video/saa7134/saa7134-reg.h | 366 |
1 files changed, 366 insertions, 0 deletions
diff --git a/drivers/media/video/saa7134/saa7134-reg.h b/drivers/media/video/saa7134/saa7134-reg.h new file mode 100644 index 000000000000..87734f22af7d --- /dev/null +++ b/drivers/media/video/saa7134/saa7134-reg.h | |||
@@ -0,0 +1,366 @@ | |||
1 | /* | ||
2 | * $Id: saa7134-reg.h,v 1.2 2004/09/15 16:15:24 kraxel Exp $ | ||
3 | * | ||
4 | * philips saa7134 registers | ||
5 | */ | ||
6 | |||
7 | /* ------------------------------------------------------------------ */ | ||
8 | /* | ||
9 | * PCI ID's | ||
10 | */ | ||
11 | #ifndef PCI_DEVICE_ID_PHILIPS_SAA7130 | ||
12 | # define PCI_DEVICE_ID_PHILIPS_SAA7130 0x7130 | ||
13 | #endif | ||
14 | #ifndef PCI_DEVICE_ID_PHILIPS_SAA7133 | ||
15 | # define PCI_DEVICE_ID_PHILIPS_SAA7133 0x7133 | ||
16 | #endif | ||
17 | #ifndef PCI_DEVICE_ID_PHILIPS_SAA7134 | ||
18 | # define PCI_DEVICE_ID_PHILIPS_SAA7134 0x7134 | ||
19 | #endif | ||
20 | #ifndef PCI_DEVICE_ID_PHILIPS_SAA7135 | ||
21 | # define PCI_DEVICE_ID_PHILIPS_SAA7135 0x7135 | ||
22 | #endif | ||
23 | |||
24 | /* ------------------------------------------------------------------ */ | ||
25 | /* | ||
26 | * registers -- 32 bit | ||
27 | */ | ||
28 | |||
29 | /* DMA channels, n = 0 ... 6 */ | ||
30 | #define SAA7134_RS_BA1(n) ((0x200 >> 2) + 4*n) | ||
31 | #define SAA7134_RS_BA2(n) ((0x204 >> 2) + 4*n) | ||
32 | #define SAA7134_RS_PITCH(n) ((0x208 >> 2) + 4*n) | ||
33 | #define SAA7134_RS_CONTROL(n) ((0x20c >> 2) + 4*n) | ||
34 | #define SAA7134_RS_CONTROL_WSWAP (0x01 << 25) | ||
35 | #define SAA7134_RS_CONTROL_BSWAP (0x01 << 24) | ||
36 | #define SAA7134_RS_CONTROL_BURST_2 (0x01 << 21) | ||
37 | #define SAA7134_RS_CONTROL_BURST_4 (0x02 << 21) | ||
38 | #define SAA7134_RS_CONTROL_BURST_8 (0x03 << 21) | ||
39 | #define SAA7134_RS_CONTROL_BURST_16 (0x04 << 21) | ||
40 | #define SAA7134_RS_CONTROL_BURST_32 (0x05 << 21) | ||
41 | #define SAA7134_RS_CONTROL_BURST_64 (0x06 << 21) | ||
42 | #define SAA7134_RS_CONTROL_BURST_MAX (0x07 << 21) | ||
43 | #define SAA7134_RS_CONTROL_ME (0x01 << 20) | ||
44 | #define SAA7134_FIFO_SIZE (0x2a0 >> 2) | ||
45 | #define SAA7134_THRESHOULD (0x2a4 >> 2) | ||
46 | |||
47 | /* main control */ | ||
48 | #define SAA7134_MAIN_CTRL (0x2a8 >> 2) | ||
49 | #define SAA7134_MAIN_CTRL_VPLLE (1 << 15) | ||
50 | #define SAA7134_MAIN_CTRL_APLLE (1 << 14) | ||
51 | #define SAA7134_MAIN_CTRL_EXOSC (1 << 13) | ||
52 | #define SAA7134_MAIN_CTRL_EVFE1 (1 << 12) | ||
53 | #define SAA7134_MAIN_CTRL_EVFE2 (1 << 11) | ||
54 | #define SAA7134_MAIN_CTRL_ESFE (1 << 10) | ||
55 | #define SAA7134_MAIN_CTRL_EBADC (1 << 9) | ||
56 | #define SAA7134_MAIN_CTRL_EBDAC (1 << 8) | ||
57 | #define SAA7134_MAIN_CTRL_TE6 (1 << 6) | ||
58 | #define SAA7134_MAIN_CTRL_TE5 (1 << 5) | ||
59 | #define SAA7134_MAIN_CTRL_TE4 (1 << 4) | ||
60 | #define SAA7134_MAIN_CTRL_TE3 (1 << 3) | ||
61 | #define SAA7134_MAIN_CTRL_TE2 (1 << 2) | ||
62 | #define SAA7134_MAIN_CTRL_TE1 (1 << 1) | ||
63 | #define SAA7134_MAIN_CTRL_TE0 (1 << 0) | ||
64 | |||
65 | /* DMA status */ | ||
66 | #define SAA7134_DMA_STATUS (0x2ac >> 2) | ||
67 | |||
68 | /* audio / video status */ | ||
69 | #define SAA7134_AV_STATUS (0x2c0 >> 2) | ||
70 | #define SAA7134_AV_STATUS_STEREO (1 << 17) | ||
71 | #define SAA7134_AV_STATUS_DUAL (1 << 16) | ||
72 | #define SAA7134_AV_STATUS_PILOT (1 << 15) | ||
73 | #define SAA7134_AV_STATUS_SMB (1 << 14) | ||
74 | #define SAA7134_AV_STATUS_DMB (1 << 13) | ||
75 | #define SAA7134_AV_STATUS_VDSP (1 << 12) | ||
76 | #define SAA7134_AV_STATUS_IIC_STATUS (3 << 10) | ||
77 | #define SAA7134_AV_STATUS_MVM (7 << 7) | ||
78 | #define SAA7134_AV_STATUS_FIDT (1 << 6) | ||
79 | #define SAA7134_AV_STATUS_INTL (1 << 5) | ||
80 | #define SAA7134_AV_STATUS_RDCAP (1 << 4) | ||
81 | #define SAA7134_AV_STATUS_PWR_ON (1 << 3) | ||
82 | #define SAA7134_AV_STATUS_LOAD_ERR (1 << 2) | ||
83 | #define SAA7134_AV_STATUS_TRIG_ERR (1 << 1) | ||
84 | #define SAA7134_AV_STATUS_CONF_ERR (1 << 0) | ||
85 | |||
86 | /* interrupt */ | ||
87 | #define SAA7134_IRQ1 (0x2c4 >> 2) | ||
88 | #define SAA7134_IRQ1_INTE_RA3_1 (1 << 25) | ||
89 | #define SAA7134_IRQ1_INTE_RA3_0 (1 << 24) | ||
90 | #define SAA7134_IRQ1_INTE_RA2_3 (1 << 19) | ||
91 | #define SAA7134_IRQ1_INTE_RA2_2 (1 << 18) | ||
92 | #define SAA7134_IRQ1_INTE_RA2_1 (1 << 17) | ||
93 | #define SAA7134_IRQ1_INTE_RA2_0 (1 << 16) | ||
94 | #define SAA7134_IRQ1_INTE_RA1_3 (1 << 11) | ||
95 | #define SAA7134_IRQ1_INTE_RA1_2 (1 << 10) | ||
96 | #define SAA7134_IRQ1_INTE_RA1_1 (1 << 9) | ||
97 | #define SAA7134_IRQ1_INTE_RA1_0 (1 << 8) | ||
98 | #define SAA7134_IRQ1_INTE_RA0_7 (1 << 7) | ||
99 | #define SAA7134_IRQ1_INTE_RA0_6 (1 << 6) | ||
100 | #define SAA7134_IRQ1_INTE_RA0_5 (1 << 5) | ||
101 | #define SAA7134_IRQ1_INTE_RA0_4 (1 << 4) | ||
102 | #define SAA7134_IRQ1_INTE_RA0_3 (1 << 3) | ||
103 | #define SAA7134_IRQ1_INTE_RA0_2 (1 << 2) | ||
104 | #define SAA7134_IRQ1_INTE_RA0_1 (1 << 1) | ||
105 | #define SAA7134_IRQ1_INTE_RA0_0 (1 << 0) | ||
106 | |||
107 | #define SAA7134_IRQ2 (0x2c8 >> 2) | ||
108 | #define SAA7134_IRQ2_INTE_GPIO23A (1 << 17) | ||
109 | #define SAA7134_IRQ2_INTE_GPIO23 (1 << 16) | ||
110 | #define SAA7134_IRQ2_INTE_GPIO22A (1 << 15) | ||
111 | #define SAA7134_IRQ2_INTE_GPIO22 (1 << 14) | ||
112 | #define SAA7134_IRQ2_INTE_GPIO18A (1 << 13) | ||
113 | #define SAA7134_IRQ2_INTE_GPIO18 (1 << 12) | ||
114 | #define SAA7134_IRQ2_INTE_GPIO16 (1 << 11) /* not certain */ | ||
115 | #define SAA7134_IRQ2_INTE_SC2 (1 << 10) | ||
116 | #define SAA7134_IRQ2_INTE_SC1 (1 << 9) | ||
117 | #define SAA7134_IRQ2_INTE_SC0 (1 << 8) | ||
118 | #define SAA7134_IRQ2_INTE_DEC5 (1 << 7) | ||
119 | #define SAA7134_IRQ2_INTE_DEC4 (1 << 6) | ||
120 | #define SAA7134_IRQ2_INTE_DEC3 (1 << 5) | ||
121 | #define SAA7134_IRQ2_INTE_DEC2 (1 << 4) | ||
122 | #define SAA7134_IRQ2_INTE_DEC1 (1 << 3) | ||
123 | #define SAA7134_IRQ2_INTE_DEC0 (1 << 2) | ||
124 | #define SAA7134_IRQ2_INTE_PE (1 << 1) | ||
125 | #define SAA7134_IRQ2_INTE_AR (1 << 0) | ||
126 | |||
127 | #define SAA7134_IRQ_REPORT (0x2cc >> 2) | ||
128 | #define SAA7134_IRQ_REPORT_GPIO23 (1 << 17) | ||
129 | #define SAA7134_IRQ_REPORT_GPIO22 (1 << 16) | ||
130 | #define SAA7134_IRQ_REPORT_GPIO18 (1 << 15) | ||
131 | #define SAA7134_IRQ_REPORT_GPIO16 (1 << 14) /* not certain */ | ||
132 | #define SAA7134_IRQ_REPORT_LOAD_ERR (1 << 13) | ||
133 | #define SAA7134_IRQ_REPORT_CONF_ERR (1 << 12) | ||
134 | #define SAA7134_IRQ_REPORT_TRIG_ERR (1 << 11) | ||
135 | #define SAA7134_IRQ_REPORT_MMC (1 << 10) | ||
136 | #define SAA7134_IRQ_REPORT_FIDT (1 << 9) | ||
137 | #define SAA7134_IRQ_REPORT_INTL (1 << 8) | ||
138 | #define SAA7134_IRQ_REPORT_RDCAP (1 << 7) | ||
139 | #define SAA7134_IRQ_REPORT_PWR_ON (1 << 6) | ||
140 | #define SAA7134_IRQ_REPORT_PE (1 << 5) | ||
141 | #define SAA7134_IRQ_REPORT_AR (1 << 4) | ||
142 | #define SAA7134_IRQ_REPORT_DONE_RA3 (1 << 3) | ||
143 | #define SAA7134_IRQ_REPORT_DONE_RA2 (1 << 2) | ||
144 | #define SAA7134_IRQ_REPORT_DONE_RA1 (1 << 1) | ||
145 | #define SAA7134_IRQ_REPORT_DONE_RA0 (1 << 0) | ||
146 | #define SAA7134_IRQ_STATUS (0x2d0 >> 2) | ||
147 | |||
148 | |||
149 | /* ------------------------------------------------------------------ */ | ||
150 | /* | ||
151 | * registers -- 8 bit | ||
152 | */ | ||
153 | |||
154 | /* video decoder */ | ||
155 | #define SAA7134_INCR_DELAY 0x101 | ||
156 | #define SAA7134_ANALOG_IN_CTRL1 0x102 | ||
157 | #define SAA7134_ANALOG_IN_CTRL2 0x103 | ||
158 | #define SAA7134_ANALOG_IN_CTRL3 0x104 | ||
159 | #define SAA7134_ANALOG_IN_CTRL4 0x105 | ||
160 | #define SAA7134_HSYNC_START 0x106 | ||
161 | #define SAA7134_HSYNC_STOP 0x107 | ||
162 | #define SAA7134_SYNC_CTRL 0x108 | ||
163 | #define SAA7134_LUMA_CTRL 0x109 | ||
164 | #define SAA7134_DEC_LUMA_BRIGHT 0x10a | ||
165 | #define SAA7134_DEC_LUMA_CONTRAST 0x10b | ||
166 | #define SAA7134_DEC_CHROMA_SATURATION 0x10c | ||
167 | #define SAA7134_DEC_CHROMA_HUE 0x10d | ||
168 | #define SAA7134_CHROMA_CTRL1 0x10e | ||
169 | #define SAA7134_CHROMA_GAIN 0x10f | ||
170 | #define SAA7134_CHROMA_CTRL2 0x110 | ||
171 | #define SAA7134_MODE_DELAY_CTRL 0x111 | ||
172 | |||
173 | #define SAA7134_ANALOG_ADC 0x114 | ||
174 | #define SAA7134_VGATE_START 0x115 | ||
175 | #define SAA7134_VGATE_STOP 0x116 | ||
176 | #define SAA7134_MISC_VGATE_MSB 0x117 | ||
177 | #define SAA7134_RAW_DATA_GAIN 0x118 | ||
178 | #define SAA7134_RAW_DATA_OFFSET 0x119 | ||
179 | #define SAA7134_STATUS_VIDEO1 0x11e | ||
180 | #define SAA7134_STATUS_VIDEO2 0x11f | ||
181 | |||
182 | /* video scaler */ | ||
183 | #define SAA7134_SOURCE_TIMING1 0x000 | ||
184 | #define SAA7134_SOURCE_TIMING2 0x001 | ||
185 | #define SAA7134_REGION_ENABLE 0x004 | ||
186 | #define SAA7134_SCALER_STATUS0 0x006 | ||
187 | #define SAA7134_SCALER_STATUS1 0x007 | ||
188 | #define SAA7134_START_GREEN 0x00c | ||
189 | #define SAA7134_START_BLUE 0x00d | ||
190 | #define SAA7134_START_RED 0x00e | ||
191 | #define SAA7134_GREEN_PATH(x) (0x010 +x) | ||
192 | #define SAA7134_BLUE_PATH(x) (0x020 +x) | ||
193 | #define SAA7134_RED_PATH(x) (0x030 +x) | ||
194 | |||
195 | #define TASK_A 0x040 | ||
196 | #define TASK_B 0x080 | ||
197 | #define SAA7134_TASK_CONDITIONS(t) (0x000 +t) | ||
198 | #define SAA7134_FIELD_HANDLING(t) (0x001 +t) | ||
199 | #define SAA7134_DATA_PATH(t) (0x002 +t) | ||
200 | #define SAA7134_VBI_H_START1(t) (0x004 +t) | ||
201 | #define SAA7134_VBI_H_START2(t) (0x005 +t) | ||
202 | #define SAA7134_VBI_H_STOP1(t) (0x006 +t) | ||
203 | #define SAA7134_VBI_H_STOP2(t) (0x007 +t) | ||
204 | #define SAA7134_VBI_V_START1(t) (0x008 +t) | ||
205 | #define SAA7134_VBI_V_START2(t) (0x009 +t) | ||
206 | #define SAA7134_VBI_V_STOP1(t) (0x00a +t) | ||
207 | #define SAA7134_VBI_V_STOP2(t) (0x00b +t) | ||
208 | #define SAA7134_VBI_H_LEN1(t) (0x00c +t) | ||
209 | #define SAA7134_VBI_H_LEN2(t) (0x00d +t) | ||
210 | #define SAA7134_VBI_V_LEN1(t) (0x00e +t) | ||
211 | #define SAA7134_VBI_V_LEN2(t) (0x00f +t) | ||
212 | |||
213 | #define SAA7134_VIDEO_H_START1(t) (0x014 +t) | ||
214 | #define SAA7134_VIDEO_H_START2(t) (0x015 +t) | ||
215 | #define SAA7134_VIDEO_H_STOP1(t) (0x016 +t) | ||
216 | #define SAA7134_VIDEO_H_STOP2(t) (0x017 +t) | ||
217 | #define SAA7134_VIDEO_V_START1(t) (0x018 +t) | ||
218 | #define SAA7134_VIDEO_V_START2(t) (0x019 +t) | ||
219 | #define SAA7134_VIDEO_V_STOP1(t) (0x01a +t) | ||
220 | #define SAA7134_VIDEO_V_STOP2(t) (0x01b +t) | ||
221 | #define SAA7134_VIDEO_PIXELS1(t) (0x01c +t) | ||
222 | #define SAA7134_VIDEO_PIXELS2(t) (0x01d +t) | ||
223 | #define SAA7134_VIDEO_LINES1(t) (0x01e +t) | ||
224 | #define SAA7134_VIDEO_LINES2(t) (0x01f +t) | ||
225 | |||
226 | #define SAA7134_H_PRESCALE(t) (0x020 +t) | ||
227 | #define SAA7134_ACC_LENGTH(t) (0x021 +t) | ||
228 | #define SAA7134_LEVEL_CTRL(t) (0x022 +t) | ||
229 | #define SAA7134_FIR_PREFILTER_CTRL(t) (0x023 +t) | ||
230 | #define SAA7134_LUMA_BRIGHT(t) (0x024 +t) | ||
231 | #define SAA7134_LUMA_CONTRAST(t) (0x025 +t) | ||
232 | #define SAA7134_CHROMA_SATURATION(t) (0x026 +t) | ||
233 | #define SAA7134_VBI_H_SCALE_INC1(t) (0x028 +t) | ||
234 | #define SAA7134_VBI_H_SCALE_INC2(t) (0x029 +t) | ||
235 | #define SAA7134_VBI_PHASE_OFFSET_LUMA(t) (0x02a +t) | ||
236 | #define SAA7134_VBI_PHASE_OFFSET_CHROMA(t) (0x02b +t) | ||
237 | #define SAA7134_H_SCALE_INC1(t) (0x02c +t) | ||
238 | #define SAA7134_H_SCALE_INC2(t) (0x02d +t) | ||
239 | #define SAA7134_H_PHASE_OFF_LUMA(t) (0x02e +t) | ||
240 | #define SAA7134_H_PHASE_OFF_CHROMA(t) (0x02f +t) | ||
241 | #define SAA7134_V_SCALE_RATIO1(t) (0x030 +t) | ||
242 | #define SAA7134_V_SCALE_RATIO2(t) (0x031 +t) | ||
243 | #define SAA7134_V_FILTER(t) (0x032 +t) | ||
244 | #define SAA7134_V_PHASE_OFFSET0(t) (0x034 +t) | ||
245 | #define SAA7134_V_PHASE_OFFSET1(t) (0x035 +t) | ||
246 | #define SAA7134_V_PHASE_OFFSET2(t) (0x036 +t) | ||
247 | #define SAA7134_V_PHASE_OFFSET3(t) (0x037 +t) | ||
248 | |||
249 | /* clipping & dma */ | ||
250 | #define SAA7134_OFMT_VIDEO_A 0x300 | ||
251 | #define SAA7134_OFMT_DATA_A 0x301 | ||
252 | #define SAA7134_OFMT_VIDEO_B 0x302 | ||
253 | #define SAA7134_OFMT_DATA_B 0x303 | ||
254 | #define SAA7134_ALPHA_NOCLIP 0x304 | ||
255 | #define SAA7134_ALPHA_CLIP 0x305 | ||
256 | #define SAA7134_UV_PIXEL 0x308 | ||
257 | #define SAA7134_CLIP_RED 0x309 | ||
258 | #define SAA7134_CLIP_GREEN 0x30a | ||
259 | #define SAA7134_CLIP_BLUE 0x30b | ||
260 | |||
261 | /* i2c bus */ | ||
262 | #define SAA7134_I2C_ATTR_STATUS 0x180 | ||
263 | #define SAA7134_I2C_DATA 0x181 | ||
264 | #define SAA7134_I2C_CLOCK_SELECT 0x182 | ||
265 | #define SAA7134_I2C_TIMER 0x183 | ||
266 | |||
267 | /* audio */ | ||
268 | #define SAA7134_NICAM_ADD_DATA1 0x140 | ||
269 | #define SAA7134_NICAM_ADD_DATA2 0x141 | ||
270 | #define SAA7134_NICAM_STATUS 0x142 | ||
271 | #define SAA7134_AUDIO_STATUS 0x143 | ||
272 | #define SAA7134_NICAM_ERROR_COUNT 0x144 | ||
273 | #define SAA7134_IDENT_SIF 0x145 | ||
274 | #define SAA7134_LEVEL_READOUT1 0x146 | ||
275 | #define SAA7134_LEVEL_READOUT2 0x147 | ||
276 | #define SAA7134_NICAM_ERROR_LOW 0x148 | ||
277 | #define SAA7134_NICAM_ERROR_HIGH 0x149 | ||
278 | #define SAA7134_DCXO_IDENT_CTRL 0x14a | ||
279 | #define SAA7134_DEMODULATOR 0x14b | ||
280 | #define SAA7134_AGC_GAIN_SELECT 0x14c | ||
281 | #define SAA7134_CARRIER1_FREQ0 0x150 | ||
282 | #define SAA7134_CARRIER1_FREQ1 0x151 | ||
283 | #define SAA7134_CARRIER1_FREQ2 0x152 | ||
284 | #define SAA7134_CARRIER2_FREQ0 0x154 | ||
285 | #define SAA7134_CARRIER2_FREQ1 0x155 | ||
286 | #define SAA7134_CARRIER2_FREQ2 0x156 | ||
287 | #define SAA7134_NUM_SAMPLES0 0x158 | ||
288 | #define SAA7134_NUM_SAMPLES1 0x159 | ||
289 | #define SAA7134_NUM_SAMPLES2 0x15a | ||
290 | #define SAA7134_AUDIO_FORMAT_CTRL 0x15b | ||
291 | #define SAA7134_MONITOR_SELECT 0x160 | ||
292 | #define SAA7134_FM_DEEMPHASIS 0x161 | ||
293 | #define SAA7134_FM_DEMATRIX 0x162 | ||
294 | #define SAA7134_CHANNEL1_LEVEL 0x163 | ||
295 | #define SAA7134_CHANNEL2_LEVEL 0x164 | ||
296 | #define SAA7134_NICAM_CONFIG 0x165 | ||
297 | #define SAA7134_NICAM_LEVEL_ADJUST 0x166 | ||
298 | #define SAA7134_STEREO_DAC_OUTPUT_SELECT 0x167 | ||
299 | #define SAA7134_I2S_OUTPUT_FORMAT 0x168 | ||
300 | #define SAA7134_I2S_OUTPUT_SELECT 0x169 | ||
301 | #define SAA7134_I2S_OUTPUT_LEVEL 0x16a | ||
302 | #define SAA7134_DSP_OUTPUT_SELECT 0x16b | ||
303 | #define SAA7134_AUDIO_MUTE_CTRL 0x16c | ||
304 | #define SAA7134_SIF_SAMPLE_FREQ 0x16d | ||
305 | #define SAA7134_ANALOG_IO_SELECT 0x16e | ||
306 | #define SAA7134_AUDIO_CLOCK0 0x170 | ||
307 | #define SAA7134_AUDIO_CLOCK1 0x171 | ||
308 | #define SAA7134_AUDIO_CLOCK2 0x172 | ||
309 | #define SAA7134_AUDIO_PLL_CTRL 0x173 | ||
310 | #define SAA7134_AUDIO_CLOCKS_PER_FIELD0 0x174 | ||
311 | #define SAA7134_AUDIO_CLOCKS_PER_FIELD1 0x175 | ||
312 | #define SAA7134_AUDIO_CLOCKS_PER_FIELD2 0x176 | ||
313 | |||
314 | /* video port output */ | ||
315 | #define SAA7134_VIDEO_PORT_CTRL0 0x190 | ||
316 | #define SAA7134_VIDEO_PORT_CTRL1 0x191 | ||
317 | #define SAA7134_VIDEO_PORT_CTRL2 0x192 | ||
318 | #define SAA7134_VIDEO_PORT_CTRL3 0x193 | ||
319 | #define SAA7134_VIDEO_PORT_CTRL4 0x194 | ||
320 | #define SAA7134_VIDEO_PORT_CTRL5 0x195 | ||
321 | #define SAA7134_VIDEO_PORT_CTRL6 0x196 | ||
322 | #define SAA7134_VIDEO_PORT_CTRL7 0x197 | ||
323 | #define SAA7134_VIDEO_PORT_CTRL8 0x198 | ||
324 | |||
325 | /* transport stream interface */ | ||
326 | #define SAA7134_TS_PARALLEL 0x1a0 | ||
327 | #define SAA7134_TS_PARALLEL_SERIAL 0x1a1 | ||
328 | #define SAA7134_TS_SERIAL0 0x1a2 | ||
329 | #define SAA7134_TS_SERIAL1 0x1a3 | ||
330 | #define SAA7134_TS_DMA0 0x1a4 | ||
331 | #define SAA7134_TS_DMA1 0x1a5 | ||
332 | #define SAA7134_TS_DMA2 0x1a6 | ||
333 | |||
334 | /* GPIO Controls */ | ||
335 | #define SAA7134_GPIO_GPRESCAN 0x80 | ||
336 | #define SAA7134_GPIO_27_25 0x0E | ||
337 | |||
338 | #define SAA7134_GPIO_GPMODE0 0x1B0 | ||
339 | #define SAA7134_GPIO_GPMODE1 0x1B1 | ||
340 | #define SAA7134_GPIO_GPMODE2 0x1B2 | ||
341 | #define SAA7134_GPIO_GPMODE3 0x1B3 | ||
342 | #define SAA7134_GPIO_GPSTATUS0 0x1B4 | ||
343 | #define SAA7134_GPIO_GPSTATUS1 0x1B5 | ||
344 | #define SAA7134_GPIO_GPSTATUS2 0x1B6 | ||
345 | #define SAA7134_GPIO_GPSTATUS3 0x1B7 | ||
346 | |||
347 | /* I2S output */ | ||
348 | #define SAA7134_I2S_AUDIO_OUTPUT 0x1c0 | ||
349 | |||
350 | /* test modes */ | ||
351 | #define SAA7134_SPECIAL_MODE 0x1d0 | ||
352 | |||
353 | /* audio -- saa7133 + saa7135 only */ | ||
354 | #define SAA7135_DSP_RWSTATE 0x580 | ||
355 | #define SAA7135_DSP_RWSTATE_ERR (1 << 3) | ||
356 | #define SAA7135_DSP_RWSTATE_IDA (1 << 2) | ||
357 | #define SAA7135_DSP_RWSTATE_RDB (1 << 1) | ||
358 | #define SAA7135_DSP_RWSTATE_WRR (1 << 0) | ||
359 | |||
360 | /* ------------------------------------------------------------------ */ | ||
361 | /* | ||
362 | * Local variables: | ||
363 | * c-basic-offset: 8 | ||
364 | * End: | ||
365 | */ | ||
366 | |||