diff options
author | Philippe Rétornaz <philippe.retornaz@epfl.ch> | 2009-03-13 08:42:32 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2009-03-30 11:43:22 -0400 |
commit | c98afbfc20355dd04a7b817b232e06a4c3e73bac (patch) | |
tree | 2806c6959ed1822ef65482851a81608efa28d56a /drivers/media/video/mt9t031.c | |
parent | d42574d1d26a17b5c4a3e9d5cbd2e5cacfd550fa (diff) |
V4L/DVB (11035): mt9t031 bugfix
- The video device is not allocated when mt9t031_init() is called, don't use
it in debug printk.
- The clock polarity is inverted in mt9t031_set_bus_param(), use the correct
one.
Signed-off-by: Philippe Rétornaz <philippe.retornaz@epfl.ch>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/video/mt9t031.c')
-rw-r--r-- | drivers/media/video/mt9t031.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/media/video/mt9t031.c b/drivers/media/video/mt9t031.c index 677be18df9b3..23f9ce9d67ef 100644 --- a/drivers/media/video/mt9t031.c +++ b/drivers/media/video/mt9t031.c | |||
@@ -144,8 +144,6 @@ static int mt9t031_init(struct soc_camera_device *icd) | |||
144 | int ret; | 144 | int ret; |
145 | 145 | ||
146 | /* Disable chip output, synchronous option update */ | 146 | /* Disable chip output, synchronous option update */ |
147 | dev_dbg(icd->vdev->parent, "%s\n", __func__); | ||
148 | |||
149 | ret = reg_write(icd, MT9T031_RESET, 1); | 147 | ret = reg_write(icd, MT9T031_RESET, 1); |
150 | if (ret >= 0) | 148 | if (ret >= 0) |
151 | ret = reg_write(icd, MT9T031_RESET, 0); | 149 | ret = reg_write(icd, MT9T031_RESET, 0); |
@@ -186,9 +184,9 @@ static int mt9t031_set_bus_param(struct soc_camera_device *icd, | |||
186 | return -EINVAL; | 184 | return -EINVAL; |
187 | 185 | ||
188 | if (flags & SOCAM_PCLK_SAMPLE_FALLING) | 186 | if (flags & SOCAM_PCLK_SAMPLE_FALLING) |
189 | reg_set(icd, MT9T031_PIXEL_CLOCK_CONTROL, 0x8000); | ||
190 | else | ||
191 | reg_clear(icd, MT9T031_PIXEL_CLOCK_CONTROL, 0x8000); | 187 | reg_clear(icd, MT9T031_PIXEL_CLOCK_CONTROL, 0x8000); |
188 | else | ||
189 | reg_set(icd, MT9T031_PIXEL_CLOCK_CONTROL, 0x8000); | ||
192 | 190 | ||
193 | return 0; | 191 | return 0; |
194 | } | 192 | } |