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authorHans Verkuil <hverkuil@xs4all.nl>2007-04-27 11:31:25 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2007-04-27 14:43:50 -0400
commit1a0adaf37c30e89e44d1470ef604a930999a5826 (patch)
tree6e6d6e823f44abdb2ed3847e00406a75bc968cef /drivers/media/video/ivtv/ivtv-driver.h
parentac52ea3c3c04403d10acf0253180ec6f51977142 (diff)
V4L/DVB (5345): ivtv driver for Conexant cx23416/cx23415 MPEG encoder/decoder
It took three core maintainers, over four years of work, eight new i2c modules, eleven new V4L2 ioctls, three new DVB video ioctls, a Sliced VBI API, a new MPEG encoder API, an enhanced DVB video MPEG decoding API, major YUV/OSD contributions from Ian and John, web/wiki/svn/trac support from Axel Thimm, (hardware) support from Hauppauge, support and assistance from the v4l-dvb people and the many, many users of ivtv to finally make it possible to merge this driver into the kernel. Thank you all! Signed-off-by: Kevin Thayer <nufan_wfk@yahoo.com> Signed-off-by: Chris Kennedy <c@groovy.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: John P Harvey <john.p.harvey@btinternet.com> Signed-off-by: Ian Armstrong <ian@iarmst.demon.co.uk> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/video/ivtv/ivtv-driver.h')
-rw-r--r--drivers/media/video/ivtv/ivtv-driver.h866
1 files changed, 866 insertions, 0 deletions
diff --git a/drivers/media/video/ivtv/ivtv-driver.h b/drivers/media/video/ivtv/ivtv-driver.h
new file mode 100644
index 000000000000..546d7bbfcf5b
--- /dev/null
+++ b/drivers/media/video/ivtv/ivtv-driver.h
@@ -0,0 +1,866 @@
1/*
2 ivtv driver internal defines and structures
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2004 Chris Kennedy <c@groovy.org>
5 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef IVTV_DRIVER_H
23#define IVTV_DRIVER_H
24
25/* Internal header for ivtv project:
26 * Driver for the cx23415/6 chip.
27 * Author: Kevin Thayer (nufan_wfk at yahoo.com)
28 * License: GPL
29 * http://www.ivtvdriver.org
30 *
31 * -----
32 * MPG600/MPG160 support by T.Adachi <tadachi@tadachi-net.com>
33 * and Takeru KOMORIYA<komoriya@paken.org>
34 *
35 * AVerMedia M179 GPIO info by Chris Pinkham <cpinkham@bc2va.org>
36 * using information provided by Jiun-Kuei Jung @ AVerMedia.
37 */
38
39#include <linux/version.h>
40#include <linux/module.h>
41#include <linux/moduleparam.h>
42#include <linux/init.h>
43#include <linux/delay.h>
44#include <linux/sched.h>
45#include <linux/fs.h>
46#include <linux/pci.h>
47#include <linux/interrupt.h>
48#include <linux/spinlock.h>
49#include <linux/i2c.h>
50#include <linux/i2c-algo-bit.h>
51#include <linux/list.h>
52#include <linux/unistd.h>
53#include <linux/byteorder/swab.h>
54#include <linux/pagemap.h>
55#include <linux/workqueue.h>
56#include <linux/mutex.h>
57#include <asm/uaccess.h>
58#include <asm/system.h>
59
60#include <linux/dvb/video.h>
61#include <linux/dvb/audio.h>
62#include <media/v4l2-common.h>
63#include <media/tuner.h>
64#include <media/cx2341x.h>
65
66/* #define HAVE_XC3028 1 */
67
68#include <media/ivtv.h>
69
70#ifdef CONFIG_LIRC_I2C
71# error "This driver is not compatible with the LIRC I2C kernel configuration option."
72#endif /* CONFIG_LIRC_I2C */
73
74#ifndef CONFIG_PCI
75# error "This driver requires kernel PCI support."
76#endif /* CONFIG_PCI */
77
78#define IVTV_ENCODER_OFFSET 0x00000000
79#define IVTV_ENCODER_SIZE 0x00800000 /* Last half isn't needed 0x01000000 */
80
81#define IVTV_DECODER_OFFSET 0x01000000
82#define IVTV_DECODER_SIZE 0x00800000 /* Last half isn't needed 0x01000000 */
83
84#define IVTV_REG_OFFSET 0x02000000
85#define IVTV_REG_SIZE 0x00010000
86
87/* Buffers on hardware offsets */
88#define IVTV_YUV_BUFFER_OFFSET 0x001a8600 /* First YUV Buffer */
89#define IVTV_YUV_BUFFER_OFFSET_1 0x00240400 /* Second YUV Buffer */
90#define IVTV_YUV_BUFFER_OFFSET_2 0x002d8200 /* Third YUV Buffer */
91#define IVTV_YUV_BUFFER_OFFSET_3 0x00370000 /* Fourth YUV Buffer */
92#define IVTV_YUV_BUFFER_UV_OFFSET 0x65400 /* Offset to UV Buffer */
93
94/* Offset to filter table in firmware */
95#define IVTV_YUV_HORIZONTAL_FILTER_OFFSET 0x025d8
96#define IVTV_YUV_VERTICAL_FILTER_OFFSET 0x03358
97
98extern const u32 yuv_offset[4];
99
100/* Maximum ivtv driver instances.
101 Based on 6 PVR500s each with two PVR15s...
102 TODO: make this dynamic. I believe it is only a global in order to support
103 ivtv-fb. There must be a better way to do that. */
104#define IVTV_MAX_CARDS 12
105
106/* Supported cards */
107#define IVTV_CARD_PVR_250 0 /* WinTV PVR 250 */
108#define IVTV_CARD_PVR_350 1 /* encoder, decoder, tv-out */
109#define IVTV_CARD_PVR_150 2 /* WinTV PVR 150 and PVR 500 (really just two
110 PVR150s on one PCI board) */
111#define IVTV_CARD_M179 3 /* AVerMedia M179 (encoder only) */
112#define IVTV_CARD_MPG600 4 /* Kuroutoshikou ITVC16-STVLP/YUAN MPG600, encoder only */
113#define IVTV_CARD_MPG160 5 /* Kuroutoshikou ITVC15-STVLP/YUAN MPG160
114 cx23415 based, but does not have tv-out */
115#define IVTV_CARD_PG600 6 /* YUAN PG600/DIAMONDMM PVR-550 based on the CX Falcon 2 */
116#define IVTV_CARD_AVC2410 7 /* Adaptec AVC-2410 */
117#define IVTV_CARD_AVC2010 8 /* Adaptec AVD-2010 (No Tuner) */
118#define IVTV_CARD_TG5000TV 9 /* NAGASE TRANSGEAR 5000TV, encoder only */
119#define IVTV_CARD_VA2000MAX_SNT6 10 /* VA2000MAX-STN6 */
120#define IVTV_CARD_CX23416GYC 11 /* Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */
121#define IVTV_CARD_GV_MVPRX 12 /* I/O Data GV-MVP/RX, RX2, RX2W */
122#define IVTV_CARD_GV_MVPRX2E 13 /* I/O Data GV-MVP/RX2E */
123#define IVTV_CARD_GOTVIEW_PCI_DVD 14 /* GotView PCI DVD */
124#define IVTV_CARD_GOTVIEW_PCI_DVD2 15 /* GotView PCI DVD2 */
125#define IVTV_CARD_YUAN_MPC622 16 /* Yuan MPC622 miniPCI */
126#define IVTV_CARD_DCTMTVP1 17 /* DIGITAL COWBOY DCT-MTVP1 */
127#ifdef HAVE_XC3028
128#define IVTV_CARD_PG600V2 18 /* Yuan PG600V2/GotView PCI DVD Lite/Club3D ZAP-TV1x01 */
129#define IVTV_CARD_LAST 18
130#else
131#define IVTV_CARD_LAST 17
132#endif
133
134/* Variants of existing cards but with the same PCI IDs. The driver
135 detects these based on other device information.
136 These cards must always come last.
137 New cards must be inserted above, and the indices of the cards below
138 must be adjusted accordingly. */
139
140/* PVR-350 V1 (uses saa7114) */
141#define IVTV_CARD_PVR_350_V1 (IVTV_CARD_LAST+1)
142/* 2 variants of Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */
143#define IVTV_CARD_CX23416GYC_NOGR (IVTV_CARD_LAST+2)
144#define IVTV_CARD_CX23416GYC_NOGRYCS (IVTV_CARD_LAST+3)
145
146#define IVTV_ENC_STREAM_TYPE_MPG 0
147#define IVTV_ENC_STREAM_TYPE_YUV 1
148#define IVTV_ENC_STREAM_TYPE_VBI 2
149#define IVTV_ENC_STREAM_TYPE_PCM 3
150#define IVTV_ENC_STREAM_TYPE_RAD 4
151#define IVTV_DEC_STREAM_TYPE_MPG 5
152#define IVTV_DEC_STREAM_TYPE_VBI 6
153#define IVTV_DEC_STREAM_TYPE_VOUT 7
154#define IVTV_DEC_STREAM_TYPE_YUV 8
155#define IVTV_MAX_STREAMS 9
156
157#define IVTV_V4L2_DEC_MPG_OFFSET 16 /* offset from 0 to register decoder mpg v4l2 minors on */
158#define IVTV_V4L2_ENC_PCM_OFFSET 24 /* offset from 0 to register pcm v4l2 minors on */
159#define IVTV_V4L2_ENC_YUV_OFFSET 32 /* offset from 0 to register yuv v4l2 minors on */
160#define IVTV_V4L2_DEC_YUV_OFFSET 48 /* offset from 0 to register decoder yuv v4l2 minors on */
161#define IVTV_V4L2_DEC_VBI_OFFSET 8 /* offset from 0 to register decoder vbi input v4l2 minors on */
162#define IVTV_V4L2_DEC_VOUT_OFFSET 16 /* offset from 0 to register vbi output v4l2 minors on */
163
164#define IVTV_ENC_MEM_START 0x00000000
165#define IVTV_DEC_MEM_START 0x01000000
166
167/* system vendor and device IDs */
168#define PCI_VENDOR_ID_ICOMP 0x4444
169#define PCI_DEVICE_ID_IVTV15 0x0803
170#define PCI_DEVICE_ID_IVTV16 0x0016
171
172/* subsystem vendor ID */
173#define IVTV_PCI_ID_HAUPPAUGE 0x0070
174#define IVTV_PCI_ID_HAUPPAUGE_ALT1 0x0270
175#define IVTV_PCI_ID_HAUPPAUGE_ALT2 0x4070
176#define IVTV_PCI_ID_ADAPTEC 0x9005
177#define IVTV_PCI_ID_AVERMEDIA 0x1461
178#define IVTV_PCI_ID_YUAN1 0x12ab
179#define IVTV_PCI_ID_YUAN2 0xff01
180#define IVTV_PCI_ID_YUAN3 0xffab
181#define IVTV_PCI_ID_YUAN4 0xfbab
182#define IVTV_PCI_ID_DIAMONDMM 0xff92
183#define IVTV_PCI_ID_IODATA 0x10fc
184#define IVTV_PCI_ID_MELCO 0x1154
185#define IVTV_PCI_ID_GOTVIEW1 0xffac
186#define IVTV_PCI_ID_GOTVIEW2 0xffad
187
188/* Decoder Buffer hardware size on Chip */
189#define IVTV_DEC_MAX_BUF 0x00100000 /* max bytes in decoder buffer */
190#define IVTV_DEC_MIN_BUF 0x00010000 /* min bytes in dec buffer */
191
192/* ======================================================================== */
193/* ========================== START USER SETTABLE DMA VARIABLES =========== */
194/* ======================================================================== */
195
196#define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */
197
198/* DMA Buffers, Default size in MB allocated */
199#define IVTV_DEFAULT_ENC_MPG_BUFFERS 4
200#define IVTV_DEFAULT_ENC_YUV_BUFFERS 2
201#define IVTV_DEFAULT_ENC_VBI_BUFFERS 1
202#define IVTV_DEFAULT_ENC_PCM_BUFFERS 1
203#define IVTV_DEFAULT_DEC_MPG_BUFFERS 1
204#define IVTV_DEFAULT_DEC_YUV_BUFFERS 1
205#define IVTV_DEFAULT_DEC_VBI_BUFFERS 1
206
207/* ======================================================================== */
208/* ========================== END USER SETTABLE DMA VARIABLES ============= */
209/* ======================================================================== */
210
211/* Decoder Status Register */
212#define IVTV_DMA_ERR_LIST 0x00000010
213#define IVTV_DMA_ERR_WRITE 0x00000008
214#define IVTV_DMA_ERR_READ 0x00000004
215#define IVTV_DMA_SUCCESS_WRITE 0x00000002
216#define IVTV_DMA_SUCCESS_READ 0x00000001
217#define IVTV_DMA_READ_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_READ)
218#define IVTV_DMA_WRITE_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE)
219#define IVTV_DMA_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE | IVTV_DMA_ERR_READ)
220
221/* DMA Registers */
222#define IVTV_REG_DMAXFER (0x0000)
223#define IVTV_REG_DMASTATUS (0x0004)
224#define IVTV_REG_DECDMAADDR (0x0008)
225#define IVTV_REG_ENCDMAADDR (0x000c)
226#define IVTV_REG_DMACONTROL (0x0010)
227#define IVTV_REG_IRQSTATUS (0x0040)
228#define IVTV_REG_IRQMASK (0x0048)
229
230/* Setup Registers */
231#define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8)
232#define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC)
233#define IVTV_REG_DEC_SDRAM_REFRESH (0x08F8)
234#define IVTV_REG_DEC_SDRAM_PRECHARGE (0x08FC)
235#define IVTV_REG_VDM (0x2800)
236#define IVTV_REG_AO (0x2D00)
237#define IVTV_REG_BYTEFLUSH (0x2D24)
238#define IVTV_REG_SPU (0x9050)
239#define IVTV_REG_HW_BLOCKS (0x9054)
240#define IVTV_REG_VPU (0x9058)
241#define IVTV_REG_APU (0xA064)
242
243#define IVTV_IRQ_ENC_START_CAP (0x1 << 31)
244#define IVTV_IRQ_ENC_EOS (0x1 << 30)
245#define IVTV_IRQ_ENC_VBI_CAP (0x1 << 29)
246#define IVTV_IRQ_ENC_VIM_RST (0x1 << 28)
247#define IVTV_IRQ_ENC_DMA_COMPLETE (0x1 << 27)
248#define IVTV_IRQ_DEC_AUD_MODE_CHG (0x1 << 24)
249#define IVTV_IRQ_DEC_DATA_REQ (0x1 << 22)
250#define IVTV_IRQ_DEC_DMA_COMPLETE (0x1 << 20)
251#define IVTV_IRQ_DEC_VBI_RE_INSERT (0x1 << 19)
252#define IVTV_IRQ_DMA_ERR (0x1 << 18)
253#define IVTV_IRQ_DMA_WRITE (0x1 << 17)
254#define IVTV_IRQ_DMA_READ (0x1 << 16)
255#define IVTV_IRQ_DEC_VSYNC (0x1 << 10)
256
257/* IRQ Masks */
258#define IVTV_IRQ_MASK_INIT (IVTV_IRQ_DMA_ERR|IVTV_IRQ_ENC_DMA_COMPLETE|IVTV_IRQ_DMA_READ)
259
260#define IVTV_IRQ_MASK_CAPTURE (IVTV_IRQ_ENC_START_CAP | IVTV_IRQ_ENC_EOS)
261#define IVTV_IRQ_MASK_DECODE (IVTV_IRQ_DEC_DATA_REQ|IVTV_IRQ_DEC_AUD_MODE_CHG)
262
263/* i2c stuff */
264#define I2C_CLIENTS_MAX 16
265
266/* debugging */
267
268#define IVTV_DBGFLG_WARN (1 << 0)
269#define IVTV_DBGFLG_INFO (1 << 1)
270#define IVTV_DBGFLG_API (1 << 2)
271#define IVTV_DBGFLG_DMA (1 << 3)
272#define IVTV_DBGFLG_IOCTL (1 << 4)
273#define IVTV_DBGFLG_I2C (1 << 5)
274#define IVTV_DBGFLG_IRQ (1 << 6)
275#define IVTV_DBGFLG_DEC (1 << 7)
276#define IVTV_DBGFLG_YUV (1 << 8)
277
278/* NOTE: extra space before comma in 'itv->num , ## args' is required for
279 gcc-2.95, otherwise it won't compile. */
280#define IVTV_DEBUG(x, type, fmt, args...) \
281 do { \
282 if ((x) & ivtv_debug) \
283 printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \
284 } while (0)
285#define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warning", fmt , ## args)
286#define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info",fmt , ## args)
287#define IVTV_DEBUG_API(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_API, "api", fmt , ## args)
288#define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
289#define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
290#define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
291#define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
292#define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
293#define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
294
295#define IVTV_FB_DEBUG(x, type, fmt, args...) \
296 do { \
297 if ((x) & ivtv_debug) \
298 printk(KERN_INFO "ivtv%d-fb " type ": " fmt, itv->num , ## args); \
299 } while (0)
300#define IVTV_FB_DEBUG_WARN(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_WARN, "warning", fmt , ## args)
301#define IVTV_FB_DEBUG_INFO(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_INFO, "info", fmt , ## args)
302#define IVTV_FB_DEBUG_API(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_API, "api", fmt , ## args)
303#define IVTV_FB_DEBUG_DMA(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
304#define IVTV_FB_DEBUG_IOCTL(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
305#define IVTV_FB_DEBUG_I2C(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
306#define IVTV_FB_DEBUG_IRQ(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
307#define IVTV_FB_DEBUG_DEC(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
308#define IVTV_FB_DEBUG_YUV(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
309
310/* Standard kernel messages */
311#define IVTV_ERR(fmt, args...) printk(KERN_ERR "ivtv%d: " fmt, itv->num , ## args)
312#define IVTV_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d: " fmt, itv->num , ## args)
313#define IVTV_INFO(fmt, args...) printk(KERN_INFO "ivtv%d: " fmt, itv->num , ## args)
314#define IVTV_FB_ERR(fmt, args...) printk(KERN_ERR "ivtv%d-fb: " fmt, itv->num , ## args)
315#define IVTV_FB_INFO(fmt, args...) printk(KERN_INFO "ivtv%d-fb: " fmt, itv->num , ## args)
316
317/* Values for IVTV_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */
318#define MPEG_FRAME_TYPE_IFRAME 1
319#define MPEG_FRAME_TYPE_IFRAME_PFRAME 3
320#define MPEG_FRAME_TYPE_ALL 7
321
322/* output modes (cx23415 only) */
323#define OUT_NONE 0
324#define OUT_MPG 1
325#define OUT_YUV 2
326#define OUT_UDMA_YUV 3
327#define OUT_PASSTHROUGH 4
328
329#define IVTV_MAX_PGM_INDEX (400)
330
331extern int ivtv_debug;
332
333
334struct ivtv_options {
335 int megabytes[IVTV_MAX_STREAMS]; /* Size in megabytes of each stream */
336 int cardtype; /* force card type on load */
337 int tuner; /* set tuner on load */
338 int radio; /* enable/disable radio */
339 int newi2c; /* New I2C algorithm */
340};
341
342#define IVTV_MBOX_DMA_START 6
343#define IVTV_MBOX_DMA_END 8
344#define IVTV_MBOX_DMA 9
345#define IVTV_MBOX_FIELD_DISPLAYED 8
346
347/* ivtv-specific mailbox template */
348struct ivtv_mailbox {
349 u32 flags;
350 u32 cmd;
351 u32 retval;
352 u32 timeout;
353 u32 data[CX2341X_MBOX_MAX_DATA];
354};
355
356struct ivtv_api_cache {
357 unsigned long last_jiffies; /* when last command was issued */
358 u32 data[CX2341X_MBOX_MAX_DATA]; /* last sent api data */
359};
360
361struct ivtv_mailbox_data {
362 volatile struct ivtv_mailbox __iomem *mbox;
363 /* Bits 0-2 are for the encoder mailboxes, 0-1 are for the decoder mailboxes.
364 If the bit is set, then the corresponding mailbox is in use by the driver. */
365 unsigned long busy;
366 u8 max_mbox;
367};
368
369/* per-buffer bit flags */
370#define IVTV_F_B_NEED_BUF_SWAP 0 /* this buffer should be byte swapped */
371
372/* per-stream, s_flags */
373#define IVTV_F_S_DMA_PENDING 0 /* this stream has pending DMA */
374#define IVTV_F_S_DMA_HAS_VBI 1 /* the current DMA request also requests VBI data */
375#define IVTV_F_S_NEEDS_DATA 2 /* this decoding stream needs more data */
376
377#define IVTV_F_S_CLAIMED 3 /* this stream is claimed */
378#define IVTV_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
379#define IVTV_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
380#define IVTV_F_S_PASSTHROUGH 6 /* this stream is in passthrough mode */
381#define IVTV_F_S_STREAMOFF 7 /* signal end of stream EOS */
382#define IVTV_F_S_APPL_IO 8 /* this stream is used read/written by an application */
383
384/* per-ivtv, i_flags */
385#define IVTV_F_I_DMA 0 /* DMA in progress */
386#define IVTV_F_I_UDMA 1 /* UDMA in progress */
387#define IVTV_F_I_UDMA_PENDING 2 /* UDMA pending */
388
389#define IVTV_F_I_SPEED_CHANGE 3 /* A speed change is in progress */
390#define IVTV_F_I_EOS 4 /* End of encoder stream reached */
391#define IVTV_F_I_RADIO_USER 5 /* The radio tuner is selected */
392#define IVTV_F_I_DIG_RST 6 /* Reset digitizer */
393#define IVTV_F_I_DEC_YUV 7 /* YUV instead of MPG is being decoded */
394#define IVTV_F_I_ENC_VBI 8 /* VBI DMA */
395#define IVTV_F_I_UPDATE_CC 9 /* CC should be updated */
396#define IVTV_F_I_UPDATE_WSS 10 /* WSS should be updated */
397#define IVTV_F_I_UPDATE_VPS 11 /* VPS should be updated */
398#define IVTV_F_I_DECODING_YUV 12 /* this stream is YUV frame decoding */
399#define IVTV_F_I_ENC_PAUSED 13 /* the encoder is paused */
400#define IVTV_F_I_VALID_DEC_TIMINGS 14 /* last_dec_timing is valid */
401
402/* Event notifications */
403#define IVTV_F_I_EV_DEC_STOPPED 28 /* decoder stopped event */
404#define IVTV_F_I_EV_VSYNC 29 /* VSYNC event */
405#define IVTV_F_I_EV_VSYNC_FIELD 30 /* VSYNC event field (0 = first, 1 = second field) */
406#define IVTV_F_I_EV_VSYNC_ENABLED 31 /* VSYNC event enabled */
407
408/* Scatter-Gather array element, used in DMA transfers */
409struct ivtv_SG_element {
410 u32 src;
411 u32 dst;
412 u32 size;
413};
414
415struct ivtv_user_dma {
416 struct mutex lock;
417 int page_count;
418 struct page *map[IVTV_DMA_SG_OSD_ENT];
419
420 /* Base Dev SG Array for cx23415/6 */
421 struct ivtv_SG_element SGarray[IVTV_DMA_SG_OSD_ENT];
422 dma_addr_t SG_handle;
423 int SG_length;
424
425 /* SG List of Buffers */
426 struct scatterlist SGlist[IVTV_DMA_SG_OSD_ENT];
427};
428
429struct ivtv_dma_page_info {
430 unsigned long uaddr;
431 unsigned long first;
432 unsigned long last;
433 unsigned int offset;
434 unsigned int tail;
435 int page_count;
436};
437
438struct ivtv_buffer {
439 struct list_head list;
440 dma_addr_t dma_handle;
441 unsigned long b_flags;
442 char *buf;
443
444 u32 bytesused;
445 u32 readpos;
446};
447
448struct ivtv_queue {
449 struct list_head list;
450 u32 buffers;
451 u32 length;
452 u32 bytesused;
453};
454
455struct ivtv; /* forward reference */
456
457struct ivtv_stream {
458 /* These first four fields are always set, even if the stream
459 is not actually created. */
460 struct video_device *v4l2dev; /* NULL when stream not created */
461 struct ivtv *itv; /* for ease of use */
462 const char *name; /* name of the stream */
463 int type; /* stream type */
464
465 u32 id;
466 spinlock_t qlock; /* locks access to the queues */
467 unsigned long s_flags; /* status flags, see above */
468 int dma; /* can be PCI_DMA_TODEVICE,
469 PCI_DMA_FROMDEVICE or
470 PCI_DMA_NONE */
471 u32 dma_offset;
472 u32 dma_backup;
473 u64 dma_pts;
474
475 int subtype;
476 wait_queue_head_t waitq;
477 u32 dma_last_offset;
478
479 /* Buffer Stats */
480 u32 buffers;
481 u32 buf_size;
482 u32 buffers_stolen;
483
484 /* Buffer Queues */
485 struct ivtv_queue q_free; /* free buffers */
486 struct ivtv_queue q_full; /* full buffers */
487 struct ivtv_queue q_io; /* waiting for I/O */
488 struct ivtv_queue q_dma; /* waiting for DMA */
489 struct ivtv_queue q_predma; /* waiting for DMA */
490
491 /* Base Dev SG Array for cx23415/6 */
492 struct ivtv_SG_element *SGarray;
493 dma_addr_t SG_handle;
494 int SG_length;
495
496 /* SG List of Buffers */
497 struct scatterlist *SGlist;
498};
499
500struct ivtv_open_id {
501 u32 open_id;
502 int type;
503 struct ivtv *itv;
504};
505
506#define IVTV_YUV_UPDATE_HORIZONTAL 0x01
507#define IVTV_YUV_UPDATE_VERTICAL 0x02
508
509struct yuv_frame_info
510{
511 u32 update;
512 int src_x;
513 int src_y;
514 unsigned int src_w;
515 unsigned int src_h;
516 int dst_x;
517 int dst_y;
518 unsigned int dst_w;
519 unsigned int dst_h;
520 int pan_x;
521 int pan_y;
522 u32 vis_w;
523 u32 vis_h;
524 u32 interlaced_y;
525 u32 interlaced_uv;
526 int tru_x;
527 u32 tru_w;
528 u32 tru_h;
529 u32 offset_y;
530};
531
532#define IVTV_YUV_MODE_INTERLACED 0x00
533#define IVTV_YUV_MODE_PROGRESSIVE 0x01
534#define IVTV_YUV_MODE_AUTO 0x02
535#define IVTV_YUV_MODE_MASK 0x03
536
537#define IVTV_YUV_SYNC_EVEN 0x00
538#define IVTV_YUV_SYNC_ODD 0x04
539#define IVTV_YUV_SYNC_MASK 0x04
540
541struct yuv_playback_info
542{
543 u32 reg_2834;
544 u32 reg_2838;
545 u32 reg_283c;
546 u32 reg_2840;
547 u32 reg_2844;
548 u32 reg_2848;
549 u32 reg_2854;
550 u32 reg_285c;
551 u32 reg_2864;
552
553 u32 reg_2870;
554 u32 reg_2874;
555 u32 reg_2890;
556 u32 reg_2898;
557 u32 reg_289c;
558
559 u32 reg_2918;
560 u32 reg_291c;
561 u32 reg_2920;
562 u32 reg_2924;
563 u32 reg_2928;
564 u32 reg_292c;
565 u32 reg_2930;
566
567 u32 reg_2934;
568
569 u32 reg_2938;
570 u32 reg_293c;
571 u32 reg_2940;
572 u32 reg_2944;
573 u32 reg_2948;
574 u32 reg_294c;
575 u32 reg_2950;
576 u32 reg_2954;
577 u32 reg_2958;
578 u32 reg_295c;
579 u32 reg_2960;
580 u32 reg_2964;
581 u32 reg_2968;
582 u32 reg_296c;
583
584 u32 reg_2970;
585
586 int v_filter_1;
587 int v_filter_2;
588 int h_filter;
589
590 u32 osd_x_offset;
591 u32 osd_y_offset;
592
593 u32 osd_x_pan;
594 u32 osd_y_pan;
595
596 u32 osd_vis_w;
597 u32 osd_vis_h;
598
599 int decode_height;
600
601 int frame_interlaced;
602 int frame_interlaced_last;
603
604 int lace_mode;
605 int lace_threshold;
606 int lace_threshold_last;
607 int lace_sync_field;
608
609 atomic_t next_dma_frame;
610 atomic_t next_fill_frame;
611
612 u32 yuv_forced_update;
613 int update_frame;
614 struct workqueue_struct *work_queues;
615 struct work_struct work_queue;
616 struct yuv_frame_info new_frame_info[4];
617 struct yuv_frame_info old_frame_info;
618 struct yuv_frame_info old_frame_info_args;
619
620 void *blanking_ptr;
621 dma_addr_t blanking_dmaptr;
622};
623
624#define IVTV_VBI_FRAMES 32
625
626/* VBI data */
627struct vbi_info {
628 u32 dec_start;
629 u32 enc_start, enc_size;
630 int fpi;
631 u32 frame;
632 u32 dma_offset;
633 u8 cc_data_odd[256];
634 u8 cc_data_even[256];
635 int cc_pos;
636 u8 cc_no_update;
637 u8 vps[5];
638 u8 vps_found;
639 int wss;
640 u8 wss_found;
641 u8 wss_no_update;
642 u32 raw_decoder_line_size;
643 u8 raw_decoder_sav_odd_field;
644 u8 raw_decoder_sav_even_field;
645 u32 sliced_decoder_line_size;
646 u8 sliced_decoder_sav_odd_field;
647 u8 sliced_decoder_sav_even_field;
648 struct v4l2_format in;
649 /* convenience pointer to sliced struct in vbi_in union */
650 struct v4l2_sliced_vbi_format *sliced_in;
651 u32 service_set_in;
652 u32 service_set_out;
653 int insert_mpeg;
654
655 /* Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
656 One for /dev/vbi0 and one for /dev/vbi8 */
657 struct v4l2_sliced_vbi_data sliced_data[36];
658 struct v4l2_sliced_vbi_data sliced_dec_data[36];
659
660 /* Buffer for VBI data inserted into MPEG stream.
661 The first byte is a dummy byte that's never used.
662 The next 16 bytes contain the MPEG header for the VBI data,
663 the remainder is the actual VBI data.
664 The max size accepted by the MPEG VBI reinsertion turns out
665 to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,
666 where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is
667 a single line header byte and 2 * 18 is the number of VBI lines per frame.
668
669 However, it seems that the data must be 1K aligned, so we have to
670 pad the data until the 1 or 2 K boundary.
671
672 This pointer array will allocate 2049 bytes to store each VBI frame. */
673 u8 *sliced_mpeg_data[IVTV_VBI_FRAMES];
674 u32 sliced_mpeg_size[IVTV_VBI_FRAMES];
675 struct ivtv_buffer sliced_mpeg_buf;
676 u32 inserted_frame;
677
678 struct workqueue_struct *work_queues;
679 struct work_struct work_queue;
680 u32 start[2], count;
681 u32 raw_size;
682 u32 sliced_size;
683};
684
685/* forward declaration of struct defined in ivtv-cards.h */
686struct ivtv_card;
687
688/* Struct to hold info about ivtv cards */
689struct ivtv {
690 int num; /* board number, -1 during init! */
691 char name[8]; /* board name for printk and interrupts (e.g. 'ivtv0') */
692 struct pci_dev *dev; /* PCI device */
693 const struct ivtv_card *card; /* card information */
694 const char *card_name; /* full name of the card */
695 u8 has_cx23415; /* 1 if it is a cx23415 based card, 0 for cx23416 */
696 u8 is_50hz;
697 u8 is_60hz;
698 u8 is_out_50hz;
699 u8 is_out_60hz;
700 u8 pvr150_workaround; /* 1 if the cx25840 needs to workaround a PVR150 bug */
701 u8 nof_inputs; /* number of video inputs */
702 u8 nof_audio_inputs; /* number of audio inputs */
703 u32 v4l2_cap; /* V4L2 capabilities of card */
704 u32 hw_flags; /* Hardware description of the board */
705
706 /* controlling Video decoder function */
707 int (*video_dec_func)(struct ivtv *, unsigned int, void *);
708
709 struct ivtv_options options; /* User options */
710 int stream_buf_size[IVTV_MAX_STREAMS]; /* Stream buffer size */
711 struct ivtv_stream streams[IVTV_MAX_STREAMS]; /* Stream data */
712 int speed;
713 u8 speed_mute_audio;
714 unsigned long i_flags; /* global ivtv flags */
715 atomic_t capturing; /* count number of active capture streams */
716 atomic_t decoding; /* count number of active decoding streams */
717 u32 irq_rr_idx; /* Round-robin stream index */
718 int cur_dma_stream; /* index of stream doing DMA */
719 u32 dma_data_req_offset;
720 u32 dma_data_req_size;
721 int output_mode; /* NONE, MPG, YUV, UDMA YUV, passthrough */
722 spinlock_t lock; /* lock access to this struct */
723 int search_pack_header;
724
725 spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
726
727 /* User based DMA for OSD */
728 struct ivtv_user_dma udma;
729
730 int open_id; /* incremented each time an open occurs, used as unique ID.
731 starts at 1, so 0 can be used as uninitialized value
732 in the stream->id. */
733
734 u32 base_addr;
735 u32 irqmask;
736 struct timer_list dma_timer; /* Timer used to catch unfinished DMAs */
737
738 struct vbi_info vbi;
739
740 struct ivtv_mailbox_data enc_mbox;
741 struct ivtv_mailbox_data dec_mbox;
742 struct ivtv_api_cache api_cache[256]; /* Cached API Commands */
743
744 u8 card_rev;
745 volatile void __iomem *enc_mem, *dec_mem, *reg_mem;
746
747 u32 pgm_info_offset;
748 u32 pgm_info_num;
749 u32 pgm_info_write_idx;
750 u32 pgm_info_read_idx;
751 struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX];
752
753 u64 mpg_data_received;
754 u64 vbi_data_inserted;
755
756 wait_queue_head_t cap_w;
757 /* when the next decoder event arrives this queue is woken up */
758 wait_queue_head_t event_waitq;
759 /* when the next decoder vsync arrives this queue is woken up */
760 wait_queue_head_t vsync_waitq;
761 /* when the current DMA is finished this queue is woken up */
762 wait_queue_head_t dma_waitq;
763
764 /* OSD support */
765 unsigned long osd_video_pbase;
766 int osd_global_alpha_state; /* 0=off : 1=on */
767 int osd_local_alpha_state; /* 0=off : 1=on */
768 int osd_color_key_state; /* 0=off : 1=on */
769 u8 osd_global_alpha; /* Current global alpha */
770 u32 osd_color_key; /* Current color key */
771 u32 osd_pixelformat; /* Current pixel format */
772 struct v4l2_rect osd_rect; /* Current OSD position and size */
773 struct v4l2_rect main_rect; /* Current Main window position and size */
774
775 u32 last_dec_timing[3]; /* Store last retrieved pts/scr/frame values */
776
777 /* i2c */
778 struct i2c_adapter i2c_adap;
779 struct i2c_algo_bit_data i2c_algo;
780 struct i2c_client i2c_client;
781 struct mutex i2c_bus_lock;
782 int i2c_state;
783 struct i2c_client *i2c_clients[I2C_CLIENTS_MAX];
784
785 /* v4l2 and User settings */
786
787 /* codec settings */
788 struct cx2341x_mpeg_params params;
789 u32 audio_input;
790 u32 active_input;
791 u32 active_output;
792 v4l2_std_id std;
793 v4l2_std_id std_out;
794 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
795 u8 audio_stereo_mode;
796 u8 audio_bilingual_mode;
797
798 /* dualwatch */
799 unsigned long dualwatch_jiffies;
800 u16 dualwatch_stereo_mode;
801
802 /* Digitizer type */
803 int digitizer; /* 0x00EF = saa7114 0x00FO = saa7115 0x0106 = mic */
804
805 u32 lastVsyncFrame;
806
807 struct yuv_playback_info yuv_info;
808 struct osd_info *osd_info;
809};
810
811/* Globals */
812extern struct ivtv *ivtv_cards[];
813extern int ivtv_cards_active;
814extern int ivtv_first_minor;
815extern spinlock_t ivtv_cards_lock;
816
817/*==============Prototypes==================*/
818
819/* Hardware/IRQ */
820void ivtv_set_irq_mask(struct ivtv *itv, u32 mask);
821void ivtv_clear_irq_mask(struct ivtv *itv, u32 mask);
822
823/* try to set output mode, return current mode. */
824int ivtv_set_output_mode(struct ivtv *itv, int mode);
825
826/* return current output stream based on current mode */
827struct ivtv_stream *ivtv_get_output_stream(struct ivtv *itv);
828
829/* Return non-zero if a signal is pending */
830int ivtv_sleep_timeout(int timeout, int intr);
831
832/* Wait on queue, returns -EINTR if interrupted */
833int ivtv_waitq(wait_queue_head_t *waitq);
834
835/* Read Hauppauge eeprom */
836struct tveeprom; /* forward reference */
837void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);
838
839/* This is a PCI post thing, where if the pci register is not read, then
840 the write doesn't always take effect right away. By reading back the
841 register any pending PCI writes will be performed (in order), and so
842 you can be sure that the writes are guaranteed to be done.
843
844 Rarely needed, only in some timing sensitive cases.
845 Apparently if this is not done some motherboards seem
846 to kill the firmware and get into the broken state until computer is
847 rebooted. */
848#define write_sync(val, reg) \
849 do { writel(val, reg); readl(reg); } while (0)
850
851#define read_reg(reg) readl(itv->reg_mem + (reg))
852#define write_reg(val, reg) writel(val, itv->reg_mem + (reg))
853#define write_reg_sync(val, reg) \
854 do { write_reg(val, reg); read_reg(reg); } while (0)
855
856#define read_enc(addr) readl(itv->enc_mem + (u32)(addr))
857#define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr))
858#define write_enc_sync(val, addr) \
859 do { write_enc(val, addr); read_enc(addr); } while (0)
860
861#define read_dec(addr) readl(itv->dec_mem + (u32)(addr))
862#define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr))
863#define write_dec_sync(val, addr) \
864 do { write_dec(val, addr); read_dec(addr); } while (0)
865
866#endif /* IVTV_DRIVER_H */