diff options
author | Jean-Francois Moine <moinejf@free.fr> | 2009-11-02 07:56:59 -0500 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2009-12-05 15:41:18 -0500 |
commit | 98941e4dade35ab2e83c9bc796fdc76ed3636a75 (patch) | |
tree | 66c958f674d604cb29220acf9645c918780b1db0 /drivers/media/video/gspca/sonixj.c | |
parent | 3fccb774ef6e43c2d80d322a5b52564db3067ef8 (diff) |
V4L/DVB (13304): gspca - sonixj: Don't access the sensor when setting the bridge.
Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/video/gspca/sonixj.c')
-rw-r--r-- | drivers/media/video/gspca/sonixj.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/media/video/gspca/sonixj.c b/drivers/media/video/gspca/sonixj.c index c1b6c9565584..bd076605c4bb 100644 --- a/drivers/media/video/gspca/sonixj.c +++ b/drivers/media/video/gspca/sonixj.c | |||
@@ -304,7 +304,7 @@ static const u8 sn_hv7131[0x1c] = { | |||
304 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */ | 304 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */ |
305 | 0x00, 0x03, 0x64, 0x00, 0x1a, 0x20, 0x20, 0x20, | 305 | 0x00, 0x03, 0x64, 0x00, 0x1a, 0x20, 0x20, 0x20, |
306 | /* reg8 reg9 rega regb regc regd rege regf */ | 306 | /* reg8 reg9 rega regb regc regd rege regf */ |
307 | 0xa1, 0x11, 0x02, 0x09, 0x00, 0x00, 0x00, 0x10, | 307 | 0x81, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
308 | /* reg10 reg11 reg12 reg13 reg14 reg15 reg16 reg17 */ | 308 | /* reg10 reg11 reg12 reg13 reg14 reg15 reg16 reg17 */ |
309 | 0x03, 0x00, 0x00, 0x01, 0x03, 0x28, 0x1e, 0x41, | 309 | 0x03, 0x00, 0x00, 0x01, 0x03, 0x28, 0x1e, 0x41, |
310 | /* reg18 reg19 reg1a reg1b */ | 310 | /* reg18 reg19 reg1a reg1b */ |
@@ -315,7 +315,7 @@ static const u8 sn_mi0360[0x1c] = { | |||
315 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */ | 315 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */ |
316 | 0x00, 0x61, 0x44, 0x00, 0x1a, 0x20, 0x20, 0x20, | 316 | 0x00, 0x61, 0x44, 0x00, 0x1a, 0x20, 0x20, 0x20, |
317 | /* reg8 reg9 rega regb regc regd rege regf */ | 317 | /* reg8 reg9 rega regb regc regd rege regf */ |
318 | 0xb1, 0x5d, 0x07, 0x00, 0x00, 0x00, 0x00, 0x10, | 318 | 0x81, 0x5d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
319 | /* reg10 reg11 reg12 reg13 reg14 reg15 reg16 reg17 */ | 319 | /* reg10 reg11 reg12 reg13 reg14 reg15 reg16 reg17 */ |
320 | 0x03, 0x00, 0x00, 0x02, 0x0a, 0x28, 0x1e, 0x61, | 320 | 0x03, 0x00, 0x00, 0x02, 0x0a, 0x28, 0x1e, 0x61, |
321 | /* reg18 reg19 reg1a reg1b */ | 321 | /* reg18 reg19 reg1a reg1b */ |
@@ -337,7 +337,7 @@ static const u8 sn_mt9v111[0x1c] = { | |||
337 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */ | 337 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */ |
338 | 0x00, 0x61, 0x40, 0x00, 0x1a, 0x20, 0x20, 0x20, | 338 | 0x00, 0x61, 0x40, 0x00, 0x1a, 0x20, 0x20, 0x20, |
339 | /* reg8 reg9 rega regb regc regd rege regf */ | 339 | /* reg8 reg9 rega regb regc regd rege regf */ |
340 | 0x81, 0x5c, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, | 340 | 0x81, 0x5c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
341 | /* reg10 reg11 reg12 reg13 reg14 reg15 reg16 reg17 */ | 341 | /* reg10 reg11 reg12 reg13 reg14 reg15 reg16 reg17 */ |
342 | 0x03, 0x00, 0x00, 0x02, 0x1c, 0x28, 0x1e, 0x40, | 342 | 0x03, 0x00, 0x00, 0x02, 0x1c, 0x28, 0x1e, 0x40, |
343 | /* reg18 reg19 reg1a reg1b */ | 343 | /* reg18 reg19 reg1a reg1b */ |
@@ -359,7 +359,7 @@ static const u8 sn_ov7630[0x1c] = { | |||
359 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */ | 359 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */ |
360 | 0x00, 0x21, 0x40, 0x00, 0x1a, 0x20, 0x1f, 0x20, | 360 | 0x00, 0x21, 0x40, 0x00, 0x1a, 0x20, 0x1f, 0x20, |
361 | /* reg8 reg9 rega regb regc regd rege regf */ | 361 | /* reg8 reg9 rega regb regc regd rege regf */ |
362 | 0xa1, 0x21, 0x76, 0x21, 0x00, 0x00, 0x00, 0x10, | 362 | 0x81, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
363 | /* reg10 reg11 reg12 reg13 reg14 reg15 reg16 reg17 */ | 363 | /* reg10 reg11 reg12 reg13 reg14 reg15 reg16 reg17 */ |
364 | 0x03, 0x00, 0x04, 0x01, 0x0a, 0x28, 0x1e, 0xc2, | 364 | 0x03, 0x00, 0x04, 0x01, 0x0a, 0x28, 0x1e, 0xc2, |
365 | /* reg18 reg19 reg1a reg1b */ | 365 | /* reg18 reg19 reg1a reg1b */ |
@@ -370,7 +370,7 @@ static const u8 sn_ov7648[0x1c] = { | |||
370 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */ | 370 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */ |
371 | 0x00, 0x63, 0x40, 0x00, 0x1a, 0x20, 0x20, 0x20, | 371 | 0x00, 0x63, 0x40, 0x00, 0x1a, 0x20, 0x20, 0x20, |
372 | /* reg8 reg9 rega regb regc regd rege regf */ | 372 | /* reg8 reg9 rega regb regc regd rege regf */ |
373 | 0x81, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, | 373 | 0x81, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
374 | /* reg10 reg11 reg12 reg13 reg14 reg15 reg16 reg17 */ | 374 | /* reg10 reg11 reg12 reg13 reg14 reg15 reg16 reg17 */ |
375 | 0x03, 0x00, 0x00, 0x01, 0x00, 0x28, 0x1e, 0x00, | 375 | 0x03, 0x00, 0x00, 0x01, 0x00, 0x28, 0x1e, 0x00, |
376 | /* reg18 reg19 reg1a reg1b */ | 376 | /* reg18 reg19 reg1a reg1b */ |
@@ -392,7 +392,7 @@ static const u8 sn_sp80708[0x1c] = { | |||
392 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */ | 392 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 */ |
393 | 0x00, 0x63, 0x60, 0x00, 0x1a, 0x20, 0x20, 0x20, | 393 | 0x00, 0x63, 0x60, 0x00, 0x1a, 0x20, 0x20, 0x20, |
394 | /* reg8 reg9 rega regb regc regd rege regf */ | 394 | /* reg8 reg9 rega regb regc regd rege regf */ |
395 | 0x81, 0x18, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, | 395 | 0x81, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
396 | /* reg10 reg11 reg12 reg13 reg14 reg15 reg16 reg17 */ | 396 | /* reg10 reg11 reg12 reg13 reg14 reg15 reg16 reg17 */ |
397 | 0x03, 0x00, 0x00, 0x03, 0x04, 0x28, 0x1e, 0x00, | 397 | 0x03, 0x00, 0x00, 0x03, 0x04, 0x28, 0x1e, 0x00, |
398 | /* reg18 reg19 reg1a reg1b */ | 398 | /* reg18 reg19 reg1a reg1b */ |