diff options
author | Jim Paris <jim@jtan.com> | 2008-12-04 02:28:27 -0500 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2008-12-30 06:38:54 -0500 |
commit | 47dfd21fbf4ba303b5fdfad6f4e110e57990803c (patch) | |
tree | d4f35c36e65993128b905f43d47807b5b0496daa /drivers/media/video/gspca/ov534.c | |
parent | 442a43f50fac8ce13f1b43ca7c5f54af6f91c65e (diff) |
V4L/DVB (9858): gspca - ov534: Initialization cleanup.
Signed-off-by: Jim Paris <jim@jtan.com>
Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/video/gspca/ov534.c')
-rw-r--r-- | drivers/media/video/gspca/ov534.c | 337 |
1 files changed, 159 insertions, 178 deletions
diff --git a/drivers/media/video/gspca/ov534.c b/drivers/media/video/gspca/ov534.c index a1c31bc53a3d..ee08e30e23cc 100644 --- a/drivers/media/video/gspca/ov534.c +++ b/drivers/media/video/gspca/ov534.c | |||
@@ -93,19 +93,6 @@ static u8 ov534_reg_read(struct usb_device *udev, u16 reg) | |||
93 | return data; | 93 | return data; |
94 | } | 94 | } |
95 | 95 | ||
96 | static void ov534_reg_verify_write(struct usb_device *udev, u16 reg, u8 val) | ||
97 | { | ||
98 | u8 data; | ||
99 | |||
100 | ov534_reg_write(udev, reg, val); | ||
101 | data = ov534_reg_read(udev, reg); | ||
102 | if (data != val) { | ||
103 | PDEBUG(D_ERR | D_USBO, | ||
104 | "unexpected result from read: 0x%02x != 0x%02x", val, | ||
105 | data); | ||
106 | } | ||
107 | } | ||
108 | |||
109 | /* Two bits control LED: 0x21 bit 7 and 0x23 bit 7. | 96 | /* Two bits control LED: 0x21 bit 7 and 0x23 bit 7. |
110 | * (direction and output)? */ | 97 | * (direction and output)? */ |
111 | static void ov534_set_led(struct usb_device *udev, int status) | 98 | static void ov534_set_led(struct usb_device *udev, int status) |
@@ -161,174 +148,168 @@ static void sccb_reg_write(struct usb_device *udev, u16 reg, u8 val) | |||
161 | PDEBUG(D_ERR, "sccb_reg_write failed"); | 148 | PDEBUG(D_ERR, "sccb_reg_write failed"); |
162 | } | 149 | } |
163 | 150 | ||
164 | /* setup method */ | 151 | static const __u8 ov534_reg_initdata[][2] = { |
165 | static void ov534_setup(struct usb_device *udev) | 152 | { 0xe7, 0x3a }, |
166 | { | 153 | |
167 | ov534_reg_verify_write(udev, 0xe7, 0x3a); | 154 | { OV534_REG_ADDRESS, 0x42 }, /* select OV772x sensor */ |
168 | 155 | ||
169 | ov534_reg_write(udev, OV534_REG_ADDRESS, 0x60); | 156 | { 0xc2, 0x0c }, |
170 | ov534_reg_write(udev, OV534_REG_ADDRESS, 0x60); | 157 | { 0x88, 0xf8 }, |
171 | ov534_reg_write(udev, OV534_REG_ADDRESS, 0x60); | 158 | { 0xc3, 0x69 }, |
172 | ov534_reg_write(udev, OV534_REG_ADDRESS, 0x42); | 159 | { 0x89, 0xff }, |
173 | 160 | { 0x76, 0x03 }, | |
174 | ov534_reg_verify_write(udev, 0xc2, 0x0c); | 161 | { 0x92, 0x01 }, |
175 | ov534_reg_verify_write(udev, 0x88, 0xf8); | 162 | { 0x93, 0x18 }, |
176 | ov534_reg_verify_write(udev, 0xc3, 0x69); | 163 | { 0x94, 0x10 }, |
177 | ov534_reg_verify_write(udev, 0x89, 0xff); | 164 | { 0x95, 0x10 }, |
178 | ov534_reg_verify_write(udev, 0x76, 0x03); | 165 | { 0xe2, 0x00 }, |
179 | ov534_reg_verify_write(udev, 0x92, 0x01); | 166 | { 0xe7, 0x3e }, |
180 | ov534_reg_verify_write(udev, 0x93, 0x18); | 167 | |
181 | ov534_reg_verify_write(udev, 0x94, 0x10); | 168 | { 0x1c, 0x0a }, |
182 | ov534_reg_verify_write(udev, 0x95, 0x10); | 169 | { 0x1d, 0x22 }, |
183 | ov534_reg_verify_write(udev, 0xe2, 0x00); | 170 | { 0x1d, 0x06 }, |
184 | ov534_reg_verify_write(udev, 0xe7, 0x3e); | 171 | |
185 | 172 | { 0x96, 0x00 }, | |
186 | ov534_reg_write(udev, 0x1c, 0x0a); | 173 | |
187 | ov534_reg_write(udev, 0x1d, 0x22); | 174 | { 0x97, 0x20 }, |
188 | ov534_reg_write(udev, 0x1d, 0x06); | 175 | { 0x97, 0x20 }, |
189 | 176 | { 0x97, 0x20 }, | |
190 | ov534_reg_verify_write(udev, 0x96, 0x00); | 177 | { 0x97, 0x0a }, |
191 | 178 | { 0x97, 0x3f }, | |
192 | ov534_reg_write(udev, 0x97, 0x20); | 179 | { 0x97, 0x4a }, |
193 | ov534_reg_write(udev, 0x97, 0x20); | 180 | { 0x97, 0x20 }, |
194 | ov534_reg_write(udev, 0x97, 0x20); | 181 | { 0x97, 0x15 }, |
195 | ov534_reg_write(udev, 0x97, 0x0a); | 182 | { 0x97, 0x0b }, |
196 | ov534_reg_write(udev, 0x97, 0x3f); | 183 | |
197 | ov534_reg_write(udev, 0x97, 0x4a); | 184 | { 0x8e, 0x40 }, |
198 | ov534_reg_write(udev, 0x97, 0x20); | 185 | { 0x1f, 0x81 }, |
199 | ov534_reg_write(udev, 0x97, 0x15); | 186 | { 0x34, 0x05 }, |
200 | ov534_reg_write(udev, 0x97, 0x0b); | 187 | { 0xe3, 0x04 }, |
201 | 188 | { 0x88, 0x00 }, | |
202 | ov534_reg_verify_write(udev, 0x8e, 0x40); | 189 | { 0x89, 0x00 }, |
203 | ov534_reg_verify_write(udev, 0x1f, 0x81); | 190 | { 0x76, 0x00 }, |
204 | ov534_reg_verify_write(udev, 0x34, 0x05); | 191 | { 0xe7, 0x2e }, |
205 | ov534_reg_verify_write(udev, 0xe3, 0x04); | 192 | { 0x31, 0xf9 }, |
206 | ov534_reg_verify_write(udev, 0x88, 0x00); | 193 | { 0x25, 0x42 }, |
207 | ov534_reg_verify_write(udev, 0x89, 0x00); | 194 | { 0x21, 0xf0 }, |
208 | ov534_reg_verify_write(udev, 0x76, 0x00); | 195 | |
209 | ov534_reg_verify_write(udev, 0xe7, 0x2e); | 196 | { 0x1c, 0x00 }, |
210 | ov534_reg_verify_write(udev, 0x31, 0xf9); | 197 | { 0x1d, 0x40 }, |
211 | ov534_reg_verify_write(udev, 0x25, 0x42); | 198 | { 0x1d, 0x02 }, |
212 | ov534_reg_verify_write(udev, 0x21, 0xf0); | 199 | { 0x1d, 0x00 }, |
213 | 200 | { 0x1d, 0x02 }, | |
214 | ov534_reg_write(udev, 0x1c, 0x00); | 201 | { 0x1d, 0x57 }, |
215 | ov534_reg_write(udev, 0x1d, 0x40); | 202 | { 0x1d, 0xff }, |
216 | ov534_reg_write(udev, 0x1d, 0x02); | 203 | |
217 | ov534_reg_write(udev, 0x1d, 0x00); | 204 | { 0x8d, 0x1c }, |
218 | ov534_reg_write(udev, 0x1d, 0x02); | 205 | { 0x8e, 0x80 }, |
219 | ov534_reg_write(udev, 0x1d, 0x57); | 206 | { 0xe5, 0x04 }, |
220 | ov534_reg_write(udev, 0x1d, 0xff); | 207 | |
221 | 208 | { 0xc0, 0x50 }, | |
222 | ov534_reg_verify_write(udev, 0x8d, 0x1c); | 209 | { 0xc1, 0x3c }, |
223 | ov534_reg_verify_write(udev, 0x8e, 0x80); | 210 | { 0xc2, 0x0c }, |
224 | ov534_reg_verify_write(udev, 0xe5, 0x04); | 211 | }; |
225 | |||
226 | ov534_set_led(udev, 1); | ||
227 | |||
228 | sccb_reg_write(udev, 0x12, 0x80); | ||
229 | sccb_reg_write(udev, 0x11, 0x01); | ||
230 | sccb_reg_write(udev, 0x11, 0x01); | ||
231 | sccb_reg_write(udev, 0x11, 0x01); | ||
232 | sccb_reg_write(udev, 0x11, 0x01); | ||
233 | sccb_reg_write(udev, 0x11, 0x01); | ||
234 | sccb_reg_write(udev, 0x11, 0x01); | ||
235 | sccb_reg_write(udev, 0x11, 0x01); | ||
236 | sccb_reg_write(udev, 0x11, 0x01); | ||
237 | sccb_reg_write(udev, 0x11, 0x01); | ||
238 | sccb_reg_write(udev, 0x11, 0x01); | ||
239 | sccb_reg_write(udev, 0x11, 0x01); | ||
240 | |||
241 | ov534_set_led(udev, 0); | ||
242 | |||
243 | sccb_reg_write(udev, 0x3d, 0x03); | ||
244 | sccb_reg_write(udev, 0x17, 0x26); | ||
245 | sccb_reg_write(udev, 0x18, 0xa0); | ||
246 | sccb_reg_write(udev, 0x19, 0x07); | ||
247 | sccb_reg_write(udev, 0x1a, 0xf0); | ||
248 | sccb_reg_write(udev, 0x32, 0x00); | ||
249 | sccb_reg_write(udev, 0x29, 0xa0); | ||
250 | sccb_reg_write(udev, 0x2c, 0xf0); | ||
251 | sccb_reg_write(udev, 0x65, 0x20); | ||
252 | sccb_reg_write(udev, 0x11, 0x01); | ||
253 | sccb_reg_write(udev, 0x42, 0x7f); | ||
254 | sccb_reg_write(udev, 0x63, 0xe0); | ||
255 | sccb_reg_write(udev, 0x64, 0xff); | ||
256 | sccb_reg_write(udev, 0x66, 0x00); | ||
257 | sccb_reg_write(udev, 0x13, 0xf0); | ||
258 | sccb_reg_write(udev, 0x0d, 0x41); | ||
259 | sccb_reg_write(udev, 0x0f, 0xc5); | ||
260 | sccb_reg_write(udev, 0x14, 0x11); | ||
261 | |||
262 | ov534_set_led(udev, 1); | ||
263 | |||
264 | sccb_reg_write(udev, 0x22, 0x7f); | ||
265 | sccb_reg_write(udev, 0x23, 0x03); | ||
266 | sccb_reg_write(udev, 0x24, 0x40); | ||
267 | sccb_reg_write(udev, 0x25, 0x30); | ||
268 | sccb_reg_write(udev, 0x26, 0xa1); | ||
269 | sccb_reg_write(udev, 0x2a, 0x00); | ||
270 | sccb_reg_write(udev, 0x2b, 0x00); | ||
271 | sccb_reg_write(udev, 0x6b, 0xaa); | ||
272 | sccb_reg_write(udev, 0x13, 0xff); | ||
273 | 212 | ||
274 | ov534_set_led(udev, 0); | 213 | static const __u8 ov772x_reg_initdata[][2] = { |
214 | { 0x12, 0x80 }, | ||
215 | { 0x11, 0x01 }, | ||
216 | |||
217 | { 0x3d, 0x03 }, | ||
218 | { 0x17, 0x26 }, | ||
219 | { 0x18, 0xa0 }, | ||
220 | { 0x19, 0x07 }, | ||
221 | { 0x1a, 0xf0 }, | ||
222 | { 0x32, 0x00 }, | ||
223 | { 0x29, 0xa0 }, | ||
224 | { 0x2c, 0xf0 }, | ||
225 | { 0x65, 0x20 }, | ||
226 | { 0x11, 0x01 }, | ||
227 | { 0x42, 0x7f }, | ||
228 | { 0x63, 0xe0 }, | ||
229 | { 0x64, 0xff }, | ||
230 | { 0x66, 0x00 }, | ||
231 | { 0x13, 0xf0 }, | ||
232 | { 0x0d, 0x41 }, | ||
233 | { 0x0f, 0xc5 }, | ||
234 | { 0x14, 0x11 }, | ||
235 | |||
236 | { 0x22, 0x7f }, | ||
237 | { 0x23, 0x03 }, | ||
238 | { 0x24, 0x40 }, | ||
239 | { 0x25, 0x30 }, | ||
240 | { 0x26, 0xa1 }, | ||
241 | { 0x2a, 0x00 }, | ||
242 | { 0x2b, 0x00 }, | ||
243 | { 0x6b, 0xaa }, | ||
244 | { 0x13, 0xff }, | ||
245 | |||
246 | { 0x90, 0x05 }, | ||
247 | { 0x91, 0x01 }, | ||
248 | { 0x92, 0x03 }, | ||
249 | { 0x93, 0x00 }, | ||
250 | { 0x94, 0x60 }, | ||
251 | { 0x95, 0x3c }, | ||
252 | { 0x96, 0x24 }, | ||
253 | { 0x97, 0x1e }, | ||
254 | { 0x98, 0x62 }, | ||
255 | { 0x99, 0x80 }, | ||
256 | { 0x9a, 0x1e }, | ||
257 | { 0x9b, 0x08 }, | ||
258 | { 0x9c, 0x20 }, | ||
259 | { 0x9e, 0x81 }, | ||
260 | |||
261 | { 0xa6, 0x04 }, | ||
262 | { 0x7e, 0x0c }, | ||
263 | { 0x7f, 0x16 }, | ||
264 | { 0x80, 0x2a }, | ||
265 | { 0x81, 0x4e }, | ||
266 | { 0x82, 0x61 }, | ||
267 | { 0x83, 0x6f }, | ||
268 | { 0x84, 0x7b }, | ||
269 | { 0x85, 0x86 }, | ||
270 | { 0x86, 0x8e }, | ||
271 | { 0x87, 0x97 }, | ||
272 | { 0x88, 0xa4 }, | ||
273 | { 0x89, 0xaf }, | ||
274 | { 0x8a, 0xc5 }, | ||
275 | { 0x8b, 0xd7 }, | ||
276 | { 0x8c, 0xe8 }, | ||
277 | { 0x8d, 0x20 }, | ||
278 | |||
279 | { 0x0c, 0x90 }, | ||
280 | |||
281 | { 0x2b, 0x00 }, | ||
282 | { 0x22, 0x7f }, | ||
283 | { 0x23, 0x03 }, | ||
284 | { 0x11, 0x01 }, | ||
285 | { 0x0c, 0xd0 }, | ||
286 | { 0x64, 0xff }, | ||
287 | { 0x0d, 0x41 }, | ||
288 | |||
289 | { 0x14, 0x41 }, | ||
290 | { 0x0e, 0xcd }, | ||
291 | { 0xac, 0xbf }, | ||
292 | { 0x8e, 0x00 }, | ||
293 | { 0x0c, 0xd0 } | ||
294 | }; | ||
275 | 295 | ||
276 | sccb_reg_write(udev, 0x90, 0x05); | ||
277 | sccb_reg_write(udev, 0x91, 0x01); | ||
278 | sccb_reg_write(udev, 0x92, 0x03); | ||
279 | sccb_reg_write(udev, 0x93, 0x00); | ||
280 | sccb_reg_write(udev, 0x94, 0x60); | ||
281 | sccb_reg_write(udev, 0x95, 0x3c); | ||
282 | sccb_reg_write(udev, 0x96, 0x24); | ||
283 | sccb_reg_write(udev, 0x97, 0x1e); | ||
284 | sccb_reg_write(udev, 0x98, 0x62); | ||
285 | sccb_reg_write(udev, 0x99, 0x80); | ||
286 | sccb_reg_write(udev, 0x9a, 0x1e); | ||
287 | sccb_reg_write(udev, 0x9b, 0x08); | ||
288 | sccb_reg_write(udev, 0x9c, 0x20); | ||
289 | sccb_reg_write(udev, 0x9e, 0x81); | ||
290 | 296 | ||
291 | ov534_set_led(udev, 1); | 297 | /* setup method */ |
298 | static void ov534_setup(struct usb_device *udev) | ||
299 | { | ||
300 | int i; | ||
292 | 301 | ||
293 | sccb_reg_write(udev, 0xa6, 0x04); | 302 | /* Initialize bridge chip */ |
294 | sccb_reg_write(udev, 0x7e, 0x0c); | 303 | for (i = 0; i < ARRAY_SIZE(ov534_reg_initdata); i++) |
295 | sccb_reg_write(udev, 0x7f, 0x16); | 304 | ov534_reg_write(udev, ov534_reg_initdata[i][0], |
296 | sccb_reg_write(udev, 0x80, 0x2a); | 305 | ov534_reg_initdata[i][1]); |
297 | sccb_reg_write(udev, 0x81, 0x4e); | ||
298 | sccb_reg_write(udev, 0x82, 0x61); | ||
299 | sccb_reg_write(udev, 0x83, 0x6f); | ||
300 | sccb_reg_write(udev, 0x84, 0x7b); | ||
301 | sccb_reg_write(udev, 0x85, 0x86); | ||
302 | sccb_reg_write(udev, 0x86, 0x8e); | ||
303 | sccb_reg_write(udev, 0x87, 0x97); | ||
304 | sccb_reg_write(udev, 0x88, 0xa4); | ||
305 | sccb_reg_write(udev, 0x89, 0xaf); | ||
306 | sccb_reg_write(udev, 0x8a, 0xc5); | ||
307 | sccb_reg_write(udev, 0x8b, 0xd7); | ||
308 | sccb_reg_write(udev, 0x8c, 0xe8); | ||
309 | sccb_reg_write(udev, 0x8d, 0x20); | ||
310 | |||
311 | sccb_reg_write(udev, 0x0c, 0x90); | ||
312 | |||
313 | ov534_reg_verify_write(udev, 0xc0, 0x50); | ||
314 | ov534_reg_verify_write(udev, 0xc1, 0x3c); | ||
315 | ov534_reg_verify_write(udev, 0xc2, 0x0c); | ||
316 | 306 | ||
317 | ov534_set_led(udev, 1); | 307 | ov534_set_led(udev, 1); |
318 | 308 | ||
319 | sccb_reg_write(udev, 0x2b, 0x00); | 309 | /* Initialize sensor */ |
320 | sccb_reg_write(udev, 0x22, 0x7f); | 310 | for (i = 0; i < ARRAY_SIZE(ov772x_reg_initdata); i++) |
321 | sccb_reg_write(udev, 0x23, 0x03); | 311 | sccb_reg_write(udev, ov772x_reg_initdata[i][0], |
322 | sccb_reg_write(udev, 0x11, 0x01); | 312 | ov772x_reg_initdata[i][1]); |
323 | sccb_reg_write(udev, 0x0c, 0xd0); | ||
324 | sccb_reg_write(udev, 0x64, 0xff); | ||
325 | sccb_reg_write(udev, 0x0d, 0x41); | ||
326 | |||
327 | sccb_reg_write(udev, 0x14, 0x41); | ||
328 | sccb_reg_write(udev, 0x0e, 0xcd); | ||
329 | sccb_reg_write(udev, 0xac, 0xbf); | ||
330 | sccb_reg_write(udev, 0x8e, 0x00); | ||
331 | sccb_reg_write(udev, 0x0c, 0xd0); | ||
332 | 313 | ||
333 | ov534_reg_write(udev, 0xe0, 0x09); | 314 | ov534_reg_write(udev, 0xe0, 0x09); |
334 | ov534_set_led(udev, 0); | 315 | ov534_set_led(udev, 0); |
@@ -374,24 +355,24 @@ static int sd_init(struct gspca_dev *gspca_dev) | |||
374 | case 50: | 355 | case 50: |
375 | sccb_reg_write(gspca_dev->dev, 0x11, 0x01); | 356 | sccb_reg_write(gspca_dev->dev, 0x11, 0x01); |
376 | sccb_reg_write(gspca_dev->dev, 0x0d, 0x41); | 357 | sccb_reg_write(gspca_dev->dev, 0x0d, 0x41); |
377 | ov534_reg_verify_write(gspca_dev->dev, 0xe5, 0x02); | 358 | ov534_reg_write(gspca_dev->dev, 0xe5, 0x02); |
378 | break; | 359 | break; |
379 | case 40: | 360 | case 40: |
380 | sccb_reg_write(gspca_dev->dev, 0x11, 0x02); | 361 | sccb_reg_write(gspca_dev->dev, 0x11, 0x02); |
381 | sccb_reg_write(gspca_dev->dev, 0x0d, 0xc1); | 362 | sccb_reg_write(gspca_dev->dev, 0x0d, 0xc1); |
382 | ov534_reg_verify_write(gspca_dev->dev, 0xe5, 0x04); | 363 | ov534_reg_write(gspca_dev->dev, 0xe5, 0x04); |
383 | break; | 364 | break; |
384 | /* case 30: */ | 365 | /* case 30: */ |
385 | default: | 366 | default: |
386 | fr = 30; | 367 | fr = 30; |
387 | sccb_reg_write(gspca_dev->dev, 0x11, 0x04); | 368 | sccb_reg_write(gspca_dev->dev, 0x11, 0x04); |
388 | sccb_reg_write(gspca_dev->dev, 0x0d, 0x81); | 369 | sccb_reg_write(gspca_dev->dev, 0x0d, 0x81); |
389 | ov534_reg_verify_write(gspca_dev->dev, 0xe5, 0x02); | 370 | ov534_reg_write(gspca_dev->dev, 0xe5, 0x02); |
390 | break; | 371 | break; |
391 | case 15: | 372 | case 15: |
392 | sccb_reg_write(gspca_dev->dev, 0x11, 0x03); | 373 | sccb_reg_write(gspca_dev->dev, 0x11, 0x03); |
393 | sccb_reg_write(gspca_dev->dev, 0x0d, 0x41); | 374 | sccb_reg_write(gspca_dev->dev, 0x0d, 0x41); |
394 | ov534_reg_verify_write(gspca_dev->dev, 0xe5, 0x04); | 375 | ov534_reg_write(gspca_dev->dev, 0xe5, 0x04); |
395 | break; | 376 | break; |
396 | } | 377 | } |
397 | 378 | ||