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authorJean-Francois Moine <moinejf@free.fr>2008-07-04 10:16:16 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-07-20 06:16:53 -0400
commita5ae2062252e697d38e53dbbeb91460252208914 (patch)
tree38706e9f36e2d93cd3dee8eea639bb74a17b3efa /drivers/media/video/gspca/etoms.c
parent54ab92ca05550550bcec2462de2605f35d079b66 (diff)
V4L/DVB (8195): gspca: Input buffer overwritten in spca561 + cleanup code.
spca561: Input buffer may be changed on reg write. (all sd): Cleanup code, 'const' added. Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/video/gspca/etoms.c')
-rw-r--r--drivers/media/video/gspca/etoms.c546
1 files changed, 209 insertions, 337 deletions
diff --git a/drivers/media/video/gspca/etoms.c b/drivers/media/video/gspca/etoms.c
index ed7a8f9c0d7a..bbbe65923cfc 100644
--- a/drivers/media/video/gspca/etoms.c
+++ b/drivers/media/video/gspca/etoms.c
@@ -22,8 +22,8 @@
22 22
23#include "gspca.h" 23#include "gspca.h"
24 24
25#define DRIVER_VERSION_NUMBER KERNEL_VERSION(2, 1, 3) 25#define DRIVER_VERSION_NUMBER KERNEL_VERSION(2, 1, 4)
26static const char version[] = "2.1.3"; 26static const char version[] = "2.1.4";
27 27
28MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>"); 28MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
29MODULE_DESCRIPTION("Etoms USB Camera Driver"); 29MODULE_DESCRIPTION("Etoms USB Camera Driver");
@@ -56,7 +56,6 @@ static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
56static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val); 56static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val);
57 57
58static struct ctrl sd_ctrls[] = { 58static struct ctrl sd_ctrls[] = {
59#define SD_BRIGHTNESS 0
60 { 59 {
61 { 60 {
62 .id = V4L2_CID_BRIGHTNESS, 61 .id = V4L2_CID_BRIGHTNESS,
@@ -65,12 +64,12 @@ static struct ctrl sd_ctrls[] = {
65 .minimum = 1, 64 .minimum = 1,
66 .maximum = 127, 65 .maximum = 127,
67 .step = 1, 66 .step = 1,
68 .default_value = 63, 67#define BRIGHTNESS_DEF 63
68 .default_value = BRIGHTNESS_DEF,
69 }, 69 },
70 .set = sd_setbrightness, 70 .set = sd_setbrightness,
71 .get = sd_getbrightness, 71 .get = sd_getbrightness,
72 }, 72 },
73#define SD_CONTRAST 1
74 { 73 {
75 { 74 {
76 .id = V4L2_CID_CONTRAST, 75 .id = V4L2_CID_CONTRAST,
@@ -79,12 +78,12 @@ static struct ctrl sd_ctrls[] = {
79 .minimum = 0, 78 .minimum = 0,
80 .maximum = 255, 79 .maximum = 255,
81 .step = 1, 80 .step = 1,
82 .default_value = 127, 81#define CONTRAST_DEF 127
82 .default_value = CONTRAST_DEF,
83 }, 83 },
84 .set = sd_setcontrast, 84 .set = sd_setcontrast,
85 .get = sd_getcontrast, 85 .get = sd_getcontrast,
86 }, 86 },
87#define SD_COLOR 2
88 { 87 {
89 { 88 {
90 .id = V4L2_CID_SATURATION, 89 .id = V4L2_CID_SATURATION,
@@ -93,12 +92,12 @@ static struct ctrl sd_ctrls[] = {
93 .minimum = 0, 92 .minimum = 0,
94 .maximum = 15, 93 .maximum = 15,
95 .step = 1, 94 .step = 1,
96 .default_value = 7, 95#define COLOR_DEF 7
96 .default_value = COLOR_DEF,
97 }, 97 },
98 .set = sd_setcolors, 98 .set = sd_setcolors,
99 .get = sd_getcolors, 99 .get = sd_getcolors,
100 }, 100 },
101#define SD_AUTOGAIN 3
102 { 101 {
103 { 102 {
104 .id = V4L2_CID_AUTOGAIN, 103 .id = V4L2_CID_AUTOGAIN,
@@ -107,7 +106,8 @@ static struct ctrl sd_ctrls[] = {
107 .minimum = 0, 106 .minimum = 0,
108 .maximum = 1, 107 .maximum = 1,
109 .step = 1, 108 .step = 1,
110 .default_value = 1, 109#define AUTOGAIN_DEF 1
110 .default_value = AUTOGAIN_DEF,
111 }, 111 },
112 .set = sd_setautogain, 112 .set = sd_setautogain,
113 .get = sd_getautogain, 113 .get = sd_getautogain,
@@ -205,13 +205,13 @@ static struct cam_mode sif_mode[] = {
205#define PAS106_REG0e 0x0e /* global gain [4..0](default 0x0e) */ 205#define PAS106_REG0e 0x0e /* global gain [4..0](default 0x0e) */
206#define PAS106_REG13 0x13 /* end i2c write */ 206#define PAS106_REG13 0x13 /* end i2c write */
207 207
208static __u8 GainRGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 }; 208static const __u8 GainRGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 };
209 209
210static __u8 I2c2[] = { 0x08, 0x08, 0x08, 0x08, 0x0d }; 210static const __u8 I2c2[] = { 0x08, 0x08, 0x08, 0x08, 0x0d };
211 211
212static __u8 I2c3[] = { 0x12, 0x05 }; 212static const __u8 I2c3[] = { 0x12, 0x05 };
213 213
214static __u8 I2c4[] = { 0x41, 0x08 }; 214static const __u8 I2c4[] = { 0x41, 0x08 };
215 215
216static void reg_r(struct usb_device *dev, 216static void reg_r(struct usb_device *dev,
217 __u16 index, __u8 *buffer, int len) 217 __u16 index, __u8 *buffer, int len)
@@ -223,8 +223,21 @@ static void reg_r(struct usb_device *dev,
223 0, index, buffer, len, 500); 223 0, index, buffer, len, 500);
224} 224}
225 225
226static void reg_w_val(struct usb_device *dev,
227 __u16 index, __u8 val)
228{
229 __u8 data;
230
231 data = val;
232 usb_control_msg(dev,
233 usb_sndctrlpipe(dev, 0),
234 0,
235 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
236 0, index, &data, 1, 500);
237}
238
226static void reg_w(struct usb_device *dev, 239static void reg_w(struct usb_device *dev,
227 __u16 index, __u8 *buffer, __u16 len) 240 __u16 index, const __u8 *buffer, __u16 len)
228{ 241{
229 __u8 tmpbuf[8]; 242 __u8 tmpbuf[8];
230 243
@@ -236,48 +249,42 @@ static void reg_w(struct usb_device *dev,
236 0, index, tmpbuf, len, 500); 249 0, index, tmpbuf, len, 500);
237} 250}
238 251
239static int Et_i2cwrite(struct usb_device *dev, __u8 reg, __u8 *buffer, 252static int Et_i2cwrite(struct usb_device *dev, __u8 reg,
240 __u16 length, __u8 mode) 253 const __u8 *buffer,
254 __u16 len, __u8 mode)
241{ 255{
242/* buffer should be [D0..D7] */ 256 /* buffer should be [D0..D7] */
243 int i, j; 257 __u8 ptchcount;
244 __u8 base = 0x40; /* sensor base for the pas106 */ 258
245 __u8 ptchcount = 0; 259 /* set the base address */
246 260 reg_w_val(dev, ET_I2C_BASE, 0x40); /* sensor base for the pas106 */
247 ptchcount = (((length & 0x07) << 4) | (mode & 0x03)); 261 /* set count and prefetch */
248/* set the base address */ 262 ptchcount = ((len & 0x07) << 4) | (mode & 0x03);
249 reg_w(dev, ET_I2C_BASE, &base, 1); 263 reg_w_val(dev, ET_I2C_COUNT, ptchcount);
250/* set count and prefetch */ 264 /* set the register base */
251 reg_w(dev, ET_I2C_COUNT, &ptchcount, 1); 265 reg_w_val(dev, ET_I2C_REG, reg);
252/* set the register base */ 266 while (--len >= 0)
253 reg_w(dev, ET_I2C_REG, &reg, 1); 267 reg_w_val(dev, ET_I2C_DATA0 + len, buffer[len]);
254 j = length - 1;
255 for (i = 0; i < length; i++) {
256 reg_w(dev, (ET_I2C_DATA0 + j), &buffer[j], 1);
257 j--;
258 }
259 return 0; 268 return 0;
260} 269}
261 270
262static int Et_i2cread(struct usb_device *dev, __u8 reg, __u8 *buffer, 271static int Et_i2cread(struct usb_device *dev, __u8 reg,
263 __u16 length, __u8 mode) 272 __u8 *buffer,
273 __u16 length, __u8 mode)
264{ 274{
265/* buffer should be [D0..D7] */ 275 /* buffer should be [D0..D7] */
266 int i, j; 276 int i, j;
267 __u8 base = 0x40; /* sensor base for the pas106 */
268 __u8 ptchcount; 277 __u8 ptchcount;
269 __u8 prefetch = 0x02; 278
270 279 /* set the base address */
271 ptchcount = (((length & 0x07) << 4) | (mode & 0x03)); 280 reg_w_val(dev, ET_I2C_BASE, 0x40); /* sensor base for the pas106 */
272/* set the base address */ 281 /* set count and prefetch */
273 reg_w(dev, ET_I2C_BASE, &base, 1); 282 ptchcount = ((length & 0x07) << 4) | (mode & 0x03);
274/* set count and prefetch */ 283 reg_w_val(dev, ET_I2C_COUNT, ptchcount);
275 reg_w(dev, ET_I2C_COUNT, &ptchcount, 1); 284 /* set the register base */
276/* set the register base */ 285 reg_w_val(dev, ET_I2C_REG, reg);
277 reg_w(dev, ET_I2C_REG, &reg, 1); 286 reg_w_val(dev, ET_I2C_PREFETCH, 0x02); /* prefetch */
278 reg_w(dev, ET_I2C_PREFETCH, &prefetch, 1); 287 reg_w_val(dev, ET_I2C_PREFETCH, 0);
279 prefetch = 0x00;
280 reg_w(dev, ET_I2C_PREFETCH, &prefetch, 1);
281 j = length - 1; 288 j = length - 1;
282 for (i = 0; i < length; i++) { 289 for (i = 0; i < length; i++) {
283 reg_r(dev, (ET_I2C_DATA0 + j), &buffer[j], 1); 290 reg_r(dev, (ET_I2C_DATA0 + j), &buffer[j], 1);
@@ -299,222 +306,139 @@ static int Et_WaitStatus(struct usb_device *dev)
299 return 0; 306 return 0;
300} 307}
301 308
302static int Et_videoOff(struct usb_device *dev) 309static int et_video(struct usb_device *dev, int on)
303{ 310{
304 int err; 311 int err;
305 __u8 stopvideo = 0;
306 312
307 reg_w(dev, ET_GPIO_OUT, &stopvideo, 1); 313 reg_w_val(dev, ET_GPIO_OUT, on
314 ? 0x10 /* startvideo - set Bit5 */
315 : 0); /* stopvideo */
308 err = Et_WaitStatus(dev); 316 err = Et_WaitStatus(dev);
309 if (!err) 317 if (!err)
310 PDEBUG(D_ERR, "timeout Et_waitStatus VideoON"); 318 PDEBUG(D_ERR, "timeout video on/off");
311 return err;
312}
313
314static int Et_videoOn(struct usb_device *dev)
315{
316 int err;
317 __u8 startvideo = 0x10; /* set Bit5 */
318
319 reg_w(dev, ET_GPIO_OUT, &startvideo, 1);
320 err = Et_WaitStatus(dev);
321 if (!err)
322 PDEBUG(D_ERR, "timeout Et_waitStatus VideoOFF");
323 return err; 319 return err;
324} 320}
325 321
326static void Et_init2(struct gspca_dev *gspca_dev) 322static void Et_init2(struct gspca_dev *gspca_dev)
327{ 323{
328 struct usb_device *dev = gspca_dev->dev; 324 struct usb_device *dev = gspca_dev->dev;
329 __u8 value = 0x00; 325 __u8 value;
330 __u8 received = 0x00; 326 __u8 received;
331 __u8 FormLine[] = { 0x84, 0x03, 0x14, 0xf4, 0x01, 0x05 }; 327 static const __u8 FormLine[] = { 0x84, 0x03, 0x14, 0xf4, 0x01, 0x05 };
332 328
333 PDEBUG(D_STREAM, "Open Init2 ET"); 329 PDEBUG(D_STREAM, "Open Init2 ET");
334 value = 0x2f; 330 reg_w_val(dev, ET_GPIO_DIR_CTRL, 0x2f);
335 reg_w(dev, ET_GPIO_DIR_CTRL, &value, 1); 331 reg_w_val(dev, ET_GPIO_OUT, 0x10);
336 value = 0x10;
337 reg_w(dev, ET_GPIO_OUT, &value, 1);
338 reg_r(dev, ET_GPIO_IN, &received, 1); 332 reg_r(dev, ET_GPIO_IN, &received, 1);
339 value = 0x14; /* 0x14 // 0x16 enabled pattern */ 333 reg_w_val(dev, ET_ClCK, 0x14); /* 0x14 // 0x16 enabled pattern */
340 reg_w(dev, ET_ClCK, &value, 1); 334 reg_w_val(dev, ET_CTRL, 0x1b);
341 value = 0x1b;
342 reg_w(dev, ET_CTRL, &value, 1);
343 335
344 /* compression et subsampling */ 336 /* compression et subsampling */
345 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode) 337 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode)
346 value = ET_COMP_VAL1; /* 320 */ 338 value = ET_COMP_VAL1; /* 320 */
347 else 339 else
348 value = ET_COMP_VAL0; /* 640 */ 340 value = ET_COMP_VAL0; /* 640 */
349 reg_w(dev, ET_COMP, &value, 1); 341 reg_w_val(dev, ET_COMP, value);
350 value = 0x1f; 342 reg_w_val(dev, ET_MAXQt, 0x1f);
351 reg_w(dev, ET_MAXQt, &value, 1); 343 reg_w_val(dev, ET_MINQt, 0x04);
352 value = 0x04;
353 reg_w(dev, ET_MINQt, &value, 1);
354 /* undocumented registers */ 344 /* undocumented registers */
355 value = 0xff; 345 reg_w_val(dev, ET_REG1d, 0xff);
356 reg_w(dev, ET_REG1d, &value, 1); 346 reg_w_val(dev, ET_REG1e, 0xff);
357 value = 0xff; 347 reg_w_val(dev, ET_REG1f, 0xff);
358 reg_w(dev, ET_REG1e, &value, 1); 348 reg_w_val(dev, ET_REG20, 0x35);
359 value = 0xff; 349 reg_w_val(dev, ET_REG21, 0x01);
360 reg_w(dev, ET_REG1f, &value, 1); 350 reg_w_val(dev, ET_REG22, 0x00);
361 value = 0x35; 351 reg_w_val(dev, ET_REG23, 0xff);
362 reg_w(dev, ET_REG20, &value, 1); 352 reg_w_val(dev, ET_REG24, 0xff);
363 value = 0x01; 353 reg_w_val(dev, ET_REG25, 0x0f);
364 reg_w(dev, ET_REG21, &value, 1);
365 value = 0x00;
366 reg_w(dev, ET_REG22, &value, 1);
367 value = 0xff;
368 reg_w(dev, ET_REG23, &value, 1);
369 value = 0xff;
370 reg_w(dev, ET_REG24, &value, 1);
371 value = 0x0f;
372 reg_w(dev, ET_REG25, &value, 1);
373 /* colors setting */ 354 /* colors setting */
374 value = 0x11; 355 reg_w_val(dev, 0x30, 0x11); /* 0x30 */
375 reg_w(dev, 0x30, &value, 1); /* 0x30 */ 356 reg_w_val(dev, 0x31, 0x40);
376 value = 0x40; 357 reg_w_val(dev, 0x32, 0x00);
377 reg_w(dev, 0x31, &value, 1); 358 reg_w_val(dev, ET_O_RED, 0x00); /* 0x34 */
378 value = 0x00; 359 reg_w_val(dev, ET_O_GREEN1, 0x00);
379 reg_w(dev, 0x32, &value, 1); 360 reg_w_val(dev, ET_O_BLUE, 0x00);
380 value = 0x00; 361 reg_w_val(dev, ET_O_GREEN2, 0x00);
381 reg_w(dev, ET_O_RED, &value, 1); /* 0x34 */
382 value = 0x00;
383 reg_w(dev, ET_O_GREEN1, &value, 1);
384 value = 0x00;
385 reg_w(dev, ET_O_BLUE, &value, 1);
386 value = 0x00;
387 reg_w(dev, ET_O_GREEN2, &value, 1);
388 /*************/ 362 /*************/
389 value = 0x80; 363 reg_w_val(dev, ET_G_RED, 0x80); /* 0x4d */
390 reg_w(dev, ET_G_RED, &value, 1); /* 0x4d */ 364 reg_w_val(dev, ET_G_GREEN1, 0x80);
391 value = 0x80; 365 reg_w_val(dev, ET_G_BLUE, 0x80);
392 reg_w(dev, ET_G_GREEN1, &value, 1); 366 reg_w_val(dev, ET_G_GREEN2, 0x80);
393 value = 0x80; 367 reg_w_val(dev, ET_G_GR_H, 0x00);
394 reg_w(dev, ET_G_BLUE, &value, 1); 368 reg_w_val(dev, ET_G_GB_H, 0x00); /* 0x52 */
395 value = 0x80;
396 reg_w(dev, ET_G_GREEN2, &value, 1);
397 value = 0x00;
398 reg_w(dev, ET_G_GR_H, &value, 1);
399 value = 0x00;
400 reg_w(dev, ET_G_GB_H, &value, 1); /* 0x52 */
401 /* Window control registers */ 369 /* Window control registers */
402 370 reg_w_val(dev, 0x61, 0x80); /* use cmc_out */
403 value = 0x80; /* use cmc_out */ 371 reg_w_val(dev, 0x62, 0x02);
404 reg_w(dev, 0x61, &value, 1); 372 reg_w_val(dev, 0x63, 0x03);
405 373 reg_w_val(dev, 0x64, 0x14);
406 value = 0x02; 374 reg_w_val(dev, 0x65, 0x0e);
407 reg_w(dev, 0x62, &value, 1); 375 reg_w_val(dev, 0x66, 0x02);
408 value = 0x03; 376 reg_w_val(dev, 0x67, 0x02);
409 reg_w(dev, 0x63, &value, 1);
410 value = 0x14;
411 reg_w(dev, 0x64, &value, 1);
412 value = 0x0e;
413 reg_w(dev, 0x65, &value, 1);
414 value = 0x02;
415 reg_w(dev, 0x66, &value, 1);
416 value = 0x02;
417 reg_w(dev, 0x67, &value, 1);
418 377
419 /**************************************/ 378 /**************************************/
420 value = 0x8f; 379 reg_w_val(dev, ET_SYNCHRO, 0x8f); /* 0x68 */
421 reg_w(dev, ET_SYNCHRO, &value, 1); /* 0x68 */ 380 reg_w_val(dev, ET_STARTX, 0x69); /* 0x6a //0x69 */
422 value = 0x69; /* 0x6a //0x69 */ 381 reg_w_val(dev, ET_STARTY, 0x0d); /* 0x0d //0x0c */
423 reg_w(dev, ET_STARTX, &value, 1); 382 reg_w_val(dev, ET_WIDTH_LOW, 0x80);
424 value = 0x0d; /* 0x0d //0x0c */ 383 reg_w_val(dev, ET_HEIGTH_LOW, 0xe0);
425 reg_w(dev, ET_STARTY, &value, 1); 384 reg_w_val(dev, ET_W_H_HEIGTH, 0x60); /* 6d */
426 value = 0x80; 385 reg_w_val(dev, ET_REG6e, 0x86);
427 reg_w(dev, ET_WIDTH_LOW, &value, 1); 386 reg_w_val(dev, ET_REG6f, 0x01);
428 value = 0xe0; 387 reg_w_val(dev, ET_REG70, 0x26);
429 reg_w(dev, ET_HEIGTH_LOW, &value, 1); 388 reg_w_val(dev, ET_REG71, 0x7a);
430 value = 0x60; 389 reg_w_val(dev, ET_REG72, 0x01);
431 reg_w(dev, ET_W_H_HEIGTH, &value, 1); /* 6d */
432 value = 0x86;
433 reg_w(dev, ET_REG6e, &value, 1);
434 value = 0x01;
435 reg_w(dev, ET_REG6f, &value, 1);
436 value = 0x26;
437 reg_w(dev, ET_REG70, &value, 1);
438 value = 0x7a;
439 reg_w(dev, ET_REG71, &value, 1);
440 value = 0x01;
441 reg_w(dev, ET_REG72, &value, 1);
442 /* Clock Pattern registers ***************** */ 390 /* Clock Pattern registers ***************** */
443 value = 0x00; 391 reg_w_val(dev, ET_REG73, 0x00);
444 reg_w(dev, ET_REG73, &value, 1); 392 reg_w_val(dev, ET_REG74, 0x18); /* 0x28 */
445 value = 0x18; /* 0x28 */ 393 reg_w_val(dev, ET_REG75, 0x0f); /* 0x01 */
446 reg_w(dev, ET_REG74, &value, 1);
447 value = 0x0f; /* 0x01 */
448 reg_w(dev, ET_REG75, &value, 1);
449 /**********************************************/ 394 /**********************************************/
450 value = 0x20; 395 reg_w_val(dev, 0x8a, 0x20);
451 reg_w(dev, 0x8a, &value, 1); 396 reg_w_val(dev, 0x8d, 0x0f);
452 value = 0x0f; 397 reg_w_val(dev, 0x8e, 0x08);
453 reg_w(dev, 0x8d, &value, 1);
454 value = 0x08;
455 reg_w(dev, 0x8e, &value, 1);
456 /**************************************/ 398 /**************************************/
457 value = 0x08; 399 reg_w_val(dev, 0x03, 0x08);
458 reg_w(dev, 0x03, &value, 1); 400 reg_w_val(dev, ET_PXL_CLK, 0x03);
459 value = 0x03; 401 reg_w_val(dev, 0x81, 0xff);
460 reg_w(dev, ET_PXL_CLK, &value, 1); 402 reg_w_val(dev, 0x80, 0x00);
461 value = 0xff; 403 reg_w_val(dev, 0x81, 0xff);
462 reg_w(dev, 0x81, &value, 1); 404 reg_w_val(dev, 0x80, 0x20);
463 value = 0x00; 405 reg_w_val(dev, 0x03, 0x01);
464 reg_w(dev, 0x80, &value, 1); 406 reg_w_val(dev, 0x03, 0x00);
465 value = 0xff; 407 reg_w_val(dev, 0x03, 0x08);
466 reg_w(dev, 0x81, &value, 1);
467 value = 0x20;
468 reg_w(dev, 0x80, &value, 1);
469 value = 0x01;
470 reg_w(dev, 0x03, &value, 1);
471 value = 0x00;
472 reg_w(dev, 0x03, &value, 1);
473 value = 0x08;
474 reg_w(dev, 0x03, &value, 1);
475 /********************************************/ 408 /********************************************/
476 409
477 /* reg_r(dev,0x0,ET_I2C_BASE,&received,1); 410/* reg_r(dev, ET_I2C_BASE, &received, 1);
478 always 0x40 as the pas106 ??? */ 411 always 0x40 as the pas106 ??? */
479 /* set the sensor */ 412 /* set the sensor */
480 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode) { 413 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode)
481 value = 0x04; /* 320 */ 414 value = 0x04; /* 320 */
482 reg_w(dev, ET_PXL_CLK, &value, 1); 415 else /* 640 */
483 /* now set by fifo the FormatLine setting */ 416 value = 0x1e; /* 0x17 * setting PixelClock
484 reg_w(dev, 0x62, FormLine, 6); 417 * 0x03 mean 24/(3+1) = 6 Mhz
485 } else { /* 640 */ 418 * 0x05 -> 24/(5+1) = 4 Mhz
486 /* setting PixelClock 419 * 0x0b -> 24/(11+1) = 2 Mhz
487 0x03 mean 24/(3+1) = 6 Mhz 420 * 0x17 -> 24/(23+1) = 1 Mhz
488 0x05 -> 24/(5+1) = 4 Mhz 421 */
489 0x0b -> 24/(11+1) = 2 Mhz 422 reg_w_val(dev, ET_PXL_CLK, value);
490 0x17 -> 24/(23+1) = 1 Mhz 423 /* now set by fifo the FormatLine setting */
491 */ 424 reg_w(dev, 0x62, FormLine, 6);
492 value = 0x1e; /* 0x17 */
493 reg_w(dev, ET_PXL_CLK, &value, 1);
494 /* now set by fifo the FormatLine setting */
495 reg_w(dev, 0x62, FormLine, 6);
496 }
497 425
498 /* set exposure times [ 0..0x78] 0->longvalue 0x78->shortvalue */ 426 /* set exposure times [ 0..0x78] 0->longvalue 0x78->shortvalue */
499 value = 0x47; /* 0x47; */ 427 reg_w_val(dev, 0x81, 0x47); /* 0x47; */
500 reg_w(dev, 0x81, &value, 1); 428 reg_w_val(dev, 0x80, 0x40); /* 0x40; */
501 value = 0x40; /* 0x40; */
502 reg_w(dev, 0x80, &value, 1);
503 /* Pedro change */ 429 /* Pedro change */
504 /* Brightness change Brith+ decrease value */ 430 /* Brightness change Brith+ decrease value */
505 /* Brigth- increase value */ 431 /* Brigth- increase value */
506 /* original value = 0x70; */ 432 /* original value = 0x70; */
507 value = 0x30; /* 0x20; */ 433 reg_w_val(dev, 0x81, 0x30); /* 0x20; - set brightness */
508 reg_w(dev, 0x81, &value, 1); /* set brightness */ 434 reg_w_val(dev, 0x80, 0x20); /* 0x20; */
509 value = 0x20; /* 0x20; */
510 reg_w(dev, 0x80, &value, 1);
511} 435}
512 436
513static void setcolors(struct gspca_dev *gspca_dev) 437static void setcolors(struct gspca_dev *gspca_dev)
514{ 438{
515 struct sd *sd = (struct sd *) gspca_dev; 439 struct sd *sd = (struct sd *) gspca_dev;
516 struct usb_device *dev = gspca_dev->dev; 440 struct usb_device *dev = gspca_dev->dev;
517 static __u8 I2cc[] = { 0x05, 0x02, 0x02, 0x05, 0x0d }; 441 __u8 I2cc[] = { 0x05, 0x02, 0x02, 0x05, 0x0d };
518 __u8 i2cflags = 0x01; 442 __u8 i2cflags = 0x01;
519 /* __u8 green = 0; */ 443 /* __u8 green = 0; */
520 __u8 colors = sd->colors; 444 __u8 colors = sd->colors;
@@ -525,7 +449,7 @@ static void setcolors(struct gspca_dev *gspca_dev)
525 /* I2cc[1] = I2cc[2] = green; */ 449 /* I2cc[1] = I2cc[2] = green; */
526 if (sd->sensor == SENSOR_PAS106) { 450 if (sd->sensor == SENSOR_PAS106) {
527 Et_i2cwrite(dev, PAS106_REG13, &i2cflags, 1, 3); 451 Et_i2cwrite(dev, PAS106_REG13, &i2cflags, 1, 3);
528 Et_i2cwrite(dev, PAS106_REG9, I2cc, sizeof(I2cc), 1); 452 Et_i2cwrite(dev, PAS106_REG9, I2cc, sizeof I2cc, 1);
529 } 453 }
530/* PDEBUG(D_CONF , "Etoms red %d blue %d green %d", 454/* PDEBUG(D_CONF , "Etoms red %d blue %d green %d",
531 I2cc[3], I2cc[0], green); */ 455 I2cc[3], I2cc[0], green); */
@@ -534,11 +458,11 @@ static void setcolors(struct gspca_dev *gspca_dev)
534static void getcolors(struct gspca_dev *gspca_dev) 458static void getcolors(struct gspca_dev *gspca_dev)
535{ 459{
536 struct sd *sd = (struct sd *) gspca_dev; 460 struct sd *sd = (struct sd *) gspca_dev;
537 /* __u8 valblue = 0; */ 461/* __u8 valblue; */
538 __u8 valred; 462 __u8 valred;
539 463
540 if (sd->sensor == SENSOR_PAS106) { 464 if (sd->sensor == SENSOR_PAS106) {
541 /* Et_i2cread(gspca_dev->dev,PAS106_REG9,&valblue,1,1); */ 465/* Et_i2cread(gspca_dev->dev, PAS106_REG9, &valblue, 1, 1); */
542 Et_i2cread(gspca_dev->dev, PAS106_REG9 + 3, &valred, 1, 1); 466 Et_i2cread(gspca_dev->dev, PAS106_REG9 + 3, &valred, 1, 1);
543 sd->colors = valred & 0x0f; 467 sd->colors = valred & 0x0f;
544 } 468 }
@@ -547,126 +471,87 @@ static void getcolors(struct gspca_dev *gspca_dev)
547static void Et_init1(struct gspca_dev *gspca_dev) 471static void Et_init1(struct gspca_dev *gspca_dev)
548{ 472{
549 struct usb_device *dev = gspca_dev->dev; 473 struct usb_device *dev = gspca_dev->dev;
550 __u8 value = 0x00; 474 __u8 value;
551 __u8 received = 0x00; 475 __u8 received;
552/* __u8 I2c0 [] ={0x0a,0x12,0x05,0x22,0xac,0x00,0x01,0x00}; */ 476/* __u8 I2c0 [] = {0x0a, 0x12, 0x05, 0x22, 0xac, 0x00, 0x01, 0x00}; */
553 __u8 I2c0[] = { 0x0a, 0x12, 0x05, 0x6d, 0xcd, 0x00, 0x01, 0x00 }; 477 __u8 I2c0[] = { 0x0a, 0x12, 0x05, 0x6d, 0xcd, 0x00, 0x01, 0x00 };
554 /* try 1/120 0x6d 0xcd 0x40 */ 478 /* try 1/120 0x6d 0xcd 0x40 */
555/* __u8 I2c0 [] ={0x0a,0x12,0x05,0xfe,0xfe,0xc0,0x01,0x00}; 479/* __u8 I2c0 [] = {0x0a, 0x12, 0x05, 0xfe, 0xfe, 0xc0, 0x01, 0x00};
556 * 1/60000 hmm ?? */ 480 * 1/60000 hmm ?? */
557 481
558 PDEBUG(D_STREAM, "Open Init1 ET"); 482 PDEBUG(D_STREAM, "Open Init1 ET");
559 value = 7; 483 reg_w_val(dev, ET_GPIO_DIR_CTRL, 7);
560 reg_w(dev, ET_GPIO_DIR_CTRL, &value, 1);
561 reg_r(dev, ET_GPIO_IN, &received, 1); 484 reg_r(dev, ET_GPIO_IN, &received, 1);
562 value = 1; 485 reg_w_val(dev, ET_RESET_ALL, 1);
563 reg_w(dev, ET_RESET_ALL, &value, 1); 486 reg_w_val(dev, ET_RESET_ALL, 0);
564 value = 0; 487 reg_w_val(dev, ET_ClCK, 0x10);
565 reg_w(dev, ET_RESET_ALL, &value, 1); 488 reg_w_val(dev, ET_CTRL, 0x19);
566 value = 0x10;
567 reg_w(dev, ET_ClCK, &value, 1);
568 value = 0x19;
569 reg_w(dev, ET_CTRL, &value, 1);
570 /* compression et subsampling */ 489 /* compression et subsampling */
571 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode) 490 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode)
572 value = ET_COMP_VAL1; 491 value = ET_COMP_VAL1;
573 else 492 else
574 value = ET_COMP_VAL0; 493 value = ET_COMP_VAL0;
575
576 PDEBUG(D_STREAM, "Open mode %d Compression %d", 494 PDEBUG(D_STREAM, "Open mode %d Compression %d",
577 gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode, 495 gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode,
578 value); 496 value);
579 reg_w(dev, ET_COMP, &value, 1); 497 reg_w_val(dev, ET_COMP, value);
580 value = 0x1d; 498 reg_w_val(dev, ET_MAXQt, 0x1d);
581 reg_w(dev, ET_MAXQt, &value, 1); 499 reg_w_val(dev, ET_MINQt, 0x02);
582 value = 0x02;
583 reg_w(dev, ET_MINQt, &value, 1);
584 /* undocumented registers */ 500 /* undocumented registers */
585 value = 0xff; 501 reg_w_val(dev, ET_REG1d, 0xff);
586 reg_w(dev, ET_REG1d, &value, 1); 502 reg_w_val(dev, ET_REG1e, 0xff);
587 value = 0xff; 503 reg_w_val(dev, ET_REG1f, 0xff);
588 reg_w(dev, ET_REG1e, &value, 1); 504 reg_w_val(dev, ET_REG20, 0x35);
589 value = 0xff; 505 reg_w_val(dev, ET_REG21, 0x01);
590 reg_w(dev, ET_REG1f, &value, 1); 506 reg_w_val(dev, ET_REG22, 0x00);
591 value = 0x35; 507 reg_w_val(dev, ET_REG23, 0xf7);
592 reg_w(dev, ET_REG20, &value, 1); 508 reg_w_val(dev, ET_REG24, 0xff);
593 value = 0x01; 509 reg_w_val(dev, ET_REG25, 0x07);
594 reg_w(dev, ET_REG21, &value, 1);
595 value = 0x00;
596 reg_w(dev, ET_REG22, &value, 1);
597 value = 0xf7;
598 reg_w(dev, ET_REG23, &value, 1);
599 value = 0xff;
600 reg_w(dev, ET_REG24, &value, 1);
601 value = 0x07;
602 reg_w(dev, ET_REG25, &value, 1);
603 /* colors setting */ 510 /* colors setting */
604 value = 0x80; 511 reg_w_val(dev, ET_G_RED, 0x80);
605 reg_w(dev, ET_G_RED, &value, 1); 512 reg_w_val(dev, ET_G_GREEN1, 0x80);
606 value = 0x80; 513 reg_w_val(dev, ET_G_BLUE, 0x80);
607 reg_w(dev, ET_G_GREEN1, &value, 1); 514 reg_w_val(dev, ET_G_GREEN2, 0x80);
608 value = 0x80; 515 reg_w_val(dev, ET_G_GR_H, 0x00);
609 reg_w(dev, ET_G_BLUE, &value, 1); 516 reg_w_val(dev, ET_G_GB_H, 0x00);
610 value = 0x80;
611 reg_w(dev, ET_G_GREEN2, &value, 1);
612 value = 0x00;
613 reg_w(dev, ET_G_GR_H, &value, 1);
614 value = 0x00;
615 reg_w(dev, ET_G_GB_H, &value, 1);
616 /* Window control registers */ 517 /* Window control registers */
617 value = 0xf0; 518 reg_w_val(dev, ET_SYNCHRO, 0xf0);
618 reg_w(dev, ET_SYNCHRO, &value, 1); 519 reg_w_val(dev, ET_STARTX, 0x56); /* 0x56 */
619 value = 0x56; /* 0x56 */ 520 reg_w_val(dev, ET_STARTY, 0x05); /* 0x04 */
620 reg_w(dev, ET_STARTX, &value, 1); 521 reg_w_val(dev, ET_WIDTH_LOW, 0x60);
621 value = 0x05; /* 0x04 */ 522 reg_w_val(dev, ET_HEIGTH_LOW, 0x20);
622 reg_w(dev, ET_STARTY, &value, 1); 523 reg_w_val(dev, ET_W_H_HEIGTH, 0x50);
623 value = 0x60; 524 reg_w_val(dev, ET_REG6e, 0x86);
624 reg_w(dev, ET_WIDTH_LOW, &value, 1); 525 reg_w_val(dev, ET_REG6f, 0x01);
625 value = 0x20; 526 reg_w_val(dev, ET_REG70, 0x86);
626 reg_w(dev, ET_HEIGTH_LOW, &value, 1); 527 reg_w_val(dev, ET_REG71, 0x14);
627 value = 0x50; 528 reg_w_val(dev, ET_REG72, 0x00);
628 reg_w(dev, ET_W_H_HEIGTH, &value, 1);
629 value = 0x86;
630 reg_w(dev, ET_REG6e, &value, 1);
631 value = 0x01;
632 reg_w(dev, ET_REG6f, &value, 1);
633 value = 0x86;
634 reg_w(dev, ET_REG70, &value, 1);
635 value = 0x14;
636 reg_w(dev, ET_REG71, &value, 1);
637 value = 0x00;
638 reg_w(dev, ET_REG72, &value, 1);
639 /* Clock Pattern registers */ 529 /* Clock Pattern registers */
640 value = 0x00; 530 reg_w_val(dev, ET_REG73, 0x00);
641 reg_w(dev, ET_REG73, &value, 1); 531 reg_w_val(dev, ET_REG74, 0x00);
642 value = 0x00; 532 reg_w_val(dev, ET_REG75, 0x0a);
643 reg_w(dev, ET_REG74, &value, 1); 533 reg_w_val(dev, ET_I2C_CLK, 0x04);
644 value = 0x0a; 534 reg_w_val(dev, ET_PXL_CLK, 0x01);
645 reg_w(dev, ET_REG75, &value, 1);
646 value = 0x04;
647 reg_w(dev, ET_I2C_CLK, &value, 1);
648 value = 0x01;
649 reg_w(dev, ET_PXL_CLK, &value, 1);
650 /* set the sensor */ 535 /* set the sensor */
651 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode) { 536 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].mode) {
652 I2c0[0] = 0x06; 537 I2c0[0] = 0x06;
653 Et_i2cwrite(dev, PAS106_REG2, I2c0, sizeof(I2c0), 1); 538 Et_i2cwrite(dev, PAS106_REG2, I2c0, sizeof I2c0, 1);
654 Et_i2cwrite(dev, PAS106_REG9, I2c2, sizeof(I2c2), 1); 539 Et_i2cwrite(dev, PAS106_REG9, I2c2, sizeof I2c2, 1);
655 value = 0x06; 540 value = 0x06;
656 Et_i2cwrite(dev, PAS106_REG2, &value, 1, 1); 541 Et_i2cwrite(dev, PAS106_REG2, &value, 1, 1);
657 Et_i2cwrite(dev, PAS106_REG3, I2c3, sizeof(I2c3), 1); 542 Et_i2cwrite(dev, PAS106_REG3, I2c3, sizeof I2c3, 1);
658 /* value = 0x1f; */ 543 /* value = 0x1f; */
659 value = 0x04; 544 value = 0x04;
660 Et_i2cwrite(dev, PAS106_REG0e, &value, 1, 1); 545 Et_i2cwrite(dev, PAS106_REG0e, &value, 1, 1);
661 } else { 546 } else {
662 I2c0[0] = 0x0a; 547 I2c0[0] = 0x0a;
663 548
664 Et_i2cwrite(dev, PAS106_REG2, I2c0, sizeof(I2c0), 1); 549 Et_i2cwrite(dev, PAS106_REG2, I2c0, sizeof I2c0, 1);
665 Et_i2cwrite(dev, PAS106_REG9, I2c2, sizeof(I2c2), 1); 550 Et_i2cwrite(dev, PAS106_REG9, I2c2, sizeof I2c2, 1);
666 value = 0x0a; 551 value = 0x0a;
667 552
668 Et_i2cwrite(dev, PAS106_REG2, &value, 1, 1); 553 Et_i2cwrite(dev, PAS106_REG2, &value, 1, 1);
669 Et_i2cwrite(dev, PAS106_REG3, I2c3, sizeof(I2c3), 1); 554 Et_i2cwrite(dev, PAS106_REG3, I2c3, sizeof I2c3, 1);
670 value = 0x04; 555 value = 0x04;
671 /* value = 0x10; */ 556 /* value = 0x10; */
672 Et_i2cwrite(dev, PAS106_REG0e, &value, 1, 1); 557 Et_i2cwrite(dev, PAS106_REG0e, &value, 1, 1);
@@ -720,10 +605,10 @@ static int sd_config(struct gspca_dev *gspca_dev,
720 cam->cam_mode = vga_mode; 605 cam->cam_mode = vga_mode;
721 cam->nmodes = sizeof vga_mode / sizeof vga_mode[0]; 606 cam->nmodes = sizeof vga_mode / sizeof vga_mode[0];
722 } 607 }
723 sd->brightness = sd_ctrls[SD_BRIGHTNESS].qctrl.default_value; 608 sd->brightness = BRIGHTNESS_DEF;
724 sd->contrast = sd_ctrls[SD_CONTRAST].qctrl.default_value; 609 sd->contrast = CONTRAST_DEF;
725 sd->colors = sd_ctrls[SD_COLOR].qctrl.default_value; 610 sd->colors = COLOR_DEF;
726 sd->autogain = sd_ctrls[SD_AUTOGAIN].qctrl.default_value; 611 sd->autogain = AUTOGAIN_DEF;
727 return 0; 612 return 0;
728} 613}
729 614
@@ -732,18 +617,13 @@ static int sd_open(struct gspca_dev *gspca_dev)
732{ 617{
733 struct sd *sd = (struct sd *) gspca_dev; 618 struct sd *sd = (struct sd *) gspca_dev;
734 struct usb_device *dev = gspca_dev->dev; 619 struct usb_device *dev = gspca_dev->dev;
735 int err;
736 __u8 value;
737 620
738 PDEBUG(D_STREAM, "Initialize ET1");
739 if (sd->sensor == SENSOR_PAS106) 621 if (sd->sensor == SENSOR_PAS106)
740 Et_init1(gspca_dev); 622 Et_init1(gspca_dev);
741 else 623 else
742 Et_init2(gspca_dev); 624 Et_init2(gspca_dev);
743 value = 0x08; 625 reg_w_val(dev, ET_RESET_ALL, 0x08);
744 reg_w(dev, ET_RESET_ALL, &value, 1); 626 et_video(dev, 0); /* video off */
745 err = Et_videoOff(dev);
746 PDEBUG(D_STREAM, "Et_Init_VideoOff %d", err);
747 return 0; 627 return 0;
748} 628}
749 629
@@ -752,27 +632,19 @@ static void sd_start(struct gspca_dev *gspca_dev)
752{ 632{
753 struct sd *sd = (struct sd *) gspca_dev; 633 struct sd *sd = (struct sd *) gspca_dev;
754 struct usb_device *dev = gspca_dev->dev; 634 struct usb_device *dev = gspca_dev->dev;
755 int err;
756 __u8 value;
757 635
758 if (sd->sensor == SENSOR_PAS106) 636 if (sd->sensor == SENSOR_PAS106)
759 Et_init1(gspca_dev); 637 Et_init1(gspca_dev);
760 else 638 else
761 Et_init2(gspca_dev); 639 Et_init2(gspca_dev);
762 640
763 value = 0x08; 641 reg_w_val(dev, ET_RESET_ALL, 0x08);
764 reg_w(dev, ET_RESET_ALL, &value, 1); 642 et_video(dev, 1); /* video on */
765 err = Et_videoOn(dev);
766 PDEBUG(D_STREAM, "Et_VideoOn %d", err);
767} 643}
768 644
769static void sd_stopN(struct gspca_dev *gspca_dev) 645static void sd_stopN(struct gspca_dev *gspca_dev)
770{ 646{
771 int err; 647 et_video(gspca_dev->dev, 0); /* video off */
772
773 err = Et_videoOff(gspca_dev->dev);
774 PDEBUG(D_STREAM, "Et_VideoOff %d", err);
775
776} 648}
777 649
778static void sd_stop0(struct gspca_dev *gspca_dev) 650static void sd_stop0(struct gspca_dev *gspca_dev)
@@ -790,7 +662,7 @@ static void setbrightness(struct gspca_dev *gspca_dev)
790 __u8 brightness = sd->brightness; 662 __u8 brightness = sd->brightness;
791 663
792 for (i = 0; i < 4; i++) 664 for (i = 0; i < 4; i++)
793 reg_w(gspca_dev->dev, (ET_O_RED + i), &brightness, 1); 665 reg_w_val(gspca_dev->dev, (ET_O_RED + i), brightness);
794} 666}
795 667
796static void getbrightness(struct gspca_dev *gspca_dev) 668static void getbrightness(struct gspca_dev *gspca_dev)
@@ -798,7 +670,7 @@ static void getbrightness(struct gspca_dev *gspca_dev)
798 struct sd *sd = (struct sd *) gspca_dev; 670 struct sd *sd = (struct sd *) gspca_dev;
799 int i; 671 int i;
800 int brightness = 0; 672 int brightness = 0;
801 __u8 value = 0; 673 __u8 value;
802 674
803 for (i = 0; i < 4; i++) { 675 for (i = 0; i < 4; i++) {
804 reg_r(gspca_dev->dev, (ET_O_RED + i), &value, 1); 676 reg_r(gspca_dev->dev, (ET_O_RED + i), &value, 1);
@@ -895,7 +767,7 @@ static void setautogain(struct gspca_dev *gspca_dev)
895 767
896static void sd_pkt_scan(struct gspca_dev *gspca_dev, 768static void sd_pkt_scan(struct gspca_dev *gspca_dev,
897 struct gspca_frame *frame, /* target */ 769 struct gspca_frame *frame, /* target */
898 unsigned char *data, /* isoc packet */ 770 __u8 *data, /* isoc packet */
899 int len) /* iso packet length */ 771 int len) /* iso packet length */
900{ 772{
901 struct sd *sd; 773 struct sd *sd;
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-06 20:28:59 -0500