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authorMauro Carvalho Chehab <mchehab@infradead.org>2008-04-17 20:44:58 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-04-24 13:09:42 -0400
commit41facaa4b63cc1a0ff5a900149a29942d47e1491 (patch)
tree8c6b1ec84b0ed96e27f6edfc9c297d593b55288f /drivers/media/video/em28xx/em28xx.h
parent7e26ca8012a8392c5e53055b8ff3d9512faee6c6 (diff)
V4L/DVB (7613): em28xx: rename registers
Now, all registers will follow the same convension: EM28XX_R<reg_number>_<reg_name> This allows to associate a register with its value, and also with a canonical name. Also, registers that are specific to a given chip were renamed accordingly, as EM2800_foo (for 2800 only registers) or EM2880_foo (for registers that started to appear on em2880). Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/video/em28xx/em28xx.h')
-rw-r--r--drivers/media/video/em28xx/em28xx.h26
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/media/video/em28xx/em28xx.h b/drivers/media/video/em28xx/em28xx.h
index 2188bc44c465..e4a56d8dfcf4 100644
--- a/drivers/media/video/em28xx/em28xx.h
+++ b/drivers/media/video/em28xx/em28xx.h
@@ -500,73 +500,73 @@ int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,
500static inline int em28xx_compression_disable(struct em28xx *dev) 500static inline int em28xx_compression_disable(struct em28xx *dev)
501{ 501{
502 /* side effect of disabling scaler and mixer */ 502 /* side effect of disabling scaler and mixer */
503 return em28xx_write_regs(dev, COMPR_REG, "\x00", 1); 503 return em28xx_write_regs(dev, EM28XX_R26_COMPR, "\x00", 1);
504} 504}
505 505
506static inline int em28xx_contrast_get(struct em28xx *dev) 506static inline int em28xx_contrast_get(struct em28xx *dev)
507{ 507{
508 return em28xx_read_reg(dev, YGAIN_REG) & 0x1f; 508 return em28xx_read_reg(dev, EM28XX_R20_YGAIN) & 0x1f;
509} 509}
510 510
511static inline int em28xx_brightness_get(struct em28xx *dev) 511static inline int em28xx_brightness_get(struct em28xx *dev)
512{ 512{
513 return em28xx_read_reg(dev, YOFFSET_REG); 513 return em28xx_read_reg(dev, EM28XX_R21_YOFFSET);
514} 514}
515 515
516static inline int em28xx_saturation_get(struct em28xx *dev) 516static inline int em28xx_saturation_get(struct em28xx *dev)
517{ 517{
518 return em28xx_read_reg(dev, UVGAIN_REG) & 0x1f; 518 return em28xx_read_reg(dev, EM28XX_R22_UVGAIN) & 0x1f;
519} 519}
520 520
521static inline int em28xx_u_balance_get(struct em28xx *dev) 521static inline int em28xx_u_balance_get(struct em28xx *dev)
522{ 522{
523 return em28xx_read_reg(dev, UOFFSET_REG); 523 return em28xx_read_reg(dev, EM28XX_R23_UOFFSET);
524} 524}
525 525
526static inline int em28xx_v_balance_get(struct em28xx *dev) 526static inline int em28xx_v_balance_get(struct em28xx *dev)
527{ 527{
528 return em28xx_read_reg(dev, VOFFSET_REG); 528 return em28xx_read_reg(dev, EM28XX_R24_VOFFSET);
529} 529}
530 530
531static inline int em28xx_gamma_get(struct em28xx *dev) 531static inline int em28xx_gamma_get(struct em28xx *dev)
532{ 532{
533 return em28xx_read_reg(dev, GAMMA_REG) & 0x3f; 533 return em28xx_read_reg(dev, EM28XX_R14_GAMMA) & 0x3f;
534} 534}
535 535
536static inline int em28xx_contrast_set(struct em28xx *dev, s32 val) 536static inline int em28xx_contrast_set(struct em28xx *dev, s32 val)
537{ 537{
538 u8 tmp = (u8) val; 538 u8 tmp = (u8) val;
539 return em28xx_write_regs(dev, YGAIN_REG, &tmp, 1); 539 return em28xx_write_regs(dev, EM28XX_R20_YGAIN, &tmp, 1);
540} 540}
541 541
542static inline int em28xx_brightness_set(struct em28xx *dev, s32 val) 542static inline int em28xx_brightness_set(struct em28xx *dev, s32 val)
543{ 543{
544 u8 tmp = (u8) val; 544 u8 tmp = (u8) val;
545 return em28xx_write_regs(dev, YOFFSET_REG, &tmp, 1); 545 return em28xx_write_regs(dev, EM28XX_R21_YOFFSET, &tmp, 1);
546} 546}
547 547
548static inline int em28xx_saturation_set(struct em28xx *dev, s32 val) 548static inline int em28xx_saturation_set(struct em28xx *dev, s32 val)
549{ 549{
550 u8 tmp = (u8) val; 550 u8 tmp = (u8) val;
551 return em28xx_write_regs(dev, UVGAIN_REG, &tmp, 1); 551 return em28xx_write_regs(dev, EM28XX_R22_UVGAIN, &tmp, 1);
552} 552}
553 553
554static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val) 554static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val)
555{ 555{
556 u8 tmp = (u8) val; 556 u8 tmp = (u8) val;
557 return em28xx_write_regs(dev, UOFFSET_REG, &tmp, 1); 557 return em28xx_write_regs(dev, EM28XX_R23_UOFFSET, &tmp, 1);
558} 558}
559 559
560static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val) 560static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val)
561{ 561{
562 u8 tmp = (u8) val; 562 u8 tmp = (u8) val;
563 return em28xx_write_regs(dev, VOFFSET_REG, &tmp, 1); 563 return em28xx_write_regs(dev, EM28XX_R24_VOFFSET, &tmp, 1);
564} 564}
565 565
566static inline int em28xx_gamma_set(struct em28xx *dev, s32 val) 566static inline int em28xx_gamma_set(struct em28xx *dev, s32 val)
567{ 567{
568 u8 tmp = (u8) val; 568 u8 tmp = (u8) val;
569 return em28xx_write_regs(dev, GAMMA_REG, &tmp, 1); 569 return em28xx_write_regs(dev, EM28XX_R14_GAMMA, &tmp, 1);
570} 570}
571 571
572/*FIXME: maxw should be dependent of alt mode */ 572/*FIXME: maxw should be dependent of alt mode */