diff options
author | Mauro Carvalho Chehab <mchehab@infradead.org> | 2008-04-17 20:44:58 -0400 |
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committer | Mauro Carvalho Chehab <mchehab@infradead.org> | 2008-04-24 13:09:42 -0400 |
commit | 41facaa4b63cc1a0ff5a900149a29942d47e1491 (patch) | |
tree | 8c6b1ec84b0ed96e27f6edfc9c297d593b55288f /drivers/media/video/em28xx/em28xx-reg.h | |
parent | 7e26ca8012a8392c5e53055b8ff3d9512faee6c6 (diff) |
V4L/DVB (7613): em28xx: rename registers
Now, all registers will follow the same convension:
EM28XX_R<reg_number>_<reg_name>
This allows to associate a register with its value, and also with a canonical
name. Also, registers that are specific to a given chip were renamed accordingly,
as EM2800_foo (for 2800 only registers) or EM2880_foo (for registers that started
to appear on em2880).
Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/video/em28xx/em28xx-reg.h')
-rw-r--r-- | drivers/media/video/em28xx/em28xx-reg.h | 112 |
1 files changed, 56 insertions, 56 deletions
diff --git a/drivers/media/video/em28xx/em28xx-reg.h b/drivers/media/video/em28xx/em28xx-reg.h index 02eb2b171ba6..9058bed07953 100644 --- a/drivers/media/video/em28xx/em28xx-reg.h +++ b/drivers/media/video/em28xx/em28xx-reg.h | |||
@@ -13,68 +13,68 @@ | |||
13 | #define EM_GPO_3 (1 << 3) | 13 | #define EM_GPO_3 (1 << 3) |
14 | 14 | ||
15 | /* em2800 registers */ | 15 | /* em2800 registers */ |
16 | #define EM2800_AUDIOSRC_REG 0x08 | 16 | #define EM2800_R08_AUDIOSRC 0x08 |
17 | 17 | ||
18 | /* em28xx registers */ | 18 | /* em28xx registers */ |
19 | 19 | ||
20 | /* GPIO/GPO registers */ | 20 | /* GPIO/GPO registers */ |
21 | #define EM_R04_GPO 0x04 /* em2880-em2883 only */ | 21 | #define EM2880_R04_GPO 0x04 /* em2880-em2883 only */ |
22 | #define EM_R08_GPIO 0x08 /* em2820 or upper */ | 22 | #define EM28XX_R08_GPIO 0x08 /* em2820 or upper */ |
23 | 23 | ||
24 | #define I2C_CLK_REG 0x06 | 24 | #define EM28XX_R06_I2C_CLK 0x06 |
25 | #define CHIPID_REG 0x0a | 25 | #define EM28XX_R0A_CHIPID 0x0a |
26 | #define USBSUSP_REG 0x0c /* */ | 26 | #define EM28XX_R0C_USBSUSP 0x0c /* */ |
27 | 27 | ||
28 | #define AUDIOSRC_REG 0x0e | 28 | #define EM28XX_R0E_AUDIOSRC 0x0e |
29 | #define XCLK_REG 0x0f | 29 | #define EM28XX_R0F_XCLK 0x0f |
30 | 30 | ||
31 | #define VINMODE_REG 0x10 | 31 | #define EM28XX_R10_VINMODE 0x10 |
32 | #define VINCTRL_REG 0x11 | 32 | #define EM28XX_R11_VINCTRL 0x11 |
33 | #define VINENABLE_REG 0x12 /* */ | 33 | #define EM28XX_R12_VINENABLE 0x12 /* */ |
34 | 34 | ||
35 | #define GAMMA_REG 0x14 | 35 | #define EM28XX_R14_GAMMA 0x14 |
36 | #define RGAIN_REG 0x15 | 36 | #define EM28XX_R15_RGAIN 0x15 |
37 | #define GGAIN_REG 0x16 | 37 | #define EM28XX_R16_GGAIN 0x16 |
38 | #define BGAIN_REG 0x17 | 38 | #define EM28XX_R17_BGAIN 0x17 |
39 | #define ROFFSET_REG 0x18 | 39 | #define EM28XX_R18_ROFFSET 0x18 |
40 | #define GOFFSET_REG 0x19 | 40 | #define EM28XX_R19_GOFFSET 0x19 |
41 | #define BOFFSET_REG 0x1a | 41 | #define EM28XX_R1A_BOFFSET 0x1a |
42 | 42 | ||
43 | #define OFLOW_REG 0x1b | 43 | #define EM28XX_R1B_OFLOW 0x1b |
44 | #define HSTART_REG 0x1c | 44 | #define EM28XX_R1C_HSTART 0x1c |
45 | #define VSTART_REG 0x1d | 45 | #define EM28XX_R1D_VSTART 0x1d |
46 | #define CWIDTH_REG 0x1e | 46 | #define EM28XX_R1E_CWIDTH 0x1e |
47 | #define CHEIGHT_REG 0x1f | 47 | #define EM28XX_R1F_CHEIGHT 0x1f |
48 | 48 | ||
49 | #define YGAIN_REG 0x20 | 49 | #define EM28XX_R20_YGAIN 0x20 |
50 | #define YOFFSET_REG 0x21 | 50 | #define EM28XX_R21_YOFFSET 0x21 |
51 | #define UVGAIN_REG 0x22 | 51 | #define EM28XX_R22_UVGAIN 0x22 |
52 | #define UOFFSET_REG 0x23 | 52 | #define EM28XX_R23_UOFFSET 0x23 |
53 | #define VOFFSET_REG 0x24 | 53 | #define EM28XX_R24_VOFFSET 0x24 |
54 | #define SHARPNESS_REG 0x25 | 54 | #define EM28XX_R25_SHARPNESS 0x25 |
55 | 55 | ||
56 | #define COMPR_REG 0x26 | 56 | #define EM28XX_R26_COMPR 0x26 |
57 | #define OUTFMT_REG 0x27 | 57 | #define EM28XX_R27_OUTFMT 0x27 |
58 | 58 | ||
59 | #define XMIN_REG 0x28 | 59 | #define EM28XX_R28_XMIN 0x28 |
60 | #define XMAX_REG 0x29 | 60 | #define EM28XX_R29_XMAX 0x29 |
61 | #define YMIN_REG 0x2a | 61 | #define EM28XX_R2A_YMIN 0x2a |
62 | #define YMAX_REG 0x2b | 62 | #define EM28XX_R2B_YMAX 0x2b |
63 | 63 | ||
64 | #define HSCALELOW_REG 0x30 | 64 | #define EM28XX_R30_HSCALELOW 0x30 |
65 | #define HSCALEHIGH_REG 0x31 | 65 | #define EM28XX_R31_HSCALEHIGH 0x31 |
66 | #define VSCALELOW_REG 0x32 | 66 | #define EM28XX_R32_VSCALELOW 0x32 |
67 | #define VSCALEHIGH_REG 0x33 | 67 | #define EM28XX_R33_VSCALEHIGH 0x33 |
68 | 68 | ||
69 | #define AC97LSB_REG 0x40 | 69 | #define EM28XX_R40_AC97LSB 0x40 |
70 | #define AC97MSB_REG 0x41 | 70 | #define EM28XX_R41_AC97MSB 0x41 |
71 | #define AC97ADDR_REG 0x42 | 71 | #define EM28XX_R42_AC97ADDR 0x42 |
72 | #define AC97BUSY_REG 0x43 | 72 | #define EM28XX_R43_AC97BUSY 0x43 |
73 | 73 | ||
74 | /* em202 registers */ | 74 | /* em202 registers */ |
75 | #define MASTER_AC97 0x02 | 75 | #define EM28XX_R02_MASTER_AC97 0x02 |
76 | #define LINE_IN_AC97 0x10 | 76 | #define EM28XX_R10_LINE_IN_AC97 0x10 |
77 | #define VIDEO_AC97 0x14 | 77 | #define EM28XX_R14_VIDEO_AC97 0x14 |
78 | 78 | ||
79 | /* register settings */ | 79 | /* register settings */ |
80 | #define EM2800_AUDIO_SRC_TUNER 0x0d | 80 | #define EM2800_AUDIO_SRC_TUNER 0x0d |