diff options
author | Devin Heitmueller <devin.heitmueller@gmail.com> | 2008-11-20 07:53:05 -0500 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2008-12-29 14:53:36 -0500 |
commit | 23159a0bfcfb329cf68c7a7259e688494273bb7f (patch) | |
tree | 81649902f518ee7793696001394556fa601f48e9 /drivers/media/video/em28xx/em28xx-reg.h | |
parent | b69724899440289ab258ff417c2d6aa104c70310 (diff) |
V4L/DVB (9658): em28xx: use em28xx_write_reg() for i2c clock setup
Convert the calls that write the i2c clock register over to the new
em28xx_write_reg() function that allows for or'ing bits
Signed-off-by: Devin Heitmueller <devin.heitmueller@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/video/em28xx/em28xx-reg.h')
-rw-r--r-- | drivers/media/video/em28xx/em28xx-reg.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/media/video/em28xx/em28xx-reg.h b/drivers/media/video/em28xx/em28xx-reg.h index 9727f3828dba..98e95054e819 100644 --- a/drivers/media/video/em28xx/em28xx-reg.h +++ b/drivers/media/video/em28xx/em28xx-reg.h | |||
@@ -32,6 +32,19 @@ | |||
32 | #define EM28XX_R08_GPIO 0x08 /* em2820 or upper */ | 32 | #define EM28XX_R08_GPIO 0x08 /* em2820 or upper */ |
33 | 33 | ||
34 | #define EM28XX_R06_I2C_CLK 0x06 | 34 | #define EM28XX_R06_I2C_CLK 0x06 |
35 | |||
36 | /* em28xx I2C Clock Register (0x06) */ | ||
37 | #define EM28XX_I2C_CLK_ACK_LAST_READ 0x80 | ||
38 | #define EM28XX_I2C_CLK_WAIT_ENABLE 0x40 | ||
39 | #define EM28XX_I2C_EEPROM_ON_BOARD 0x08 | ||
40 | #define EM28XX_I2C_EEPROM_KEY_VALID 0x04 | ||
41 | #define EM2874_I2C_SECONDARY_BUS_SELECT 0x04 /* em2874 has two i2c busses */ | ||
42 | #define EM28XX_I2C_FREQ_1_5_MHZ 0x03 /* bus frequency (bits [1-0]) */ | ||
43 | #define EM28XX_I2C_FREQ_25_KHZ 0x02 | ||
44 | #define EM28XX_I2C_FREQ_400_KHZ 0x01 | ||
45 | #define EM28XX_I2C_FREQ_100_KHZ 0x00 | ||
46 | |||
47 | |||
35 | #define EM28XX_R0A_CHIPID 0x0a | 48 | #define EM28XX_R0A_CHIPID 0x0a |
36 | #define EM28XX_R0C_USBSUSP 0x0c /* */ | 49 | #define EM28XX_R0C_USBSUSP 0x0c /* */ |
37 | 50 | ||