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authorLinus Torvalds <torvalds@g5.osdl.org>2006-06-25 13:09:31 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-25 13:09:31 -0400
commit25581ad107be24b89d805da51a03d616f8f3d1be (patch)
tree36e2bd32667b5dd5a39e1939c1c5162f18967715 /drivers/media/video/cx88/cx88-dvb.c
parent72cf2709bf8e0410800f118c4298bfbf8715b303 (diff)
parent7477ddaa4d2d69bbcd49e12990af158dbb03f2f2 (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/mchehab/v4l-dvb
* master.kernel.org:/pub/scm/linux/kernel/git/mchehab/v4l-dvb: (244 commits) V4L/DVB (4210b): git-dvb: tea575x-tuner build fix V4L/DVB (4210a): git-dvb versus matroxfb V4L/DVB (4209): Added some BTTV PCI IDs for newer boards Fixes some sync issues between V4L/DVB development and GIT V4L/DVB (4206): Cx88-blackbird: always set encoder height based on tvnorm->id V4L/DVB (4205): Merge tda9887 module into tuner. V4L/DVB (4203): Explicitly set the enum values. V4L/DVB (4202): allow selecting CX2341x port mode V4L/DVB (4200): Disable bitrate_mode when encoding mpeg-1. V4L/DVB (4199): Add cx2341x-specific control array to cx2341x.c V4L/DVB (4198): Avoid newer usages of obsoleted experimental MPEGCOMP API V4L/DVB (4197): Port new MPEG API to saa7134-empress with saa6752hs V4L/DVB (4196): Port cx88-blackbird to the new MPEG API. V4L/DVB (4193): Update cx2341x fw encoding API doc. V4L/DVB (4192): Use control helpers for saa7115, cx25840, msp3400. V4L/DVB (4191): Add CX2341X MPEG encoder module. V4L/DVB (4190): Add helper functions for control processing to v4l2-common. V4L/DVB (4189): Add videodev support for VIDIOC_S/G/TRY_EXT_CTRLS. V4L/DVB (4188): Add new MPEG control/ioctl definitions to videodev2.h V4L/DVB (4186): Add support for the DNTV Live! mini DVB-T card. ...
Diffstat (limited to 'drivers/media/video/cx88/cx88-dvb.c')
-rw-r--r--drivers/media/video/cx88/cx88-dvb.c252
1 files changed, 167 insertions, 85 deletions
diff --git a/drivers/media/video/cx88/cx88-dvb.c b/drivers/media/video/cx88/cx88-dvb.c
index 3619a449aefd..dce1feddd55d 100644
--- a/drivers/media/video/cx88/cx88-dvb.c
+++ b/drivers/media/video/cx88/cx88-dvb.c
@@ -51,6 +51,7 @@
51#endif 51#endif
52#ifdef HAVE_LGDT330X 52#ifdef HAVE_LGDT330X
53# include "lgdt330x.h" 53# include "lgdt330x.h"
54# include "lg_h06xf.h"
54#endif 55#endif
55#ifdef HAVE_NXT200X 56#ifdef HAVE_NXT200X
56# include "nxt200x.h" 57# include "nxt200x.h"
@@ -58,6 +59,7 @@
58#ifdef HAVE_CX24123 59#ifdef HAVE_CX24123
59# include "cx24123.h" 60# include "cx24123.h"
60#endif 61#endif
62#include "isl6421.h"
61 63
62MODULE_DESCRIPTION("driver for cx2388x based DVB cards"); 64MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
63MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); 65MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
@@ -113,21 +115,6 @@ static struct videobuf_queue_ops dvb_qops = {
113 115
114/* ------------------------------------------------------------------ */ 116/* ------------------------------------------------------------------ */
115 117
116#if defined(HAVE_MT352) || defined(HAVE_ZL10353)
117static int zarlink_pll_set(struct dvb_frontend *fe,
118 struct dvb_frontend_parameters *params,
119 u8 *pllbuf)
120{
121 struct cx8802_dev *dev = fe->dvb->priv;
122
123 pllbuf[0] = dev->core->pll_addr << 1;
124 dvb_pll_configure(dev->core->pll_desc, pllbuf + 1,
125 params->frequency,
126 params->u.ofdm.bandwidth);
127 return 0;
128}
129#endif
130
131#ifdef HAVE_MT352 118#ifdef HAVE_MT352
132static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe) 119static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
133{ 120{
@@ -196,19 +183,16 @@ static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
196static struct mt352_config dvico_fusionhdtv = { 183static struct mt352_config dvico_fusionhdtv = {
197 .demod_address = 0x0F, 184 .demod_address = 0x0F,
198 .demod_init = dvico_fusionhdtv_demod_init, 185 .demod_init = dvico_fusionhdtv_demod_init,
199 .pll_set = zarlink_pll_set,
200}; 186};
201 187
202static struct mt352_config dntv_live_dvbt_config = { 188static struct mt352_config dntv_live_dvbt_config = {
203 .demod_address = 0x0f, 189 .demod_address = 0x0f,
204 .demod_init = dntv_live_dvbt_demod_init, 190 .demod_init = dntv_live_dvbt_demod_init,
205 .pll_set = zarlink_pll_set,
206}; 191};
207 192
208static struct mt352_config dvico_fusionhdtv_dual = { 193static struct mt352_config dvico_fusionhdtv_dual = {
209 .demod_address = 0x0F, 194 .demod_address = 0x0F,
210 .demod_init = dvico_dual_demod_init, 195 .demod_init = dvico_dual_demod_init,
211 .pll_set = zarlink_pll_set,
212}; 196};
213 197
214#ifdef HAVE_VP3054_I2C 198#ifdef HAVE_VP3054_I2C
@@ -246,6 +230,8 @@ static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
246 .buf = fmd1216_init, .len = sizeof(fmd1216_init) }; 230 .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
247 int err; 231 int err;
248 232
233 if (fe->ops.i2c_gate_ctrl)
234 fe->ops.i2c_gate_ctrl(fe, 1);
249 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) { 235 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
250 if (err < 0) 236 if (err < 0)
251 return err; 237 return err;
@@ -256,14 +242,14 @@ static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
256 return 0; 242 return 0;
257} 243}
258 244
259static int dntv_live_dvbt_pro_pll_set(struct dvb_frontend* fe, 245static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
260 struct dvb_frontend_parameters* params, 246 struct dvb_frontend_parameters* params)
261 u8* pllbuf)
262{ 247{
263 struct cx8802_dev *dev= fe->dvb->priv; 248 struct cx8802_dev *dev= fe->dvb->priv;
249 u8 buf[4];
264 struct i2c_msg msg = 250 struct i2c_msg msg =
265 { .addr = dev->core->pll_addr, .flags = 0, 251 { .addr = dev->core->pll_addr, .flags = 0,
266 .buf = pllbuf+1, .len = 4 }; 252 .buf = buf, .len = 4 };
267 int err; 253 int err;
268 254
269 /* Switch PLL to DVB mode */ 255 /* Switch PLL to DVB mode */
@@ -272,14 +258,16 @@ static int dntv_live_dvbt_pro_pll_set(struct dvb_frontend* fe,
272 return err; 258 return err;
273 259
274 /* Tune PLL */ 260 /* Tune PLL */
275 pllbuf[0] = dev->core->pll_addr << 1; 261 dvb_pll_configure(dev->core->pll_desc, buf,
276 dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
277 params->frequency, 262 params->frequency,
278 params->u.ofdm.bandwidth); 263 params->u.ofdm.bandwidth);
264 if (fe->ops.i2c_gate_ctrl)
265 fe->ops.i2c_gate_ctrl(fe, 1);
279 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) { 266 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
267
280 printk(KERN_WARNING "cx88-dvb: %s error " 268 printk(KERN_WARNING "cx88-dvb: %s error "
281 "(addr %02x <- %02x, err = %i)\n", 269 "(addr %02x <- %02x, err = %i)\n",
282 __FUNCTION__, pllbuf[0], pllbuf[1], err); 270 __FUNCTION__, dev->core->pll_addr, buf[0], err);
283 if (err < 0) 271 if (err < 0)
284 return err; 272 return err;
285 else 273 else
@@ -293,27 +281,27 @@ static struct mt352_config dntv_live_dvbt_pro_config = {
293 .demod_address = 0x0f, 281 .demod_address = 0x0f,
294 .no_tuner = 1, 282 .no_tuner = 1,
295 .demod_init = dntv_live_dvbt_pro_demod_init, 283 .demod_init = dntv_live_dvbt_pro_demod_init,
296 .pll_set = dntv_live_dvbt_pro_pll_set,
297}; 284};
298#endif 285#endif
299#endif 286#endif
300 287
301#ifdef HAVE_ZL10353 288#ifdef HAVE_ZL10353
302static int dvico_hybrid_tune_pll(struct dvb_frontend *fe, 289static int dvico_hybrid_tuner_set_params(struct dvb_frontend *fe,
303 struct dvb_frontend_parameters *params, 290 struct dvb_frontend_parameters *params)
304 u8 *pllbuf)
305{ 291{
292 u8 pllbuf[4];
306 struct cx8802_dev *dev= fe->dvb->priv; 293 struct cx8802_dev *dev= fe->dvb->priv;
307 struct i2c_msg msg = 294 struct i2c_msg msg =
308 { .addr = dev->core->pll_addr, .flags = 0, 295 { .addr = dev->core->pll_addr, .flags = 0,
309 .buf = pllbuf + 1, .len = 4 }; 296 .buf = pllbuf, .len = 4 };
310 int err; 297 int err;
311 298
312 pllbuf[0] = dev->core->pll_addr << 1; 299 dvb_pll_configure(dev->core->pll_desc, pllbuf,
313 dvb_pll_configure(dev->core->pll_desc, pllbuf + 1,
314 params->frequency, 300 params->frequency,
315 params->u.ofdm.bandwidth); 301 params->u.ofdm.bandwidth);
316 302
303 if (fe->ops.i2c_gate_ctrl)
304 fe->ops.i2c_gate_ctrl(fe, 1);
317 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) { 305 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
318 printk(KERN_WARNING "cx88-dvb: %s error " 306 printk(KERN_WARNING "cx88-dvb: %s error "
319 "(addr %02x <- %02x, err = %i)\n", 307 "(addr %02x <- %02x, err = %i)\n",
@@ -329,12 +317,11 @@ static int dvico_hybrid_tune_pll(struct dvb_frontend *fe,
329 317
330static struct zl10353_config dvico_fusionhdtv_hybrid = { 318static struct zl10353_config dvico_fusionhdtv_hybrid = {
331 .demod_address = 0x0F, 319 .demod_address = 0x0F,
332 .pll_set = dvico_hybrid_tune_pll, 320 .no_tuner = 1,
333}; 321};
334 322
335static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = { 323static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
336 .demod_address = 0x0F, 324 .demod_address = 0x0F,
337 .pll_set = zarlink_pll_set,
338}; 325};
339#endif 326#endif
340 327
@@ -342,21 +329,15 @@ static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
342static struct cx22702_config connexant_refboard_config = { 329static struct cx22702_config connexant_refboard_config = {
343 .demod_address = 0x43, 330 .demod_address = 0x43,
344 .output_mode = CX22702_SERIAL_OUTPUT, 331 .output_mode = CX22702_SERIAL_OUTPUT,
345 .pll_address = 0x60,
346 .pll_desc = &dvb_pll_thomson_dtt7579,
347}; 332};
348 333
349static struct cx22702_config hauppauge_novat_config = { 334static struct cx22702_config hauppauge_novat_config = {
350 .demod_address = 0x43, 335 .demod_address = 0x43,
351 .output_mode = CX22702_SERIAL_OUTPUT, 336 .output_mode = CX22702_SERIAL_OUTPUT,
352 .pll_address = 0x61,
353 .pll_desc = &dvb_pll_thomson_dtt759x,
354}; 337};
355static struct cx22702_config hauppauge_hvr1100_config = { 338static struct cx22702_config hauppauge_hvr1100_config = {
356 .demod_address = 0x63, 339 .demod_address = 0x63,
357 .output_mode = CX22702_SERIAL_OUTPUT, 340 .output_mode = CX22702_SERIAL_OUTPUT,
358 .pll_address = 0x61,
359 .pll_desc = &dvb_pll_fmd1216me,
360}; 341};
361#endif 342#endif
362 343
@@ -371,15 +352,13 @@ static int or51132_set_ts_param(struct dvb_frontend* fe,
371 352
372static struct or51132_config pchdtv_hd3000 = { 353static struct or51132_config pchdtv_hd3000 = {
373 .demod_address = 0x15, 354 .demod_address = 0x15,
374 .pll_address = 0x61,
375 .pll_desc = &dvb_pll_thomson_dtt761x,
376 .set_ts_params = or51132_set_ts_param, 355 .set_ts_params = or51132_set_ts_param,
377}; 356};
378#endif 357#endif
379 358
380#ifdef HAVE_LGDT330X 359#ifdef HAVE_LGDT330X
381static int lgdt330x_pll_set(struct dvb_frontend* fe, 360static int lgdt3302_tuner_set_params(struct dvb_frontend* fe,
382 struct dvb_frontend_parameters* params) 361 struct dvb_frontend_parameters* params)
383{ 362{
384 /* FIXME make this routine use the tuner-simple code. 363 /* FIXME make this routine use the tuner-simple code.
385 * It could probably be shared with a number of ATSC 364 * It could probably be shared with a number of ATSC
@@ -392,12 +371,12 @@ static int lgdt330x_pll_set(struct dvb_frontend* fe,
392 { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 }; 371 { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
393 int err; 372 int err;
394 373
395 /* Put the analog decoder in standby to keep it quiet */
396 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
397
398 dvb_pll_configure(core->pll_desc, buf, params->frequency, 0); 374 dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
399 dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n", 375 dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
400 __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]); 376 __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
377
378 if (fe->ops.i2c_gate_ctrl)
379 fe->ops.i2c_gate_ctrl(fe, 1);
401 if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) { 380 if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
402 printk(KERN_WARNING "cx88-dvb: %s error " 381 printk(KERN_WARNING "cx88-dvb: %s error "
403 "(addr %02x <- %02x, err = %i)\n", 382 "(addr %02x <- %02x, err = %i)\n",
@@ -407,16 +386,21 @@ static int lgdt330x_pll_set(struct dvb_frontend* fe,
407 else 386 else
408 return -EREMOTEIO; 387 return -EREMOTEIO;
409 } 388 }
410 if (core->tuner_type == TUNER_LG_TDVS_H062F) {
411 /* Set the Auxiliary Byte. */
412 buf[2] &= ~0x20;
413 buf[2] |= 0x18;
414 buf[3] = 0x50;
415 i2c_transfer(&core->i2c_adap, &msg, 1);
416 }
417 return 0; 389 return 0;
418} 390}
419 391
392static int lgdt3303_tuner_set_params(struct dvb_frontend* fe,
393 struct dvb_frontend_parameters* params)
394{
395 struct cx8802_dev *dev= fe->dvb->priv;
396 struct cx88_core *core = dev->core;
397
398 /* Put the analog decoder in standby to keep it quiet */
399 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
400
401 return lg_h06xf_pll_set(fe, &core->i2c_adap, params);
402}
403
420static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index) 404static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
421{ 405{
422 struct cx8802_dev *dev= fe->dvb->priv; 406 struct cx8802_dev *dev= fe->dvb->priv;
@@ -444,7 +428,6 @@ static struct lgdt330x_config fusionhdtv_3_gold = {
444 .demod_address = 0x0e, 428 .demod_address = 0x0e,
445 .demod_chip = LGDT3302, 429 .demod_chip = LGDT3302,
446 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */ 430 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
447 .pll_set = lgdt330x_pll_set,
448 .set_ts_params = lgdt330x_set_ts_param, 431 .set_ts_params = lgdt330x_set_ts_param,
449}; 432};
450 433
@@ -452,7 +435,13 @@ static struct lgdt330x_config fusionhdtv_5_gold = {
452 .demod_address = 0x0e, 435 .demod_address = 0x0e,
453 .demod_chip = LGDT3303, 436 .demod_chip = LGDT3303,
454 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */ 437 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
455 .pll_set = lgdt330x_pll_set, 438 .set_ts_params = lgdt330x_set_ts_param,
439};
440
441static struct lgdt330x_config pchdtv_hd5500 = {
442 .demod_address = 0x59,
443 .demod_chip = LGDT3303,
444 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
456 .set_ts_params = lgdt330x_set_ts_param, 445 .set_ts_params = lgdt330x_set_ts_param,
457}; 446};
458#endif 447#endif
@@ -477,8 +466,6 @@ static int nxt200x_set_pll_input(u8* buf, int input)
477 466
478static struct nxt200x_config ati_hdtvwonder = { 467static struct nxt200x_config ati_hdtvwonder = {
479 .demod_address = 0x0a, 468 .demod_address = 0x0a,
480 .pll_address = 0x61,
481 .pll_desc = &dvb_pll_tuv1236d,
482 .set_pll_input = nxt200x_set_pll_input, 469 .set_pll_input = nxt200x_set_pll_input,
483 .set_ts_params = nxt200x_set_ts_param, 470 .set_ts_params = nxt200x_set_ts_param,
484}; 471};
@@ -493,28 +480,30 @@ static int cx24123_set_ts_param(struct dvb_frontend* fe,
493 return 0; 480 return 0;
494} 481}
495 482
496static void cx24123_enable_lnb_voltage(struct dvb_frontend* fe, int on) 483static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
497{ 484{
498 struct cx8802_dev *dev= fe->dvb->priv; 485 struct cx8802_dev *dev= fe->dvb->priv;
499 struct cx88_core *core = dev->core; 486 struct cx88_core *core = dev->core;
500 487
501 if (on) 488 if (voltage == SEC_VOLTAGE_OFF) {
502 cx_write(MO_GP0_IO, 0x000006f9);
503 else
504 cx_write(MO_GP0_IO, 0x000006fB); 489 cx_write(MO_GP0_IO, 0x000006fB);
490 } else {
491 cx_write(MO_GP0_IO, 0x000006f9);
492 }
493
494 if (core->prev_set_voltage)
495 return core->prev_set_voltage(fe, voltage);
496 return 0;
505} 497}
506 498
507static struct cx24123_config hauppauge_novas_config = { 499static struct cx24123_config hauppauge_novas_config = {
508 .demod_address = 0x55, 500 .demod_address = 0x55,
509 .use_isl6421 = 1,
510 .set_ts_params = cx24123_set_ts_param, 501 .set_ts_params = cx24123_set_ts_param,
511}; 502};
512 503
513static struct cx24123_config kworld_dvbs_100_config = { 504static struct cx24123_config kworld_dvbs_100_config = {
514 .demod_address = 0x15, 505 .demod_address = 0x15,
515 .use_isl6421 = 0,
516 .set_ts_params = cx24123_set_ts_param, 506 .set_ts_params = cx24123_set_ts_param,
517 .enable_lnb_voltage = cx24123_enable_lnb_voltage,
518}; 507};
519#endif 508#endif
520 509
@@ -530,6 +519,11 @@ static int dvb_register(struct cx8802_dev *dev)
530 case CX88_BOARD_HAUPPAUGE_DVB_T1: 519 case CX88_BOARD_HAUPPAUGE_DVB_T1:
531 dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config, 520 dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
532 &dev->core->i2c_adap); 521 &dev->core->i2c_adap);
522 if (dev->dvb.frontend != NULL) {
523 dvb_pll_attach(dev->dvb.frontend, 0x61,
524 &dev->core->i2c_adap,
525 &dvb_pll_thomson_dtt759x);
526 }
533 break; 527 break;
534 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1: 528 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
535 case CX88_BOARD_CONEXANT_DVB_T1: 529 case CX88_BOARD_CONEXANT_DVB_T1:
@@ -537,44 +531,92 @@ static int dvb_register(struct cx8802_dev *dev)
537 case CX88_BOARD_WINFAST_DTV1000: 531 case CX88_BOARD_WINFAST_DTV1000:
538 dev->dvb.frontend = cx22702_attach(&connexant_refboard_config, 532 dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
539 &dev->core->i2c_adap); 533 &dev->core->i2c_adap);
534 if (dev->dvb.frontend != NULL) {
535 dvb_pll_attach(dev->dvb.frontend, 0x60,
536 &dev->core->i2c_adap,
537 &dvb_pll_thomson_dtt7579);
538 }
540 break; 539 break;
540 case CX88_BOARD_WINFAST_DTV2000H:
541 case CX88_BOARD_HAUPPAUGE_HVR1100: 541 case CX88_BOARD_HAUPPAUGE_HVR1100:
542 case CX88_BOARD_HAUPPAUGE_HVR1100LP: 542 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
543 dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config, 543 dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config,
544 &dev->core->i2c_adap); 544 &dev->core->i2c_adap);
545 if (dev->dvb.frontend != NULL) {
546 dvb_pll_attach(dev->dvb.frontend, 0x61,
547 &dev->core->i2c_adap,
548 &dvb_pll_fmd1216me);
549 }
545 break; 550 break;
546#endif 551#endif
547#if defined(HAVE_MT352) || defined(HAVE_ZL10353) 552#if defined(HAVE_MT352) || defined(HAVE_ZL10353)
548 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS: 553 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
549 dev->core->pll_addr = 0x60;
550 dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
551#ifdef HAVE_MT352 554#ifdef HAVE_MT352
552 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv, 555 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
553 &dev->core->i2c_adap); 556 &dev->core->i2c_adap);
554 if (dev->dvb.frontend != NULL) 557 if (dev->dvb.frontend != NULL) {
558 dvb_pll_attach(dev->dvb.frontend, 0x60,
559 &dev->core->i2c_adap,
560 &dvb_pll_thomson_dtt7579);
555 break; 561 break;
562 }
556#endif 563#endif
557#ifdef HAVE_ZL10353 564#ifdef HAVE_ZL10353
558 /* ZL10353 replaces MT352 on later cards */ 565 /* ZL10353 replaces MT352 on later cards */
559 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1, 566 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
560 &dev->core->i2c_adap); 567 &dev->core->i2c_adap);
568 if (dev->dvb.frontend != NULL) {
569 dvb_pll_attach(dev->dvb.frontend, 0x60,
570 &dev->core->i2c_adap,
571 &dvb_pll_thomson_dtt7579);
572 }
573#endif
574 break;
575 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
576#ifdef HAVE_MT352
577 /* The tin box says DEE1601, but it seems to be DTT7579
578 * compatible, with a slightly different MT352 AGC gain. */
579 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
580 &dev->core->i2c_adap);
581 if (dev->dvb.frontend != NULL) {
582 dvb_pll_attach(dev->dvb.frontend, 0x61,
583 &dev->core->i2c_adap,
584 &dvb_pll_thomson_dtt7579);
585 break;
586 }
587#endif
588#ifdef HAVE_ZL10353
589 /* ZL10353 replaces MT352 on later cards */
590 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
591 &dev->core->i2c_adap);
592 if (dev->dvb.frontend != NULL) {
593 dvb_pll_attach(dev->dvb.frontend, 0x61,
594 &dev->core->i2c_adap,
595 &dvb_pll_thomson_dtt7579);
596 }
561#endif 597#endif
562 break; 598 break;
563#endif /* HAVE_MT352 || HAVE_ZL10353 */ 599#endif /* HAVE_MT352 || HAVE_ZL10353 */
564#ifdef HAVE_MT352 600#ifdef HAVE_MT352
565 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1: 601 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
566 dev->core->pll_addr = 0x61;
567 dev->core->pll_desc = &dvb_pll_lg_z201;
568 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv, 602 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
569 &dev->core->i2c_adap); 603 &dev->core->i2c_adap);
604 if (dev->dvb.frontend != NULL) {
605 dvb_pll_attach(dev->dvb.frontend, 0x61,
606 &dev->core->i2c_adap,
607 &dvb_pll_lg_z201);
608 }
570 break; 609 break;
571 case CX88_BOARD_KWORLD_DVB_T: 610 case CX88_BOARD_KWORLD_DVB_T:
572 case CX88_BOARD_DNTV_LIVE_DVB_T: 611 case CX88_BOARD_DNTV_LIVE_DVB_T:
573 case CX88_BOARD_ADSTECH_DVB_T_PCI: 612 case CX88_BOARD_ADSTECH_DVB_T_PCI:
574 dev->core->pll_addr = 0x61;
575 dev->core->pll_desc = &dvb_pll_unknown_1;
576 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config, 613 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
577 &dev->core->i2c_adap); 614 &dev->core->i2c_adap);
615 if (dev->dvb.frontend != NULL) {
616 dvb_pll_attach(dev->dvb.frontend, 0x61,
617 &dev->core->i2c_adap,
618 &dvb_pll_unknown_1);
619 }
578 break; 620 break;
579 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO: 621 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
580#ifdef HAVE_VP3054_I2C 622#ifdef HAVE_VP3054_I2C
@@ -582,18 +624,13 @@ static int dvb_register(struct cx8802_dev *dev)
582 dev->core->pll_desc = &dvb_pll_fmd1216me; 624 dev->core->pll_desc = &dvb_pll_fmd1216me;
583 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config, 625 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config,
584 &((struct vp3054_i2c_state *)dev->card_priv)->adap); 626 &((struct vp3054_i2c_state *)dev->card_priv)->adap);
627 if (dev->dvb.frontend != NULL) {
628 dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
629 }
585#else 630#else
586 printk("%s: built without vp3054 support\n", dev->core->name); 631 printk("%s: built without vp3054 support\n", dev->core->name);
587#endif 632#endif
588 break; 633 break;
589 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
590 /* The tin box says DEE1601, but it seems to be DTT7579
591 * compatible, with a slightly different MT352 AGC gain. */
592 dev->core->pll_addr = 0x61;
593 dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
594 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
595 &dev->core->i2c_adap);
596 break;
597#endif 634#endif
598#ifdef HAVE_ZL10353 635#ifdef HAVE_ZL10353
599 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID: 636 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
@@ -601,12 +638,20 @@ static int dvb_register(struct cx8802_dev *dev)
601 dev->core->pll_desc = &dvb_pll_thomson_fe6600; 638 dev->core->pll_desc = &dvb_pll_thomson_fe6600;
602 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_hybrid, 639 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_hybrid,
603 &dev->core->i2c_adap); 640 &dev->core->i2c_adap);
641 if (dev->dvb.frontend != NULL) {
642 dev->dvb.frontend->ops.tuner_ops.set_params = dvico_hybrid_tuner_set_params;
643 }
604 break; 644 break;
605#endif 645#endif
606#ifdef HAVE_OR51132 646#ifdef HAVE_OR51132
607 case CX88_BOARD_PCHDTV_HD3000: 647 case CX88_BOARD_PCHDTV_HD3000:
608 dev->dvb.frontend = or51132_attach(&pchdtv_hd3000, 648 dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
609 &dev->core->i2c_adap); 649 &dev->core->i2c_adap);
650 if (dev->dvb.frontend != NULL) {
651 dvb_pll_attach(dev->dvb.frontend, 0x61,
652 &dev->core->i2c_adap,
653 &dvb_pll_thomson_dtt761x);
654 }
610 break; 655 break;
611#endif 656#endif
612#ifdef HAVE_LGDT330X 657#ifdef HAVE_LGDT330X
@@ -627,6 +672,9 @@ static int dvb_register(struct cx8802_dev *dev)
627 dev->core->pll_desc = &dvb_pll_microtune_4042; 672 dev->core->pll_desc = &dvb_pll_microtune_4042;
628 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold, 673 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
629 &dev->core->i2c_adap); 674 &dev->core->i2c_adap);
675 if (dev->dvb.frontend != NULL) {
676 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
677 }
630 } 678 }
631 break; 679 break;
632 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T: 680 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
@@ -643,6 +691,9 @@ static int dvb_register(struct cx8802_dev *dev)
643 dev->core->pll_desc = &dvb_pll_thomson_dtt761x; 691 dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
644 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold, 692 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
645 &dev->core->i2c_adap); 693 &dev->core->i2c_adap);
694 if (dev->dvb.frontend != NULL) {
695 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
696 }
646 } 697 }
647 break; 698 break;
648 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD: 699 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
@@ -655,10 +706,28 @@ static int dvb_register(struct cx8802_dev *dev)
655 mdelay(100); 706 mdelay(100);
656 cx_set(MO_GP0_IO, 1); 707 cx_set(MO_GP0_IO, 1);
657 mdelay(200); 708 mdelay(200);
658 dev->core->pll_addr = 0x61;
659 dev->core->pll_desc = &dvb_pll_tdvs_tua6034;
660 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold, 709 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold,
661 &dev->core->i2c_adap); 710 &dev->core->i2c_adap);
711 if (dev->dvb.frontend != NULL) {
712 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
713 }
714 }
715 break;
716 case CX88_BOARD_PCHDTV_HD5500:
717 dev->ts_gen_cntrl = 0x08;
718 {
719 /* Do a hardware reset of chip before using it. */
720 struct cx88_core *core = dev->core;
721
722 cx_clear(MO_GP0_IO, 1);
723 mdelay(100);
724 cx_set(MO_GP0_IO, 1);
725 mdelay(200);
726 dev->dvb.frontend = lgdt330x_attach(&pchdtv_hd5500,
727 &dev->core->i2c_adap);
728 if (dev->dvb.frontend != NULL) {
729 dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
730 }
662 } 731 }
663 break; 732 break;
664#endif 733#endif
@@ -666,6 +735,11 @@ static int dvb_register(struct cx8802_dev *dev)
666 case CX88_BOARD_ATI_HDTVWONDER: 735 case CX88_BOARD_ATI_HDTVWONDER:
667 dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder, 736 dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
668 &dev->core->i2c_adap); 737 &dev->core->i2c_adap);
738 if (dev->dvb.frontend != NULL) {
739 dvb_pll_attach(dev->dvb.frontend, 0x61,
740 &dev->core->i2c_adap,
741 &dvb_pll_tuv1236d);
742 }
669 break; 743 break;
670#endif 744#endif
671#ifdef HAVE_CX24123 745#ifdef HAVE_CX24123
@@ -673,10 +747,18 @@ static int dvb_register(struct cx8802_dev *dev)
673 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1: 747 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
674 dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config, 748 dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config,
675 &dev->core->i2c_adap); 749 &dev->core->i2c_adap);
750 if (dev->dvb.frontend) {
751 isl6421_attach(dev->dvb.frontend, &dev->core->i2c_adap,
752 0x08, 0x00, 0x00);
753 }
676 break; 754 break;
677 case CX88_BOARD_KWORLD_DVBS_100: 755 case CX88_BOARD_KWORLD_DVBS_100:
678 dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config, 756 dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config,
679 &dev->core->i2c_adap); 757 &dev->core->i2c_adap);
758 if (dev->dvb.frontend) {
759 dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
760 dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
761 }
680 break; 762 break;
681#endif 763#endif
682 default: 764 default:
@@ -690,15 +772,15 @@ static int dvb_register(struct cx8802_dev *dev)
690 } 772 }
691 773
692 if (dev->core->pll_desc) { 774 if (dev->core->pll_desc) {
693 dev->dvb.frontend->ops->info.frequency_min = dev->core->pll_desc->min; 775 dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
694 dev->dvb.frontend->ops->info.frequency_max = dev->core->pll_desc->max; 776 dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
695 } 777 }
696 778
697 /* Put the analog decoder in standby to keep it quiet */ 779 /* Put the analog decoder in standby to keep it quiet */
698 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL); 780 cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
699 781
700 /* register everything */ 782 /* register everything */
701 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev); 783 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
702} 784}
703 785
704/* ----------------------------------------------------------- */ 786/* ----------------------------------------------------------- */