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authorChris Pascoe <c.pascoe@itee.uq.edu.au>2006-02-28 06:34:59 -0500
committerMauro Carvalho Chehab <mchehab@infradead.org>2006-03-08 09:36:50 -0500
commit780dfef37e2c941985b708f67aa0074edc922bea (patch)
treec7db2fd63acfce369d2af871183da2cf0614db9a /drivers/media/video/cx88/cx88-dvb.c
parentdb5d91eb36e1cc9d46016d1d44874376cfabf274 (diff)
V4L/DVB (3408): DViCO FusionHDTV DVB-T Hybrid and ZL10353-based FusionHDTV DVB-T Plus support
Add support for the FE6600 tuner used on the DVB-T Hybrid board. Add support for the Zarlink ZL10353 DVB-T demodulator, which supersedes the MT352, used on the DViCO FusionHDTV DVB-T Hybrid and later model Plus boards. Signed-off-by: Chris Pascoe <c.pascoe@itee.uq.edu.au> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/video/cx88/cx88-dvb.c')
-rw-r--r--drivers/media/video/cx88/cx88-dvb.c108
1 files changed, 86 insertions, 22 deletions
diff --git a/drivers/media/video/cx88/cx88-dvb.c b/drivers/media/video/cx88/cx88-dvb.c
index e48aa3f6e500..2c97d3f7101a 100644
--- a/drivers/media/video/cx88/cx88-dvb.c
+++ b/drivers/media/video/cx88/cx88-dvb.c
@@ -40,6 +40,9 @@
40# include "cx88-vp3054-i2c.h" 40# include "cx88-vp3054-i2c.h"
41# endif 41# endif
42#endif 42#endif
43#ifdef HAVE_ZL10353
44# include "zl10353.h"
45#endif
43#ifdef HAVE_CX22702 46#ifdef HAVE_CX22702
44# include "cx22702.h" 47# include "cx22702.h"
45#endif 48#endif
@@ -111,6 +114,21 @@ static struct videobuf_queue_ops dvb_qops = {
111 114
112/* ------------------------------------------------------------------ */ 115/* ------------------------------------------------------------------ */
113 116
117#if defined(HAVE_MT352) || defined(HAVE_ZL10353)
118static int zarlink_pll_set(struct dvb_frontend *fe,
119 struct dvb_frontend_parameters *params,
120 u8 *pllbuf)
121{
122 struct cx8802_dev *dev = fe->dvb->priv;
123
124 pllbuf[0] = dev->core->pll_addr << 1;
125 dvb_pll_configure(dev->core->pll_desc, pllbuf + 1,
126 params->frequency,
127 params->u.ofdm.bandwidth);
128 return 0;
129}
130#endif
131
114#ifdef HAVE_MT352 132#ifdef HAVE_MT352
115static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe) 133static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
116{ 134{
@@ -176,35 +194,22 @@ static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
176 return 0; 194 return 0;
177} 195}
178 196
179static int mt352_pll_set(struct dvb_frontend* fe,
180 struct dvb_frontend_parameters* params,
181 u8* pllbuf)
182{
183 struct cx8802_dev *dev= fe->dvb->priv;
184
185 pllbuf[0] = dev->core->pll_addr << 1;
186 dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
187 params->frequency,
188 params->u.ofdm.bandwidth);
189 return 0;
190}
191
192static struct mt352_config dvico_fusionhdtv = { 197static struct mt352_config dvico_fusionhdtv = {
193 .demod_address = 0x0F, 198 .demod_address = 0x0F,
194 .demod_init = dvico_fusionhdtv_demod_init, 199 .demod_init = dvico_fusionhdtv_demod_init,
195 .pll_set = mt352_pll_set, 200 .pll_set = zarlink_pll_set,
196}; 201};
197 202
198static struct mt352_config dntv_live_dvbt_config = { 203static struct mt352_config dntv_live_dvbt_config = {
199 .demod_address = 0x0f, 204 .demod_address = 0x0f,
200 .demod_init = dntv_live_dvbt_demod_init, 205 .demod_init = dntv_live_dvbt_demod_init,
201 .pll_set = mt352_pll_set, 206 .pll_set = zarlink_pll_set,
202}; 207};
203 208
204static struct mt352_config dvico_fusionhdtv_dual = { 209static struct mt352_config dvico_fusionhdtv_dual = {
205 .demod_address = 0x0F, 210 .demod_address = 0x0F,
206 .demod_init = dvico_dual_demod_init, 211 .demod_init = dvico_dual_demod_init,
207 .pll_set = mt352_pll_set, 212 .pll_set = zarlink_pll_set,
208}; 213};
209 214
210#ifdef HAVE_VP3054_I2C 215#ifdef HAVE_VP3054_I2C
@@ -294,6 +299,46 @@ static struct mt352_config dntv_live_dvbt_pro_config = {
294#endif 299#endif
295#endif 300#endif
296 301
302#ifdef HAVE_ZL10353
303static int dvico_hybrid_tune_pll(struct dvb_frontend *fe,
304 struct dvb_frontend_parameters *params,
305 u8 *pllbuf)
306{
307 struct cx8802_dev *dev= fe->dvb->priv;
308 struct i2c_msg msg =
309 { .addr = dev->core->pll_addr, .flags = 0,
310 .buf = pllbuf + 1, .len = 4 };
311 int err;
312
313 pllbuf[0] = dev->core->pll_addr << 1;
314 dvb_pll_configure(dev->core->pll_desc, pllbuf + 1,
315 params->frequency,
316 params->u.ofdm.bandwidth);
317
318 if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
319 printk(KERN_WARNING "cx88-dvb: %s error "
320 "(addr %02x <- %02x, err = %i)\n",
321 __FUNCTION__, pllbuf[0], pllbuf[1], err);
322 if (err < 0)
323 return err;
324 else
325 return -EREMOTEIO;
326 }
327
328 return 0;
329}
330
331static struct zl10353_config dvico_fusionhdtv_hybrid = {
332 .demod_address = 0x0F,
333 .pll_set = dvico_hybrid_tune_pll,
334};
335
336static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
337 .demod_address = 0x0F,
338 .pll_set = zarlink_pll_set,
339};
340#endif
341
297#ifdef HAVE_CX22702 342#ifdef HAVE_CX22702
298static struct cx22702_config connexant_refboard_config = { 343static struct cx22702_config connexant_refboard_config = {
299 .demod_address = 0x43, 344 .demod_address = 0x43,
@@ -500,16 +545,27 @@ static int dvb_register(struct cx8802_dev *dev)
500 &dev->core->i2c_adap); 545 &dev->core->i2c_adap);
501 break; 546 break;
502#endif 547#endif
548#if defined(HAVE_MT352) || defined(HAVE_ZL10353)
549 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
550 dev->core->pll_addr = 0x60;
551 dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
503#ifdef HAVE_MT352 552#ifdef HAVE_MT352
504 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
505 dev->core->pll_addr = 0x61;
506 dev->core->pll_desc = &dvb_pll_lg_z201;
507 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv, 553 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
508 &dev->core->i2c_adap); 554 &dev->core->i2c_adap);
555 if (dev->dvb.frontend != NULL)
556 break;
557#endif
558#ifdef HAVE_ZL10353
559 /* ZL10353 replaces MT352 on later cards */
560 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
561 &dev->core->i2c_adap);
562#endif
509 break; 563 break;
510 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS: 564#endif /* HAVE_MT352 || HAVE_ZL10353 */
511 dev->core->pll_addr = 0x60; 565#ifdef HAVE_MT352
512 dev->core->pll_desc = &dvb_pll_thomson_dtt7579; 566 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
567 dev->core->pll_addr = 0x61;
568 dev->core->pll_desc = &dvb_pll_lg_z201;
513 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv, 569 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
514 &dev->core->i2c_adap); 570 &dev->core->i2c_adap);
515 break; 571 break;
@@ -540,6 +596,14 @@ static int dvb_register(struct cx8802_dev *dev)
540 &dev->core->i2c_adap); 596 &dev->core->i2c_adap);
541 break; 597 break;
542#endif 598#endif
599#ifdef HAVE_ZL10353
600 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
601 dev->core->pll_addr = 0x61;
602 dev->core->pll_desc = &dvb_pll_unknown_fe6600;
603 dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_hybrid,
604 &dev->core->i2c_adap);
605 break;
606#endif
543#ifdef HAVE_OR51132 607#ifdef HAVE_OR51132
544 case CX88_BOARD_PCHDTV_HD3000: 608 case CX88_BOARD_PCHDTV_HD3000:
545 dev->dvb.frontend = or51132_attach(&pchdtv_hd3000, 609 dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,