diff options
author | Scott Jiang <scott.jiang.linux@gmail.com> | 2012-03-08 15:44:15 -0500 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-03-19 14:04:10 -0400 |
commit | 202ea1f05b15e9fee05426d5c6f1d16201d4687f (patch) | |
tree | 1a796d21a28dd37b5ff1ea8840b7723cff7f6814 /drivers/media/video/adv7183.c | |
parent | aa2e682a48ab96c27772c523a20e03850819afa1 (diff) |
[media] adv7183: add adv7183 decoder driver
This driver is a v4l2 subdevice driver to support Analog Devices ADV7183 SDTV video decoder.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/video/adv7183.c')
-rw-r--r-- | drivers/media/video/adv7183.c | 699 |
1 files changed, 699 insertions, 0 deletions
diff --git a/drivers/media/video/adv7183.c b/drivers/media/video/adv7183.c new file mode 100644 index 000000000000..e1d4c89d7140 --- /dev/null +++ b/drivers/media/video/adv7183.c | |||
@@ -0,0 +1,699 @@ | |||
1 | /* | ||
2 | * adv7183.c Analog Devices ADV7183 video decoder driver | ||
3 | * | ||
4 | * Copyright (c) 2011 Analog Devices Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
18 | */ | ||
19 | |||
20 | #include <linux/delay.h> | ||
21 | #include <linux/errno.h> | ||
22 | #include <linux/gpio.h> | ||
23 | #include <linux/i2c.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/module.h> | ||
26 | #include <linux/slab.h> | ||
27 | #include <linux/types.h> | ||
28 | #include <linux/videodev2.h> | ||
29 | |||
30 | #include <media/adv7183.h> | ||
31 | #include <media/v4l2-chip-ident.h> | ||
32 | #include <media/v4l2-ctrls.h> | ||
33 | #include <media/v4l2-device.h> | ||
34 | |||
35 | #include "adv7183_regs.h" | ||
36 | |||
37 | struct adv7183 { | ||
38 | struct v4l2_subdev sd; | ||
39 | struct v4l2_ctrl_handler hdl; | ||
40 | |||
41 | v4l2_std_id std; /* Current set standard */ | ||
42 | u32 input; | ||
43 | u32 output; | ||
44 | unsigned reset_pin; | ||
45 | unsigned oe_pin; | ||
46 | struct v4l2_mbus_framefmt fmt; | ||
47 | }; | ||
48 | |||
49 | /* EXAMPLES USING 27 MHz CLOCK | ||
50 | * Mode 1 CVBS Input (Composite Video on AIN5) | ||
51 | * All standards are supported through autodetect, 8-bit, 4:2:2, ITU-R BT.656 output on P15 to P8. | ||
52 | */ | ||
53 | static const unsigned char adv7183_init_regs[] = { | ||
54 | ADV7183_IN_CTRL, 0x04, /* CVBS input on AIN5 */ | ||
55 | ADV7183_DIGI_CLAMP_CTRL_1, 0x00, /* Slow down digital clamps */ | ||
56 | ADV7183_SHAP_FILT_CTRL, 0x41, /* Set CSFM to SH1 */ | ||
57 | ADV7183_ADC_CTRL, 0x16, /* Power down ADC 1 and ADC 2 */ | ||
58 | ADV7183_CTI_DNR_CTRL_4, 0x04, /* Set DNR threshold to 4 for flat response */ | ||
59 | /* ADI recommended programming sequence */ | ||
60 | ADV7183_ADI_CTRL, 0x80, | ||
61 | ADV7183_CTI_DNR_CTRL_4, 0x20, | ||
62 | 0x52, 0x18, | ||
63 | 0x58, 0xED, | ||
64 | 0x77, 0xC5, | ||
65 | 0x7C, 0x93, | ||
66 | 0x7D, 0x00, | ||
67 | 0xD0, 0x48, | ||
68 | 0xD5, 0xA0, | ||
69 | 0xD7, 0xEA, | ||
70 | ADV7183_SD_SATURATION_CR, 0x3E, | ||
71 | ADV7183_PAL_V_END, 0x3E, | ||
72 | ADV7183_PAL_F_TOGGLE, 0x0F, | ||
73 | ADV7183_ADI_CTRL, 0x00, | ||
74 | }; | ||
75 | |||
76 | static inline struct adv7183 *to_adv7183(struct v4l2_subdev *sd) | ||
77 | { | ||
78 | return container_of(sd, struct adv7183, sd); | ||
79 | } | ||
80 | static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) | ||
81 | { | ||
82 | return &container_of(ctrl->handler, struct adv7183, hdl)->sd; | ||
83 | } | ||
84 | |||
85 | static inline int adv7183_read(struct v4l2_subdev *sd, unsigned char reg) | ||
86 | { | ||
87 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
88 | |||
89 | return i2c_smbus_read_byte_data(client, reg); | ||
90 | } | ||
91 | |||
92 | static inline int adv7183_write(struct v4l2_subdev *sd, unsigned char reg, | ||
93 | unsigned char value) | ||
94 | { | ||
95 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
96 | |||
97 | return i2c_smbus_write_byte_data(client, reg, value); | ||
98 | } | ||
99 | |||
100 | static int adv7183_writeregs(struct v4l2_subdev *sd, | ||
101 | const unsigned char *regs, unsigned int num) | ||
102 | { | ||
103 | unsigned char reg, data; | ||
104 | unsigned int cnt = 0; | ||
105 | |||
106 | if (num & 0x1) { | ||
107 | v4l2_err(sd, "invalid regs array\n"); | ||
108 | return -1; | ||
109 | } | ||
110 | |||
111 | while (cnt < num) { | ||
112 | reg = *regs++; | ||
113 | data = *regs++; | ||
114 | cnt += 2; | ||
115 | |||
116 | adv7183_write(sd, reg, data); | ||
117 | } | ||
118 | return 0; | ||
119 | } | ||
120 | |||
121 | static int adv7183_log_status(struct v4l2_subdev *sd) | ||
122 | { | ||
123 | struct adv7183 *decoder = to_adv7183(sd); | ||
124 | |||
125 | v4l2_info(sd, "adv7183: Input control = 0x%02x\n", | ||
126 | adv7183_read(sd, ADV7183_IN_CTRL)); | ||
127 | v4l2_info(sd, "adv7183: Video selection = 0x%02x\n", | ||
128 | adv7183_read(sd, ADV7183_VD_SEL)); | ||
129 | v4l2_info(sd, "adv7183: Output control = 0x%02x\n", | ||
130 | adv7183_read(sd, ADV7183_OUT_CTRL)); | ||
131 | v4l2_info(sd, "adv7183: Extended output control = 0x%02x\n", | ||
132 | adv7183_read(sd, ADV7183_EXT_OUT_CTRL)); | ||
133 | v4l2_info(sd, "adv7183: Autodetect enable = 0x%02x\n", | ||
134 | adv7183_read(sd, ADV7183_AUTO_DET_EN)); | ||
135 | v4l2_info(sd, "adv7183: Contrast = 0x%02x\n", | ||
136 | adv7183_read(sd, ADV7183_CONTRAST)); | ||
137 | v4l2_info(sd, "adv7183: Brightness = 0x%02x\n", | ||
138 | adv7183_read(sd, ADV7183_BRIGHTNESS)); | ||
139 | v4l2_info(sd, "adv7183: Hue = 0x%02x\n", | ||
140 | adv7183_read(sd, ADV7183_HUE)); | ||
141 | v4l2_info(sd, "adv7183: Default value Y = 0x%02x\n", | ||
142 | adv7183_read(sd, ADV7183_DEF_Y)); | ||
143 | v4l2_info(sd, "adv7183: Default value C = 0x%02x\n", | ||
144 | adv7183_read(sd, ADV7183_DEF_C)); | ||
145 | v4l2_info(sd, "adv7183: ADI control = 0x%02x\n", | ||
146 | adv7183_read(sd, ADV7183_ADI_CTRL)); | ||
147 | v4l2_info(sd, "adv7183: Power Management = 0x%02x\n", | ||
148 | adv7183_read(sd, ADV7183_POW_MANAGE)); | ||
149 | v4l2_info(sd, "adv7183: Status 1 2 and 3 = 0x%02x 0x%02x 0x%02x\n", | ||
150 | adv7183_read(sd, ADV7183_STATUS_1), | ||
151 | adv7183_read(sd, ADV7183_STATUS_2), | ||
152 | adv7183_read(sd, ADV7183_STATUS_3)); | ||
153 | v4l2_info(sd, "adv7183: Ident = 0x%02x\n", | ||
154 | adv7183_read(sd, ADV7183_IDENT)); | ||
155 | v4l2_info(sd, "adv7183: Analog clamp control = 0x%02x\n", | ||
156 | adv7183_read(sd, ADV7183_ANAL_CLAMP_CTRL)); | ||
157 | v4l2_info(sd, "adv7183: Digital clamp control 1 = 0x%02x\n", | ||
158 | adv7183_read(sd, ADV7183_DIGI_CLAMP_CTRL_1)); | ||
159 | v4l2_info(sd, "adv7183: Shaping filter control 1 and 2 = 0x%02x 0x%02x\n", | ||
160 | adv7183_read(sd, ADV7183_SHAP_FILT_CTRL), | ||
161 | adv7183_read(sd, ADV7183_SHAP_FILT_CTRL_2)); | ||
162 | v4l2_info(sd, "adv7183: Comb filter control = 0x%02x\n", | ||
163 | adv7183_read(sd, ADV7183_COMB_FILT_CTRL)); | ||
164 | v4l2_info(sd, "adv7183: ADI control 2 = 0x%02x\n", | ||
165 | adv7183_read(sd, ADV7183_ADI_CTRL_2)); | ||
166 | v4l2_info(sd, "adv7183: Pixel delay control = 0x%02x\n", | ||
167 | adv7183_read(sd, ADV7183_PIX_DELAY_CTRL)); | ||
168 | v4l2_info(sd, "adv7183: Misc gain control = 0x%02x\n", | ||
169 | adv7183_read(sd, ADV7183_MISC_GAIN_CTRL)); | ||
170 | v4l2_info(sd, "adv7183: AGC mode control = 0x%02x\n", | ||
171 | adv7183_read(sd, ADV7183_AGC_MODE_CTRL)); | ||
172 | v4l2_info(sd, "adv7183: Chroma gain control 1 and 2 = 0x%02x 0x%02x\n", | ||
173 | adv7183_read(sd, ADV7183_CHRO_GAIN_CTRL_1), | ||
174 | adv7183_read(sd, ADV7183_CHRO_GAIN_CTRL_2)); | ||
175 | v4l2_info(sd, "adv7183: Luma gain control 1 and 2 = 0x%02x 0x%02x\n", | ||
176 | adv7183_read(sd, ADV7183_LUMA_GAIN_CTRL_1), | ||
177 | adv7183_read(sd, ADV7183_LUMA_GAIN_CTRL_2)); | ||
178 | v4l2_info(sd, "adv7183: Vsync field control 1 2 and 3 = 0x%02x 0x%02x 0x%02x\n", | ||
179 | adv7183_read(sd, ADV7183_VS_FIELD_CTRL_1), | ||
180 | adv7183_read(sd, ADV7183_VS_FIELD_CTRL_2), | ||
181 | adv7183_read(sd, ADV7183_VS_FIELD_CTRL_3)); | ||
182 | v4l2_info(sd, "adv7183: Hsync positon control 1 2 and 3 = 0x%02x 0x%02x 0x%02x\n", | ||
183 | adv7183_read(sd, ADV7183_HS_POS_CTRL_1), | ||
184 | adv7183_read(sd, ADV7183_HS_POS_CTRL_2), | ||
185 | adv7183_read(sd, ADV7183_HS_POS_CTRL_3)); | ||
186 | v4l2_info(sd, "adv7183: Polarity = 0x%02x\n", | ||
187 | adv7183_read(sd, ADV7183_POLARITY)); | ||
188 | v4l2_info(sd, "adv7183: ADC control = 0x%02x\n", | ||
189 | adv7183_read(sd, ADV7183_ADC_CTRL)); | ||
190 | v4l2_info(sd, "adv7183: SD offset Cb and Cr = 0x%02x 0x%02x\n", | ||
191 | adv7183_read(sd, ADV7183_SD_OFFSET_CB), | ||
192 | adv7183_read(sd, ADV7183_SD_OFFSET_CR)); | ||
193 | v4l2_info(sd, "adv7183: SD saturation Cb and Cr = 0x%02x 0x%02x\n", | ||
194 | adv7183_read(sd, ADV7183_SD_SATURATION_CB), | ||
195 | adv7183_read(sd, ADV7183_SD_SATURATION_CR)); | ||
196 | v4l2_info(sd, "adv7183: Drive strength = 0x%02x\n", | ||
197 | adv7183_read(sd, ADV7183_DRIVE_STR)); | ||
198 | v4l2_ctrl_handler_log_status(&decoder->hdl, sd->name); | ||
199 | return 0; | ||
200 | } | ||
201 | |||
202 | static int adv7183_g_std(struct v4l2_subdev *sd, v4l2_std_id *std) | ||
203 | { | ||
204 | struct adv7183 *decoder = to_adv7183(sd); | ||
205 | |||
206 | *std = decoder->std; | ||
207 | return 0; | ||
208 | } | ||
209 | |||
210 | static int adv7183_s_std(struct v4l2_subdev *sd, v4l2_std_id std) | ||
211 | { | ||
212 | struct adv7183 *decoder = to_adv7183(sd); | ||
213 | int reg; | ||
214 | |||
215 | reg = adv7183_read(sd, ADV7183_IN_CTRL) & 0xF; | ||
216 | if (std == V4L2_STD_PAL_60) | ||
217 | reg |= 0x60; | ||
218 | else if (std == V4L2_STD_NTSC_443) | ||
219 | reg |= 0x70; | ||
220 | else if (std == V4L2_STD_PAL_N) | ||
221 | reg |= 0x90; | ||
222 | else if (std == V4L2_STD_PAL_M) | ||
223 | reg |= 0xA0; | ||
224 | else if (std == V4L2_STD_PAL_Nc) | ||
225 | reg |= 0xC0; | ||
226 | else if (std & V4L2_STD_PAL) | ||
227 | reg |= 0x80; | ||
228 | else if (std & V4L2_STD_NTSC) | ||
229 | reg |= 0x50; | ||
230 | else if (std & V4L2_STD_SECAM) | ||
231 | reg |= 0xE0; | ||
232 | else | ||
233 | return -EINVAL; | ||
234 | adv7183_write(sd, ADV7183_IN_CTRL, reg); | ||
235 | |||
236 | decoder->std = std; | ||
237 | |||
238 | return 0; | ||
239 | } | ||
240 | |||
241 | static int adv7183_reset(struct v4l2_subdev *sd, u32 val) | ||
242 | { | ||
243 | int reg; | ||
244 | |||
245 | reg = adv7183_read(sd, ADV7183_POW_MANAGE) | 0x80; | ||
246 | adv7183_write(sd, ADV7183_POW_MANAGE, reg); | ||
247 | /* wait 5ms before any further i2c writes are performed */ | ||
248 | usleep_range(5000, 10000); | ||
249 | return 0; | ||
250 | } | ||
251 | |||
252 | static int adv7183_s_routing(struct v4l2_subdev *sd, | ||
253 | u32 input, u32 output, u32 config) | ||
254 | { | ||
255 | struct adv7183 *decoder = to_adv7183(sd); | ||
256 | int reg; | ||
257 | |||
258 | if ((input > ADV7183_COMPONENT1) || (output > ADV7183_16BIT_OUT)) | ||
259 | return -EINVAL; | ||
260 | |||
261 | if (input != decoder->input) { | ||
262 | decoder->input = input; | ||
263 | reg = adv7183_read(sd, ADV7183_IN_CTRL) & 0xF0; | ||
264 | switch (input) { | ||
265 | case ADV7183_COMPOSITE1: | ||
266 | reg |= 0x1; | ||
267 | break; | ||
268 | case ADV7183_COMPOSITE2: | ||
269 | reg |= 0x2; | ||
270 | break; | ||
271 | case ADV7183_COMPOSITE3: | ||
272 | reg |= 0x3; | ||
273 | break; | ||
274 | case ADV7183_COMPOSITE4: | ||
275 | reg |= 0x4; | ||
276 | break; | ||
277 | case ADV7183_COMPOSITE5: | ||
278 | reg |= 0x5; | ||
279 | break; | ||
280 | case ADV7183_COMPOSITE6: | ||
281 | reg |= 0xB; | ||
282 | break; | ||
283 | case ADV7183_COMPOSITE7: | ||
284 | reg |= 0xC; | ||
285 | break; | ||
286 | case ADV7183_COMPOSITE8: | ||
287 | reg |= 0xD; | ||
288 | break; | ||
289 | case ADV7183_COMPOSITE9: | ||
290 | reg |= 0xE; | ||
291 | break; | ||
292 | case ADV7183_COMPOSITE10: | ||
293 | reg |= 0xF; | ||
294 | break; | ||
295 | case ADV7183_SVIDEO0: | ||
296 | reg |= 0x6; | ||
297 | break; | ||
298 | case ADV7183_SVIDEO1: | ||
299 | reg |= 0x7; | ||
300 | break; | ||
301 | case ADV7183_SVIDEO2: | ||
302 | reg |= 0x8; | ||
303 | break; | ||
304 | case ADV7183_COMPONENT0: | ||
305 | reg |= 0x9; | ||
306 | break; | ||
307 | case ADV7183_COMPONENT1: | ||
308 | reg |= 0xA; | ||
309 | break; | ||
310 | default: | ||
311 | break; | ||
312 | } | ||
313 | adv7183_write(sd, ADV7183_IN_CTRL, reg); | ||
314 | } | ||
315 | |||
316 | if (output != decoder->output) { | ||
317 | decoder->output = output; | ||
318 | reg = adv7183_read(sd, ADV7183_OUT_CTRL) & 0xC0; | ||
319 | switch (output) { | ||
320 | case ADV7183_16BIT_OUT: | ||
321 | reg |= 0x9; | ||
322 | break; | ||
323 | default: | ||
324 | reg |= 0xC; | ||
325 | break; | ||
326 | } | ||
327 | adv7183_write(sd, ADV7183_OUT_CTRL, reg); | ||
328 | } | ||
329 | |||
330 | return 0; | ||
331 | } | ||
332 | |||
333 | static int adv7183_s_ctrl(struct v4l2_ctrl *ctrl) | ||
334 | { | ||
335 | struct v4l2_subdev *sd = to_sd(ctrl); | ||
336 | int val = ctrl->val; | ||
337 | |||
338 | switch (ctrl->id) { | ||
339 | case V4L2_CID_BRIGHTNESS: | ||
340 | if (val < 0) | ||
341 | val = 127 - val; | ||
342 | adv7183_write(sd, ADV7183_BRIGHTNESS, val); | ||
343 | break; | ||
344 | case V4L2_CID_CONTRAST: | ||
345 | adv7183_write(sd, ADV7183_CONTRAST, val); | ||
346 | break; | ||
347 | case V4L2_CID_SATURATION: | ||
348 | adv7183_write(sd, ADV7183_SD_SATURATION_CB, val >> 8); | ||
349 | adv7183_write(sd, ADV7183_SD_SATURATION_CR, (val & 0xFF)); | ||
350 | break; | ||
351 | case V4L2_CID_HUE: | ||
352 | adv7183_write(sd, ADV7183_SD_OFFSET_CB, val >> 8); | ||
353 | adv7183_write(sd, ADV7183_SD_OFFSET_CR, (val & 0xFF)); | ||
354 | break; | ||
355 | default: | ||
356 | return -EINVAL; | ||
357 | } | ||
358 | |||
359 | return 0; | ||
360 | } | ||
361 | |||
362 | static int adv7183_querystd(struct v4l2_subdev *sd, v4l2_std_id *std) | ||
363 | { | ||
364 | struct adv7183 *decoder = to_adv7183(sd); | ||
365 | int reg; | ||
366 | |||
367 | /* enable autodetection block */ | ||
368 | reg = adv7183_read(sd, ADV7183_IN_CTRL) & 0xF; | ||
369 | adv7183_write(sd, ADV7183_IN_CTRL, reg); | ||
370 | |||
371 | /* wait autodetection switch */ | ||
372 | mdelay(10); | ||
373 | |||
374 | /* get autodetection result */ | ||
375 | reg = adv7183_read(sd, ADV7183_STATUS_1); | ||
376 | switch ((reg >> 0x4) & 0x7) { | ||
377 | case 0: | ||
378 | *std = V4L2_STD_NTSC; | ||
379 | break; | ||
380 | case 1: | ||
381 | *std = V4L2_STD_NTSC_443; | ||
382 | break; | ||
383 | case 2: | ||
384 | *std = V4L2_STD_PAL_M; | ||
385 | break; | ||
386 | case 3: | ||
387 | *std = V4L2_STD_PAL_60; | ||
388 | break; | ||
389 | case 4: | ||
390 | *std = V4L2_STD_PAL; | ||
391 | break; | ||
392 | case 5: | ||
393 | *std = V4L2_STD_SECAM; | ||
394 | break; | ||
395 | case 6: | ||
396 | *std = V4L2_STD_PAL_Nc; | ||
397 | break; | ||
398 | case 7: | ||
399 | *std = V4L2_STD_SECAM; | ||
400 | break; | ||
401 | default: | ||
402 | *std = V4L2_STD_UNKNOWN; | ||
403 | break; | ||
404 | } | ||
405 | |||
406 | /* after std detection, write back user set std */ | ||
407 | adv7183_s_std(sd, decoder->std); | ||
408 | return 0; | ||
409 | } | ||
410 | |||
411 | static int adv7183_g_input_status(struct v4l2_subdev *sd, u32 *status) | ||
412 | { | ||
413 | int reg; | ||
414 | |||
415 | *status = V4L2_IN_ST_NO_SIGNAL; | ||
416 | reg = adv7183_read(sd, ADV7183_STATUS_1); | ||
417 | if (reg < 0) | ||
418 | return reg; | ||
419 | if (reg & 0x1) | ||
420 | *status = 0; | ||
421 | return 0; | ||
422 | } | ||
423 | |||
424 | static int adv7183_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index, | ||
425 | enum v4l2_mbus_pixelcode *code) | ||
426 | { | ||
427 | if (index > 0) | ||
428 | return -EINVAL; | ||
429 | |||
430 | *code = V4L2_MBUS_FMT_UYVY8_2X8; | ||
431 | return 0; | ||
432 | } | ||
433 | |||
434 | static int adv7183_try_mbus_fmt(struct v4l2_subdev *sd, | ||
435 | struct v4l2_mbus_framefmt *fmt) | ||
436 | { | ||
437 | struct adv7183 *decoder = to_adv7183(sd); | ||
438 | |||
439 | fmt->code = V4L2_MBUS_FMT_UYVY8_2X8; | ||
440 | fmt->colorspace = V4L2_COLORSPACE_SMPTE170M; | ||
441 | if (decoder->std & V4L2_STD_525_60) { | ||
442 | fmt->field = V4L2_FIELD_SEQ_TB; | ||
443 | fmt->width = 720; | ||
444 | fmt->height = 480; | ||
445 | } else { | ||
446 | fmt->field = V4L2_FIELD_SEQ_BT; | ||
447 | fmt->width = 720; | ||
448 | fmt->height = 576; | ||
449 | } | ||
450 | return 0; | ||
451 | } | ||
452 | |||
453 | static int adv7183_s_mbus_fmt(struct v4l2_subdev *sd, | ||
454 | struct v4l2_mbus_framefmt *fmt) | ||
455 | { | ||
456 | struct adv7183 *decoder = to_adv7183(sd); | ||
457 | |||
458 | adv7183_try_mbus_fmt(sd, fmt); | ||
459 | decoder->fmt = *fmt; | ||
460 | return 0; | ||
461 | } | ||
462 | |||
463 | static int adv7183_g_mbus_fmt(struct v4l2_subdev *sd, | ||
464 | struct v4l2_mbus_framefmt *fmt) | ||
465 | { | ||
466 | struct adv7183 *decoder = to_adv7183(sd); | ||
467 | |||
468 | *fmt = decoder->fmt; | ||
469 | return 0; | ||
470 | } | ||
471 | |||
472 | static int adv7183_s_stream(struct v4l2_subdev *sd, int enable) | ||
473 | { | ||
474 | struct adv7183 *decoder = to_adv7183(sd); | ||
475 | |||
476 | if (enable) | ||
477 | gpio_direction_output(decoder->oe_pin, 0); | ||
478 | else | ||
479 | gpio_direction_output(decoder->oe_pin, 1); | ||
480 | udelay(1); | ||
481 | return 0; | ||
482 | } | ||
483 | |||
484 | static int adv7183_g_chip_ident(struct v4l2_subdev *sd, | ||
485 | struct v4l2_dbg_chip_ident *chip) | ||
486 | { | ||
487 | int rev; | ||
488 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
489 | |||
490 | /* 0x11 for adv7183, 0x13 for adv7183b */ | ||
491 | rev = adv7183_read(sd, ADV7183_IDENT); | ||
492 | |||
493 | return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_ADV7183, rev); | ||
494 | } | ||
495 | |||
496 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
497 | static int adv7183_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) | ||
498 | { | ||
499 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
500 | |||
501 | if (!v4l2_chip_match_i2c_client(client, ®->match)) | ||
502 | return -EINVAL; | ||
503 | if (!capable(CAP_SYS_ADMIN)) | ||
504 | return -EPERM; | ||
505 | reg->val = adv7183_read(sd, reg->reg & 0xff); | ||
506 | reg->size = 1; | ||
507 | return 0; | ||
508 | } | ||
509 | |||
510 | static int adv7183_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) | ||
511 | { | ||
512 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
513 | |||
514 | if (!v4l2_chip_match_i2c_client(client, ®->match)) | ||
515 | return -EINVAL; | ||
516 | if (!capable(CAP_SYS_ADMIN)) | ||
517 | return -EPERM; | ||
518 | adv7183_write(sd, reg->reg & 0xff, reg->val & 0xff); | ||
519 | return 0; | ||
520 | } | ||
521 | #endif | ||
522 | |||
523 | static const struct v4l2_ctrl_ops adv7183_ctrl_ops = { | ||
524 | .s_ctrl = adv7183_s_ctrl, | ||
525 | }; | ||
526 | |||
527 | static const struct v4l2_subdev_core_ops adv7183_core_ops = { | ||
528 | .log_status = adv7183_log_status, | ||
529 | .g_std = adv7183_g_std, | ||
530 | .s_std = adv7183_s_std, | ||
531 | .reset = adv7183_reset, | ||
532 | .g_chip_ident = adv7183_g_chip_ident, | ||
533 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
534 | .g_register = adv7183_g_register, | ||
535 | .s_register = adv7183_s_register, | ||
536 | #endif | ||
537 | }; | ||
538 | |||
539 | static const struct v4l2_subdev_video_ops adv7183_video_ops = { | ||
540 | .s_routing = adv7183_s_routing, | ||
541 | .querystd = adv7183_querystd, | ||
542 | .g_input_status = adv7183_g_input_status, | ||
543 | .enum_mbus_fmt = adv7183_enum_mbus_fmt, | ||
544 | .try_mbus_fmt = adv7183_try_mbus_fmt, | ||
545 | .s_mbus_fmt = adv7183_s_mbus_fmt, | ||
546 | .g_mbus_fmt = adv7183_g_mbus_fmt, | ||
547 | .s_stream = adv7183_s_stream, | ||
548 | }; | ||
549 | |||
550 | static const struct v4l2_subdev_ops adv7183_ops = { | ||
551 | .core = &adv7183_core_ops, | ||
552 | .video = &adv7183_video_ops, | ||
553 | }; | ||
554 | |||
555 | static int adv7183_probe(struct i2c_client *client, | ||
556 | const struct i2c_device_id *id) | ||
557 | { | ||
558 | struct adv7183 *decoder; | ||
559 | struct v4l2_subdev *sd; | ||
560 | struct v4l2_ctrl_handler *hdl; | ||
561 | int ret; | ||
562 | struct v4l2_mbus_framefmt fmt; | ||
563 | const unsigned *pin_array; | ||
564 | |||
565 | /* Check if the adapter supports the needed features */ | ||
566 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | ||
567 | return -EIO; | ||
568 | |||
569 | v4l_info(client, "chip found @ 0x%02x (%s)\n", | ||
570 | client->addr << 1, client->adapter->name); | ||
571 | |||
572 | pin_array = client->dev.platform_data; | ||
573 | if (pin_array == NULL) | ||
574 | return -EINVAL; | ||
575 | |||
576 | decoder = kzalloc(sizeof(struct adv7183), GFP_KERNEL); | ||
577 | if (decoder == NULL) | ||
578 | return -ENOMEM; | ||
579 | |||
580 | decoder->reset_pin = pin_array[0]; | ||
581 | decoder->oe_pin = pin_array[1]; | ||
582 | |||
583 | if (gpio_request(decoder->reset_pin, "ADV7183 Reset")) { | ||
584 | v4l_err(client, "failed to request GPIO %d\n", decoder->reset_pin); | ||
585 | ret = -EBUSY; | ||
586 | goto err_free_decoder; | ||
587 | } | ||
588 | |||
589 | if (gpio_request(decoder->oe_pin, "ADV7183 Output Enable")) { | ||
590 | v4l_err(client, "failed to request GPIO %d\n", decoder->oe_pin); | ||
591 | ret = -EBUSY; | ||
592 | goto err_free_reset; | ||
593 | } | ||
594 | |||
595 | sd = &decoder->sd; | ||
596 | v4l2_i2c_subdev_init(sd, client, &adv7183_ops); | ||
597 | |||
598 | hdl = &decoder->hdl; | ||
599 | v4l2_ctrl_handler_init(hdl, 4); | ||
600 | v4l2_ctrl_new_std(hdl, &adv7183_ctrl_ops, | ||
601 | V4L2_CID_BRIGHTNESS, -128, 127, 1, 0); | ||
602 | v4l2_ctrl_new_std(hdl, &adv7183_ctrl_ops, | ||
603 | V4L2_CID_CONTRAST, 0, 0xFF, 1, 0x80); | ||
604 | v4l2_ctrl_new_std(hdl, &adv7183_ctrl_ops, | ||
605 | V4L2_CID_SATURATION, 0, 0xFFFF, 1, 0x8080); | ||
606 | v4l2_ctrl_new_std(hdl, &adv7183_ctrl_ops, | ||
607 | V4L2_CID_HUE, 0, 0xFFFF, 1, 0x8080); | ||
608 | /* hook the control handler into the driver */ | ||
609 | sd->ctrl_handler = hdl; | ||
610 | if (hdl->error) { | ||
611 | ret = hdl->error; | ||
612 | |||
613 | v4l2_ctrl_handler_free(hdl); | ||
614 | goto err_free_oe; | ||
615 | } | ||
616 | |||
617 | /* v4l2 doesn't support an autodetect standard, pick PAL as default */ | ||
618 | decoder->std = V4L2_STD_PAL; | ||
619 | decoder->input = ADV7183_COMPOSITE4; | ||
620 | decoder->output = ADV7183_8BIT_OUT; | ||
621 | |||
622 | gpio_direction_output(decoder->oe_pin, 1); | ||
623 | /* reset chip */ | ||
624 | gpio_direction_output(decoder->reset_pin, 0); | ||
625 | /* reset pulse width at least 5ms */ | ||
626 | mdelay(10); | ||
627 | gpio_direction_output(decoder->reset_pin, 1); | ||
628 | /* wait 5ms before any further i2c writes are performed */ | ||
629 | mdelay(5); | ||
630 | |||
631 | adv7183_writeregs(sd, adv7183_init_regs, ARRAY_SIZE(adv7183_init_regs)); | ||
632 | adv7183_s_std(sd, decoder->std); | ||
633 | fmt.width = 720; | ||
634 | fmt.height = 576; | ||
635 | adv7183_s_mbus_fmt(sd, &fmt); | ||
636 | |||
637 | /* initialize the hardware to the default control values */ | ||
638 | ret = v4l2_ctrl_handler_setup(hdl); | ||
639 | if (ret) { | ||
640 | v4l2_ctrl_handler_free(hdl); | ||
641 | goto err_free_oe; | ||
642 | } | ||
643 | |||
644 | return 0; | ||
645 | err_free_oe: | ||
646 | gpio_free(decoder->oe_pin); | ||
647 | err_free_reset: | ||
648 | gpio_free(decoder->reset_pin); | ||
649 | err_free_decoder: | ||
650 | kfree(decoder); | ||
651 | return ret; | ||
652 | } | ||
653 | |||
654 | static int adv7183_remove(struct i2c_client *client) | ||
655 | { | ||
656 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | ||
657 | struct adv7183 *decoder = to_adv7183(sd); | ||
658 | |||
659 | v4l2_device_unregister_subdev(sd); | ||
660 | v4l2_ctrl_handler_free(sd->ctrl_handler); | ||
661 | gpio_free(decoder->oe_pin); | ||
662 | gpio_free(decoder->reset_pin); | ||
663 | kfree(decoder); | ||
664 | return 0; | ||
665 | } | ||
666 | |||
667 | static const struct i2c_device_id adv7183_id[] = { | ||
668 | {"adv7183", 0}, | ||
669 | {}, | ||
670 | }; | ||
671 | |||
672 | MODULE_DEVICE_TABLE(i2c, adv7183_id); | ||
673 | |||
674 | static struct i2c_driver adv7183_driver = { | ||
675 | .driver = { | ||
676 | .owner = THIS_MODULE, | ||
677 | .name = "adv7183", | ||
678 | }, | ||
679 | .probe = adv7183_probe, | ||
680 | .remove = __devexit_p(adv7183_remove), | ||
681 | .id_table = adv7183_id, | ||
682 | }; | ||
683 | |||
684 | static __init int adv7183_init(void) | ||
685 | { | ||
686 | return i2c_add_driver(&adv7183_driver); | ||
687 | } | ||
688 | |||
689 | static __exit void adv7183_exit(void) | ||
690 | { | ||
691 | i2c_del_driver(&adv7183_driver); | ||
692 | } | ||
693 | |||
694 | module_init(adv7183_init); | ||
695 | module_exit(adv7183_exit); | ||
696 | |||
697 | MODULE_DESCRIPTION("Analog Devices ADV7183 video decoder driver"); | ||
698 | MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux@gmail.com>"); | ||
699 | MODULE_LICENSE("GPL v2"); | ||