[media] r820t: proper initialize the PLL register

The rtl-sdr library, from where this driver was initially
based, doesn't use half PLL clock, but this is used on
the Realtek Kernel driver. So, also do the same here.

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Tested-by: Antti Palosaari <crope@iki.fi>

1 files changed, 3 insertions, 0 deletions

diff --git a/drivers/media/tuners/r820t.h b/drivers/media/tuners/r820t.h
index 949575a41d49..4c0823b21693 100644
--- a/drivers/media/tuners/r820t.h
+++ b/drivers/media/tuners/r820t.h
@@ -26,6 +26,9 @@
 
 enum r820t_chip {
         CHIP_R820T,
+        CHIP_R620D,
+        CHIP_R828D,
+        CHIP_R828,
         CHIP_R828S,
         CHIP_R820C,
 };