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authorAntti Palosaari <crope@iki.fi>2014-02-08 04:20:35 -0500
committerMauro Carvalho Chehab <m.chehab@samsung.com>2014-03-14 04:36:45 -0400
commitbd428bbc7527d4ea195712598c1c252ebb4554ae (patch)
tree05c80eb91f9038222d1b4e886aab5ca3a7945f48 /drivers/media/tuners/e4000.c
parent1c73fc6bb542859a7f37bfc2d34f21da8a51bd30 (diff)
[media] e4000: convert to Regmap API
That comes possible after driver was converted to kernel I2C model (I2C binding & proper I2C client with no gate control hack). All nasty low level I2C routines are now covered by regmap. Cc: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'drivers/media/tuners/e4000.c')
-rw-r--r--drivers/media/tuners/e4000.c212
1 files changed, 65 insertions, 147 deletions
diff --git a/drivers/media/tuners/e4000.c b/drivers/media/tuners/e4000.c
index 29f73f61f5d3..f382b90f98b7 100644
--- a/drivers/media/tuners/e4000.c
+++ b/drivers/media/tuners/e4000.c
@@ -21,97 +21,6 @@
21#include "e4000_priv.h" 21#include "e4000_priv.h"
22#include <linux/math64.h> 22#include <linux/math64.h>
23 23
24/* Max transfer size done by I2C transfer functions */
25#define MAX_XFER_SIZE 64
26
27/* write multiple registers */
28static int e4000_wr_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len)
29{
30 int ret;
31 u8 buf[MAX_XFER_SIZE];
32 struct i2c_msg msg[1] = {
33 {
34 .addr = priv->client->addr,
35 .flags = 0,
36 .len = 1 + len,
37 .buf = buf,
38 }
39 };
40
41 if (1 + len > sizeof(buf)) {
42 dev_warn(&priv->client->dev,
43 "%s: i2c wr reg=%04x: len=%d is too big!\n",
44 KBUILD_MODNAME, reg, len);
45 return -EINVAL;
46 }
47
48 buf[0] = reg;
49 memcpy(&buf[1], val, len);
50
51 ret = i2c_transfer(priv->client->adapter, msg, 1);
52 if (ret == 1) {
53 ret = 0;
54 } else {
55 dev_warn(&priv->client->dev,
56 "%s: i2c wr failed=%d reg=%02x len=%d\n",
57 KBUILD_MODNAME, ret, reg, len);
58 ret = -EREMOTEIO;
59 }
60 return ret;
61}
62
63/* read multiple registers */
64static int e4000_rd_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len)
65{
66 int ret;
67 u8 buf[MAX_XFER_SIZE];
68 struct i2c_msg msg[2] = {
69 {
70 .addr = priv->client->addr,
71 .flags = 0,
72 .len = 1,
73 .buf = &reg,
74 }, {
75 .addr = priv->client->addr,
76 .flags = I2C_M_RD,
77 .len = len,
78 .buf = buf,
79 }
80 };
81
82 if (len > sizeof(buf)) {
83 dev_warn(&priv->client->dev,
84 "%s: i2c rd reg=%04x: len=%d is too big!\n",
85 KBUILD_MODNAME, reg, len);
86 return -EINVAL;
87 }
88
89 ret = i2c_transfer(priv->client->adapter, msg, 2);
90 if (ret == 2) {
91 memcpy(val, buf, len);
92 ret = 0;
93 } else {
94 dev_warn(&priv->client->dev,
95 "%s: i2c rd failed=%d reg=%02x len=%d\n",
96 KBUILD_MODNAME, ret, reg, len);
97 ret = -EREMOTEIO;
98 }
99
100 return ret;
101}
102
103/* write single register */
104static int e4000_wr_reg(struct e4000_priv *priv, u8 reg, u8 val)
105{
106 return e4000_wr_regs(priv, reg, &val, 1);
107}
108
109/* read single register */
110static int e4000_rd_reg(struct e4000_priv *priv, u8 reg, u8 *val)
111{
112 return e4000_rd_regs(priv, reg, val, 1);
113}
114
115static int e4000_init(struct dvb_frontend *fe) 24static int e4000_init(struct dvb_frontend *fe)
116{ 25{
117 struct e4000_priv *priv = fe->tuner_priv; 26 struct e4000_priv *priv = fe->tuner_priv;
@@ -120,58 +29,58 @@ static int e4000_init(struct dvb_frontend *fe)
120 dev_dbg(&priv->client->dev, "%s:\n", __func__); 29 dev_dbg(&priv->client->dev, "%s:\n", __func__);
121 30
122 /* dummy I2C to ensure I2C wakes up */ 31 /* dummy I2C to ensure I2C wakes up */
123 ret = e4000_wr_reg(priv, 0x02, 0x40); 32 ret = regmap_write(priv->regmap, 0x02, 0x40);
124 33
125 /* reset */ 34 /* reset */
126 ret = e4000_wr_reg(priv, 0x00, 0x01); 35 ret = regmap_write(priv->regmap, 0x00, 0x01);
127 if (ret < 0) 36 if (ret < 0)
128 goto err; 37 goto err;
129 38
130 /* disable output clock */ 39 /* disable output clock */
131 ret = e4000_wr_reg(priv, 0x06, 0x00); 40 ret = regmap_write(priv->regmap, 0x06, 0x00);
132 if (ret < 0) 41 if (ret < 0)
133 goto err; 42 goto err;
134 43
135 ret = e4000_wr_reg(priv, 0x7a, 0x96); 44 ret = regmap_write(priv->regmap, 0x7a, 0x96);
136 if (ret < 0) 45 if (ret < 0)
137 goto err; 46 goto err;
138 47
139 /* configure gains */ 48 /* configure gains */
140 ret = e4000_wr_regs(priv, 0x7e, "\x01\xfe", 2); 49 ret = regmap_bulk_write(priv->regmap, 0x7e, "\x01\xfe", 2);
141 if (ret < 0) 50 if (ret < 0)
142 goto err; 51 goto err;
143 52
144 ret = e4000_wr_reg(priv, 0x82, 0x00); 53 ret = regmap_write(priv->regmap, 0x82, 0x00);
145 if (ret < 0) 54 if (ret < 0)
146 goto err; 55 goto err;
147 56
148 ret = e4000_wr_reg(priv, 0x24, 0x05); 57 ret = regmap_write(priv->regmap, 0x24, 0x05);
149 if (ret < 0) 58 if (ret < 0)
150 goto err; 59 goto err;
151 60
152 ret = e4000_wr_regs(priv, 0x87, "\x20\x01", 2); 61 ret = regmap_bulk_write(priv->regmap, 0x87, "\x20\x01", 2);
153 if (ret < 0) 62 if (ret < 0)
154 goto err; 63 goto err;
155 64
156 ret = e4000_wr_regs(priv, 0x9f, "\x7f\x07", 2); 65 ret = regmap_bulk_write(priv->regmap, 0x9f, "\x7f\x07", 2);
157 if (ret < 0) 66 if (ret < 0)
158 goto err; 67 goto err;
159 68
160 /* DC offset control */ 69 /* DC offset control */
161 ret = e4000_wr_reg(priv, 0x2d, 0x1f); 70 ret = regmap_write(priv->regmap, 0x2d, 0x1f);
162 if (ret < 0) 71 if (ret < 0)
163 goto err; 72 goto err;
164 73
165 ret = e4000_wr_regs(priv, 0x70, "\x01\x01", 2); 74 ret = regmap_bulk_write(priv->regmap, 0x70, "\x01\x01", 2);
166 if (ret < 0) 75 if (ret < 0)
167 goto err; 76 goto err;
168 77
169 /* gain control */ 78 /* gain control */
170 ret = e4000_wr_reg(priv, 0x1a, 0x17); 79 ret = regmap_write(priv->regmap, 0x1a, 0x17);
171 if (ret < 0) 80 if (ret < 0)
172 goto err; 81 goto err;
173 82
174 ret = e4000_wr_reg(priv, 0x1f, 0x1a); 83 ret = regmap_write(priv->regmap, 0x1f, 0x1a);
175 if (ret < 0) 84 if (ret < 0)
176 goto err; 85 goto err;
177 86
@@ -192,7 +101,7 @@ static int e4000_sleep(struct dvb_frontend *fe)
192 101
193 priv->active = false; 102 priv->active = false;
194 103
195 ret = e4000_wr_reg(priv, 0x00, 0x00); 104 ret = regmap_write(priv->regmap, 0x00, 0x00);
196 if (ret < 0) 105 if (ret < 0)
197 goto err; 106 goto err;
198err: 107err:
@@ -216,7 +125,7 @@ static int e4000_set_params(struct dvb_frontend *fe)
216 c->bandwidth_hz); 125 c->bandwidth_hz);
217 126
218 /* gain control manual */ 127 /* gain control manual */
219 ret = e4000_wr_reg(priv, 0x1a, 0x00); 128 ret = regmap_write(priv->regmap, 0x1a, 0x00);
220 if (ret < 0) 129 if (ret < 0)
221 goto err; 130 goto err;
222 131
@@ -243,7 +152,7 @@ static int e4000_set_params(struct dvb_frontend *fe)
243 "%s: f_vco=%llu pll div=%d sigma_delta=%04x\n", 152 "%s: f_vco=%llu pll div=%d sigma_delta=%04x\n",
244 __func__, f_vco, buf[0], sigma_delta); 153 __func__, f_vco, buf[0], sigma_delta);
245 154
246 ret = e4000_wr_regs(priv, 0x09, buf, 5); 155 ret = regmap_bulk_write(priv->regmap, 0x09, buf, 5);
247 if (ret < 0) 156 if (ret < 0)
248 goto err; 157 goto err;
249 158
@@ -258,7 +167,7 @@ static int e4000_set_params(struct dvb_frontend *fe)
258 goto err; 167 goto err;
259 } 168 }
260 169
261 ret = e4000_wr_reg(priv, 0x10, e400_lna_filter_lut[i].val); 170 ret = regmap_write(priv->regmap, 0x10, e400_lna_filter_lut[i].val);
262 if (ret < 0) 171 if (ret < 0)
263 goto err; 172 goto err;
264 173
@@ -276,7 +185,7 @@ static int e4000_set_params(struct dvb_frontend *fe)
276 buf[0] = e4000_if_filter_lut[i].reg11_val; 185 buf[0] = e4000_if_filter_lut[i].reg11_val;
277 buf[1] = e4000_if_filter_lut[i].reg12_val; 186 buf[1] = e4000_if_filter_lut[i].reg12_val;
278 187
279 ret = e4000_wr_regs(priv, 0x11, buf, 2); 188 ret = regmap_bulk_write(priv->regmap, 0x11, buf, 2);
280 if (ret < 0) 189 if (ret < 0)
281 goto err; 190 goto err;
282 191
@@ -291,33 +200,33 @@ static int e4000_set_params(struct dvb_frontend *fe)
291 goto err; 200 goto err;
292 } 201 }
293 202
294 ret = e4000_wr_reg(priv, 0x07, e4000_band_lut[i].reg07_val); 203 ret = regmap_write(priv->regmap, 0x07, e4000_band_lut[i].reg07_val);
295 if (ret < 0) 204 if (ret < 0)
296 goto err; 205 goto err;
297 206
298 ret = e4000_wr_reg(priv, 0x78, e4000_band_lut[i].reg78_val); 207 ret = regmap_write(priv->regmap, 0x78, e4000_band_lut[i].reg78_val);
299 if (ret < 0) 208 if (ret < 0)
300 goto err; 209 goto err;
301 210
302 /* DC offset */ 211 /* DC offset */
303 for (i = 0; i < 4; i++) { 212 for (i = 0; i < 4; i++) {
304 if (i == 0) 213 if (i == 0)
305 ret = e4000_wr_regs(priv, 0x15, "\x00\x7e\x24", 3); 214 ret = regmap_bulk_write(priv->regmap, 0x15, "\x00\x7e\x24", 3);
306 else if (i == 1) 215 else if (i == 1)
307 ret = e4000_wr_regs(priv, 0x15, "\x00\x7f", 2); 216 ret = regmap_bulk_write(priv->regmap, 0x15, "\x00\x7f", 2);
308 else if (i == 2) 217 else if (i == 2)
309 ret = e4000_wr_regs(priv, 0x15, "\x01", 1); 218 ret = regmap_bulk_write(priv->regmap, 0x15, "\x01", 1);
310 else 219 else
311 ret = e4000_wr_regs(priv, 0x16, "\x7e", 1); 220 ret = regmap_bulk_write(priv->regmap, 0x16, "\x7e", 1);
312 221
313 if (ret < 0) 222 if (ret < 0)
314 goto err; 223 goto err;
315 224
316 ret = e4000_wr_reg(priv, 0x29, 0x01); 225 ret = regmap_write(priv->regmap, 0x29, 0x01);
317 if (ret < 0) 226 if (ret < 0)
318 goto err; 227 goto err;
319 228
320 ret = e4000_rd_regs(priv, 0x2a, buf, 3); 229 ret = regmap_bulk_read(priv->regmap, 0x2a, buf, 3);
321 if (ret < 0) 230 if (ret < 0)
322 goto err; 231 goto err;
323 232
@@ -328,16 +237,16 @@ static int e4000_set_params(struct dvb_frontend *fe)
328 swap(q_data[2], q_data[3]); 237 swap(q_data[2], q_data[3]);
329 swap(i_data[2], i_data[3]); 238 swap(i_data[2], i_data[3]);
330 239
331 ret = e4000_wr_regs(priv, 0x50, q_data, 4); 240 ret = regmap_bulk_write(priv->regmap, 0x50, q_data, 4);
332 if (ret < 0) 241 if (ret < 0)
333 goto err; 242 goto err;
334 243
335 ret = e4000_wr_regs(priv, 0x60, i_data, 4); 244 ret = regmap_bulk_write(priv->regmap, 0x60, i_data, 4);
336 if (ret < 0) 245 if (ret < 0)
337 goto err; 246 goto err;
338 247
339 /* gain control auto */ 248 /* gain control auto */
340 ret = e4000_wr_reg(priv, 0x1a, 0x17); 249 ret = regmap_write(priv->regmap, 0x1a, 0x17);
341 if (ret < 0) 250 if (ret < 0)
342 goto err; 251 goto err;
343err: 252err:
@@ -378,12 +287,12 @@ static int e4000_set_lna_gain(struct dvb_frontend *fe)
378 else 287 else
379 u8tmp = 0x10; 288 u8tmp = 0x10;
380 289
381 ret = e4000_wr_reg(priv, 0x1a, u8tmp); 290 ret = regmap_write(priv->regmap, 0x1a, u8tmp);
382 if (ret) 291 if (ret)
383 goto err; 292 goto err;
384 293
385 if (priv->lna_gain_auto->val == false) { 294 if (priv->lna_gain_auto->val == false) {
386 ret = e4000_wr_reg(priv, 0x14, priv->lna_gain->val); 295 ret = regmap_write(priv->regmap, 0x14, priv->lna_gain->val);
387 if (ret) 296 if (ret)
388 goto err; 297 goto err;
389 } 298 }
@@ -410,12 +319,12 @@ static int e4000_set_mixer_gain(struct dvb_frontend *fe)
410 else 319 else
411 u8tmp = 0x14; 320 u8tmp = 0x14;
412 321
413 ret = e4000_wr_reg(priv, 0x20, u8tmp); 322 ret = regmap_write(priv->regmap, 0x20, u8tmp);
414 if (ret) 323 if (ret)
415 goto err; 324 goto err;
416 325
417 if (priv->mixer_gain_auto->val == false) { 326 if (priv->mixer_gain_auto->val == false) {
418 ret = e4000_wr_reg(priv, 0x15, priv->mixer_gain->val); 327 ret = regmap_write(priv->regmap, 0x15, priv->mixer_gain->val);
419 if (ret) 328 if (ret)
420 goto err; 329 goto err;
421 } 330 }
@@ -447,14 +356,14 @@ static int e4000_set_if_gain(struct dvb_frontend *fe)
447 else 356 else
448 u8tmp = 0x10; 357 u8tmp = 0x10;
449 358
450 ret = e4000_wr_reg(priv, 0x1a, u8tmp); 359 ret = regmap_write(priv->regmap, 0x1a, u8tmp);
451 if (ret) 360 if (ret)
452 goto err; 361 goto err;
453 362
454 if (priv->if_gain_auto->val == false) { 363 if (priv->if_gain_auto->val == false) {
455 buf[0] = e4000_if_gain_lut[priv->if_gain->val].reg16_val; 364 buf[0] = e4000_if_gain_lut[priv->if_gain->val].reg16_val;
456 buf[1] = e4000_if_gain_lut[priv->if_gain->val].reg17_val; 365 buf[1] = e4000_if_gain_lut[priv->if_gain->val].reg17_val;
457 ret = e4000_wr_regs(priv, 0x16, buf, 2); 366 ret = regmap_bulk_write(priv->regmap, 0x16, buf, 2);
458 if (ret) 367 if (ret)
459 goto err; 368 goto err;
460 } 369 }
@@ -469,16 +378,13 @@ static int e4000_pll_lock(struct dvb_frontend *fe)
469{ 378{
470 struct e4000_priv *priv = fe->tuner_priv; 379 struct e4000_priv *priv = fe->tuner_priv;
471 int ret; 380 int ret;
472 u8 u8tmp; 381 unsigned int utmp;
473 382
474 if (priv->active == false) 383 ret = regmap_read(priv->regmap, 0x07, &utmp);
475 return 0; 384 if (ret < 0)
476
477 ret = e4000_rd_reg(priv, 0x07, &u8tmp);
478 if (ret)
479 goto err; 385 goto err;
480 386
481 priv->pll_lock->val = (u8tmp & 0x01); 387 priv->pll_lock->val = (utmp & 0x01);
482err: 388err:
483 if (ret) 389 if (ret)
484 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret); 390 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
@@ -488,15 +394,19 @@ err:
488 394
489static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl) 395static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
490{ 396{
491 struct e4000_priv *priv = 397 struct e4000_priv *priv = container_of(ctrl->handler, struct e4000_priv, hdl);
492 container_of(ctrl->handler, struct e4000_priv, hdl);
493 int ret; 398 int ret;
494 399
400 if (priv->active == false)
401 return 0;
402
495 switch (ctrl->id) { 403 switch (ctrl->id) {
496 case V4L2_CID_RF_TUNER_PLL_LOCK: 404 case V4L2_CID_RF_TUNER_PLL_LOCK:
497 ret = e4000_pll_lock(priv->fe); 405 ret = e4000_pll_lock(priv->fe);
498 break; 406 break;
499 default: 407 default:
408 dev_dbg(&priv->client->dev, "%s: unknown ctrl: id=%d name=%s\n",
409 __func__, ctrl->id, ctrl->name);
500 ret = -EINVAL; 410 ret = -EINVAL;
501 } 411 }
502 412
@@ -505,16 +415,13 @@ static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
505 415
506static int e4000_s_ctrl(struct v4l2_ctrl *ctrl) 416static int e4000_s_ctrl(struct v4l2_ctrl *ctrl)
507{ 417{
508 struct e4000_priv *priv = 418 struct e4000_priv *priv = container_of(ctrl->handler, struct e4000_priv, hdl);
509 container_of(ctrl->handler, struct e4000_priv, hdl);
510 struct dvb_frontend *fe = priv->fe; 419 struct dvb_frontend *fe = priv->fe;
511 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 420 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
512 int ret; 421 int ret;
513 422
514 dev_dbg(&priv->client->dev, 423 if (priv->active == false)
515 "%s: id=%d name=%s val=%d min=%d max=%d step=%d\n", 424 return 0;
516 __func__, ctrl->id, ctrl->name, ctrl->val,
517 ctrl->minimum, ctrl->maximum, ctrl->step);
518 425
519 switch (ctrl->id) { 426 switch (ctrl->id) {
520 case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO: 427 case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
@@ -535,6 +442,8 @@ static int e4000_s_ctrl(struct v4l2_ctrl *ctrl)
535 ret = e4000_set_if_gain(priv->fe); 442 ret = e4000_set_if_gain(priv->fe);
536 break; 443 break;
537 default: 444 default:
445 dev_dbg(&priv->client->dev, "%s: unknown ctrl: id=%d name=%s\n",
446 __func__, ctrl->id, ctrl->name);
538 ret = -EINVAL; 447 ret = -EINVAL;
539 } 448 }
540 449
@@ -571,7 +480,12 @@ static int e4000_probe(struct i2c_client *client,
571 struct dvb_frontend *fe = cfg->fe; 480 struct dvb_frontend *fe = cfg->fe;
572 struct e4000_priv *priv; 481 struct e4000_priv *priv;
573 int ret; 482 int ret;
574 u8 chip_id; 483 unsigned int utmp;
484 static const struct regmap_config regmap_config = {
485 .reg_bits = 8,
486 .val_bits = 8,
487 .max_register = 0xff,
488 };
575 489
576 priv = kzalloc(sizeof(struct e4000_priv), GFP_KERNEL); 490 priv = kzalloc(sizeof(struct e4000_priv), GFP_KERNEL);
577 if (!priv) { 491 if (!priv) {
@@ -583,22 +497,26 @@ static int e4000_probe(struct i2c_client *client,
583 priv->clock = cfg->clock; 497 priv->clock = cfg->clock;
584 priv->client = client; 498 priv->client = client;
585 priv->fe = cfg->fe; 499 priv->fe = cfg->fe;
500 priv->regmap = devm_regmap_init_i2c(client, &regmap_config);
501 if (IS_ERR(priv->regmap)) {
502 ret = PTR_ERR(priv->regmap);
503 goto err;
504 }
586 505
587 /* check if the tuner is there */ 506 /* check if the tuner is there */
588 ret = e4000_rd_reg(priv, 0x02, &chip_id); 507 ret = regmap_read(priv->regmap, 0x02, &utmp);
589 if (ret < 0) 508 if (ret < 0)
590 goto err; 509 goto err;
591 510
592 dev_dbg(&priv->client->dev, 511 dev_dbg(&priv->client->dev, "%s: chip id=%02x\n", __func__, utmp);
593 "%s: chip_id=%02x\n", __func__, chip_id);
594 512
595 if (chip_id != 0x40) { 513 if (utmp != 0x40) {
596 ret = -ENODEV; 514 ret = -ENODEV;
597 goto err; 515 goto err;
598 } 516 }
599 517
600 /* put sleep as chip seems to be in normal mode by default */ 518 /* put sleep as chip seems to be in normal mode by default */
601 ret = e4000_wr_reg(priv, 0x00, 0x00); 519 ret = regmap_write(priv->regmap, 0x00, 0x00);
602 if (ret < 0) 520 if (ret < 0)
603 goto err; 521 goto err;
604 522