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authorJonathan McCrohan <jmccrohan@gmail.com>2013-10-20 20:34:01 -0400
committerMauro Carvalho Chehab <m.chehab@samsung.com>2013-12-09 11:50:50 -0500
commitf58c91ce82cbb55a48fbc1a0cb7c84c0d0a4e1bd (patch)
tree62e7cfe6198ac0aceeefc3171cf8d8daab87785f /drivers/media/platform/s5p-mfc
parentc1b96a236e94d49d9396d0bbceb5524519c5c66e (diff)
[media] media_tree: Fix spelling errors
Fix various spelling errors in strings and comments throughout the media tree. The majority of these were found using Lucas De Marchi's codespell tool. [m.chehab@samsung.com: discard hunks with conflicts] Signed-off-by: Jonathan McCrohan <jmccrohan@gmail.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'drivers/media/platform/s5p-mfc')
-rw-r--r--drivers/media/platform/s5p-mfc/regs-mfc.h2
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc.c12
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c2
3 files changed, 8 insertions, 8 deletions
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc.h b/drivers/media/platform/s5p-mfc/regs-mfc.h
index 9319e93599ae..6ccc3f8c122a 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc.h
@@ -382,7 +382,7 @@
382#define S5P_FIMV_R2H_CMD_EDFU_INIT_RET 16 382#define S5P_FIMV_R2H_CMD_EDFU_INIT_RET 16
383#define S5P_FIMV_R2H_CMD_ERR_RET 32 383#define S5P_FIMV_R2H_CMD_ERR_RET 32
384 384
385/* Dummy definition for MFCv6 compatibilty */ 385/* Dummy definition for MFCv6 compatibility */
386#define S5P_FIMV_CODEC_H264_MVC_DEC -1 386#define S5P_FIMV_CODEC_H264_MVC_DEC -1
387#define S5P_FIMV_R2H_CMD_FIELD_DONE_RET -1 387#define S5P_FIMV_R2H_CMD_FIELD_DONE_RET -1
388#define S5P_FIMV_MFC_RESET -1 388#define S5P_FIMV_MFC_RESET -1
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 5f2c4ad6c2cb..e46067a57853 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -239,7 +239,7 @@ static void s5p_mfc_handle_frame_copy_time(struct s5p_mfc_ctx *ctx)
239 frame_type = s5p_mfc_hw_call(dev->mfc_ops, get_dec_frame_type, dev); 239 frame_type = s5p_mfc_hw_call(dev->mfc_ops, get_dec_frame_type, dev);
240 240
241 /* Copy timestamp / timecode from decoded src to dst and set 241 /* Copy timestamp / timecode from decoded src to dst and set
242 appropraite flags */ 242 appropriate flags */
243 src_buf = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); 243 src_buf = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
244 list_for_each_entry(dst_buf, &ctx->dst_queue, list) { 244 list_for_each_entry(dst_buf, &ctx->dst_queue, list) {
245 if (vb2_dma_contig_plane_dma_addr(dst_buf->b, 0) == dec_y_addr) { 245 if (vb2_dma_contig_plane_dma_addr(dst_buf->b, 0) == dec_y_addr) {
@@ -428,7 +428,7 @@ static void s5p_mfc_handle_error(struct s5p_mfc_dev *dev,
428 case MFCINST_FINISHING: 428 case MFCINST_FINISHING:
429 case MFCINST_FINISHED: 429 case MFCINST_FINISHED:
430 case MFCINST_RUNNING: 430 case MFCINST_RUNNING:
431 /* It is higly probable that an error occured 431 /* It is highly probable that an error occurred
432 * while decoding a frame */ 432 * while decoding a frame */
433 clear_work_bit(ctx); 433 clear_work_bit(ctx);
434 ctx->state = MFCINST_ERROR; 434 ctx->state = MFCINST_ERROR;
@@ -611,7 +611,7 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv)
611 mfc_debug(1, "Int reason: %d (err: %08x)\n", reason, err); 611 mfc_debug(1, "Int reason: %d (err: %08x)\n", reason, err);
612 switch (reason) { 612 switch (reason) {
613 case S5P_MFC_R2H_CMD_ERR_RET: 613 case S5P_MFC_R2H_CMD_ERR_RET:
614 /* An error has occured */ 614 /* An error has occurred */
615 if (ctx->state == MFCINST_RUNNING && 615 if (ctx->state == MFCINST_RUNNING &&
616 s5p_mfc_hw_call(dev->mfc_ops, err_dec, err) >= 616 s5p_mfc_hw_call(dev->mfc_ops, err_dec, err) >=
617 dev->warn_start) 617 dev->warn_start)
@@ -840,7 +840,7 @@ static int s5p_mfc_open(struct file *file)
840 mutex_unlock(&dev->mfc_mutex); 840 mutex_unlock(&dev->mfc_mutex);
841 mfc_debug_leave(); 841 mfc_debug_leave();
842 return ret; 842 return ret;
843 /* Deinit when failure occured */ 843 /* Deinit when failure occurred */
844err_queue_init: 844err_queue_init:
845 if (dev->num_inst == 1) 845 if (dev->num_inst == 1)
846 s5p_mfc_deinit_hw(dev); 846 s5p_mfc_deinit_hw(dev);
@@ -881,14 +881,14 @@ static int s5p_mfc_release(struct file *file)
881 /* Mark context as idle */ 881 /* Mark context as idle */
882 clear_work_bit_irqsave(ctx); 882 clear_work_bit_irqsave(ctx);
883 /* If instance was initialised then 883 /* If instance was initialised then
884 * return instance and free reosurces */ 884 * return instance and free resources */
885 if (ctx->inst_no != MFC_NO_INSTANCE_SET) { 885 if (ctx->inst_no != MFC_NO_INSTANCE_SET) {
886 mfc_debug(2, "Has to free instance\n"); 886 mfc_debug(2, "Has to free instance\n");
887 ctx->state = MFCINST_RETURN_INST; 887 ctx->state = MFCINST_RETURN_INST;
888 set_work_bit_irqsave(ctx); 888 set_work_bit_irqsave(ctx);
889 s5p_mfc_clean_ctx_int_flags(ctx); 889 s5p_mfc_clean_ctx_int_flags(ctx);
890 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); 890 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
891 /* Wait until instance is returned or timeout occured */ 891 /* Wait until instance is returned or timeout occurred */
892 if (s5p_mfc_wait_for_done_ctx 892 if (s5p_mfc_wait_for_done_ctx
893 (ctx, S5P_MFC_R2H_CMD_CLOSE_INSTANCE_RET, 0)) { 893 (ctx, S5P_MFC_R2H_CMD_CLOSE_INSTANCE_RET, 0)) {
894 s5p_mfc_clock_off(); 894 s5p_mfc_clock_off();
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
index 7cab6849fb5b..2475a3c9a0a6 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
@@ -69,7 +69,7 @@ int s5p_mfc_alloc_firmware(struct s5p_mfc_dev *dev)
69 69
70 } else { 70 } else {
71 /* In this case bank2 can point to the same address as bank1. 71 /* In this case bank2 can point to the same address as bank1.
72 * Firmware will always occupy the beggining of this area so it is 72 * Firmware will always occupy the beginning of this area so it is
73 * impossible having a video frame buffer with zero address. */ 73 * impossible having a video frame buffer with zero address. */
74 dev->bank2 = dev->bank1; 74 dev->bank2 = dev->bank1;
75 } 75 }