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authorKamil Debski <k.debski@samsung.com>2013-01-03 05:06:04 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2013-01-06 06:59:02 -0500
commit317b4ca4982ea2429b75d0acd10445ec9475aa86 (patch)
tree21152b36243347cd1d73998fd738f3a77152583e /drivers/media/platform/s5p-mfc
parentef89fff874758c0f08501bdc2932b7e77421cfc6 (diff)
[media] s5p-mfc: Change internal buffer allocation from vb2 ops to dma_alloc_coherent
Change internal buffer allocation from vb2 memory ops call to direct calls of dma_alloc_coherent. This change shortens the code and makes it much more readable. Signed-off-by: Kamil Debski <k.debski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/platform/s5p-mfc')
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_common.h20
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_opr.c30
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_opr.h5
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c196
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c121
5 files changed, 143 insertions, 229 deletions
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 0df6454e407e..202d1d7a37a8 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -496,15 +496,9 @@ struct s5p_mfc_codec_ops {
496 * flushed 496 * flushed
497 * @head_processed: flag mentioning whether the header data is processed 497 * @head_processed: flag mentioning whether the header data is processed
498 * completely or not 498 * completely or not
499 * @bank1_buf: handle to memory allocated for temporary buffers from 499 * @bank1: handle to memory allocated for temporary buffers from
500 * memory bank 1 500 * memory bank 1
501 * @bank1_phys: address of the temporary buffers from memory bank 1 501 * @bank2: handle to memory allocated for temporary buffers from
502 * @bank1_size: size of the memory allocated for temporary buffers from
503 * memory bank 1
504 * @bank2_buf: handle to memory allocated for temporary buffers from
505 * memory bank 2
506 * @bank2_phys: address of the temporary buffers from memory bank 2
507 * @bank2_size: size of the memory allocated for temporary buffers from
508 * memory bank 2 502 * memory bank 2
509 * @capture_state: state of the capture buffers queue 503 * @capture_state: state of the capture buffers queue
510 * @output_state: state of the output buffers queue 504 * @output_state: state of the output buffers queue
@@ -584,14 +578,8 @@ struct s5p_mfc_ctx {
584 unsigned int dpb_flush_flag; 578 unsigned int dpb_flush_flag;
585 unsigned int head_processed; 579 unsigned int head_processed;
586 580
587 /* Buffers */ 581 struct s5p_mfc_priv_buf bank1;
588 void *bank1_buf; 582 struct s5p_mfc_priv_buf bank2;
589 size_t bank1_phys;
590 size_t bank1_size;
591
592 void *bank2_buf;
593 size_t bank2_phys;
594 size_t bank2_size;
595 583
596 enum s5p_mfc_queue_state capture_state; 584 enum s5p_mfc_queue_state capture_state;
597 enum s5p_mfc_queue_state output_state; 585 enum s5p_mfc_queue_state output_state;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.c
index 6932e90d4065..b4c194331d8c 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.c
@@ -12,6 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14 14
15#include "s5p_mfc_debug.h"
15#include "s5p_mfc_opr.h" 16#include "s5p_mfc_opr.h"
16#include "s5p_mfc_opr_v5.h" 17#include "s5p_mfc_opr_v5.h"
17#include "s5p_mfc_opr_v6.h" 18#include "s5p_mfc_opr_v6.h"
@@ -29,3 +30,32 @@ void s5p_mfc_init_hw_ops(struct s5p_mfc_dev *dev)
29 } 30 }
30 dev->mfc_ops = s5p_mfc_ops; 31 dev->mfc_ops = s5p_mfc_ops;
31} 32}
33
34int s5p_mfc_alloc_priv_buf(struct device *dev,
35 struct s5p_mfc_priv_buf *b)
36{
37
38 mfc_debug(3, "Allocating priv: %d\n", b->size);
39
40 b->virt = dma_alloc_coherent(dev, b->size, &b->dma, GFP_KERNEL);
41
42 if (!b->virt) {
43 mfc_err("Allocating private buffer failed\n");
44 return -ENOMEM;
45 }
46
47 mfc_debug(3, "Allocated addr %p %08x\n", b->virt, b->dma);
48 return 0;
49}
50
51void s5p_mfc_release_priv_buf(struct device *dev,
52 struct s5p_mfc_priv_buf *b)
53{
54 if (b->virt) {
55 dma_free_coherent(dev, b->size, b->virt, b->dma);
56 b->virt = 0;
57 b->dma = 0;
58 b->size = 0;
59 }
60}
61
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index 420abecafec0..754c540e7a7e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -80,5 +80,10 @@ struct s5p_mfc_hw_ops {
80}; 80};
81 81
82void s5p_mfc_init_hw_ops(struct s5p_mfc_dev *dev); 82void s5p_mfc_init_hw_ops(struct s5p_mfc_dev *dev);
83int s5p_mfc_alloc_priv_buf(struct device *dev,
84 struct s5p_mfc_priv_buf *b);
85void s5p_mfc_release_priv_buf(struct device *dev,
86 struct s5p_mfc_priv_buf *b);
87
83 88
84#endif /* S5P_MFC_OPR_H_ */ 89#endif /* S5P_MFC_OPR_H_ */
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c
index 2f099c44cb54..f61dba837899 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c
@@ -38,39 +38,26 @@ int s5p_mfc_alloc_dec_temp_buffers_v5(struct s5p_mfc_ctx *ctx)
38{ 38{
39 struct s5p_mfc_dev *dev = ctx->dev; 39 struct s5p_mfc_dev *dev = ctx->dev;
40 struct s5p_mfc_buf_size_v5 *buf_size = dev->variant->buf_size->priv; 40 struct s5p_mfc_buf_size_v5 *buf_size = dev->variant->buf_size->priv;
41 int ret;
41 42
42 ctx->dsc.alloc = vb2_dma_contig_memops.alloc( 43 ctx->dsc.size = buf_size->dsc;
43 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], 44 ret = s5p_mfc_alloc_priv_buf(dev->mem_dev_l, &ctx->dsc);
44 buf_size->dsc); 45 if (ret) {
45 if (IS_ERR_VALUE((int)ctx->dsc.alloc)) { 46 mfc_err("Failed to allocate temporary buffer\n");
46 ctx->dsc.alloc = NULL; 47 return ret;
47 mfc_err("Allocating DESC buffer failed\n");
48 return -ENOMEM;
49 } 48 }
50 ctx->dsc.dma = s5p_mfc_mem_cookie( 49
51 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->dsc.alloc);
52 BUG_ON(ctx->dsc.dma & ((1 << MFC_BANK1_ALIGN_ORDER) - 1)); 50 BUG_ON(ctx->dsc.dma & ((1 << MFC_BANK1_ALIGN_ORDER) - 1));
53 ctx->dsc.virt = vb2_dma_contig_memops.vaddr(ctx->dsc.alloc); 51 memset(ctx->dsc.virt, 0, ctx->dsc.size);
54 if (ctx->dsc.virt == NULL) {
55 vb2_dma_contig_memops.put(ctx->dsc.alloc);
56 ctx->dsc.dma = 0;
57 ctx->dsc.alloc = NULL;
58 mfc_err("Remapping DESC buffer failed\n");
59 return -ENOMEM;
60 }
61 memset(ctx->dsc.virt, 0, buf_size->dsc);
62 wmb(); 52 wmb();
63 return 0; 53 return 0;
64} 54}
65 55
56
66/* Release temporary buffers for decoding */ 57/* Release temporary buffers for decoding */
67void s5p_mfc_release_dec_desc_buffer_v5(struct s5p_mfc_ctx *ctx) 58void s5p_mfc_release_dec_desc_buffer_v5(struct s5p_mfc_ctx *ctx)
68{ 59{
69 if (ctx->dsc.dma) { 60 s5p_mfc_release_priv_buf(ctx->dev->mem_dev_l, &ctx->dsc);
70 vb2_dma_contig_memops.put(ctx->dsc.alloc);
71 ctx->dsc.alloc = NULL;
72 ctx->dsc.dma = 0;
73 }
74} 61}
75 62
76/* Allocate codec buffers */ 63/* Allocate codec buffers */
@@ -80,6 +67,7 @@ int s5p_mfc_alloc_codec_buffers_v5(struct s5p_mfc_ctx *ctx)
80 unsigned int enc_ref_y_size = 0; 67 unsigned int enc_ref_y_size = 0;
81 unsigned int enc_ref_c_size = 0; 68 unsigned int enc_ref_c_size = 0;
82 unsigned int guard_width, guard_height; 69 unsigned int guard_width, guard_height;
70 int ret;
83 71
84 if (ctx->type == MFCINST_DECODER) { 72 if (ctx->type == MFCINST_DECODER) {
85 mfc_debug(2, "Luma size:%d Chroma size:%d MV size:%d\n", 73 mfc_debug(2, "Luma size:%d Chroma size:%d MV size:%d\n",
@@ -113,100 +101,93 @@ int s5p_mfc_alloc_codec_buffers_v5(struct s5p_mfc_ctx *ctx)
113 /* Codecs have different memory requirements */ 101 /* Codecs have different memory requirements */
114 switch (ctx->codec_mode) { 102 switch (ctx->codec_mode) {
115 case S5P_MFC_CODEC_H264_DEC: 103 case S5P_MFC_CODEC_H264_DEC:
116 ctx->bank1_size = 104 ctx->bank1.size =
117 ALIGN(S5P_FIMV_DEC_NB_IP_SIZE + 105 ALIGN(S5P_FIMV_DEC_NB_IP_SIZE +
118 S5P_FIMV_DEC_VERT_NB_MV_SIZE, 106 S5P_FIMV_DEC_VERT_NB_MV_SIZE,
119 S5P_FIMV_DEC_BUF_ALIGN); 107 S5P_FIMV_DEC_BUF_ALIGN);
120 ctx->bank2_size = ctx->total_dpb_count * ctx->mv_size; 108 ctx->bank2.size = ctx->total_dpb_count * ctx->mv_size;
121 break; 109 break;
122 case S5P_MFC_CODEC_MPEG4_DEC: 110 case S5P_MFC_CODEC_MPEG4_DEC:
123 ctx->bank1_size = 111 ctx->bank1.size =
124 ALIGN(S5P_FIMV_DEC_NB_DCAC_SIZE + 112 ALIGN(S5P_FIMV_DEC_NB_DCAC_SIZE +
125 S5P_FIMV_DEC_UPNB_MV_SIZE + 113 S5P_FIMV_DEC_UPNB_MV_SIZE +
126 S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE + 114 S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE +
127 S5P_FIMV_DEC_STX_PARSER_SIZE + 115 S5P_FIMV_DEC_STX_PARSER_SIZE +
128 S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE, 116 S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE,
129 S5P_FIMV_DEC_BUF_ALIGN); 117 S5P_FIMV_DEC_BUF_ALIGN);
130 ctx->bank2_size = 0; 118 ctx->bank2.size = 0;
131 break; 119 break;
132 case S5P_MFC_CODEC_VC1RCV_DEC: 120 case S5P_MFC_CODEC_VC1RCV_DEC:
133 case S5P_MFC_CODEC_VC1_DEC: 121 case S5P_MFC_CODEC_VC1_DEC:
134 ctx->bank1_size = 122 ctx->bank1.size =
135 ALIGN(S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE + 123 ALIGN(S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE +
136 S5P_FIMV_DEC_UPNB_MV_SIZE + 124 S5P_FIMV_DEC_UPNB_MV_SIZE +
137 S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE + 125 S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE +
138 S5P_FIMV_DEC_NB_DCAC_SIZE + 126 S5P_FIMV_DEC_NB_DCAC_SIZE +
139 3 * S5P_FIMV_DEC_VC1_BITPLANE_SIZE, 127 3 * S5P_FIMV_DEC_VC1_BITPLANE_SIZE,
140 S5P_FIMV_DEC_BUF_ALIGN); 128 S5P_FIMV_DEC_BUF_ALIGN);
141 ctx->bank2_size = 0; 129 ctx->bank2.size = 0;
142 break; 130 break;
143 case S5P_MFC_CODEC_MPEG2_DEC: 131 case S5P_MFC_CODEC_MPEG2_DEC:
144 ctx->bank1_size = 0; 132 ctx->bank1.size = 0;
145 ctx->bank2_size = 0; 133 ctx->bank2.size = 0;
146 break; 134 break;
147 case S5P_MFC_CODEC_H263_DEC: 135 case S5P_MFC_CODEC_H263_DEC:
148 ctx->bank1_size = 136 ctx->bank1.size =
149 ALIGN(S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE + 137 ALIGN(S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE +
150 S5P_FIMV_DEC_UPNB_MV_SIZE + 138 S5P_FIMV_DEC_UPNB_MV_SIZE +
151 S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE + 139 S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE +
152 S5P_FIMV_DEC_NB_DCAC_SIZE, 140 S5P_FIMV_DEC_NB_DCAC_SIZE,
153 S5P_FIMV_DEC_BUF_ALIGN); 141 S5P_FIMV_DEC_BUF_ALIGN);
154 ctx->bank2_size = 0; 142 ctx->bank2.size = 0;
155 break; 143 break;
156 case S5P_MFC_CODEC_H264_ENC: 144 case S5P_MFC_CODEC_H264_ENC:
157 ctx->bank1_size = (enc_ref_y_size * 2) + 145 ctx->bank1.size = (enc_ref_y_size * 2) +
158 S5P_FIMV_ENC_UPMV_SIZE + 146 S5P_FIMV_ENC_UPMV_SIZE +
159 S5P_FIMV_ENC_COLFLG_SIZE + 147 S5P_FIMV_ENC_COLFLG_SIZE +
160 S5P_FIMV_ENC_INTRAMD_SIZE + 148 S5P_FIMV_ENC_INTRAMD_SIZE +
161 S5P_FIMV_ENC_NBORINFO_SIZE; 149 S5P_FIMV_ENC_NBORINFO_SIZE;
162 ctx->bank2_size = (enc_ref_y_size * 2) + 150 ctx->bank2.size = (enc_ref_y_size * 2) +
163 (enc_ref_c_size * 4) + 151 (enc_ref_c_size * 4) +
164 S5P_FIMV_ENC_INTRAPRED_SIZE; 152 S5P_FIMV_ENC_INTRAPRED_SIZE;
165 break; 153 break;
166 case S5P_MFC_CODEC_MPEG4_ENC: 154 case S5P_MFC_CODEC_MPEG4_ENC:
167 ctx->bank1_size = (enc_ref_y_size * 2) + 155 ctx->bank1.size = (enc_ref_y_size * 2) +
168 S5P_FIMV_ENC_UPMV_SIZE + 156 S5P_FIMV_ENC_UPMV_SIZE +
169 S5P_FIMV_ENC_COLFLG_SIZE + 157 S5P_FIMV_ENC_COLFLG_SIZE +
170 S5P_FIMV_ENC_ACDCCOEF_SIZE; 158 S5P_FIMV_ENC_ACDCCOEF_SIZE;
171 ctx->bank2_size = (enc_ref_y_size * 2) + 159 ctx->bank2.size = (enc_ref_y_size * 2) +
172 (enc_ref_c_size * 4); 160 (enc_ref_c_size * 4);
173 break; 161 break;
174 case S5P_MFC_CODEC_H263_ENC: 162 case S5P_MFC_CODEC_H263_ENC:
175 ctx->bank1_size = (enc_ref_y_size * 2) + 163 ctx->bank1.size = (enc_ref_y_size * 2) +
176 S5P_FIMV_ENC_UPMV_SIZE + 164 S5P_FIMV_ENC_UPMV_SIZE +
177 S5P_FIMV_ENC_ACDCCOEF_SIZE; 165 S5P_FIMV_ENC_ACDCCOEF_SIZE;
178 ctx->bank2_size = (enc_ref_y_size * 2) + 166 ctx->bank2.size = (enc_ref_y_size * 2) +
179 (enc_ref_c_size * 4); 167 (enc_ref_c_size * 4);
180 break; 168 break;
181 default: 169 default:
182 break; 170 break;
183 } 171 }
184 /* Allocate only if memory from bank 1 is necessary */ 172 /* Allocate only if memory from bank 1 is necessary */
185 if (ctx->bank1_size > 0) { 173 if (ctx->bank1.size > 0) {
186 ctx->bank1_buf = vb2_dma_contig_memops.alloc( 174
187 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->bank1_size); 175 ret = s5p_mfc_alloc_priv_buf(dev->mem_dev_l, &ctx->bank1);
188 if (IS_ERR(ctx->bank1_buf)) { 176 if (ret) {
189 ctx->bank1_buf = NULL; 177 mfc_err("Failed to allocate Bank1 temporary buffer\n");
190 printk(KERN_ERR 178 return ret;
191 "Buf alloc for decoding failed (port A)\n");
192 return -ENOMEM;
193 } 179 }
194 ctx->bank1_phys = s5p_mfc_mem_cookie( 180 BUG_ON(ctx->bank1.dma & ((1 << MFC_BANK1_ALIGN_ORDER) - 1));
195 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->bank1_buf);
196 BUG_ON(ctx->bank1_phys & ((1 << MFC_BANK1_ALIGN_ORDER) - 1));
197 } 181 }
198 /* Allocate only if memory from bank 2 is necessary */ 182 /* Allocate only if memory from bank 2 is necessary */
199 if (ctx->bank2_size > 0) { 183 if (ctx->bank2.size > 0) {
200 ctx->bank2_buf = vb2_dma_contig_memops.alloc( 184 ret = s5p_mfc_alloc_priv_buf(dev->mem_dev_r, &ctx->bank2);
201 dev->alloc_ctx[MFC_BANK2_ALLOC_CTX], ctx->bank2_size); 185 if (ret) {
202 if (IS_ERR(ctx->bank2_buf)) { 186 mfc_err("Failed to allocate Bank2 temporary buffer\n");
203 ctx->bank2_buf = NULL; 187 s5p_mfc_release_priv_buf(ctx->dev->mem_dev_l, &ctx->bank1);
204 mfc_err("Buf alloc for decoding failed (port B)\n"); 188 return ret;
205 return -ENOMEM;
206 } 189 }
207 ctx->bank2_phys = s5p_mfc_mem_cookie( 190 BUG_ON(ctx->bank2.dma & ((1 << MFC_BANK2_ALIGN_ORDER) - 1));
208 dev->alloc_ctx[MFC_BANK2_ALLOC_CTX], ctx->bank2_buf);
209 BUG_ON(ctx->bank2_phys & ((1 << MFC_BANK2_ALIGN_ORDER) - 1));
210 } 191 }
211 return 0; 192 return 0;
212} 193}
@@ -214,18 +195,8 @@ int s5p_mfc_alloc_codec_buffers_v5(struct s5p_mfc_ctx *ctx)
214/* Release buffers allocated for codec */ 195/* Release buffers allocated for codec */
215void s5p_mfc_release_codec_buffers_v5(struct s5p_mfc_ctx *ctx) 196void s5p_mfc_release_codec_buffers_v5(struct s5p_mfc_ctx *ctx)
216{ 197{
217 if (ctx->bank1_buf) { 198 s5p_mfc_release_priv_buf(ctx->dev->mem_dev_l, &ctx->bank1);
218 vb2_dma_contig_memops.put(ctx->bank1_buf); 199 s5p_mfc_release_priv_buf(ctx->dev->mem_dev_r, &ctx->bank2);
219 ctx->bank1_buf = NULL;
220 ctx->bank1_phys = 0;
221 ctx->bank1_size = 0;
222 }
223 if (ctx->bank2_buf) {
224 vb2_dma_contig_memops.put(ctx->bank2_buf);
225 ctx->bank2_buf = NULL;
226 ctx->bank2_phys = 0;
227 ctx->bank2_size = 0;
228 }
229} 200}
230 201
231/* Allocate memory for instance data buffer */ 202/* Allocate memory for instance data buffer */
@@ -233,58 +204,38 @@ int s5p_mfc_alloc_instance_buffer_v5(struct s5p_mfc_ctx *ctx)
233{ 204{
234 struct s5p_mfc_dev *dev = ctx->dev; 205 struct s5p_mfc_dev *dev = ctx->dev;
235 struct s5p_mfc_buf_size_v5 *buf_size = dev->variant->buf_size->priv; 206 struct s5p_mfc_buf_size_v5 *buf_size = dev->variant->buf_size->priv;
207 int ret;
236 208
237 if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC || 209 if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
238 ctx->codec_mode == S5P_MFC_CODEC_H264_ENC) 210 ctx->codec_mode == S5P_MFC_CODEC_H264_ENC)
239 ctx->ctx.size = buf_size->h264_ctx; 211 ctx->ctx.size = buf_size->h264_ctx;
240 else 212 else
241 ctx->ctx.size = buf_size->non_h264_ctx; 213 ctx->ctx.size = buf_size->non_h264_ctx;
242 ctx->ctx.alloc = vb2_dma_contig_memops.alloc( 214
243 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->ctx.size); 215 ret = s5p_mfc_alloc_priv_buf(dev->mem_dev_l, &ctx->ctx);
244 if (IS_ERR(ctx->ctx.alloc)) { 216 if (ret) {
245 mfc_err("Allocating context buffer failed\n"); 217 mfc_err("Failed to allocate instance buffer\n");
246 ctx->ctx.alloc = NULL; 218 return ret;
247 return -ENOMEM;
248 } 219 }
249 ctx->ctx.dma = s5p_mfc_mem_cookie(
250 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->ctx.alloc);
251 BUG_ON(ctx->ctx.dma & ((1 << MFC_BANK1_ALIGN_ORDER) - 1));
252 ctx->ctx.ofs = OFFSETA(ctx->ctx.dma); 220 ctx->ctx.ofs = OFFSETA(ctx->ctx.dma);
253 ctx->ctx.virt = vb2_dma_contig_memops.vaddr(ctx->ctx.alloc); 221
254 if (!ctx->ctx.virt) {
255 mfc_err("Remapping instance buffer failed\n");
256 vb2_dma_contig_memops.put(ctx->ctx.alloc);
257 ctx->ctx.alloc = NULL;
258 ctx->ctx.ofs = 0;
259 ctx->ctx.dma = 0;
260 return -ENOMEM;
261 }
262 /* Zero content of the allocated memory */ 222 /* Zero content of the allocated memory */
263 memset(ctx->ctx.virt, 0, ctx->ctx.size); 223 memset(ctx->ctx.virt, 0, ctx->ctx.size);
264 wmb(); 224 wmb();
265 225
266 /* Initialize shared memory */ 226 /* Initialize shared memory */
267 ctx->shm.alloc = vb2_dma_contig_memops.alloc( 227 ctx->shm.size = buf_size->shm;
268 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], buf_size->shm); 228 ret = s5p_mfc_alloc_priv_buf(dev->mem_dev_l, &ctx->shm);
269 if (IS_ERR(ctx->shm.alloc)) { 229 if (ret) {
270 mfc_err("failed to allocate shared memory\n"); 230 mfc_err("Failed to allocate shared memory buffer\n");
271 return PTR_ERR(ctx->shm.alloc); 231 return ret;
272 } 232 }
233
273 /* shared memory offset only keeps the offset from base (port a) */ 234 /* shared memory offset only keeps the offset from base (port a) */
274 ctx->shm.ofs = s5p_mfc_mem_cookie( 235 ctx->shm.ofs = ctx->shm.dma - dev->bank1;
275 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->shm.alloc)
276 - dev->bank1;
277 BUG_ON(ctx->shm.ofs & ((1 << MFC_BANK1_ALIGN_ORDER) - 1)); 236 BUG_ON(ctx->shm.ofs & ((1 << MFC_BANK1_ALIGN_ORDER) - 1));
278 237
279 ctx->shm.virt = vb2_dma_contig_memops.vaddr(ctx->shm.alloc); 238 memset(ctx->shm.virt, 0, buf_size->shm);
280 if (!ctx->shm.virt) {
281 vb2_dma_contig_memops.put(ctx->shm.alloc);
282 ctx->shm.alloc = NULL;
283 ctx->shm.ofs = 0;
284 mfc_err("failed to virt addr of shared memory\n");
285 return -ENOMEM;
286 }
287 memset((void *)ctx->shm.virt, 0, buf_size->shm);
288 wmb(); 239 wmb();
289 return 0; 240 return 0;
290} 241}
@@ -292,19 +243,8 @@ int s5p_mfc_alloc_instance_buffer_v5(struct s5p_mfc_ctx *ctx)
292/* Release instance buffer */ 243/* Release instance buffer */
293void s5p_mfc_release_instance_buffer_v5(struct s5p_mfc_ctx *ctx) 244void s5p_mfc_release_instance_buffer_v5(struct s5p_mfc_ctx *ctx)
294{ 245{
295 if (ctx->ctx.alloc) { 246 s5p_mfc_release_priv_buf(ctx->dev->mem_dev_l, &ctx->ctx);
296 vb2_dma_contig_memops.put(ctx->ctx.alloc); 247 s5p_mfc_release_priv_buf(ctx->dev->mem_dev_l, &ctx->shm);
297 ctx->ctx.alloc = NULL;
298 ctx->ctx.ofs = 0;
299 ctx->ctx.virt = NULL;
300 ctx->ctx.dma = 0;
301 }
302 if (ctx->shm.alloc) {
303 vb2_dma_contig_memops.put(ctx->shm.alloc);
304 ctx->shm.alloc = NULL;
305 ctx->shm.ofs = 0;
306 ctx->shm.virt = NULL;
307 }
308} 248}
309 249
310int s5p_mfc_alloc_dev_context_buffer_v5(struct s5p_mfc_dev *dev) 250int s5p_mfc_alloc_dev_context_buffer_v5(struct s5p_mfc_dev *dev)
@@ -443,10 +383,10 @@ int s5p_mfc_set_dec_frame_buffer_v5(struct s5p_mfc_ctx *ctx)
443 size_t buf_addr1, buf_addr2; 383 size_t buf_addr1, buf_addr2;
444 int buf_size1, buf_size2; 384 int buf_size1, buf_size2;
445 385
446 buf_addr1 = ctx->bank1_phys; 386 buf_addr1 = ctx->bank1.dma;
447 buf_size1 = ctx->bank1_size; 387 buf_size1 = ctx->bank1.size;
448 buf_addr2 = ctx->bank2_phys; 388 buf_addr2 = ctx->bank2.dma;
449 buf_size2 = ctx->bank2_size; 389 buf_size2 = ctx->bank2.size;
450 dpb = mfc_read(dev, S5P_FIMV_SI_CH0_DPB_CONF_CTRL) & 390 dpb = mfc_read(dev, S5P_FIMV_SI_CH0_DPB_CONF_CTRL) &
451 ~S5P_FIMV_DPB_COUNT_MASK; 391 ~S5P_FIMV_DPB_COUNT_MASK;
452 mfc_write(dev, ctx->total_dpb_count | dpb, 392 mfc_write(dev, ctx->total_dpb_count | dpb,
@@ -606,10 +546,10 @@ int s5p_mfc_set_enc_ref_buffer_v5(struct s5p_mfc_ctx *ctx)
606 unsigned int guard_width, guard_height; 546 unsigned int guard_width, guard_height;
607 int i; 547 int i;
608 548
609 buf_addr1 = ctx->bank1_phys; 549 buf_addr1 = ctx->bank1.dma;
610 buf_size1 = ctx->bank1_size; 550 buf_size1 = ctx->bank1.size;
611 buf_addr2 = ctx->bank2_phys; 551 buf_addr2 = ctx->bank2.dma;
612 buf_size2 = ctx->bank2_size; 552 buf_size2 = ctx->bank2.size;
613 enc_ref_y_size = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN) 553 enc_ref_y_size = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN)
614 * ALIGN(ctx->img_height, S5P_FIMV_NV12MT_VALIGN); 554 * ALIGN(ctx->img_height, S5P_FIMV_NV12MT_VALIGN);
615 enc_ref_y_size = ALIGN(enc_ref_y_size, S5P_FIMV_NV12MT_SALIGN); 555 enc_ref_y_size = ALIGN(enc_ref_y_size, S5P_FIMV_NV12MT_SALIGN);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 91d508729d43..beb6dbacebd9 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -73,6 +73,7 @@ int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
73{ 73{
74 struct s5p_mfc_dev *dev = ctx->dev; 74 struct s5p_mfc_dev *dev = ctx->dev;
75 unsigned int mb_width, mb_height; 75 unsigned int mb_width, mb_height;
76 int ret;
76 77
77 mb_width = MB_WIDTH(ctx->img_width); 78 mb_width = MB_WIDTH(ctx->img_width);
78 mb_height = MB_HEIGHT(ctx->img_height); 79 mb_height = MB_HEIGHT(ctx->img_height);
@@ -112,7 +113,7 @@ int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
112 mb_height); 113 mb_height);
113 ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 114 ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
114 S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); 115 S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
115 ctx->bank1_size = 116 ctx->bank1.size =
116 ctx->scratch_buf_size + 117 ctx->scratch_buf_size +
117 (ctx->mv_count * ctx->mv_size); 118 (ctx->mv_count * ctx->mv_size);
118 break; 119 break;
@@ -123,7 +124,7 @@ int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
123 mb_height); 124 mb_height);
124 ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 125 ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
125 S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); 126 S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
126 ctx->bank1_size = ctx->scratch_buf_size; 127 ctx->bank1.size = ctx->scratch_buf_size;
127 break; 128 break;
128 case S5P_MFC_CODEC_VC1RCV_DEC: 129 case S5P_MFC_CODEC_VC1RCV_DEC:
129 case S5P_MFC_CODEC_VC1_DEC: 130 case S5P_MFC_CODEC_VC1_DEC:
@@ -133,11 +134,11 @@ int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
133 mb_height); 134 mb_height);
134 ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 135 ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
135 S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); 136 S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
136 ctx->bank1_size = ctx->scratch_buf_size; 137 ctx->bank1.size = ctx->scratch_buf_size;
137 break; 138 break;
138 case S5P_MFC_CODEC_MPEG2_DEC: 139 case S5P_MFC_CODEC_MPEG2_DEC:
139 ctx->bank1_size = 0; 140 ctx->bank1.size = 0;
140 ctx->bank2_size = 0; 141 ctx->bank2.size = 0;
141 break; 142 break;
142 case S5P_MFC_CODEC_H263_DEC: 143 case S5P_MFC_CODEC_H263_DEC:
143 ctx->scratch_buf_size = 144 ctx->scratch_buf_size =
@@ -146,7 +147,7 @@ int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
146 mb_height); 147 mb_height);
147 ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 148 ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
148 S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); 149 S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
149 ctx->bank1_size = ctx->scratch_buf_size; 150 ctx->bank1.size = ctx->scratch_buf_size;
150 break; 151 break;
151 case S5P_MFC_CODEC_VP8_DEC: 152 case S5P_MFC_CODEC_VP8_DEC:
152 ctx->scratch_buf_size = 153 ctx->scratch_buf_size =
@@ -155,7 +156,7 @@ int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
155 mb_height); 156 mb_height);
156 ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 157 ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
157 S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); 158 S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
158 ctx->bank1_size = ctx->scratch_buf_size; 159 ctx->bank1.size = ctx->scratch_buf_size;
159 break; 160 break;
160 case S5P_MFC_CODEC_H264_ENC: 161 case S5P_MFC_CODEC_H264_ENC:
161 ctx->scratch_buf_size = 162 ctx->scratch_buf_size =
@@ -164,11 +165,11 @@ int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
164 mb_height); 165 mb_height);
165 ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 166 ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
166 S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); 167 S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
167 ctx->bank1_size = 168 ctx->bank1.size =
168 ctx->scratch_buf_size + ctx->tmv_buffer_size + 169 ctx->scratch_buf_size + ctx->tmv_buffer_size +
169 (ctx->dpb_count * (ctx->luma_dpb_size + 170 (ctx->dpb_count * (ctx->luma_dpb_size +
170 ctx->chroma_dpb_size + ctx->me_buffer_size)); 171 ctx->chroma_dpb_size + ctx->me_buffer_size));
171 ctx->bank2_size = 0; 172 ctx->bank2.size = 0;
172 break; 173 break;
173 case S5P_MFC_CODEC_MPEG4_ENC: 174 case S5P_MFC_CODEC_MPEG4_ENC:
174 case S5P_MFC_CODEC_H263_ENC: 175 case S5P_MFC_CODEC_H263_ENC:
@@ -178,28 +179,24 @@ int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
178 mb_height); 179 mb_height);
179 ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 180 ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size,
180 S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); 181 S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
181 ctx->bank1_size = 182 ctx->bank1.size =
182 ctx->scratch_buf_size + ctx->tmv_buffer_size + 183 ctx->scratch_buf_size + ctx->tmv_buffer_size +
183 (ctx->dpb_count * (ctx->luma_dpb_size + 184 (ctx->dpb_count * (ctx->luma_dpb_size +
184 ctx->chroma_dpb_size + ctx->me_buffer_size)); 185 ctx->chroma_dpb_size + ctx->me_buffer_size));
185 ctx->bank2_size = 0; 186 ctx->bank2.size = 0;
186 break; 187 break;
187 default: 188 default:
188 break; 189 break;
189 } 190 }
190 191
191 /* Allocate only if memory from bank 1 is necessary */ 192 /* Allocate only if memory from bank 1 is necessary */
192 if (ctx->bank1_size > 0) { 193 if (ctx->bank1.size > 0) {
193 ctx->bank1_buf = vb2_dma_contig_memops.alloc( 194 ret = s5p_mfc_alloc_priv_buf(dev->mem_dev_l, &ctx->bank1);
194 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->bank1_size); 195 if (ret) {
195 if (IS_ERR(ctx->bank1_buf)) { 196 mfc_err("Failed to allocate Bank1 memory\n");
196 ctx->bank1_buf = 0; 197 return ret;
197 pr_err("Buf alloc for decoding failed (port A)\n");
198 return -ENOMEM;
199 } 198 }
200 ctx->bank1_phys = s5p_mfc_mem_cookie( 199 BUG_ON(ctx->bank1.dma & ((1 << MFC_BANK1_ALIGN_ORDER) - 1));
201 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->bank1_buf);
202 BUG_ON(ctx->bank1_phys & ((1 << MFC_BANK1_ALIGN_ORDER) - 1));
203 } 200 }
204 201
205 return 0; 202 return 0;
@@ -208,12 +205,7 @@ int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
208/* Release buffers allocated for codec */ 205/* Release buffers allocated for codec */
209void s5p_mfc_release_codec_buffers_v6(struct s5p_mfc_ctx *ctx) 206void s5p_mfc_release_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
210{ 207{
211 if (ctx->bank1_buf) { 208 s5p_mfc_release_priv_buf(ctx->dev->mem_dev_l, &ctx->bank1);
212 vb2_dma_contig_memops.put(ctx->bank1_buf);
213 ctx->bank1_buf = 0;
214 ctx->bank1_phys = 0;
215 ctx->bank1_size = 0;
216 }
217} 209}
218 210
219/* Allocate memory for instance data buffer */ 211/* Allocate memory for instance data buffer */
@@ -221,6 +213,7 @@ int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
221{ 213{
222 struct s5p_mfc_dev *dev = ctx->dev; 214 struct s5p_mfc_dev *dev = ctx->dev;
223 struct s5p_mfc_buf_size_v6 *buf_size = dev->variant->buf_size->priv; 215 struct s5p_mfc_buf_size_v6 *buf_size = dev->variant->buf_size->priv;
216 int ret;
224 217
225 mfc_debug_enter(); 218 mfc_debug_enter();
226 219
@@ -250,25 +243,10 @@ int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
250 break; 243 break;
251 } 244 }
252 245
253 ctx->ctx.alloc = vb2_dma_contig_memops.alloc( 246 ret = s5p_mfc_alloc_priv_buf(dev->mem_dev_l, &ctx->ctx);
254 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->ctx.size); 247 if (ret) {
255 if (IS_ERR(ctx->ctx.alloc)) { 248 mfc_err("Failed to allocate instance buffer\n");
256 mfc_err("Allocating context buffer failed.\n"); 249 return ret;
257 return PTR_ERR(ctx->ctx.alloc);
258 }
259
260 ctx->ctx.dma = s5p_mfc_mem_cookie(
261 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->ctx.alloc);
262
263 ctx->ctx.virt = vb2_dma_contig_memops.vaddr(ctx->ctx.alloc);
264 if (!ctx->ctx.virt) {
265 vb2_dma_contig_memops.put(ctx->ctx.alloc);
266 ctx->ctx.alloc = NULL;
267 ctx->ctx.dma = 0;
268 ctx->ctx.virt = NULL;
269
270 mfc_err("Remapping context buffer failed.\n");
271 return -ENOMEM;
272 } 250 }
273 251
274 memset(ctx->ctx.virt, 0, ctx->ctx.size); 252 memset(ctx->ctx.virt, 0, ctx->ctx.size);
@@ -282,44 +260,22 @@ int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
282/* Release instance buffer */ 260/* Release instance buffer */
283void s5p_mfc_release_instance_buffer_v6(struct s5p_mfc_ctx *ctx) 261void s5p_mfc_release_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
284{ 262{
285 mfc_debug_enter(); 263 s5p_mfc_release_priv_buf(ctx->dev->mem_dev_l, &ctx->ctx);
286
287 if (ctx->ctx.alloc) {
288 vb2_dma_contig_memops.put(ctx->ctx.alloc);
289 ctx->ctx.alloc = NULL;
290 ctx->ctx.dma = 0;
291 ctx->ctx.virt = NULL;
292 }
293
294 mfc_debug_leave();
295} 264}
296 265
297/* Allocate context buffers for SYS_INIT */ 266/* Allocate context buffers for SYS_INIT */
298int s5p_mfc_alloc_dev_context_buffer_v6(struct s5p_mfc_dev *dev) 267int s5p_mfc_alloc_dev_context_buffer_v6(struct s5p_mfc_dev *dev)
299{ 268{
300 struct s5p_mfc_buf_size_v6 *buf_size = dev->variant->buf_size->priv; 269 struct s5p_mfc_buf_size_v6 *buf_size = dev->variant->buf_size->priv;
270 int ret;
301 271
302 mfc_debug_enter(); 272 mfc_debug_enter();
303 273
304 dev->ctx_buf.alloc = vb2_dma_contig_memops.alloc( 274 dev->ctx_buf.size = buf_size->dev_ctx;
305 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], buf_size->dev_ctx); 275 ret = s5p_mfc_alloc_priv_buf(dev->mem_dev_l, &dev->ctx_buf);
306 if (IS_ERR(dev->ctx_buf.alloc)) { 276 if (ret) {
307 mfc_err("Allocating DESC buffer failed.\n"); 277 mfc_err("Failed to allocate device context buffer\n");
308 return PTR_ERR(dev->ctx_buf.alloc); 278 return ret;
309 }
310
311 dev->ctx_buf.dma = s5p_mfc_mem_cookie(
312 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX],
313 dev->ctx_buf.alloc);
314
315 dev->ctx_buf.virt = vb2_dma_contig_memops.vaddr(dev->ctx_buf.alloc);
316 if (!dev->ctx_buf.virt) {
317 vb2_dma_contig_memops.put(dev->ctx_buf.alloc);
318 dev->ctx_buf.alloc = NULL;
319 dev->ctx_buf.dma = 0;
320
321 mfc_err("Remapping DESC buffer failed.\n");
322 return -ENOMEM;
323 } 279 }
324 280
325 memset(dev->ctx_buf.virt, 0, buf_size->dev_ctx); 281 memset(dev->ctx_buf.virt, 0, buf_size->dev_ctx);
@@ -333,12 +289,7 @@ int s5p_mfc_alloc_dev_context_buffer_v6(struct s5p_mfc_dev *dev)
333/* Release context buffers for SYS_INIT */ 289/* Release context buffers for SYS_INIT */
334void s5p_mfc_release_dev_context_buffer_v6(struct s5p_mfc_dev *dev) 290void s5p_mfc_release_dev_context_buffer_v6(struct s5p_mfc_dev *dev)
335{ 291{
336 if (dev->ctx_buf.alloc) { 292 s5p_mfc_release_priv_buf(dev->mem_dev_l, &dev->ctx_buf);
337 vb2_dma_contig_memops.put(dev->ctx_buf.alloc);
338 dev->ctx_buf.alloc = NULL;
339 dev->ctx_buf.dma = 0;
340 dev->ctx_buf.virt = NULL;
341 }
342} 293}
343 294
344static int calc_plane(int width, int height) 295static int calc_plane(int width, int height)
@@ -417,8 +368,8 @@ int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
417 int buf_size1; 368 int buf_size1;
418 int align_gap; 369 int align_gap;
419 370
420 buf_addr1 = ctx->bank1_phys; 371 buf_addr1 = ctx->bank1.dma;
421 buf_size1 = ctx->bank1_size; 372 buf_size1 = ctx->bank1.size;
422 373
423 mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1); 374 mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1);
424 mfc_debug(2, "Total DPB COUNT: %d\n", ctx->total_dpb_count); 375 mfc_debug(2, "Total DPB COUNT: %d\n", ctx->total_dpb_count);
@@ -540,8 +491,8 @@ int s5p_mfc_set_enc_ref_buffer_v6(struct s5p_mfc_ctx *ctx)
540 491
541 mfc_debug_enter(); 492 mfc_debug_enter();
542 493
543 buf_addr1 = ctx->bank1_phys; 494 buf_addr1 = ctx->bank1.dma;
544 buf_size1 = ctx->bank1_size; 495 buf_size1 = ctx->bank1.size;
545 496
546 mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1); 497 mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1);
547 498