aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/media/platform/omap3isp
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2013-02-28 23:00:40 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-02-28 23:00:40 -0500
commit7307c00f335a4e986586b12334696098d2fc2bcd (patch)
tree3427b10ffc57570cf6153056f6ae1dac200cb3b3 /drivers/media/platform/omap3isp
parentf8f466c81795a3ed2b8a74c8feebc280aec3db81 (diff)
parent55ccb1a8b4c14c086427fd6b7272448fbd0c4449 (diff)
Merge tag 'late-omap' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late OMAP changes from Olof Johansson: "This branch contains changes for OMAP that came in late during the release staging, close to when the merge window opened. It contains, among other things: - OMAP PM fixes and some patches for audio device integration - OMAP clock fixes related to common clock conversion - A set of patches cleaning up WFI entry and blocking. - A set of fixes and IP block support for PM on TI AM33xx SoCs (Beaglebone, etc) - A set of smaller fixes and cleanups around AM33xx restart and revision detection, as well as removal of some dead code (CONFIG_32K_TIMER_HZ)" * tag 'late-omap' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (34 commits) ARM: omap2: include linux/errno.h in hwmod_reset ARM: OMAP2+: fix some omap_device_build() calls that aren't compiled by default ARM: OMAP4: hwmod data: Enable AESS hwmod device ARM: OMAP4: hwmod data: Update AESS data with memory bank area ARM: OMAP4+: AESS: enable internal auto-gating during initial setup ASoC: TI AESS: add autogating-enable function, callable from architecture code ARM: OMAP2+: hwmod: add enable_preprogram hook ARM: OMAP4: clock data: Add missing clkdm association for dpll_usb ARM: OMAP2+: PM: Fix the dt return condition in pm_late_init() ARM: OMAP2: am33xx-hwmod: Fix "register offset NULL check" bug ARM: OMAP2+: AM33xx: hwmod: add missing HWMOD_NO_IDLEST flags ARM: OMAP: AM33xx hwmod: Add parent-child relationship for PWM subsystem ARM: OMAP: AM33xx hwmod: Corrects PWM subsystem HWMOD entries ARM: DTS: AM33XX: Add nodes for OCMC RAM and WKUP-M3 ARM: OMAP2+: AM33XX: Update the hardreset API ARM: OMAP2+: AM33XX: hwmod: Update the WKUP-M3 hwmod with reset status bit ARM: OMAP2+: AM33XX: hwmod: Fixup cpgmac0 hwmod entry ARM: OMAP2+: AM33XX: hwmod: Update TPTC0 hwmod with the right flags ARM: OMAP2+: AM33XX: hwmod: Register OCMC RAM hwmod ARM: OMAP2+: AM33XX: CM/PRM: Use __ASSEMBLER__ macros in header files ...
Diffstat (limited to 'drivers/media/platform/omap3isp')
-rw-r--r--drivers/media/platform/omap3isp/isp.c18
-rw-r--r--drivers/media/platform/omap3isp/isp.h8
2 files changed, 5 insertions, 21 deletions
diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c
index 383a727b8aa0..6e5ad8ec0a22 100644
--- a/drivers/media/platform/omap3isp/isp.c
+++ b/drivers/media/platform/omap3isp/isp.c
@@ -1338,28 +1338,15 @@ static int isp_enable_clocks(struct isp_device *isp)
1338{ 1338{
1339 int r; 1339 int r;
1340 unsigned long rate; 1340 unsigned long rate;
1341 int divisor;
1342
1343 /*
1344 * cam_mclk clock chain:
1345 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1346 *
1347 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1348 * set to the same value. Hence the rate set for dpll4_m5
1349 * has to be twice of what is set on OMAP3430 to get
1350 * the required value for cam_mclk
1351 */
1352 divisor = isp->revision == ISP_REVISION_15_0 ? 1 : 2;
1353 1341
1354 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]); 1342 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
1355 if (r) { 1343 if (r) {
1356 dev_err(isp->dev, "failed to enable cam_ick clock\n"); 1344 dev_err(isp->dev, "failed to enable cam_ick clock\n");
1357 goto out_clk_enable_ick; 1345 goto out_clk_enable_ick;
1358 } 1346 }
1359 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK], 1347 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
1360 CM_CAM_MCLK_HZ/divisor);
1361 if (r) { 1348 if (r) {
1362 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n"); 1349 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
1363 goto out_clk_enable_mclk; 1350 goto out_clk_enable_mclk;
1364 } 1351 }
1365 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]); 1352 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
@@ -1401,7 +1388,6 @@ static void isp_disable_clocks(struct isp_device *isp)
1401static const char *isp_clocks[] = { 1388static const char *isp_clocks[] = {
1402 "cam_ick", 1389 "cam_ick",
1403 "cam_mclk", 1390 "cam_mclk",
1404 "dpll4_m5_ck",
1405 "csi2_96m_fck", 1391 "csi2_96m_fck",
1406 "l3_ick", 1392 "l3_ick",
1407}; 1393};
diff --git a/drivers/media/platform/omap3isp/isp.h b/drivers/media/platform/omap3isp/isp.h
index 517d348ce32b..c77e1f2ae5ca 100644
--- a/drivers/media/platform/omap3isp/isp.h
+++ b/drivers/media/platform/omap3isp/isp.h
@@ -147,7 +147,6 @@ struct isp_platform_callback {
147 * @ref_count: Reference count for handling multiple ISP requests. 147 * @ref_count: Reference count for handling multiple ISP requests.
148 * @cam_ick: Pointer to camera interface clock structure. 148 * @cam_ick: Pointer to camera interface clock structure.
149 * @cam_mclk: Pointer to camera functional clock structure. 149 * @cam_mclk: Pointer to camera functional clock structure.
150 * @dpll4_m5_ck: Pointer to DPLL4 M5 clock structure.
151 * @csi2_fck: Pointer to camera CSI2 complexIO clock structure. 150 * @csi2_fck: Pointer to camera CSI2 complexIO clock structure.
152 * @l3_ick: Pointer to OMAP3 L3 bus interface clock. 151 * @l3_ick: Pointer to OMAP3 L3 bus interface clock.
153 * @irq: Currently attached ISP ISR callbacks information structure. 152 * @irq: Currently attached ISP ISR callbacks information structure.
@@ -189,10 +188,9 @@ struct isp_device {
189 u32 xclk_divisor[2]; /* Two clocks, a and b. */ 188 u32 xclk_divisor[2]; /* Two clocks, a and b. */
190#define ISP_CLK_CAM_ICK 0 189#define ISP_CLK_CAM_ICK 0
191#define ISP_CLK_CAM_MCLK 1 190#define ISP_CLK_CAM_MCLK 1
192#define ISP_CLK_DPLL4_M5_CK 2 191#define ISP_CLK_CSI2_FCK 2
193#define ISP_CLK_CSI2_FCK 3 192#define ISP_CLK_L3_ICK 3
194#define ISP_CLK_L3_ICK 4 193 struct clk *clock[4];
195 struct clk *clock[5];
196 194
197 /* ISP modules */ 195 /* ISP modules */
198 struct ispstat isp_af; 196 struct ispstat isp_af;