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authorJoe Perches <joe@perches.com>2014-10-27 01:25:01 -0400
committerMauro Carvalho Chehab <mchehab@osg.samsung.com>2014-11-11 05:44:08 -0500
commit85273c382e185236241f21e0d468f86ca76c1546 (patch)
treeeb537cc688a7c150355a9f45375b6cfc4611c34b /drivers/media/pci
parent7041bc997db6a29af74499938987160bbe6654ef (diff)
[media] cx25840/cx18: Use standard ordering of mask and shift
Precedence of & and >> is not the same and is not left to right. shift has higher precedence and should be done after the mask. This use has a mask then shift which is not the normal style. Move the shift before the mask to match nearly all the other uses in kernel. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Diffstat (limited to 'drivers/media/pci')
-rw-r--r--drivers/media/pci/cx18/cx18-av-core.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/media/pci/cx18/cx18-av-core.c b/drivers/media/pci/cx18/cx18-av-core.c
index 2d3afe0431a9..45be26cdb653 100644
--- a/drivers/media/pci/cx18/cx18-av-core.c
+++ b/drivers/media/pci/cx18/cx18-av-core.c
@@ -490,8 +490,8 @@ void cx18_av_std_setup(struct cx18 *cx)
490 490
491 /* Sets horizontal blanking delay and active lines */ 491 /* Sets horizontal blanking delay and active lines */
492 cx18_av_write(cx, 0x470, hblank); 492 cx18_av_write(cx, 0x470, hblank);
493 cx18_av_write(cx, 0x471, 0xff & (((hblank >> 8) & 0x3) | 493 cx18_av_write(cx, 0x471,
494 (hactive << 4))); 494 (((hblank >> 8) & 0x3) | (hactive << 4)) & 0xff);
495 cx18_av_write(cx, 0x472, hactive >> 4); 495 cx18_av_write(cx, 0x472, hactive >> 4);
496 496
497 /* Sets burst gate delay */ 497 /* Sets burst gate delay */
@@ -499,14 +499,14 @@ void cx18_av_std_setup(struct cx18 *cx)
499 499
500 /* Sets vertical blanking delay and active duration */ 500 /* Sets vertical blanking delay and active duration */
501 cx18_av_write(cx, 0x474, vblank); 501 cx18_av_write(cx, 0x474, vblank);
502 cx18_av_write(cx, 0x475, 0xff & (((vblank >> 8) & 0x3) | 502 cx18_av_write(cx, 0x475,
503 (vactive << 4))); 503 (((vblank >> 8) & 0x3) | (vactive << 4)) & 0xff);
504 cx18_av_write(cx, 0x476, vactive >> 4); 504 cx18_av_write(cx, 0x476, vactive >> 4);
505 cx18_av_write(cx, 0x477, vblank656); 505 cx18_av_write(cx, 0x477, vblank656);
506 506
507 /* Sets src decimation rate */ 507 /* Sets src decimation rate */
508 cx18_av_write(cx, 0x478, 0xff & src_decimation); 508 cx18_av_write(cx, 0x478, src_decimation & 0xff);
509 cx18_av_write(cx, 0x479, 0xff & (src_decimation >> 8)); 509 cx18_av_write(cx, 0x479, (src_decimation >> 8) & 0xff);
510 510
511 /* Sets Luma and UV Low pass filters */ 511 /* Sets Luma and UV Low pass filters */
512 cx18_av_write(cx, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30)); 512 cx18_av_write(cx, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));
@@ -516,8 +516,8 @@ void cx18_av_std_setup(struct cx18 *cx)
516 516
517 /* Sets SC Step*/ 517 /* Sets SC Step*/
518 cx18_av_write(cx, 0x47c, sc); 518 cx18_av_write(cx, 0x47c, sc);
519 cx18_av_write(cx, 0x47d, 0xff & sc >> 8); 519 cx18_av_write(cx, 0x47d, (sc >> 8) & 0xff);
520 cx18_av_write(cx, 0x47e, 0xff & sc >> 16); 520 cx18_av_write(cx, 0x47e, (sc >> 16) & 0xff);
521 521
522 if (std & V4L2_STD_625_50) { 522 if (std & V4L2_STD_625_50) {
523 state->slicer_line_delay = 1; 523 state->slicer_line_delay = 1;