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authorDevin Heitmueller <dheitmueller@linuxtv.org>2009-03-15 17:48:52 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2009-03-30 11:43:27 -0400
commit62899a28008d635f25c3408b4cc46021f0cb34d3 (patch)
treec5c92a3617aecbfb2cfe4d964b2a8bda37652d46 /drivers/media/dvb
parent3d62287e2c6c5b3351e04dd2c2209b2536995fdb (diff)
V4L/DVB (11085): au0828/au8522: Codingstyle fixes
Take a pass over all of the au0828/au8522 files and cleanup all the codingstyle issues. This patch does not make *any* functional change to the code. Signed-off-by: Devin Heitmueller <dheitmueller@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb')
-rw-r--r--drivers/media/dvb/frontends/au8522_decoder.c233
-rw-r--r--drivers/media/dvb/frontends/au8522_dig.c14
2 files changed, 126 insertions, 121 deletions
diff --git a/drivers/media/dvb/frontends/au8522_decoder.c b/drivers/media/dvb/frontends/au8522_decoder.c
index 564636389bae..2ad84c236ec7 100644
--- a/drivers/media/dvb/frontends/au8522_decoder.c
+++ b/drivers/media/dvb/frontends/au8522_decoder.c
@@ -67,39 +67,40 @@ struct au8522_register_config {
67 0="ATV RF" 1="ATV RF13" 2="CVBS" 3="S-Video" 4="PAL" 5=CVBS13" 6="SVideo13" 67 0="ATV RF" 1="ATV RF13" 2="CVBS" 3="S-Video" 4="PAL" 5=CVBS13" 6="SVideo13"
68*/ 68*/
69struct au8522_register_config filter_coef[] = { 69struct au8522_register_config filter_coef[] = {
70 {AU8522_FILTER_COEF_R410, {0x25, 0x00, 0x25, 0x25, 0x00, 0x00, 0x00}}, 70 {AU8522_FILTER_COEF_R410, {0x25, 0x00, 0x25, 0x25, 0x00, 0x00, 0x00} },
71 {AU8522_FILTER_COEF_R411, {0x20, 0x00, 0x20, 0x20, 0x00, 0x00, 0x00}}, 71 {AU8522_FILTER_COEF_R411, {0x20, 0x00, 0x20, 0x20, 0x00, 0x00, 0x00} },
72 {AU8522_FILTER_COEF_R412, {0x03, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00}}, 72 {AU8522_FILTER_COEF_R412, {0x03, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00} },
73 {AU8522_FILTER_COEF_R413, {0xe6, 0x00, 0xe6, 0xe6, 0x00, 0x00, 0x00}}, 73 {AU8522_FILTER_COEF_R413, {0xe6, 0x00, 0xe6, 0xe6, 0x00, 0x00, 0x00} },
74 {AU8522_FILTER_COEF_R414, {0x40, 0x00, 0x40, 0x40, 0x00, 0x00, 0x00}}, 74 {AU8522_FILTER_COEF_R414, {0x40, 0x00, 0x40, 0x40, 0x00, 0x00, 0x00} },
75 {AU8522_FILTER_COEF_R415, {0x1b, 0x00, 0x1b, 0x1b, 0x00, 0x00, 0x00}}, 75 {AU8522_FILTER_COEF_R415, {0x1b, 0x00, 0x1b, 0x1b, 0x00, 0x00, 0x00} },
76 {AU8522_FILTER_COEF_R416, {0xc0, 0x00, 0xc0, 0x04, 0x00, 0x00, 0x00}}, 76 {AU8522_FILTER_COEF_R416, {0xc0, 0x00, 0xc0, 0x04, 0x00, 0x00, 0x00} },
77 {AU8522_FILTER_COEF_R417, {0x04, 0x00, 0x04, 0x04, 0x00, 0x00, 0x00}}, 77 {AU8522_FILTER_COEF_R417, {0x04, 0x00, 0x04, 0x04, 0x00, 0x00, 0x00} },
78 {AU8522_FILTER_COEF_R418, {0x8c, 0x00, 0x8c, 0x8c, 0x00, 0x00, 0x00}}, 78 {AU8522_FILTER_COEF_R418, {0x8c, 0x00, 0x8c, 0x8c, 0x00, 0x00, 0x00} },
79 {AU8522_FILTER_COEF_R419, {0xa0, 0x40, 0xa0, 0xa0, 0x40, 0x40, 0x40}}, 79 {AU8522_FILTER_COEF_R419, {0xa0, 0x40, 0xa0, 0xa0, 0x40, 0x40, 0x40} },
80 {AU8522_FILTER_COEF_R41A, {0x21, 0x09, 0x21, 0x21, 0x09, 0x09, 0x09}}, 80 {AU8522_FILTER_COEF_R41A, {0x21, 0x09, 0x21, 0x21, 0x09, 0x09, 0x09} },
81 {AU8522_FILTER_COEF_R41B, {0x6c, 0x38, 0x6c, 0x6c, 0x38, 0x38, 0x38}}, 81 {AU8522_FILTER_COEF_R41B, {0x6c, 0x38, 0x6c, 0x6c, 0x38, 0x38, 0x38} },
82 {AU8522_FILTER_COEF_R41C, {0x03, 0xff, 0x03, 0x03, 0xff, 0xff, 0xff}}, 82 {AU8522_FILTER_COEF_R41C, {0x03, 0xff, 0x03, 0x03, 0xff, 0xff, 0xff} },
83 {AU8522_FILTER_COEF_R41D, {0xbf, 0xc7, 0xbf, 0xbf, 0xc7, 0xc7, 0xc7}}, 83 {AU8522_FILTER_COEF_R41D, {0xbf, 0xc7, 0xbf, 0xbf, 0xc7, 0xc7, 0xc7} },
84 {AU8522_FILTER_COEF_R41E, {0xa0, 0xdf, 0xa0, 0xa0, 0xdf, 0xdf, 0xdf}}, 84 {AU8522_FILTER_COEF_R41E, {0xa0, 0xdf, 0xa0, 0xa0, 0xdf, 0xdf, 0xdf} },
85 {AU8522_FILTER_COEF_R41F, {0x10, 0x06, 0x10, 0x10, 0x06, 0x06, 0x06}}, 85 {AU8522_FILTER_COEF_R41F, {0x10, 0x06, 0x10, 0x10, 0x06, 0x06, 0x06} },
86 {AU8522_FILTER_COEF_R420, {0xae, 0x30, 0xae, 0xae, 0x30, 0x30, 0x30}}, 86 {AU8522_FILTER_COEF_R420, {0xae, 0x30, 0xae, 0xae, 0x30, 0x30, 0x30} },
87 {AU8522_FILTER_COEF_R421, {0xc4, 0x01, 0xc4, 0xc4, 0x01, 0x01, 0x01}}, 87 {AU8522_FILTER_COEF_R421, {0xc4, 0x01, 0xc4, 0xc4, 0x01, 0x01, 0x01} },
88 {AU8522_FILTER_COEF_R422, {0x54, 0xdd, 0x54, 0x54, 0xdd, 0xdd, 0xdd}}, 88 {AU8522_FILTER_COEF_R422, {0x54, 0xdd, 0x54, 0x54, 0xdd, 0xdd, 0xdd} },
89 {AU8522_FILTER_COEF_R423, {0xd0, 0xaf, 0xd0, 0xd0, 0xaf, 0xaf, 0xaf}}, 89 {AU8522_FILTER_COEF_R423, {0xd0, 0xaf, 0xd0, 0xd0, 0xaf, 0xaf, 0xaf} },
90 {AU8522_FILTER_COEF_R424, {0x1c, 0xf7, 0x1c, 0x1c, 0xf7, 0xf7, 0xf7}}, 90 {AU8522_FILTER_COEF_R424, {0x1c, 0xf7, 0x1c, 0x1c, 0xf7, 0xf7, 0xf7} },
91 {AU8522_FILTER_COEF_R425, {0x76, 0xdb, 0x76, 0x76, 0xdb, 0xdb, 0xdb}}, 91 {AU8522_FILTER_COEF_R425, {0x76, 0xdb, 0x76, 0x76, 0xdb, 0xdb, 0xdb} },
92 {AU8522_FILTER_COEF_R426, {0x61, 0xc0, 0x61, 0x61, 0xc0, 0xc0, 0xc0}}, 92 {AU8522_FILTER_COEF_R426, {0x61, 0xc0, 0x61, 0x61, 0xc0, 0xc0, 0xc0} },
93 {AU8522_FILTER_COEF_R427, {0xd1, 0x2f, 0xd1, 0xd1, 0x2f, 0x2f, 0x2f}}, 93 {AU8522_FILTER_COEF_R427, {0xd1, 0x2f, 0xd1, 0xd1, 0x2f, 0x2f, 0x2f} },
94 {AU8522_FILTER_COEF_R428, {0x84, 0xd8, 0x84, 0x84, 0xd8, 0xd8, 0xd8}}, 94 {AU8522_FILTER_COEF_R428, {0x84, 0xd8, 0x84, 0x84, 0xd8, 0xd8, 0xd8} },
95 {AU8522_FILTER_COEF_R429, {0x06, 0xfb, 0x06, 0x06, 0xfb, 0xfb, 0xfb}}, 95 {AU8522_FILTER_COEF_R429, {0x06, 0xfb, 0x06, 0x06, 0xfb, 0xfb, 0xfb} },
96 {AU8522_FILTER_COEF_R42A, {0x21, 0xd5, 0x21, 0x21, 0xd5, 0xd5, 0xd5}}, 96 {AU8522_FILTER_COEF_R42A, {0x21, 0xd5, 0x21, 0x21, 0xd5, 0xd5, 0xd5} },
97 {AU8522_FILTER_COEF_R42B, {0x0a, 0x3e, 0x0a, 0x0a, 0x3e, 0x3e, 0x3e}}, 97 {AU8522_FILTER_COEF_R42B, {0x0a, 0x3e, 0x0a, 0x0a, 0x3e, 0x3e, 0x3e} },
98 {AU8522_FILTER_COEF_R42C, {0xe6, 0x15, 0xe6, 0xe6, 0x15, 0x15, 0x15}}, 98 {AU8522_FILTER_COEF_R42C, {0xe6, 0x15, 0xe6, 0xe6, 0x15, 0x15, 0x15} },
99 {AU8522_FILTER_COEF_R42D, {0x01, 0x34, 0x01, 0x01, 0x34, 0x34, 0x34}}, 99 {AU8522_FILTER_COEF_R42D, {0x01, 0x34, 0x01, 0x01, 0x34, 0x34, 0x34} },
100 100
101}; 101};
102#define NUM_FILTER_COEF (sizeof (filter_coef) / sizeof(struct au8522_register_config)) 102#define NUM_FILTER_COEF (sizeof(filter_coef)\
103 / sizeof(struct au8522_register_config))
103 104
104 105
105/* Registers 0x060b through 0x0652 are the LP Filter coefficients 106/* Registers 0x060b through 0x0652 are the LP Filter coefficients
@@ -108,80 +109,81 @@ struct au8522_register_config filter_coef[] = {
108 Note: the "ATVRF/ATVRF13" mode has never been tested 109 Note: the "ATVRF/ATVRF13" mode has never been tested
109*/ 110*/
110struct au8522_register_config lpfilter_coef[] = { 111struct au8522_register_config lpfilter_coef[] = {
111 {0x060b, {0x21, 0x0b}}, 112 {0x060b, {0x21, 0x0b} },
112 {0x060c, {0xad, 0xad}}, 113 {0x060c, {0xad, 0xad} },
113 {0x060d, {0x70, 0xf0}}, 114 {0x060d, {0x70, 0xf0} },
114 {0x060e, {0xea, 0xe9}}, 115 {0x060e, {0xea, 0xe9} },
115 {0x060f, {0xdd, 0xdd}}, 116 {0x060f, {0xdd, 0xdd} },
116 {0x0610, {0x08, 0x64}}, 117 {0x0610, {0x08, 0x64} },
117 {0x0611, {0x60, 0x60}}, 118 {0x0611, {0x60, 0x60} },
118 {0x0612, {0xf8, 0xb2}}, 119 {0x0612, {0xf8, 0xb2} },
119 {0x0613, {0x01, 0x02}}, 120 {0x0613, {0x01, 0x02} },
120 {0x0614, {0xe4, 0xb4}}, 121 {0x0614, {0xe4, 0xb4} },
121 {0x0615, {0x19, 0x02}}, 122 {0x0615, {0x19, 0x02} },
122 {0x0616, {0xae, 0x2e}}, 123 {0x0616, {0xae, 0x2e} },
123 {0x0617, {0xee, 0xc5}}, 124 {0x0617, {0xee, 0xc5} },
124 {0x0618, {0x56, 0x56}}, 125 {0x0618, {0x56, 0x56} },
125 {0x0619, {0x30, 0x58}}, 126 {0x0619, {0x30, 0x58} },
126 {0x061a, {0xf9, 0xf8}}, 127 {0x061a, {0xf9, 0xf8} },
127 {0x061b, {0x24, 0x64}}, 128 {0x061b, {0x24, 0x64} },
128 {0x061c, {0x07, 0x07}}, 129 {0x061c, {0x07, 0x07} },
129 {0x061d, {0x30, 0x30}}, 130 {0x061d, {0x30, 0x30} },
130 {0x061e, {0xa9, 0xed}}, 131 {0x061e, {0xa9, 0xed} },
131 {0x061f, {0x09, 0x0b}}, 132 {0x061f, {0x09, 0x0b} },
132 {0x0620, {0x42, 0xc2}}, 133 {0x0620, {0x42, 0xc2} },
133 {0x0621, {0x1d, 0x2a}}, 134 {0x0621, {0x1d, 0x2a} },
134 {0x0622, {0xd6, 0x56}}, 135 {0x0622, {0xd6, 0x56} },
135 {0x0623, {0x95, 0x8b}}, 136 {0x0623, {0x95, 0x8b} },
136 {0x0624, {0x2b, 0x2b}}, 137 {0x0624, {0x2b, 0x2b} },
137 {0x0625, {0x30, 0x24}}, 138 {0x0625, {0x30, 0x24} },
138 {0x0626, {0x3e, 0x3e}}, 139 {0x0626, {0x3e, 0x3e} },
139 {0x0627, {0x62, 0xe2}}, 140 {0x0627, {0x62, 0xe2} },
140 {0x0628, {0xe9, 0xf5}}, 141 {0x0628, {0xe9, 0xf5} },
141 {0x0629, {0x99, 0x19}}, 142 {0x0629, {0x99, 0x19} },
142 {0x062a, {0xd4, 0x11}}, 143 {0x062a, {0xd4, 0x11} },
143 {0x062b, {0x03, 0x04}}, 144 {0x062b, {0x03, 0x04} },
144 {0x062c, {0xb5, 0x85}}, 145 {0x062c, {0xb5, 0x85} },
145 {0x062d, {0x1e, 0x20}}, 146 {0x062d, {0x1e, 0x20} },
146 {0x062e, {0x2a, 0xea}}, 147 {0x062e, {0x2a, 0xea} },
147 {0x062f, {0xd7, 0xd2}}, 148 {0x062f, {0xd7, 0xd2} },
148 {0x0630, {0x15, 0x15}}, 149 {0x0630, {0x15, 0x15} },
149 {0x0631, {0xa3, 0xa9}}, 150 {0x0631, {0xa3, 0xa9} },
150 {0x0632, {0x1f, 0x1f}}, 151 {0x0632, {0x1f, 0x1f} },
151 {0x0633, {0xf9, 0xd1}}, 152 {0x0633, {0xf9, 0xd1} },
152 {0x0634, {0xc0, 0xc3}}, 153 {0x0634, {0xc0, 0xc3} },
153 {0x0635, {0x4d, 0x8d}}, 154 {0x0635, {0x4d, 0x8d} },
154 {0x0636, {0x21, 0x31}}, 155 {0x0636, {0x21, 0x31} },
155 {0x0637, {0x83, 0x83}}, 156 {0x0637, {0x83, 0x83} },
156 {0x0638, {0x08, 0x8c}}, 157 {0x0638, {0x08, 0x8c} },
157 {0x0639, {0x19, 0x19}}, 158 {0x0639, {0x19, 0x19} },
158 {0x063a, {0x45, 0xa5}}, 159 {0x063a, {0x45, 0xa5} },
159 {0x063b, {0xef, 0xec}}, 160 {0x063b, {0xef, 0xec} },
160 {0x063c, {0x8a, 0x8a}}, 161 {0x063c, {0x8a, 0x8a} },
161 {0x063d, {0xf4, 0xf6}}, 162 {0x063d, {0xf4, 0xf6} },
162 {0x063e, {0x8f, 0x8f}}, 163 {0x063e, {0x8f, 0x8f} },
163 {0x063f, {0x44, 0x0c}}, 164 {0x063f, {0x44, 0x0c} },
164 {0x0640, {0xef, 0xf0}}, 165 {0x0640, {0xef, 0xf0} },
165 {0x0641, {0x66, 0x66}}, 166 {0x0641, {0x66, 0x66} },
166 {0x0642, {0xcc, 0xd2}}, 167 {0x0642, {0xcc, 0xd2} },
167 {0x0643, {0x41, 0x41}}, 168 {0x0643, {0x41, 0x41} },
168 {0x0644, {0x63, 0x93}}, 169 {0x0644, {0x63, 0x93} },
169 {0x0645, {0x8e, 0x8e}}, 170 {0x0645, {0x8e, 0x8e} },
170 {0x0646, {0xa2, 0x42}}, 171 {0x0646, {0xa2, 0x42} },
171 {0x0647, {0x7b, 0x7b}}, 172 {0x0647, {0x7b, 0x7b} },
172 {0x0648, {0x04, 0x04}}, 173 {0x0648, {0x04, 0x04} },
173 {0x0649, {0x00, 0x00}}, 174 {0x0649, {0x00, 0x00} },
174 {0x064a, {0x40, 0x40}}, 175 {0x064a, {0x40, 0x40} },
175 {0x064b, {0x8c, 0x98}}, 176 {0x064b, {0x8c, 0x98} },
176 {0x064c, {0x00, 0x00}}, 177 {0x064c, {0x00, 0x00} },
177 {0x064d, {0x63, 0xc3}}, 178 {0x064d, {0x63, 0xc3} },
178 {0x064e, {0x04, 0x04}}, 179 {0x064e, {0x04, 0x04} },
179 {0x064f, {0x20, 0x20}}, 180 {0x064f, {0x20, 0x20} },
180 {0x0650, {0x00, 0x00}}, 181 {0x0650, {0x00, 0x00} },
181 {0x0651, {0x40 ,0x40}}, 182 {0x0651, {0x40, 0x40} },
182 {0x0652, {0x01, 0x01}}, 183 {0x0652, {0x01, 0x01} },
183}; 184};
184#define NUM_LPFILTER_COEF (sizeof (lpfilter_coef) / sizeof(struct au8522_register_config)) 185#define NUM_LPFILTER_COEF (sizeof(lpfilter_coef)\
186 / sizeof(struct au8522_register_config))
185 187
186static inline struct au8522_state *to_state(struct v4l2_subdev *sd) 188static inline struct au8522_state *to_state(struct v4l2_subdev *sd)
187{ 189{
@@ -202,14 +204,17 @@ static void setup_vbi(struct au8522_state *state, int aud_input)
202 au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_PAT2_REG01EH, 0x00); 204 au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_PAT2_REG01EH, 0x00);
203 au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_PAT1_REG01FH, 0x00); 205 au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_PAT1_REG01FH, 0x00);
204 au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_PAT0_REG020H, 0x00); 206 au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_PAT0_REG020H, 0x00);
205 au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_MASK2_REG021H,0x00); 207 au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_MASK2_REG021H,
206 au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_MASK1_REG022H,0x00); 208 0x00);
207 au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_MASK0_REG023H,0x00); 209 au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_MASK1_REG022H,
210 0x00);
211 au8522_writereg(state, AU8522_TVDEC_VBI_USER_FRAME_MASK0_REG023H,
212 0x00);
208 213
209 /* Setup the VBI registers */ 214 /* Setup the VBI registers */
210 for (i = 0x30; i < 0x60; i++) { 215 for (i = 0x30; i < 0x60; i++)
211 au8522_writereg(state, i, 0x40); 216 au8522_writereg(state, i, 0x40);
212 } 217
213 /* For some reason, every register is 0x40 except register 0x44 218 /* For some reason, every register is 0x40 except register 0x44
214 (confirmed via the HVR-950q USB capture) */ 219 (confirmed via the HVR-950q USB capture) */
215 au8522_writereg(state, 0x44, 0x60); 220 au8522_writereg(state, 0x44, 0x60);
@@ -448,7 +453,7 @@ static void set_audio_input(struct au8522_state *state, int aud_input)
448 453
449 if (aud_input != AU8522_AUDIO_SIF) { 454 if (aud_input != AU8522_AUDIO_SIF) {
450 /* The caller asked for a mode we don't currently support */ 455 /* The caller asked for a mode we don't currently support */
451 printk("Unsupported audio mode requested! mode=%d\n", 456 printk(KERN_ERR "Unsupported audio mode requested! mode=%d\n",
452 aud_input); 457 aud_input);
453 return; 458 return;
454 } 459 }
@@ -668,7 +673,7 @@ static int au8522_s_video_routing(struct v4l2_subdev *sd,
668 } else if (route->input == AU8522_COMPOSITE_CH4_SIF) { 673 } else if (route->input == AU8522_COMPOSITE_CH4_SIF) {
669 au8522_setup_cvbs_tuner_mode(state); 674 au8522_setup_cvbs_tuner_mode(state);
670 } else { 675 } else {
671 printk("au8522 mode not currently supported\n"); 676 printk(KERN_ERR "au8522 mode not currently supported\n");
672 return -EINVAL; 677 return -EINVAL;
673 } 678 }
674 return 0; 679 return 0;
@@ -782,15 +787,15 @@ static int au8522_probe(struct i2c_client *client,
782 instance = au8522_get_state(&state, client->adapter, client->addr); 787 instance = au8522_get_state(&state, client->adapter, client->addr);
783 switch (instance) { 788 switch (instance) {
784 case 0: 789 case 0:
785 printk("au8522_decoder allocation failed\n"); 790 printk(KERN_ERR "au8522_decoder allocation failed\n");
786 return -EIO; 791 return -EIO;
787 case 1: 792 case 1:
788 /* new demod instance */ 793 /* new demod instance */
789 printk("au8522_decoder creating new instance...\n"); 794 printk(KERN_INFO "au8522_decoder creating new instance...\n");
790 break; 795 break;
791 default: 796 default:
792 /* existing demod instance */ 797 /* existing demod instance */
793 printk("au8522_decoder attaching to existing instance...\n"); 798 printk(KERN_INFO "au8522_decoder attach existing instance.\n");
794 break; 799 break;
795 } 800 }
796 801
diff --git a/drivers/media/dvb/frontends/au8522_dig.c b/drivers/media/dvb/frontends/au8522_dig.c
index 7e24b914dbe5..35731258bb0a 100644
--- a/drivers/media/dvb/frontends/au8522_dig.c
+++ b/drivers/media/dvb/frontends/au8522_dig.c
@@ -36,16 +36,16 @@ static int debug;
36static LIST_HEAD(hybrid_tuner_instance_list); 36static LIST_HEAD(hybrid_tuner_instance_list);
37static DEFINE_MUTEX(au8522_list_mutex); 37static DEFINE_MUTEX(au8522_list_mutex);
38 38
39#define dprintk(arg...) do { \ 39#define dprintk(arg...)\
40 if (debug) \ 40 do { if (debug)\
41 printk(arg); \ 41 printk(arg);\
42 } while (0) 42 } while (0)
43 43
44/* 16 bit registers, 8 bit values */ 44/* 16 bit registers, 8 bit values */
45int au8522_writereg(struct au8522_state *state, u16 reg, u8 data) 45int au8522_writereg(struct au8522_state *state, u16 reg, u8 data)
46{ 46{
47 int ret; 47 int ret;
48 u8 buf [] = { (reg >> 8) | 0x80, reg & 0xff, data }; 48 u8 buf[] = { (reg >> 8) | 0x80, reg & 0xff, data };
49 49
50 struct i2c_msg msg = { .addr = state->config->demod_address, 50 struct i2c_msg msg = { .addr = state->config->demod_address,
51 .flags = 0, .buf = buf, .len = 3 }; 51 .flags = 0, .buf = buf, .len = 3 };
@@ -62,10 +62,10 @@ int au8522_writereg(struct au8522_state *state, u16 reg, u8 data)
62u8 au8522_readreg(struct au8522_state *state, u16 reg) 62u8 au8522_readreg(struct au8522_state *state, u16 reg)
63{ 63{
64 int ret; 64 int ret;
65 u8 b0 [] = { (reg >> 8) | 0x40, reg & 0xff }; 65 u8 b0[] = { (reg >> 8) | 0x40, reg & 0xff };
66 u8 b1 [] = { 0 }; 66 u8 b1[] = { 0 };
67 67
68 struct i2c_msg msg [] = { 68 struct i2c_msg msg[] = {
69 { .addr = state->config->demod_address, .flags = 0, 69 { .addr = state->config->demod_address, .flags = 0,
70 .buf = b0, .len = 2 }, 70 .buf = b0, .len = 2 },
71 { .addr = state->config->demod_address, .flags = I2C_M_RD, 71 { .addr = state->config->demod_address, .flags = I2C_M_RD,