diff options
author | Devin Heitmueller <dheitmueller@kernellabs.com> | 2012-08-06 21:46:51 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-08-09 19:29:15 -0400 |
commit | a307cfa55e2bf7889792e158e45355ccb1e63d80 (patch) | |
tree | 2a9e4ec3afb2535d04617c4b093edcc0a5873b50 /drivers/media/dvb | |
parent | cf5337358548b813479b58478539fc20ee86556c (diff) |
[media] au8522: fix intermittent lockup of analog video decoder
It turns up the autodetection for the video standard in the au8522 is
prone to hanging the chip until a reset is performed. This condition is
trivial to reproduce simply by tuning to a station and then rapidly
unplugging/ replugging the coax feed.
Because we've never claimed to support anything other than NTSC-M, just
disable the video-standard autodetection logic and force it to always be
NTSC-M.
Signed-off-by: Devin Heitmueller <dheitmueller@kernellabs.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb')
-rw-r--r-- | drivers/media/dvb/frontends/au8522_decoder.c | 6 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/au8522_priv.h | 28 |
2 files changed, 29 insertions, 5 deletions
diff --git a/drivers/media/dvb/frontends/au8522_decoder.c b/drivers/media/dvb/frontends/au8522_decoder.c index 55b6390198e3..f2e786b606fd 100644 --- a/drivers/media/dvb/frontends/au8522_decoder.c +++ b/drivers/media/dvb/frontends/au8522_decoder.c | |||
@@ -257,9 +257,11 @@ static void setup_decoder_defaults(struct au8522_state *state, u8 input_mode) | |||
257 | au8522_writereg(state, AU8522_TVDED_DBG_MODE_REG060H, | 257 | au8522_writereg(state, AU8522_TVDED_DBG_MODE_REG060H, |
258 | AU8522_TVDED_DBG_MODE_REG060H_CVBS); | 258 | AU8522_TVDED_DBG_MODE_REG060H_CVBS); |
259 | au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL1_REG061H, | 259 | au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL1_REG061H, |
260 | AU8522_TVDEC_FORMAT_CTRL1_REG061H_CVBS13); | 260 | AU8522_TVDEC_FORMAT_CTRL1_REG061H_FIELD_LEN_525 | |
261 | AU8522_TVDEC_FORMAT_CTRL1_REG061H_LINE_LEN_63_492 | | ||
262 | AU8522_TVDEC_FORMAT_CTRL1_REG061H_SUBCARRIER_NTSC_MN); | ||
261 | au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL2_REG062H, | 263 | au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL2_REG062H, |
262 | AU8522_TVDEC_FORMAT_CTRL2_REG062H_CVBS13); | 264 | AU8522_TVDEC_FORMAT_CTRL2_REG062H_STD_NTSC); |
263 | au8522_writereg(state, AU8522_TVDEC_VCR_DET_LLIM_REG063H, | 265 | au8522_writereg(state, AU8522_TVDEC_VCR_DET_LLIM_REG063H, |
264 | AU8522_TVDEC_VCR_DET_LLIM_REG063H_CVBS); | 266 | AU8522_TVDEC_VCR_DET_LLIM_REG063H_CVBS); |
265 | au8522_writereg(state, AU8522_TVDEC_VCR_DET_HLIM_REG064H, | 267 | au8522_writereg(state, AU8522_TVDEC_VCR_DET_HLIM_REG064H, |
diff --git a/drivers/media/dvb/frontends/au8522_priv.h b/drivers/media/dvb/frontends/au8522_priv.h index 6e4a438732b5..9f44a7be3148 100644 --- a/drivers/media/dvb/frontends/au8522_priv.h +++ b/drivers/media/dvb/frontends/au8522_priv.h | |||
@@ -325,6 +325,31 @@ int au8522_led_ctrl(struct au8522_state *state, int led); | |||
325 | 325 | ||
326 | /**************************************************************/ | 326 | /**************************************************************/ |
327 | 327 | ||
328 | /* Format control 1 */ | ||
329 | |||
330 | /* VCR Mode 7-6 */ | ||
331 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_VCR_MODE_YES 0x80 | ||
332 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_VCR_MODE_NO 0x40 | ||
333 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_VCR_MODE_AUTO 0x00 | ||
334 | /* Field len 5-4 */ | ||
335 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_FIELD_LEN_625 0x20 | ||
336 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_FIELD_LEN_525 0x10 | ||
337 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_FIELD_LEN_AUTO 0x00 | ||
338 | /* Line len (us) 3-2 */ | ||
339 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_LINE_LEN_64_000 0x0b | ||
340 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_LINE_LEN_63_492 0x08 | ||
341 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_LINE_LEN_63_556 0x04 | ||
342 | /* Subcarrier freq 1-0 */ | ||
343 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_SUBCARRIER_NTSC_AUTO 0x03 | ||
344 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_SUBCARRIER_NTSC_443 0x02 | ||
345 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_SUBCARRIER_NTSC_MN 0x01 | ||
346 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_SUBCARRIER_NTSC_50 0x00 | ||
347 | |||
348 | /* Format control 2 */ | ||
349 | #define AU8522_TVDEC_FORMAT_CTRL2_REG062H_STD_AUTODETECT 0x00 | ||
350 | #define AU8522_TVDEC_FORMAT_CTRL2_REG062H_STD_NTSC 0x01 | ||
351 | |||
352 | |||
328 | #define AU8522_INPUT_CONTROL_REG081H_ATSC 0xC4 | 353 | #define AU8522_INPUT_CONTROL_REG081H_ATSC 0xC4 |
329 | #define AU8522_INPUT_CONTROL_REG081H_ATVRF 0xC4 | 354 | #define AU8522_INPUT_CONTROL_REG081H_ATVRF 0xC4 |
330 | #define AU8522_INPUT_CONTROL_REG081H_ATVRF13 0xC4 | 355 | #define AU8522_INPUT_CONTROL_REG081H_ATVRF13 0xC4 |
@@ -385,9 +410,6 @@ int au8522_led_ctrl(struct au8522_state *state, int led); | |||
385 | #define AU8522_TVDEC_COMB_MODE_REG015H_CVBS 0x00 | 410 | #define AU8522_TVDEC_COMB_MODE_REG015H_CVBS 0x00 |
386 | #define AU8522_REG016H_CVBS 0x00 | 411 | #define AU8522_REG016H_CVBS 0x00 |
387 | #define AU8522_TVDED_DBG_MODE_REG060H_CVBS 0x00 | 412 | #define AU8522_TVDED_DBG_MODE_REG060H_CVBS 0x00 |
388 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_CVBS 0x0B | ||
389 | #define AU8522_TVDEC_FORMAT_CTRL1_REG061H_CVBS13 0x03 | ||
390 | #define AU8522_TVDEC_FORMAT_CTRL2_REG062H_CVBS13 0x00 | ||
391 | #define AU8522_TVDEC_VCR_DET_LLIM_REG063H_CVBS 0x19 | 413 | #define AU8522_TVDEC_VCR_DET_LLIM_REG063H_CVBS 0x19 |
392 | #define AU8522_REG0F9H_AUDIO 0x20 | 414 | #define AU8522_REG0F9H_AUDIO 0x20 |
393 | #define AU8522_TVDEC_VCR_DET_HLIM_REG064H_CVBS 0xA7 | 415 | #define AU8522_TVDEC_VCR_DET_HLIM_REG064H_CVBS 0xA7 |