diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/media/dvb/ttpci/av7110_hw.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'drivers/media/dvb/ttpci/av7110_hw.h')
-rw-r--r-- | drivers/media/dvb/ttpci/av7110_hw.h | 500 |
1 files changed, 500 insertions, 0 deletions
diff --git a/drivers/media/dvb/ttpci/av7110_hw.h b/drivers/media/dvb/ttpci/av7110_hw.h new file mode 100644 index 000000000000..bf901c624682 --- /dev/null +++ b/drivers/media/dvb/ttpci/av7110_hw.h | |||
@@ -0,0 +1,500 @@ | |||
1 | #ifndef _AV7110_HW_H_ | ||
2 | #define _AV7110_HW_H_ | ||
3 | |||
4 | #include "av7110.h" | ||
5 | |||
6 | /* DEBI transfer mode defs */ | ||
7 | |||
8 | #define DEBINOSWAP 0x000e0000 | ||
9 | #define DEBISWAB 0x001e0000 | ||
10 | #define DEBISWAP 0x002e0000 | ||
11 | |||
12 | #define ARM_WAIT_FREE (HZ) | ||
13 | #define ARM_WAIT_SHAKE (HZ/5) | ||
14 | #define ARM_WAIT_OSD (HZ) | ||
15 | |||
16 | |||
17 | enum av7110_bootstate | ||
18 | { | ||
19 | BOOTSTATE_BUFFER_EMPTY = 0, | ||
20 | BOOTSTATE_BUFFER_FULL = 1, | ||
21 | BOOTSTATE_BOOT_COMPLETE = 2 | ||
22 | }; | ||
23 | |||
24 | enum av7110_type_rec_play_format | ||
25 | { RP_None, | ||
26 | AudioPES, | ||
27 | AudioMp2, | ||
28 | AudioPCM, | ||
29 | VideoPES, | ||
30 | AV_PES | ||
31 | }; | ||
32 | |||
33 | enum av7110_osd_palette_type | ||
34 | { | ||
35 | NoPalet = 0, /* No palette */ | ||
36 | Pal1Bit = 2, /* 2 colors for 1 Bit Palette */ | ||
37 | Pal2Bit = 4, /* 4 colors for 2 bit palette */ | ||
38 | Pal4Bit = 16, /* 16 colors for 4 bit palette */ | ||
39 | Pal8Bit = 256 /* 256 colors for 16 bit palette */ | ||
40 | }; | ||
41 | |||
42 | /* switch defines */ | ||
43 | #define SB_GPIO 3 | ||
44 | #define SB_OFF SAA7146_GPIO_OUTLO /* SlowBlank off (TV-Mode) */ | ||
45 | #define SB_ON SAA7146_GPIO_INPUT /* SlowBlank on (AV-Mode) */ | ||
46 | #define SB_WIDE SAA7146_GPIO_OUTHI /* SlowBlank 6V (16/9-Mode) (not implemented) */ | ||
47 | |||
48 | #define FB_GPIO 1 | ||
49 | #define FB_OFF SAA7146_GPIO_LO /* FastBlank off (CVBS-Mode) */ | ||
50 | #define FB_ON SAA7146_GPIO_OUTHI /* FastBlank on (RGB-Mode) */ | ||
51 | #define FB_LOOP SAA7146_GPIO_INPUT /* FastBlank loop-through (PC graphics ???) */ | ||
52 | |||
53 | enum av7110_video_output_mode | ||
54 | { | ||
55 | NO_OUT = 0, /* disable analog output */ | ||
56 | CVBS_RGB_OUT = 1, | ||
57 | CVBS_YC_OUT = 2, | ||
58 | YC_OUT = 3 | ||
59 | }; | ||
60 | |||
61 | /* firmware internal msg q status: */ | ||
62 | #define GPMQFull 0x0001 /* Main Message Queue Full */ | ||
63 | #define GPMQOver 0x0002 /* Main Message Queue Overflow */ | ||
64 | #define HPQFull 0x0004 /* High Priority Msg Queue Full */ | ||
65 | #define HPQOver 0x0008 | ||
66 | #define OSDQFull 0x0010 /* OSD Queue Full */ | ||
67 | #define OSDQOver 0x0020 | ||
68 | #define GPMQBusy 0x0040 /* Queue not empty, FW >= 261d */ | ||
69 | #define HPQBusy 0x0080 | ||
70 | #define OSDQBusy 0x0100 | ||
71 | |||
72 | /* hw section filter flags */ | ||
73 | #define SECTION_EIT 0x01 | ||
74 | #define SECTION_SINGLE 0x00 | ||
75 | #define SECTION_CYCLE 0x02 | ||
76 | #define SECTION_CONTINUOS 0x04 | ||
77 | #define SECTION_MODE 0x06 | ||
78 | #define SECTION_IPMPE 0x0C /* size up to 4k */ | ||
79 | #define SECTION_HIGH_SPEED 0x1C /* larger buffer */ | ||
80 | #define DATA_PIPING_FLAG 0x20 /* for Data Piping Filter */ | ||
81 | |||
82 | #define PBUFSIZE_NONE 0x0000 | ||
83 | #define PBUFSIZE_1P 0x0100 | ||
84 | #define PBUFSIZE_2P 0x0200 | ||
85 | #define PBUFSIZE_1K 0x0300 | ||
86 | #define PBUFSIZE_2K 0x0400 | ||
87 | #define PBUFSIZE_4K 0x0500 | ||
88 | #define PBUFSIZE_8K 0x0600 | ||
89 | #define PBUFSIZE_16K 0x0700 | ||
90 | #define PBUFSIZE_32K 0x0800 | ||
91 | |||
92 | |||
93 | /* firmware command codes */ | ||
94 | enum av7110_osd_command { | ||
95 | WCreate, | ||
96 | WDestroy, | ||
97 | WMoveD, | ||
98 | WMoveA, | ||
99 | WHide, | ||
100 | WTop, | ||
101 | DBox, | ||
102 | DLine, | ||
103 | DText, | ||
104 | Set_Font, | ||
105 | SetColor, | ||
106 | SetBlend, | ||
107 | SetWBlend, | ||
108 | SetCBlend, | ||
109 | SetNonBlend, | ||
110 | LoadBmp, | ||
111 | BlitBmp, | ||
112 | ReleaseBmp, | ||
113 | SetWTrans, | ||
114 | SetWNoTrans, | ||
115 | Set_Palette | ||
116 | }; | ||
117 | |||
118 | enum av7110_pid_command { | ||
119 | MultiPID, | ||
120 | VideoPID, | ||
121 | AudioPID, | ||
122 | InitFilt, | ||
123 | FiltError, | ||
124 | NewVersion, | ||
125 | CacheError, | ||
126 | AddPIDFilter, | ||
127 | DelPIDFilter, | ||
128 | Scan, | ||
129 | SetDescr, | ||
130 | SetIR, | ||
131 | FlushTSQueue | ||
132 | }; | ||
133 | |||
134 | enum av7110_mpeg_command { | ||
135 | SelAudChannels | ||
136 | }; | ||
137 | |||
138 | enum av7110_audio_command { | ||
139 | AudioDAC, | ||
140 | CabADAC, | ||
141 | ON22K, | ||
142 | OFF22K, | ||
143 | MainSwitch, | ||
144 | ADSwitch, | ||
145 | SendDiSEqC, | ||
146 | SetRegister | ||
147 | }; | ||
148 | |||
149 | enum av7110_request_command { | ||
150 | AudioState, | ||
151 | AudioBuffState, | ||
152 | VideoState1, | ||
153 | VideoState2, | ||
154 | VideoState3, | ||
155 | CrashCounter, | ||
156 | ReqVersion, | ||
157 | ReqVCXO, | ||
158 | ReqRegister, | ||
159 | ReqSecFilterError, | ||
160 | ReqSTC | ||
161 | }; | ||
162 | |||
163 | enum av7110_encoder_command { | ||
164 | SetVidMode, | ||
165 | SetTestMode, | ||
166 | LoadVidCode, | ||
167 | SetMonitorType, | ||
168 | SetPanScanType, | ||
169 | SetFreezeMode | ||
170 | }; | ||
171 | |||
172 | enum av7110_rec_play_state { | ||
173 | __Record, | ||
174 | __Stop, | ||
175 | __Play, | ||
176 | __Pause, | ||
177 | __Slow, | ||
178 | __FF_IP, | ||
179 | __Scan_I, | ||
180 | __Continue | ||
181 | }; | ||
182 | |||
183 | enum av7110_fw_cmd_misc { | ||
184 | AV7110_FW_VIDEO_ZOOM = 1, | ||
185 | AV7110_FW_VIDEO_COMMAND, | ||
186 | AV7110_FW_AUDIO_COMMAND | ||
187 | }; | ||
188 | |||
189 | enum av7110_command_type { | ||
190 | COMTYPE_NOCOM, | ||
191 | COMTYPE_PIDFILTER, | ||
192 | COMTYPE_MPEGDECODER, | ||
193 | COMTYPE_OSD, | ||
194 | COMTYPE_BMP, | ||
195 | COMTYPE_ENCODER, | ||
196 | COMTYPE_AUDIODAC, | ||
197 | COMTYPE_REQUEST, | ||
198 | COMTYPE_SYSTEM, | ||
199 | COMTYPE_REC_PLAY, | ||
200 | COMTYPE_COMMON_IF, | ||
201 | COMTYPE_PID_FILTER, | ||
202 | COMTYPE_PES, | ||
203 | COMTYPE_TS, | ||
204 | COMTYPE_VIDEO, | ||
205 | COMTYPE_AUDIO, | ||
206 | COMTYPE_CI_LL, | ||
207 | COMTYPE_MISC = 0x80 | ||
208 | }; | ||
209 | |||
210 | #define VID_NONE_PREF 0x00 /* No aspect ration processing preferred */ | ||
211 | #define VID_PAN_SCAN_PREF 0x01 /* Pan and Scan Display preferred */ | ||
212 | #define VID_VERT_COMP_PREF 0x02 /* Vertical compression display preferred */ | ||
213 | #define VID_VC_AND_PS_PREF 0x03 /* PanScan and vertical Compression if allowed */ | ||
214 | #define VID_CENTRE_CUT_PREF 0x05 /* PanScan with zero vector */ | ||
215 | |||
216 | /* MPEG video decoder commands */ | ||
217 | #define VIDEO_CMD_STOP 0x000e | ||
218 | #define VIDEO_CMD_PLAY 0x000d | ||
219 | #define VIDEO_CMD_FREEZE 0x0102 | ||
220 | #define VIDEO_CMD_FFWD 0x0016 | ||
221 | #define VIDEO_CMD_SLOW 0x0022 | ||
222 | |||
223 | /* MPEG audio decoder commands */ | ||
224 | #define AUDIO_CMD_MUTE 0x0001 | ||
225 | #define AUDIO_CMD_UNMUTE 0x0002 | ||
226 | #define AUDIO_CMD_PCM16 0x0010 | ||
227 | #define AUDIO_CMD_STEREO 0x0080 | ||
228 | #define AUDIO_CMD_MONO_L 0x0100 | ||
229 | #define AUDIO_CMD_MONO_R 0x0200 | ||
230 | #define AUDIO_CMD_SYNC_OFF 0x000e | ||
231 | #define AUDIO_CMD_SYNC_ON 0x000f | ||
232 | |||
233 | /* firmware data interface codes */ | ||
234 | #define DATA_NONE 0x00 | ||
235 | #define DATA_FSECTION 0x01 | ||
236 | #define DATA_IPMPE 0x02 | ||
237 | #define DATA_MPEG_RECORD 0x03 | ||
238 | #define DATA_DEBUG_MESSAGE 0x04 | ||
239 | #define DATA_COMMON_INTERFACE 0x05 | ||
240 | #define DATA_MPEG_PLAY 0x06 | ||
241 | #define DATA_BMP_LOAD 0x07 | ||
242 | #define DATA_IRCOMMAND 0x08 | ||
243 | #define DATA_PIPING 0x09 | ||
244 | #define DATA_STREAMING 0x0a | ||
245 | #define DATA_CI_GET 0x0b | ||
246 | #define DATA_CI_PUT 0x0c | ||
247 | #define DATA_MPEG_VIDEO_EVENT 0x0d | ||
248 | |||
249 | #define DATA_PES_RECORD 0x10 | ||
250 | #define DATA_PES_PLAY 0x11 | ||
251 | #define DATA_TS_RECORD 0x12 | ||
252 | #define DATA_TS_PLAY 0x13 | ||
253 | |||
254 | /* ancient CI command codes, only two are actually still used | ||
255 | * by the link level CI firmware */ | ||
256 | #define CI_CMD_ERROR 0x00 | ||
257 | #define CI_CMD_ACK 0x01 | ||
258 | #define CI_CMD_SYSTEM_READY 0x02 | ||
259 | #define CI_CMD_KEYPRESS 0x03 | ||
260 | #define CI_CMD_ON_TUNED 0x04 | ||
261 | #define CI_CMD_ON_SWITCH_PROGRAM 0x05 | ||
262 | #define CI_CMD_SECTION_ARRIVED 0x06 | ||
263 | #define CI_CMD_SECTION_TIMEOUT 0x07 | ||
264 | #define CI_CMD_TIME 0x08 | ||
265 | #define CI_CMD_ENTER_MENU 0x09 | ||
266 | #define CI_CMD_FAST_PSI 0x0a | ||
267 | #define CI_CMD_GET_SLOT_INFO 0x0b | ||
268 | |||
269 | #define CI_MSG_NONE 0x00 | ||
270 | #define CI_MSG_CI_INFO 0x01 | ||
271 | #define CI_MSG_MENU 0x02 | ||
272 | #define CI_MSG_LIST 0x03 | ||
273 | #define CI_MSG_TEXT 0x04 | ||
274 | #define CI_MSG_REQUEST_INPUT 0x05 | ||
275 | #define CI_MSG_INPUT_COMPLETE 0x06 | ||
276 | #define CI_MSG_LIST_MORE 0x07 | ||
277 | #define CI_MSG_MENU_MORE 0x08 | ||
278 | #define CI_MSG_CLOSE_MMI_IMM 0x09 | ||
279 | #define CI_MSG_SECTION_REQUEST 0x0a | ||
280 | #define CI_MSG_CLOSE_FILTER 0x0b | ||
281 | #define CI_PSI_COMPLETE 0x0c | ||
282 | #define CI_MODULE_READY 0x0d | ||
283 | #define CI_SWITCH_PRG_REPLY 0x0e | ||
284 | #define CI_MSG_TEXT_MORE 0x0f | ||
285 | |||
286 | #define CI_MSG_CA_PMT 0xe0 | ||
287 | #define CI_MSG_ERROR 0xf0 | ||
288 | |||
289 | |||
290 | /* base address of the dual ported RAM which serves as communication | ||
291 | * area between PCI bus and av7110, | ||
292 | * as seen by the DEBI bus of the saa7146 */ | ||
293 | #define DPRAM_BASE 0x4000 | ||
294 | |||
295 | /* boot protocol area */ | ||
296 | #define BOOT_STATE (DPRAM_BASE + 0x3F8) | ||
297 | #define BOOT_SIZE (DPRAM_BASE + 0x3FA) | ||
298 | #define BOOT_BASE (DPRAM_BASE + 0x3FC) | ||
299 | #define BOOT_BLOCK (DPRAM_BASE + 0x400) | ||
300 | #define BOOT_MAX_SIZE 0xc00 | ||
301 | |||
302 | /* firmware command protocol area */ | ||
303 | #define IRQ_STATE (DPRAM_BASE + 0x0F4) | ||
304 | #define IRQ_STATE_EXT (DPRAM_BASE + 0x0F6) | ||
305 | #define MSGSTATE (DPRAM_BASE + 0x0F8) | ||
306 | #define FILT_STATE (DPRAM_BASE + 0x0FA) | ||
307 | #define COMMAND (DPRAM_BASE + 0x0FC) | ||
308 | #define COM_BUFF (DPRAM_BASE + 0x100) | ||
309 | #define COM_BUFF_SIZE 0x20 | ||
310 | |||
311 | /* various data buffers */ | ||
312 | #define BUFF1_BASE (DPRAM_BASE + 0x120) | ||
313 | #define BUFF1_SIZE 0xE0 | ||
314 | |||
315 | #define DATA_BUFF0_BASE (DPRAM_BASE + 0x200) | ||
316 | #define DATA_BUFF0_SIZE 0x0800 | ||
317 | |||
318 | #define DATA_BUFF1_BASE (DATA_BUFF0_BASE+DATA_BUFF0_SIZE) | ||
319 | #define DATA_BUFF1_SIZE 0x0800 | ||
320 | |||
321 | #define DATA_BUFF2_BASE (DATA_BUFF1_BASE+DATA_BUFF1_SIZE) | ||
322 | #define DATA_BUFF2_SIZE 0x0800 | ||
323 | |||
324 | #define DATA_BUFF3_BASE (DATA_BUFF2_BASE+DATA_BUFF2_SIZE) | ||
325 | #define DATA_BUFF3_SIZE 0x0400 | ||
326 | |||
327 | #define Reserved (DPRAM_BASE + 0x1E00) | ||
328 | #define Reserved_SIZE 0x1C0 | ||
329 | |||
330 | |||
331 | /* firmware status area */ | ||
332 | #define STATUS_BASE (DPRAM_BASE + 0x1FC0) | ||
333 | #define STATUS_SCR (STATUS_BASE + 0x00) | ||
334 | #define STATUS_MODES (STATUS_BASE + 0x04) | ||
335 | #define STATUS_LOOPS (STATUS_BASE + 0x08) | ||
336 | |||
337 | #define STATUS_MPEG_WIDTH (STATUS_BASE + 0x0C) | ||
338 | /* ((aspect_ratio & 0xf) << 12) | (height & 0xfff) */ | ||
339 | #define STATUS_MPEG_HEIGHT_AR (STATUS_BASE + 0x0E) | ||
340 | |||
341 | /* firmware data protocol area */ | ||
342 | #define RX_TYPE (DPRAM_BASE + 0x1FE8) | ||
343 | #define RX_LEN (DPRAM_BASE + 0x1FEA) | ||
344 | #define TX_TYPE (DPRAM_BASE + 0x1FEC) | ||
345 | #define TX_LEN (DPRAM_BASE + 0x1FEE) | ||
346 | |||
347 | #define RX_BUFF (DPRAM_BASE + 0x1FF4) | ||
348 | #define TX_BUFF (DPRAM_BASE + 0x1FF6) | ||
349 | |||
350 | #define HANDSHAKE_REG (DPRAM_BASE + 0x1FF8) | ||
351 | #define COM_IF_LOCK (DPRAM_BASE + 0x1FFA) | ||
352 | |||
353 | #define IRQ_RX (DPRAM_BASE + 0x1FFC) | ||
354 | #define IRQ_TX (DPRAM_BASE + 0x1FFE) | ||
355 | |||
356 | /* used by boot protocol to load firmware into av7110 DRAM */ | ||
357 | #define DRAM_START_CODE 0x2e000404 | ||
358 | #define DRAM_MAX_CODE_SIZE 0x00100000 | ||
359 | |||
360 | /* saa7146 gpio lines */ | ||
361 | #define RESET_LINE 2 | ||
362 | #define DEBI_DONE_LINE 1 | ||
363 | #define ARM_IRQ_LINE 0 | ||
364 | |||
365 | |||
366 | |||
367 | extern void av7110_reset_arm(struct av7110 *av7110); | ||
368 | extern int av7110_bootarm(struct av7110 *av7110); | ||
369 | extern int av7110_firmversion(struct av7110 *av7110); | ||
370 | #define FW_CI_LL_SUPPORT(arm_app) ((arm_app) & 0x80000000) | ||
371 | #define FW_4M_SDRAM(arm_app) ((arm_app) & 0x40000000) | ||
372 | #define FW_VERSION(arm_app) ((arm_app) & 0x0000FFFF) | ||
373 | |||
374 | extern int av7110_wait_msgstate(struct av7110 *av7110, u16 flags); | ||
375 | extern int av7110_fw_cmd(struct av7110 *av7110, int type, int com, int num, ...); | ||
376 | extern int __av7110_send_fw_cmd(struct av7110 *av7110, u16* buf, int length); | ||
377 | extern int av7110_send_fw_cmd(struct av7110 *av7110, u16* buf, int length); | ||
378 | extern int av7110_send_ci_cmd(struct av7110 *av7110, u8 subcom, u8 *buf, u8 len); | ||
379 | extern int av7110_fw_request(struct av7110 *av7110, u16 *request_buf, | ||
380 | int request_buf_len, u16 *reply_buf, int reply_buf_len); | ||
381 | extern int av7110_fw_query(struct av7110 *av7110, u16 tag, u16* Buff, s16 length); | ||
382 | |||
383 | |||
384 | /* DEBI (saa7146 data extension bus interface) access */ | ||
385 | extern int av7110_debiwrite(struct av7110 *av7110, u32 config, | ||
386 | int addr, u32 val, int count); | ||
387 | extern u32 av7110_debiread(struct av7110 *av7110, u32 config, | ||
388 | int addr, int count); | ||
389 | |||
390 | |||
391 | /* DEBI during interrupt */ | ||
392 | /* single word writes */ | ||
393 | static inline void iwdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count) | ||
394 | { | ||
395 | av7110_debiwrite(av7110, config, addr, val, count); | ||
396 | } | ||
397 | |||
398 | /* buffer writes */ | ||
399 | static inline void mwdebi(struct av7110 *av7110, u32 config, int addr, char *val, int count) | ||
400 | { | ||
401 | memcpy(av7110->debi_virt, val, count); | ||
402 | av7110_debiwrite(av7110, config, addr, 0, count); | ||
403 | } | ||
404 | |||
405 | static inline u32 irdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count) | ||
406 | { | ||
407 | u32 res; | ||
408 | |||
409 | res=av7110_debiread(av7110, config, addr, count); | ||
410 | if (count<=4) | ||
411 | memcpy(av7110->debi_virt, (char *) &res, count); | ||
412 | return res; | ||
413 | } | ||
414 | |||
415 | /* DEBI outside interrupts, only for count <= 4! */ | ||
416 | static inline void wdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count) | ||
417 | { | ||
418 | unsigned long flags; | ||
419 | |||
420 | spin_lock_irqsave(&av7110->debilock, flags); | ||
421 | av7110_debiwrite(av7110, config, addr, val, count); | ||
422 | spin_unlock_irqrestore(&av7110->debilock, flags); | ||
423 | } | ||
424 | |||
425 | static inline u32 rdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count) | ||
426 | { | ||
427 | unsigned long flags; | ||
428 | u32 res; | ||
429 | |||
430 | spin_lock_irqsave(&av7110->debilock, flags); | ||
431 | res=av7110_debiread(av7110, config, addr, count); | ||
432 | spin_unlock_irqrestore(&av7110->debilock, flags); | ||
433 | return res; | ||
434 | } | ||
435 | |||
436 | /* handle mailbox registers of the dual ported RAM */ | ||
437 | static inline void ARM_ResetMailBox(struct av7110 *av7110) | ||
438 | { | ||
439 | unsigned long flags; | ||
440 | |||
441 | spin_lock_irqsave(&av7110->debilock, flags); | ||
442 | av7110_debiread(av7110, DEBINOSWAP, IRQ_RX, 2); | ||
443 | av7110_debiwrite(av7110, DEBINOSWAP, IRQ_RX, 0, 2); | ||
444 | spin_unlock_irqrestore(&av7110->debilock, flags); | ||
445 | } | ||
446 | |||
447 | static inline void ARM_ClearMailBox(struct av7110 *av7110) | ||
448 | { | ||
449 | iwdebi(av7110, DEBINOSWAP, IRQ_RX, 0, 2); | ||
450 | } | ||
451 | |||
452 | static inline void ARM_ClearIrq(struct av7110 *av7110) | ||
453 | { | ||
454 | irdebi(av7110, DEBINOSWAP, IRQ_RX, 0, 2); | ||
455 | } | ||
456 | |||
457 | /**************************************************************************** | ||
458 | * Firmware commands | ||
459 | ****************************************************************************/ | ||
460 | |||
461 | static inline int SendDAC(struct av7110 *av7110, u8 addr, u8 data) | ||
462 | { | ||
463 | return av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, AudioDAC, 2, addr, data); | ||
464 | } | ||
465 | |||
466 | static inline void av7710_set_video_mode(struct av7110 *av7110, int mode) | ||
467 | { | ||
468 | av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetVidMode, 1, mode); | ||
469 | } | ||
470 | |||
471 | static int inline vidcom(struct av7110 *av7110, u32 com, u32 arg) | ||
472 | { | ||
473 | return av7110_fw_cmd(av7110, COMTYPE_MISC, AV7110_FW_VIDEO_COMMAND, 4, | ||
474 | (com>>16), (com&0xffff), | ||
475 | (arg>>16), (arg&0xffff)); | ||
476 | } | ||
477 | |||
478 | static int inline audcom(struct av7110 *av7110, u32 com) | ||
479 | { | ||
480 | return av7110_fw_cmd(av7110, COMTYPE_MISC, AV7110_FW_AUDIO_COMMAND, 2, | ||
481 | (com>>16), (com&0xffff)); | ||
482 | } | ||
483 | |||
484 | static inline void Set22K(struct av7110 *av7110, int state) | ||
485 | { | ||
486 | av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, (state ? ON22K : OFF22K), 0); | ||
487 | } | ||
488 | |||
489 | |||
490 | extern int av7110_diseqc_send(struct av7110 *av7110, int len, u8 *msg, unsigned long burst); | ||
491 | |||
492 | |||
493 | #ifdef CONFIG_DVB_AV7110_OSD | ||
494 | extern int av7110_osd_cmd(struct av7110 *av7110, osd_cmd_t *dc); | ||
495 | extern int av7110_osd_capability(struct av7110 *av7110, osd_cap_t *cap); | ||
496 | #endif /* CONFIG_DVB_AV7110_OSD */ | ||
497 | |||
498 | |||
499 | |||
500 | #endif /* _AV7110_HW_H_ */ | ||