V4L/DVB (8135): WRITE_RPS1() converts to le32 itself

... but two ancient drivers had not noticed.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>

1 files changed, 20 insertions, 20 deletions

diff --git a/drivers/media/dvb/ttpci/av7110.c b/drivers/media/dvb/ttpci/av7110.c
index dfe03cb42671..865c4596b7b7 100644
--- a/drivers/media/dvb/ttpci/av7110.c
+++ b/drivers/media/dvb/ttpci/av7110.c
@@ -2402,18 +2402,18 @@ static int __devinit av7110_attach(struct saa7146_dev* dev,
                 saa7146_write(dev, MC1, MASK_29);
                 /* RPS1 timeout disable */
                 saa7146_write(dev, RPS_TOV1, 0);
-                WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_VBI_B));
-                WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
-                WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
-                WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
+                WRITE_RPS1(CMD_PAUSE | EVT_VBI_B);
+                WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
+                WRITE_RPS1(GPIO3_MSK);
+                WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
 #if RPS_IRQ
                 /* issue RPS1 interrupt to increment counter */
-                WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
+                WRITE_RPS1(CMD_INTERRUPT);
 #endif
-                WRITE_RPS1(cpu_to_le32(CMD_STOP));
+                WRITE_RPS1(CMD_STOP);
                 /* Jump to begin of RPS program as safety measure               (p37) */
-                WRITE_RPS1(cpu_to_le32(CMD_JUMP));
-                WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
+                WRITE_RPS1(CMD_JUMP);
+                WRITE_RPS1(dev->d_rps1.dma_handle);
 
 #if RPS_IRQ
                 /* set event counter 1 source as RPS1 interrupt (0x03)          (rE4 p53)
@@ -2526,28 +2526,28 @@ static int __devinit av7110_attach(struct saa7146_dev* dev,
                 count = 0;
 
                 /* Wait Source Line Counter Threshold                           (p36) */
-                WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS));
+                WRITE_RPS1(CMD_PAUSE | EVT_HS);
                 /* Set GPIO3=1                                                  (p42) */
-                WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
-                WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
-                WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTHI<<24));
+                WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
+                WRITE_RPS1(GPIO3_MSK);
+                WRITE_RPS1(SAA7146_GPIO_OUTHI<<24);
 #if RPS_IRQ
                 /* issue RPS1 interrupt */
-                WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
+                WRITE_RPS1(CMD_INTERRUPT);
 #endif
                 /* Wait reset Source Line Counter Threshold                     (p36) */
-                WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS));
+                WRITE_RPS1(CMD_PAUSE | RPS_INV | EVT_HS);
                 /* Set GPIO3=0                                                  (p42) */
-                WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
-                WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
-                WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
+                WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
+                WRITE_RPS1(GPIO3_MSK);
+                WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
 #if RPS_IRQ
                 /* issue RPS1 interrupt */
-                WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
+                WRITE_RPS1(CMD_INTERRUPT);
 #endif
                 /* Jump to begin of RPS program                                 (p37) */
-                WRITE_RPS1(cpu_to_le32(CMD_JUMP));
-                WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
+                WRITE_RPS1(CMD_JUMP);
+                WRITE_RPS1(dev->d_rps1.dma_handle);
 
                 /* Fix VSYNC level */
                 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);