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authorMauro Carvalho Chehab <mchehab@redhat.com>2009-08-22 23:51:22 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2009-09-18 23:51:41 -0400
commit3d17fb1be937c8c025fc9f54b4e17e91081e7a4f (patch)
tree85e17d239c0bda9ef7c43882c989208c938ea72e /drivers/media/dvb/pt1/pt1.c
parent98293ef3e54f9f2175f11b4d14c119a2ff753d61 (diff)
V4L/DVB (12999): Add a driver for Earthsoft PT1
Add a driver for Earthsoft PT1 Eearthsoft PT1 is a PCI card for Japanese broadcasting with two ISDB-S and ISDB-T demodulators. This card has neither MPEG decoder nor conditional access module onboard. It transmits only compressed and possibly encrypted MPEG data over the PCI bus, so you need an external software decoder and a decrypter to watch TV on your computer. This driver is originally developed by Tomoaki Ishikawa <tomy@users.sourceforge.jp> by reverse engineering. [mchehab@redhat.com: renamed isdb_ts to isdbs_ts to use the current standard] Signed-off-by: HIRANO Takahito <hiranotaka@zng.info> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb/pt1/pt1.c')
-rw-r--r--drivers/media/dvb/pt1/pt1.c1056
1 files changed, 1056 insertions, 0 deletions
diff --git a/drivers/media/dvb/pt1/pt1.c b/drivers/media/dvb/pt1/pt1.c
new file mode 100644
index 000000000000..ef0f7d235e2a
--- /dev/null
+++ b/drivers/media/dvb/pt1/pt1.c
@@ -0,0 +1,1056 @@
1/*
2 * driver for Earthsoft PT1
3 *
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
5 *
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/pci.h>
27#include <linux/kthread.h>
28#include <linux/freezer.h>
29
30#include "dvbdev.h"
31#include "dvb_demux.h"
32#include "dmxdev.h"
33#include "dvb_net.h"
34#include "dvb_frontend.h"
35
36#include "va1j5jf8007t.h"
37#include "va1j5jf8007s.h"
38
39#define DRIVER_NAME "earth-pt1"
40
41#define PT1_PAGE_SHIFT 12
42#define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
43#define PT1_NR_UPACKETS 1024
44#define PT1_NR_BUFS 511
45
46struct pt1_buffer_page {
47 __le32 upackets[PT1_NR_UPACKETS];
48};
49
50struct pt1_table_page {
51 __le32 next_pfn;
52 __le32 buf_pfns[PT1_NR_BUFS];
53};
54
55struct pt1_buffer {
56 struct pt1_buffer_page *page;
57 dma_addr_t addr;
58};
59
60struct pt1_table {
61 struct pt1_table_page *page;
62 dma_addr_t addr;
63 struct pt1_buffer bufs[PT1_NR_BUFS];
64};
65
66#define PT1_NR_ADAPS 4
67
68struct pt1_adapter;
69
70struct pt1 {
71 struct pci_dev *pdev;
72 void __iomem *regs;
73 struct i2c_adapter i2c_adap;
74 int i2c_running;
75 struct pt1_adapter *adaps[PT1_NR_ADAPS];
76 struct pt1_table *tables;
77 struct task_struct *kthread;
78};
79
80struct pt1_adapter {
81 struct pt1 *pt1;
82 int index;
83
84 u8 *buf;
85 int upacket_count;
86 int packet_count;
87
88 struct dvb_adapter adap;
89 struct dvb_demux demux;
90 int users;
91 struct dmxdev dmxdev;
92 struct dvb_net net;
93 struct dvb_frontend *fe;
94 int (*orig_set_voltage)(struct dvb_frontend *fe,
95 fe_sec_voltage_t voltage);
96};
97
98#define pt1_printk(level, pt1, format, arg...) \
99 dev_printk(level, &(pt1)->pdev->dev, format, ##arg)
100
101static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
102{
103 writel(data, pt1->regs + reg * 4);
104}
105
106static u32 pt1_read_reg(struct pt1 *pt1, int reg)
107{
108 return readl(pt1->regs + reg * 4);
109}
110
111static int pt1_nr_tables = 64;
112module_param_named(nr_tables, pt1_nr_tables, int, 0);
113
114static void pt1_increment_table_count(struct pt1 *pt1)
115{
116 pt1_write_reg(pt1, 0, 0x00000020);
117}
118
119static void pt1_init_table_count(struct pt1 *pt1)
120{
121 pt1_write_reg(pt1, 0, 0x00000010);
122}
123
124static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
125{
126 pt1_write_reg(pt1, 5, first_pfn);
127 pt1_write_reg(pt1, 0, 0x0c000040);
128}
129
130static void pt1_unregister_tables(struct pt1 *pt1)
131{
132 pt1_write_reg(pt1, 0, 0x08080000);
133}
134
135static int pt1_sync(struct pt1 *pt1)
136{
137 int i;
138 for (i = 0; i < 57; i++) {
139 if (pt1_read_reg(pt1, 0) & 0x20000000)
140 return 0;
141 pt1_write_reg(pt1, 0, 0x00000008);
142 }
143 pt1_printk(KERN_ERR, pt1, "could not sync\n");
144 return -EIO;
145}
146
147static u64 pt1_identify(struct pt1 *pt1)
148{
149 int i;
150 u64 id;
151 id = 0;
152 for (i = 0; i < 57; i++) {
153 id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
154 pt1_write_reg(pt1, 0, 0x00000008);
155 }
156 return id;
157}
158
159static int pt1_unlock(struct pt1 *pt1)
160{
161 int i;
162 pt1_write_reg(pt1, 0, 0x00000008);
163 for (i = 0; i < 3; i++) {
164 if (pt1_read_reg(pt1, 0) & 0x80000000)
165 return 0;
166 schedule_timeout_uninterruptible((HZ + 999) / 1000);
167 }
168 pt1_printk(KERN_ERR, pt1, "could not unlock\n");
169 return -EIO;
170}
171
172static int pt1_reset_pci(struct pt1 *pt1)
173{
174 int i;
175 pt1_write_reg(pt1, 0, 0x01010000);
176 pt1_write_reg(pt1, 0, 0x01000000);
177 for (i = 0; i < 10; i++) {
178 if (pt1_read_reg(pt1, 0) & 0x00000001)
179 return 0;
180 schedule_timeout_uninterruptible((HZ + 999) / 1000);
181 }
182 pt1_printk(KERN_ERR, pt1, "could not reset PCI\n");
183 return -EIO;
184}
185
186static int pt1_reset_ram(struct pt1 *pt1)
187{
188 int i;
189 pt1_write_reg(pt1, 0, 0x02020000);
190 pt1_write_reg(pt1, 0, 0x02000000);
191 for (i = 0; i < 10; i++) {
192 if (pt1_read_reg(pt1, 0) & 0x00000002)
193 return 0;
194 schedule_timeout_uninterruptible((HZ + 999) / 1000);
195 }
196 pt1_printk(KERN_ERR, pt1, "could not reset RAM\n");
197 return -EIO;
198}
199
200static int pt1_do_enable_ram(struct pt1 *pt1)
201{
202 int i, j;
203 u32 status;
204 status = pt1_read_reg(pt1, 0) & 0x00000004;
205 pt1_write_reg(pt1, 0, 0x00000002);
206 for (i = 0; i < 10; i++) {
207 for (j = 0; j < 1024; j++) {
208 if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
209 return 0;
210 }
211 schedule_timeout_uninterruptible((HZ + 999) / 1000);
212 }
213 pt1_printk(KERN_ERR, pt1, "could not enable RAM\n");
214 return -EIO;
215}
216
217static int pt1_enable_ram(struct pt1 *pt1)
218{
219 int i, ret;
220 schedule_timeout_uninterruptible((HZ + 999) / 1000);
221 for (i = 0; i < 10; i++) {
222 ret = pt1_do_enable_ram(pt1);
223 if (ret < 0)
224 return ret;
225 }
226 return 0;
227}
228
229static void pt1_disable_ram(struct pt1 *pt1)
230{
231 pt1_write_reg(pt1, 0, 0x0b0b0000);
232}
233
234static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
235{
236 pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
237}
238
239static void pt1_init_streams(struct pt1 *pt1)
240{
241 int i;
242 for (i = 0; i < PT1_NR_ADAPS; i++)
243 pt1_set_stream(pt1, i, 0);
244}
245
246static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
247{
248 u32 upacket;
249 int i;
250 int index;
251 struct pt1_adapter *adap;
252 int offset;
253 u8 *buf;
254
255 if (!page->upackets[PT1_NR_UPACKETS - 1])
256 return 0;
257
258 for (i = 0; i < PT1_NR_UPACKETS; i++) {
259 upacket = le32_to_cpu(page->upackets[i]);
260 index = (upacket >> 29) - 1;
261 if (index < 0 || index >= PT1_NR_ADAPS)
262 continue;
263
264 adap = pt1->adaps[index];
265 if (upacket >> 25 & 1)
266 adap->upacket_count = 0;
267 else if (!adap->upacket_count)
268 continue;
269
270 buf = adap->buf;
271 offset = adap->packet_count * 188 + adap->upacket_count * 3;
272 buf[offset] = upacket >> 16;
273 buf[offset + 1] = upacket >> 8;
274 if (adap->upacket_count != 62)
275 buf[offset + 2] = upacket;
276
277 if (++adap->upacket_count >= 63) {
278 adap->upacket_count = 0;
279 if (++adap->packet_count >= 21) {
280 dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
281 adap->packet_count = 0;
282 }
283 }
284 }
285
286 page->upackets[PT1_NR_UPACKETS - 1] = 0;
287 return 1;
288}
289
290static int pt1_thread(void *data)
291{
292 struct pt1 *pt1;
293 int table_index;
294 int buf_index;
295 struct pt1_buffer_page *page;
296
297 pt1 = data;
298 set_freezable();
299
300 table_index = 0;
301 buf_index = 0;
302
303 while (!kthread_should_stop()) {
304 try_to_freeze();
305
306 page = pt1->tables[table_index].bufs[buf_index].page;
307 if (!pt1_filter(pt1, page)) {
308 schedule_timeout_interruptible((HZ + 999) / 1000);
309 continue;
310 }
311
312 if (++buf_index >= PT1_NR_BUFS) {
313 pt1_increment_table_count(pt1);
314 buf_index = 0;
315 if (++table_index >= pt1_nr_tables)
316 table_index = 0;
317 }
318 }
319
320 return 0;
321}
322
323static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
324{
325 dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
326}
327
328static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
329{
330 void *page;
331 dma_addr_t addr;
332
333 page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
334 GFP_KERNEL);
335 if (page == NULL)
336 return NULL;
337
338 BUG_ON(addr & (PT1_PAGE_SIZE - 1));
339 BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
340
341 *addrp = addr;
342 *pfnp = addr >> PT1_PAGE_SHIFT;
343 return page;
344}
345
346static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
347{
348 pt1_free_page(pt1, buf->page, buf->addr);
349}
350
351static int
352pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
353{
354 struct pt1_buffer_page *page;
355 dma_addr_t addr;
356
357 page = pt1_alloc_page(pt1, &addr, pfnp);
358 if (page == NULL)
359 return -ENOMEM;
360
361 page->upackets[PT1_NR_UPACKETS - 1] = 0;
362
363 buf->page = page;
364 buf->addr = addr;
365 return 0;
366}
367
368static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
369{
370 int i;
371
372 for (i = 0; i < PT1_NR_BUFS; i++)
373 pt1_cleanup_buffer(pt1, &table->bufs[i]);
374
375 pt1_free_page(pt1, table->page, table->addr);
376}
377
378static int
379pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
380{
381 struct pt1_table_page *page;
382 dma_addr_t addr;
383 int i, ret;
384 u32 buf_pfn;
385
386 page = pt1_alloc_page(pt1, &addr, pfnp);
387 if (page == NULL)
388 return -ENOMEM;
389
390 for (i = 0; i < PT1_NR_BUFS; i++) {
391 ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
392 if (ret < 0)
393 goto err;
394
395 page->buf_pfns[i] = cpu_to_le32(buf_pfn);
396 }
397
398 pt1_increment_table_count(pt1);
399 table->page = page;
400 table->addr = addr;
401 return 0;
402
403err:
404 while (i--)
405 pt1_cleanup_buffer(pt1, &table->bufs[i]);
406
407 pt1_free_page(pt1, page, addr);
408 return ret;
409}
410
411static void pt1_cleanup_tables(struct pt1 *pt1)
412{
413 struct pt1_table *tables;
414 int i;
415
416 tables = pt1->tables;
417 pt1_unregister_tables(pt1);
418
419 for (i = 0; i < pt1_nr_tables; i++)
420 pt1_cleanup_table(pt1, &tables[i]);
421
422 vfree(tables);
423}
424
425static int pt1_init_tables(struct pt1 *pt1)
426{
427 struct pt1_table *tables;
428 int i, ret;
429 u32 first_pfn, pfn;
430
431 tables = vmalloc(sizeof(struct pt1_table) * pt1_nr_tables);
432 if (tables == NULL)
433 return -ENOMEM;
434
435 pt1_init_table_count(pt1);
436
437 i = 0;
438 if (pt1_nr_tables) {
439 ret = pt1_init_table(pt1, &tables[0], &first_pfn);
440 if (ret)
441 goto err;
442 i++;
443 }
444
445 while (i < pt1_nr_tables) {
446 ret = pt1_init_table(pt1, &tables[i], &pfn);
447 if (ret)
448 goto err;
449 tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
450 i++;
451 }
452
453 tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
454
455 pt1_register_tables(pt1, first_pfn);
456 pt1->tables = tables;
457 return 0;
458
459err:
460 while (i--)
461 pt1_cleanup_table(pt1, &tables[i]);
462
463 vfree(tables);
464 return ret;
465}
466
467static int pt1_start_feed(struct dvb_demux_feed *feed)
468{
469 struct pt1_adapter *adap;
470 adap = container_of(feed->demux, struct pt1_adapter, demux);
471 if (!adap->users++)
472 pt1_set_stream(adap->pt1, adap->index, 1);
473 return 0;
474}
475
476static int pt1_stop_feed(struct dvb_demux_feed *feed)
477{
478 struct pt1_adapter *adap;
479 adap = container_of(feed->demux, struct pt1_adapter, demux);
480 if (!--adap->users)
481 pt1_set_stream(adap->pt1, adap->index, 0);
482 return 0;
483}
484
485static void
486pt1_set_power(struct pt1 *pt1, int power, int lnb, int reset)
487{
488 pt1_write_reg(pt1, 1, power | lnb << 1 | !reset << 3);
489}
490
491static int pt1_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
492{
493 struct pt1_adapter *adap;
494 int lnb;
495
496 adap = container_of(fe->dvb, struct pt1_adapter, adap);
497
498 switch (voltage) {
499 case SEC_VOLTAGE_13: /* actually 11V */
500 lnb = 2;
501 break;
502 case SEC_VOLTAGE_18: /* actually 15V */
503 lnb = 3;
504 break;
505 case SEC_VOLTAGE_OFF:
506 lnb = 0;
507 break;
508 default:
509 return -EINVAL;
510 }
511
512 pt1_set_power(adap->pt1, 1, lnb, 0);
513
514 if (adap->orig_set_voltage)
515 return adap->orig_set_voltage(fe, voltage);
516 else
517 return 0;
518}
519
520static void pt1_free_adapter(struct pt1_adapter *adap)
521{
522 dvb_unregister_frontend(adap->fe);
523 dvb_net_release(&adap->net);
524 adap->demux.dmx.close(&adap->demux.dmx);
525 dvb_dmxdev_release(&adap->dmxdev);
526 dvb_dmx_release(&adap->demux);
527 dvb_unregister_adapter(&adap->adap);
528 free_page((unsigned long)adap->buf);
529 kfree(adap);
530}
531
532DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
533
534static struct pt1_adapter *
535pt1_alloc_adapter(struct pt1 *pt1, struct dvb_frontend *fe)
536{
537 struct pt1_adapter *adap;
538 void *buf;
539 struct dvb_adapter *dvb_adap;
540 struct dvb_demux *demux;
541 struct dmxdev *dmxdev;
542 int ret;
543
544 adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
545 if (!adap) {
546 ret = -ENOMEM;
547 goto err;
548 }
549
550 adap->pt1 = pt1;
551
552 adap->orig_set_voltage = fe->ops.set_voltage;
553 fe->ops.set_voltage = pt1_set_voltage;
554
555 buf = (u8 *)__get_free_page(GFP_KERNEL);
556 if (!buf) {
557 ret = -ENOMEM;
558 goto err_kfree;
559 }
560
561 adap->buf = buf;
562 adap->upacket_count = 0;
563 adap->packet_count = 0;
564
565 dvb_adap = &adap->adap;
566 dvb_adap->priv = adap;
567 ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
568 &pt1->pdev->dev, adapter_nr);
569 if (ret < 0)
570 goto err_free_page;
571
572 demux = &adap->demux;
573 demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
574 demux->priv = adap;
575 demux->feednum = 256;
576 demux->filternum = 256;
577 demux->start_feed = pt1_start_feed;
578 demux->stop_feed = pt1_stop_feed;
579 demux->write_to_decoder = NULL;
580 ret = dvb_dmx_init(demux);
581 if (ret < 0)
582 goto err_unregister_adapter;
583
584 dmxdev = &adap->dmxdev;
585 dmxdev->filternum = 256;
586 dmxdev->demux = &demux->dmx;
587 dmxdev->capabilities = 0;
588 ret = dvb_dmxdev_init(dmxdev, dvb_adap);
589 if (ret < 0)
590 goto err_dmx_release;
591
592 dvb_net_init(dvb_adap, &adap->net, &demux->dmx);
593
594 ret = dvb_register_frontend(dvb_adap, fe);
595 if (ret < 0)
596 goto err_net_release;
597 adap->fe = fe;
598
599 return adap;
600
601err_net_release:
602 dvb_net_release(&adap->net);
603 adap->demux.dmx.close(&adap->demux.dmx);
604 dvb_dmxdev_release(&adap->dmxdev);
605err_dmx_release:
606 dvb_dmx_release(demux);
607err_unregister_adapter:
608 dvb_unregister_adapter(dvb_adap);
609err_free_page:
610 free_page((unsigned long)buf);
611err_kfree:
612 kfree(adap);
613err:
614 return ERR_PTR(ret);
615}
616
617static void pt1_cleanup_adapters(struct pt1 *pt1)
618{
619 int i;
620 for (i = 0; i < PT1_NR_ADAPS; i++)
621 pt1_free_adapter(pt1->adaps[i]);
622}
623
624struct pt1_config {
625 struct va1j5jf8007s_config va1j5jf8007s_config;
626 struct va1j5jf8007t_config va1j5jf8007t_config;
627};
628
629static const struct pt1_config pt1_configs[2] = {
630 {
631 { .demod_address = 0x1b },
632 { .demod_address = 0x1a },
633 }, {
634 { .demod_address = 0x19 },
635 { .demod_address = 0x18 },
636 },
637};
638
639static int pt1_init_adapters(struct pt1 *pt1)
640{
641 int i, j;
642 struct i2c_adapter *i2c_adap;
643 const struct pt1_config *config;
644 struct dvb_frontend *fe[4];
645 struct pt1_adapter *adap;
646 int ret;
647
648 i = 0;
649 j = 0;
650
651 i2c_adap = &pt1->i2c_adap;
652 do {
653 config = &pt1_configs[i / 2];
654
655 fe[i] = va1j5jf8007s_attach(&config->va1j5jf8007s_config,
656 i2c_adap);
657 if (!fe[i]) {
658 ret = -ENODEV; /* This does not sound nice... */
659 goto err;
660 }
661 i++;
662
663 fe[i] = va1j5jf8007t_attach(&config->va1j5jf8007t_config,
664 i2c_adap);
665 if (!fe[i]) {
666 ret = -ENODEV;
667 goto err;
668 }
669 i++;
670
671 ret = va1j5jf8007s_prepare(fe[i - 2]);
672 if (ret < 0)
673 goto err;
674
675 ret = va1j5jf8007t_prepare(fe[i - 1]);
676 if (ret < 0)
677 goto err;
678
679 } while (i < 4);
680
681 do {
682 adap = pt1_alloc_adapter(pt1, fe[j]);
683 if (IS_ERR(adap))
684 goto err;
685 adap->index = j;
686 pt1->adaps[j] = adap;
687 } while (++j < 4);
688
689 return 0;
690
691err:
692 while (i-- > j)
693 fe[i]->ops.release(fe[i]);
694
695 while (j--)
696 pt1_free_adapter(pt1->adaps[j]);
697
698 return ret;
699}
700
701static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
702 int clock, int data, int next_addr)
703{
704 pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
705 !clock << 11 | !data << 10 | next_addr);
706}
707
708static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
709{
710 pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
711 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
712 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
713 *addrp = addr + 3;
714}
715
716static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
717{
718 pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
719 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
720 pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
721 pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
722 *addrp = addr + 4;
723}
724
725static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
726{
727 int i;
728 for (i = 0; i < 8; i++)
729 pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
730 pt1_i2c_write_bit(pt1, addr, &addr, 1);
731 *addrp = addr;
732}
733
734static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
735{
736 int i;
737 for (i = 0; i < 8; i++)
738 pt1_i2c_read_bit(pt1, addr, &addr);
739 pt1_i2c_write_bit(pt1, addr, &addr, last);
740 *addrp = addr;
741}
742
743static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
744{
745 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
746 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
747 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
748 *addrp = addr + 3;
749}
750
751static void
752pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
753{
754 int i;
755 pt1_i2c_prepare(pt1, addr, &addr);
756 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
757 for (i = 0; i < msg->len; i++)
758 pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
759 *addrp = addr;
760}
761
762static void
763pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
764{
765 int i;
766 pt1_i2c_prepare(pt1, addr, &addr);
767 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
768 for (i = 0; i < msg->len; i++)
769 pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
770 *addrp = addr;
771}
772
773static int pt1_i2c_end(struct pt1 *pt1, int addr)
774{
775 pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
776 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
777 pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
778
779 pt1_write_reg(pt1, 0, 0x00000004);
780 do {
781 if (signal_pending(current))
782 return -EINTR;
783 schedule_timeout_interruptible((HZ + 999) / 1000);
784 } while (pt1_read_reg(pt1, 0) & 0x00000080);
785 return 0;
786}
787
788static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
789{
790 int addr;
791 addr = 0;
792
793 pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr /* itself */);
794 addr = addr + 1;
795
796 if (!pt1->i2c_running) {
797 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
798 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
799 addr = addr + 2;
800 pt1->i2c_running = 1;
801 }
802 *addrp = addr;
803}
804
805static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
806{
807 struct pt1 *pt1;
808 int i;
809 struct i2c_msg *msg, *next_msg;
810 int addr, ret;
811 u16 len;
812 u32 word;
813
814 pt1 = i2c_get_adapdata(adap);
815
816 for (i = 0; i < num; i++) {
817 msg = &msgs[i];
818 if (msg->flags & I2C_M_RD)
819 return -ENOTSUPP;
820
821 if (i + 1 < num)
822 next_msg = &msgs[i + 1];
823 else
824 next_msg = NULL;
825
826 if (next_msg && next_msg->flags & I2C_M_RD) {
827 i++;
828
829 len = next_msg->len;
830 if (len > 4)
831 return -ENOTSUPP;
832
833 pt1_i2c_begin(pt1, &addr);
834 pt1_i2c_write_msg(pt1, addr, &addr, msg);
835 pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
836 ret = pt1_i2c_end(pt1, addr);
837 if (ret < 0)
838 return ret;
839
840 word = pt1_read_reg(pt1, 2);
841 while (len--) {
842 next_msg->buf[len] = word;
843 word >>= 8;
844 }
845 } else {
846 pt1_i2c_begin(pt1, &addr);
847 pt1_i2c_write_msg(pt1, addr, &addr, msg);
848 ret = pt1_i2c_end(pt1, addr);
849 if (ret < 0)
850 return ret;
851 }
852 }
853
854 return num;
855}
856
857static u32 pt1_i2c_func(struct i2c_adapter *adap)
858{
859 return I2C_FUNC_I2C;
860}
861
862static const struct i2c_algorithm pt1_i2c_algo = {
863 .master_xfer = pt1_i2c_xfer,
864 .functionality = pt1_i2c_func,
865};
866
867static void pt1_i2c_wait(struct pt1 *pt1)
868{
869 int i;
870 for (i = 0; i < 128; i++)
871 pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
872}
873
874static void pt1_i2c_init(struct pt1 *pt1)
875{
876 int i;
877 for (i = 0; i < 1024; i++)
878 pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
879}
880
881static void __devexit pt1_remove(struct pci_dev *pdev)
882{
883 struct pt1 *pt1;
884 void __iomem *regs;
885
886 pt1 = pci_get_drvdata(pdev);
887 regs = pt1->regs;
888
889 kthread_stop(pt1->kthread);
890 pt1_cleanup_tables(pt1);
891 pt1_cleanup_adapters(pt1);
892 pt1_disable_ram(pt1);
893 pt1_set_power(pt1, 0, 0, 1);
894 i2c_del_adapter(&pt1->i2c_adap);
895 pci_set_drvdata(pdev, NULL);
896 kfree(pt1);
897 pci_iounmap(pdev, regs);
898 pci_release_regions(pdev);
899 pci_disable_device(pdev);
900}
901
902static int __devinit
903pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
904{
905 int ret;
906 void __iomem *regs;
907 struct pt1 *pt1;
908 struct i2c_adapter *i2c_adap;
909 struct task_struct *kthread;
910
911 ret = pci_enable_device(pdev);
912 if (ret < 0)
913 goto err;
914
915 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
916 if (ret < 0)
917 goto err_pci_disable_device;
918
919 pci_set_master(pdev);
920
921 ret = pci_request_regions(pdev, DRIVER_NAME);
922 if (ret < 0)
923 goto err_pci_disable_device;
924
925 regs = pci_iomap(pdev, 0, 0);
926 if (!regs) {
927 ret = -EIO;
928 goto err_pci_release_regions;
929 }
930
931 pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
932 if (!pt1) {
933 ret = -ENOMEM;
934 goto err_pci_iounmap;
935 }
936
937 pt1->pdev = pdev;
938 pt1->regs = regs;
939 pci_set_drvdata(pdev, pt1);
940
941 i2c_adap = &pt1->i2c_adap;
942 i2c_adap->class = I2C_CLASS_TV_DIGITAL;
943 i2c_adap->algo = &pt1_i2c_algo;
944 i2c_adap->algo_data = NULL;
945 i2c_adap->dev.parent = &pdev->dev;
946 i2c_set_adapdata(i2c_adap, pt1);
947 ret = i2c_add_adapter(i2c_adap);
948 if (ret < 0)
949 goto err_kfree;
950
951 pt1_set_power(pt1, 0, 0, 1);
952
953 pt1_i2c_init(pt1);
954 pt1_i2c_wait(pt1);
955
956 ret = pt1_sync(pt1);
957 if (ret < 0)
958 goto err_i2c_del_adapter;
959
960 pt1_identify(pt1);
961
962 ret = pt1_unlock(pt1);
963 if (ret < 0)
964 goto err_i2c_del_adapter;
965
966 ret = pt1_reset_pci(pt1);
967 if (ret < 0)
968 goto err_i2c_del_adapter;
969
970 ret = pt1_reset_ram(pt1);
971 if (ret < 0)
972 goto err_i2c_del_adapter;
973
974 ret = pt1_enable_ram(pt1);
975 if (ret < 0)
976 goto err_i2c_del_adapter;
977
978 pt1_init_streams(pt1);
979
980 pt1_set_power(pt1, 1, 0, 1);
981 schedule_timeout_uninterruptible((HZ + 49) / 50);
982
983 pt1_set_power(pt1, 1, 0, 0);
984 schedule_timeout_uninterruptible((HZ + 999) / 1000);
985
986 ret = pt1_init_adapters(pt1);
987 if (ret < 0)
988 goto err_pt1_disable_ram;
989
990 ret = pt1_init_tables(pt1);
991 if (ret < 0)
992 goto err_pt1_cleanup_adapters;
993
994 kthread = kthread_run(pt1_thread, pt1, "pt1");
995 if (IS_ERR(kthread)) {
996 ret = PTR_ERR(kthread);
997 goto err_pt1_cleanup_tables;
998 }
999
1000 pt1->kthread = kthread;
1001 return 0;
1002
1003err_pt1_cleanup_tables:
1004 pt1_cleanup_tables(pt1);
1005err_pt1_cleanup_adapters:
1006 pt1_cleanup_adapters(pt1);
1007err_pt1_disable_ram:
1008 pt1_disable_ram(pt1);
1009 pt1_set_power(pt1, 0, 0, 1);
1010err_i2c_del_adapter:
1011 i2c_del_adapter(i2c_adap);
1012err_kfree:
1013 pci_set_drvdata(pdev, NULL);
1014 kfree(pt1);
1015err_pci_iounmap:
1016 pci_iounmap(pdev, regs);
1017err_pci_release_regions:
1018 pci_release_regions(pdev);
1019err_pci_disable_device:
1020 pci_disable_device(pdev);
1021err:
1022 return ret;
1023
1024}
1025
1026static struct pci_device_id pt1_id_table[] = {
1027 { PCI_DEVICE(0x10ee, 0x211a) },
1028 { },
1029};
1030MODULE_DEVICE_TABLE(pci, pt1_id_table);
1031
1032static struct pci_driver pt1_driver = {
1033 .name = DRIVER_NAME,
1034 .probe = pt1_probe,
1035 .remove = __devexit_p(pt1_remove),
1036 .id_table = pt1_id_table,
1037};
1038
1039
1040static int __init pt1_init(void)
1041{
1042 return pci_register_driver(&pt1_driver);
1043}
1044
1045
1046static void __exit pt1_cleanup(void)
1047{
1048 pci_unregister_driver(&pt1_driver);
1049}
1050
1051module_init(pt1_init);
1052module_exit(pt1_cleanup);
1053
1054MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
1055MODULE_DESCRIPTION("Earthsoft PT1 Driver");
1056MODULE_LICENSE("GPL");