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authorMauro Carvalho Chehab <mchehab@infradead.org>2008-04-29 20:38:44 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-04-29 17:41:37 -0400
commit7c91f0624a9a2b8b9b122cf94fef34bc7f7347a6 (patch)
treee48220117475037125e86a3add48aa12cef7731f /drivers/media/dvb/frontends
parent5fe95e0b865060839449e1a61c1d5c67a4faab9a (diff)
V4L/DVB(7767): Move tuners to common/tuners
There were several issues in the past, caused by the hybrid tuner design, since now, the same tuner can be used by drivers/media/dvb and drivers/media/video. Kconfig items were rearranged, to split V4L/DVB core from their drivers. Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/dvb/frontends')
-rw-r--r--drivers/media/dvb/frontends/Kconfig23
-rw-r--r--drivers/media/dvb/frontends/Makefile7
-rw-r--r--drivers/media/dvb/frontends/tda18271-common.c666
-rw-r--r--drivers/media/dvb/frontends/tda18271-fe.c1153
-rw-r--r--drivers/media/dvb/frontends/tda18271-priv.h220
-rw-r--r--drivers/media/dvb/frontends/tda18271-tables.c1313
-rw-r--r--drivers/media/dvb/frontends/tda18271.h99
-rw-r--r--drivers/media/dvb/frontends/tda827x.c852
-rw-r--r--drivers/media/dvb/frontends/tda827x.h69
-rw-r--r--drivers/media/dvb/frontends/xc5000.c964
-rw-r--r--drivers/media/dvb/frontends/xc5000.h63
-rw-r--r--drivers/media/dvb/frontends/xc5000_priv.h36
12 files changed, 1 insertions, 5464 deletions
diff --git a/drivers/media/dvb/frontends/Kconfig b/drivers/media/dvb/frontends/Kconfig
index f5fceb3cdb3c..75e7d20b2984 100644
--- a/drivers/media/dvb/frontends/Kconfig
+++ b/drivers/media/dvb/frontends/Kconfig
@@ -333,20 +333,6 @@ config DVB_TDA826X
333 help 333 help
334 A DVB-S silicon tuner module. Say Y when you want to support this tuner. 334 A DVB-S silicon tuner module. Say Y when you want to support this tuner.
335 335
336config DVB_TDA827X
337 tristate "Philips TDA827X silicon tuner"
338 depends on DVB_CORE && I2C
339 default m if DVB_FE_CUSTOMISE
340 help
341 A DVB-T silicon tuner module. Say Y when you want to support this tuner.
342
343config DVB_TDA18271
344 tristate "NXP TDA18271 silicon tuner"
345 depends on I2C
346 default m if DVB_FE_CUSTOMISE
347 help
348 A silicon tuner module. Say Y when you want to support this tuner.
349
350config DVB_TUNER_QT1010 336config DVB_TUNER_QT1010
351 tristate "Quantek QT1010 silicon tuner" 337 tristate "Quantek QT1010 silicon tuner"
352 depends on DVB_CORE && I2C 338 depends on DVB_CORE && I2C
@@ -384,15 +370,6 @@ config DVB_TUNER_DIB0070
384 This device is only used inside a SiP called togther with a 370 This device is only used inside a SiP called togther with a
385 demodulator for now. 371 demodulator for now.
386 372
387config DVB_TUNER_XC5000
388 tristate "Xceive XC5000 silicon tuner"
389 depends on I2C
390 default m if DVB_FE_CUSTOMISE
391 help
392 A driver for the silicon tuner XC5000 from Xceive.
393 This device is only used inside a SiP called togther with a
394 demodulator for now.
395
396config DVB_TUNER_ITD1000 373config DVB_TUNER_ITD1000
397 tristate "Integrant ITD1000 Zero IF tuner for DVB-S/DSS" 374 tristate "Integrant ITD1000 Zero IF tuner for DVB-S/DSS"
398 depends on DVB_CORE && I2C 375 depends on DVB_CORE && I2C
diff --git a/drivers/media/dvb/frontends/Makefile b/drivers/media/dvb/frontends/Makefile
index 9747c73dc826..9b4438a13d0b 100644
--- a/drivers/media/dvb/frontends/Makefile
+++ b/drivers/media/dvb/frontends/Makefile
@@ -3,9 +3,7 @@
3# 3#
4 4
5EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core/ 5EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core/
6EXTRA_CFLAGS += -Idrivers/media/video/ 6EXTRA_CFLAGS += -Idrivers/media/common/tuners/
7
8tda18271-objs := tda18271-tables.o tda18271-common.o tda18271-fe.o
9 7
10obj-$(CONFIG_DVB_PLL) += dvb-pll.o 8obj-$(CONFIG_DVB_PLL) += dvb-pll.o
11obj-$(CONFIG_DVB_STV0299) += stv0299.o 9obj-$(CONFIG_DVB_STV0299) += stv0299.o
@@ -42,8 +40,6 @@ obj-$(CONFIG_DVB_ISL6405) += isl6405.o
42obj-$(CONFIG_DVB_ISL6421) += isl6421.o 40obj-$(CONFIG_DVB_ISL6421) += isl6421.o
43obj-$(CONFIG_DVB_TDA10086) += tda10086.o 41obj-$(CONFIG_DVB_TDA10086) += tda10086.o
44obj-$(CONFIG_DVB_TDA826X) += tda826x.o 42obj-$(CONFIG_DVB_TDA826X) += tda826x.o
45obj-$(CONFIG_DVB_TDA827X) += tda827x.o
46obj-$(CONFIG_DVB_TDA18271) += tda18271.o
47obj-$(CONFIG_DVB_TUNER_MT2060) += mt2060.o 43obj-$(CONFIG_DVB_TUNER_MT2060) += mt2060.o
48obj-$(CONFIG_DVB_TUNER_MT2266) += mt2266.o 44obj-$(CONFIG_DVB_TUNER_MT2266) += mt2266.o
49obj-$(CONFIG_DVB_TUNER_DIB0070) += dib0070.o 45obj-$(CONFIG_DVB_TUNER_DIB0070) += dib0070.o
@@ -51,7 +47,6 @@ obj-$(CONFIG_DVB_TUNER_QT1010) += qt1010.o
51obj-$(CONFIG_DVB_TUA6100) += tua6100.o 47obj-$(CONFIG_DVB_TUA6100) += tua6100.o
52obj-$(CONFIG_DVB_TUNER_MT2131) += mt2131.o 48obj-$(CONFIG_DVB_TUNER_MT2131) += mt2131.o
53obj-$(CONFIG_DVB_S5H1409) += s5h1409.o 49obj-$(CONFIG_DVB_S5H1409) += s5h1409.o
54obj-$(CONFIG_DVB_TUNER_XC5000) += xc5000.o
55obj-$(CONFIG_DVB_TUNER_ITD1000) += itd1000.o 50obj-$(CONFIG_DVB_TUNER_ITD1000) += itd1000.o
56obj-$(CONFIG_DVB_AU8522) += au8522.o 51obj-$(CONFIG_DVB_AU8522) += au8522.o
57obj-$(CONFIG_DVB_TDA10048) += tda10048.o 52obj-$(CONFIG_DVB_TDA10048) += tda10048.o
diff --git a/drivers/media/dvb/frontends/tda18271-common.c b/drivers/media/dvb/frontends/tda18271-common.c
deleted file mode 100644
index e27a7620a32f..000000000000
--- a/drivers/media/dvb/frontends/tda18271-common.c
+++ /dev/null
@@ -1,666 +0,0 @@
1/*
2 tda18271-common.c - driver for the Philips / NXP TDA18271 silicon tuner
3
4 Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include "tda18271-priv.h"
22
23static int tda18271_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
24{
25 struct tda18271_priv *priv = fe->tuner_priv;
26 enum tda18271_i2c_gate gate;
27 int ret = 0;
28
29 switch (priv->gate) {
30 case TDA18271_GATE_DIGITAL:
31 case TDA18271_GATE_ANALOG:
32 gate = priv->gate;
33 break;
34 case TDA18271_GATE_AUTO:
35 default:
36 switch (priv->mode) {
37 case TDA18271_DIGITAL:
38 gate = TDA18271_GATE_DIGITAL;
39 break;
40 case TDA18271_ANALOG:
41 default:
42 gate = TDA18271_GATE_ANALOG;
43 break;
44 }
45 }
46
47 switch (gate) {
48 case TDA18271_GATE_ANALOG:
49 if (fe->ops.analog_ops.i2c_gate_ctrl)
50 ret = fe->ops.analog_ops.i2c_gate_ctrl(fe, enable);
51 break;
52 case TDA18271_GATE_DIGITAL:
53 if (fe->ops.i2c_gate_ctrl)
54 ret = fe->ops.i2c_gate_ctrl(fe, enable);
55 break;
56 default:
57 ret = -EINVAL;
58 break;
59 }
60
61 return ret;
62};
63
64/*---------------------------------------------------------------------*/
65
66static void tda18271_dump_regs(struct dvb_frontend *fe, int extended)
67{
68 struct tda18271_priv *priv = fe->tuner_priv;
69 unsigned char *regs = priv->tda18271_regs;
70
71 tda_reg("=== TDA18271 REG DUMP ===\n");
72 tda_reg("ID_BYTE = 0x%02x\n", 0xff & regs[R_ID]);
73 tda_reg("THERMO_BYTE = 0x%02x\n", 0xff & regs[R_TM]);
74 tda_reg("POWER_LEVEL_BYTE = 0x%02x\n", 0xff & regs[R_PL]);
75 tda_reg("EASY_PROG_BYTE_1 = 0x%02x\n", 0xff & regs[R_EP1]);
76 tda_reg("EASY_PROG_BYTE_2 = 0x%02x\n", 0xff & regs[R_EP2]);
77 tda_reg("EASY_PROG_BYTE_3 = 0x%02x\n", 0xff & regs[R_EP3]);
78 tda_reg("EASY_PROG_BYTE_4 = 0x%02x\n", 0xff & regs[R_EP4]);
79 tda_reg("EASY_PROG_BYTE_5 = 0x%02x\n", 0xff & regs[R_EP5]);
80 tda_reg("CAL_POST_DIV_BYTE = 0x%02x\n", 0xff & regs[R_CPD]);
81 tda_reg("CAL_DIV_BYTE_1 = 0x%02x\n", 0xff & regs[R_CD1]);
82 tda_reg("CAL_DIV_BYTE_2 = 0x%02x\n", 0xff & regs[R_CD2]);
83 tda_reg("CAL_DIV_BYTE_3 = 0x%02x\n", 0xff & regs[R_CD3]);
84 tda_reg("MAIN_POST_DIV_BYTE = 0x%02x\n", 0xff & regs[R_MPD]);
85 tda_reg("MAIN_DIV_BYTE_1 = 0x%02x\n", 0xff & regs[R_MD1]);
86 tda_reg("MAIN_DIV_BYTE_2 = 0x%02x\n", 0xff & regs[R_MD2]);
87 tda_reg("MAIN_DIV_BYTE_3 = 0x%02x\n", 0xff & regs[R_MD3]);
88
89 /* only dump extended regs if DBG_ADV is set */
90 if (!(tda18271_debug & DBG_ADV))
91 return;
92
93 /* W indicates write-only registers.
94 * Register dump for write-only registers shows last value written. */
95
96 tda_reg("EXTENDED_BYTE_1 = 0x%02x\n", 0xff & regs[R_EB1]);
97 tda_reg("EXTENDED_BYTE_2 = 0x%02x\n", 0xff & regs[R_EB2]);
98 tda_reg("EXTENDED_BYTE_3 = 0x%02x\n", 0xff & regs[R_EB3]);
99 tda_reg("EXTENDED_BYTE_4 = 0x%02x\n", 0xff & regs[R_EB4]);
100 tda_reg("EXTENDED_BYTE_5 = 0x%02x\n", 0xff & regs[R_EB5]);
101 tda_reg("EXTENDED_BYTE_6 = 0x%02x\n", 0xff & regs[R_EB6]);
102 tda_reg("EXTENDED_BYTE_7 = 0x%02x\n", 0xff & regs[R_EB7]);
103 tda_reg("EXTENDED_BYTE_8 = 0x%02x\n", 0xff & regs[R_EB8]);
104 tda_reg("EXTENDED_BYTE_9 W = 0x%02x\n", 0xff & regs[R_EB9]);
105 tda_reg("EXTENDED_BYTE_10 = 0x%02x\n", 0xff & regs[R_EB10]);
106 tda_reg("EXTENDED_BYTE_11 = 0x%02x\n", 0xff & regs[R_EB11]);
107 tda_reg("EXTENDED_BYTE_12 = 0x%02x\n", 0xff & regs[R_EB12]);
108 tda_reg("EXTENDED_BYTE_13 = 0x%02x\n", 0xff & regs[R_EB13]);
109 tda_reg("EXTENDED_BYTE_14 = 0x%02x\n", 0xff & regs[R_EB14]);
110 tda_reg("EXTENDED_BYTE_15 = 0x%02x\n", 0xff & regs[R_EB15]);
111 tda_reg("EXTENDED_BYTE_16 W = 0x%02x\n", 0xff & regs[R_EB16]);
112 tda_reg("EXTENDED_BYTE_17 W = 0x%02x\n", 0xff & regs[R_EB17]);
113 tda_reg("EXTENDED_BYTE_18 = 0x%02x\n", 0xff & regs[R_EB18]);
114 tda_reg("EXTENDED_BYTE_19 W = 0x%02x\n", 0xff & regs[R_EB19]);
115 tda_reg("EXTENDED_BYTE_20 W = 0x%02x\n", 0xff & regs[R_EB20]);
116 tda_reg("EXTENDED_BYTE_21 = 0x%02x\n", 0xff & regs[R_EB21]);
117 tda_reg("EXTENDED_BYTE_22 = 0x%02x\n", 0xff & regs[R_EB22]);
118 tda_reg("EXTENDED_BYTE_23 = 0x%02x\n", 0xff & regs[R_EB23]);
119}
120
121int tda18271_read_regs(struct dvb_frontend *fe)
122{
123 struct tda18271_priv *priv = fe->tuner_priv;
124 unsigned char *regs = priv->tda18271_regs;
125 unsigned char buf = 0x00;
126 int ret;
127 struct i2c_msg msg[] = {
128 { .addr = priv->i2c_props.addr, .flags = 0,
129 .buf = &buf, .len = 1 },
130 { .addr = priv->i2c_props.addr, .flags = I2C_M_RD,
131 .buf = regs, .len = 16 }
132 };
133
134 tda18271_i2c_gate_ctrl(fe, 1);
135
136 /* read all registers */
137 ret = i2c_transfer(priv->i2c_props.adap, msg, 2);
138
139 tda18271_i2c_gate_ctrl(fe, 0);
140
141 if (ret != 2)
142 tda_err("ERROR: i2c_transfer returned: %d\n", ret);
143
144 if (tda18271_debug & DBG_REG)
145 tda18271_dump_regs(fe, 0);
146
147 return (ret == 2 ? 0 : ret);
148}
149
150int tda18271_read_extended(struct dvb_frontend *fe)
151{
152 struct tda18271_priv *priv = fe->tuner_priv;
153 unsigned char *regs = priv->tda18271_regs;
154 unsigned char regdump[TDA18271_NUM_REGS];
155 unsigned char buf = 0x00;
156 int ret, i;
157 struct i2c_msg msg[] = {
158 { .addr = priv->i2c_props.addr, .flags = 0,
159 .buf = &buf, .len = 1 },
160 { .addr = priv->i2c_props.addr, .flags = I2C_M_RD,
161 .buf = regdump, .len = TDA18271_NUM_REGS }
162 };
163
164 tda18271_i2c_gate_ctrl(fe, 1);
165
166 /* read all registers */
167 ret = i2c_transfer(priv->i2c_props.adap, msg, 2);
168
169 tda18271_i2c_gate_ctrl(fe, 0);
170
171 if (ret != 2)
172 tda_err("ERROR: i2c_transfer returned: %d\n", ret);
173
174 for (i = 0; i < TDA18271_NUM_REGS; i++) {
175 /* don't update write-only registers */
176 if ((i != R_EB9) &&
177 (i != R_EB16) &&
178 (i != R_EB17) &&
179 (i != R_EB19) &&
180 (i != R_EB20))
181 regs[i] = regdump[i];
182 }
183
184 if (tda18271_debug & DBG_REG)
185 tda18271_dump_regs(fe, 1);
186
187 return (ret == 2 ? 0 : ret);
188}
189
190int tda18271_write_regs(struct dvb_frontend *fe, int idx, int len)
191{
192 struct tda18271_priv *priv = fe->tuner_priv;
193 unsigned char *regs = priv->tda18271_regs;
194 unsigned char buf[TDA18271_NUM_REGS + 1];
195 struct i2c_msg msg = { .addr = priv->i2c_props.addr, .flags = 0,
196 .buf = buf, .len = len + 1 };
197 int i, ret;
198
199 BUG_ON((len == 0) || (idx + len > sizeof(buf)));
200
201 buf[0] = idx;
202 for (i = 1; i <= len; i++)
203 buf[i] = regs[idx - 1 + i];
204
205 tda18271_i2c_gate_ctrl(fe, 1);
206
207 /* write registers */
208 ret = i2c_transfer(priv->i2c_props.adap, &msg, 1);
209
210 tda18271_i2c_gate_ctrl(fe, 0);
211
212 if (ret != 1)
213 tda_err("ERROR: i2c_transfer returned: %d\n", ret);
214
215 return (ret == 1 ? 0 : ret);
216}
217
218/*---------------------------------------------------------------------*/
219
220int tda18271_charge_pump_source(struct dvb_frontend *fe,
221 enum tda18271_pll pll, int force)
222{
223 struct tda18271_priv *priv = fe->tuner_priv;
224 unsigned char *regs = priv->tda18271_regs;
225
226 int r_cp = (pll == TDA18271_CAL_PLL) ? R_EB7 : R_EB4;
227
228 regs[r_cp] &= ~0x20;
229 regs[r_cp] |= ((force & 1) << 5);
230 tda18271_write_regs(fe, r_cp, 1);
231
232 return 0;
233}
234
235int tda18271_init_regs(struct dvb_frontend *fe)
236{
237 struct tda18271_priv *priv = fe->tuner_priv;
238 unsigned char *regs = priv->tda18271_regs;
239
240 tda_dbg("initializing registers for device @ %d-%04x\n",
241 i2c_adapter_id(priv->i2c_props.adap),
242 priv->i2c_props.addr);
243
244 /* initialize registers */
245 switch (priv->id) {
246 case TDA18271HDC1:
247 regs[R_ID] = 0x83;
248 break;
249 case TDA18271HDC2:
250 regs[R_ID] = 0x84;
251 break;
252 };
253
254 regs[R_TM] = 0x08;
255 regs[R_PL] = 0x80;
256 regs[R_EP1] = 0xc6;
257 regs[R_EP2] = 0xdf;
258 regs[R_EP3] = 0x16;
259 regs[R_EP4] = 0x60;
260 regs[R_EP5] = 0x80;
261 regs[R_CPD] = 0x80;
262 regs[R_CD1] = 0x00;
263 regs[R_CD2] = 0x00;
264 regs[R_CD3] = 0x00;
265 regs[R_MPD] = 0x00;
266 regs[R_MD1] = 0x00;
267 regs[R_MD2] = 0x00;
268 regs[R_MD3] = 0x00;
269
270 switch (priv->id) {
271 case TDA18271HDC1:
272 regs[R_EB1] = 0xff;
273 break;
274 case TDA18271HDC2:
275 regs[R_EB1] = 0xfc;
276 break;
277 };
278
279 regs[R_EB2] = 0x01;
280 regs[R_EB3] = 0x84;
281 regs[R_EB4] = 0x41;
282 regs[R_EB5] = 0x01;
283 regs[R_EB6] = 0x84;
284 regs[R_EB7] = 0x40;
285 regs[R_EB8] = 0x07;
286 regs[R_EB9] = 0x00;
287 regs[R_EB10] = 0x00;
288 regs[R_EB11] = 0x96;
289
290 switch (priv->id) {
291 case TDA18271HDC1:
292 regs[R_EB12] = 0x0f;
293 break;
294 case TDA18271HDC2:
295 regs[R_EB12] = 0x33;
296 break;
297 };
298
299 regs[R_EB13] = 0xc1;
300 regs[R_EB14] = 0x00;
301 regs[R_EB15] = 0x8f;
302 regs[R_EB16] = 0x00;
303 regs[R_EB17] = 0x00;
304
305 switch (priv->id) {
306 case TDA18271HDC1:
307 regs[R_EB18] = 0x00;
308 break;
309 case TDA18271HDC2:
310 regs[R_EB18] = 0x8c;
311 break;
312 };
313
314 regs[R_EB19] = 0x00;
315 regs[R_EB20] = 0x20;
316
317 switch (priv->id) {
318 case TDA18271HDC1:
319 regs[R_EB21] = 0x33;
320 break;
321 case TDA18271HDC2:
322 regs[R_EB21] = 0xb3;
323 break;
324 };
325
326 regs[R_EB22] = 0x48;
327 regs[R_EB23] = 0xb0;
328
329 if (priv->small_i2c) {
330 tda18271_write_regs(fe, 0x00, 0x10);
331 tda18271_write_regs(fe, 0x10, 0x10);
332 tda18271_write_regs(fe, 0x20, 0x07);
333 } else
334 tda18271_write_regs(fe, 0x00, TDA18271_NUM_REGS);
335
336 /* setup agc1 gain */
337 regs[R_EB17] = 0x00;
338 tda18271_write_regs(fe, R_EB17, 1);
339 regs[R_EB17] = 0x03;
340 tda18271_write_regs(fe, R_EB17, 1);
341 regs[R_EB17] = 0x43;
342 tda18271_write_regs(fe, R_EB17, 1);
343 regs[R_EB17] = 0x4c;
344 tda18271_write_regs(fe, R_EB17, 1);
345
346 /* setup agc2 gain */
347 if ((priv->id) == TDA18271HDC1) {
348 regs[R_EB20] = 0xa0;
349 tda18271_write_regs(fe, R_EB20, 1);
350 regs[R_EB20] = 0xa7;
351 tda18271_write_regs(fe, R_EB20, 1);
352 regs[R_EB20] = 0xe7;
353 tda18271_write_regs(fe, R_EB20, 1);
354 regs[R_EB20] = 0xec;
355 tda18271_write_regs(fe, R_EB20, 1);
356 }
357
358 /* image rejection calibration */
359
360 /* low-band */
361 regs[R_EP3] = 0x1f;
362 regs[R_EP4] = 0x66;
363 regs[R_EP5] = 0x81;
364 regs[R_CPD] = 0xcc;
365 regs[R_CD1] = 0x6c;
366 regs[R_CD2] = 0x00;
367 regs[R_CD3] = 0x00;
368 regs[R_MPD] = 0xcd;
369 regs[R_MD1] = 0x77;
370 regs[R_MD2] = 0x08;
371 regs[R_MD3] = 0x00;
372
373 tda18271_write_regs(fe, R_EP3, 11);
374
375 if ((priv->id) == TDA18271HDC2) {
376 /* main pll cp source on */
377 tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1);
378 msleep(1);
379
380 /* main pll cp source off */
381 tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0);
382 }
383
384 msleep(5); /* pll locking */
385
386 /* launch detector */
387 tda18271_write_regs(fe, R_EP1, 1);
388 msleep(5); /* wanted low measurement */
389
390 regs[R_EP5] = 0x85;
391 regs[R_CPD] = 0xcb;
392 regs[R_CD1] = 0x66;
393 regs[R_CD2] = 0x70;
394
395 tda18271_write_regs(fe, R_EP3, 7);
396 msleep(5); /* pll locking */
397
398 /* launch optimization algorithm */
399 tda18271_write_regs(fe, R_EP2, 1);
400 msleep(30); /* image low optimization completion */
401
402 /* mid-band */
403 regs[R_EP5] = 0x82;
404 regs[R_CPD] = 0xa8;
405 regs[R_CD2] = 0x00;
406 regs[R_MPD] = 0xa9;
407 regs[R_MD1] = 0x73;
408 regs[R_MD2] = 0x1a;
409
410 tda18271_write_regs(fe, R_EP3, 11);
411 msleep(5); /* pll locking */
412
413 /* launch detector */
414 tda18271_write_regs(fe, R_EP1, 1);
415 msleep(5); /* wanted mid measurement */
416
417 regs[R_EP5] = 0x86;
418 regs[R_CPD] = 0xa8;
419 regs[R_CD1] = 0x66;
420 regs[R_CD2] = 0xa0;
421
422 tda18271_write_regs(fe, R_EP3, 7);
423 msleep(5); /* pll locking */
424
425 /* launch optimization algorithm */
426 tda18271_write_regs(fe, R_EP2, 1);
427 msleep(30); /* image mid optimization completion */
428
429 /* high-band */
430 regs[R_EP5] = 0x83;
431 regs[R_CPD] = 0x98;
432 regs[R_CD1] = 0x65;
433 regs[R_CD2] = 0x00;
434 regs[R_MPD] = 0x99;
435 regs[R_MD1] = 0x71;
436 regs[R_MD2] = 0xcd;
437
438 tda18271_write_regs(fe, R_EP3, 11);
439 msleep(5); /* pll locking */
440
441 /* launch detector */
442 tda18271_write_regs(fe, R_EP1, 1);
443 msleep(5); /* wanted high measurement */
444
445 regs[R_EP5] = 0x87;
446 regs[R_CD1] = 0x65;
447 regs[R_CD2] = 0x50;
448
449 tda18271_write_regs(fe, R_EP3, 7);
450 msleep(5); /* pll locking */
451
452 /* launch optimization algorithm */
453 tda18271_write_regs(fe, R_EP2, 1);
454 msleep(30); /* image high optimization completion */
455
456 /* return to normal mode */
457 regs[R_EP4] = 0x64;
458 tda18271_write_regs(fe, R_EP4, 1);
459
460 /* synchronize */
461 tda18271_write_regs(fe, R_EP1, 1);
462
463 return 0;
464}
465
466/*---------------------------------------------------------------------*/
467
468/*
469 * Standby modes, EP3 [7:5]
470 *
471 * | SM || SM_LT || SM_XT || mode description
472 * |=====\\=======\\=======\\===================================
473 * | 0 || 0 || 0 || normal mode
474 * |-----||-------||-------||-----------------------------------
475 * | || || || standby mode w/ slave tuner output
476 * | 1 || 0 || 0 || & loop thru & xtal oscillator on
477 * |-----||-------||-------||-----------------------------------
478 * | 1 || 1 || 0 || standby mode w/ xtal oscillator on
479 * |-----||-------||-------||-----------------------------------
480 * | 1 || 1 || 1 || power off
481 *
482 */
483
484int tda18271_set_standby_mode(struct dvb_frontend *fe,
485 int sm, int sm_lt, int sm_xt)
486{
487 struct tda18271_priv *priv = fe->tuner_priv;
488 unsigned char *regs = priv->tda18271_regs;
489
490 tda_dbg("sm = %d, sm_lt = %d, sm_xt = %d\n", sm, sm_lt, sm_xt);
491
492 regs[R_EP3] &= ~0xe0; /* clear sm, sm_lt, sm_xt */
493 regs[R_EP3] |= sm ? (1 << 7) : 0 |
494 sm_lt ? (1 << 6) : 0 |
495 sm_xt ? (1 << 5) : 0;
496
497 tda18271_write_regs(fe, R_EP3, 1);
498
499 return 0;
500}
501
502/*---------------------------------------------------------------------*/
503
504int tda18271_calc_main_pll(struct dvb_frontend *fe, u32 freq)
505{
506 /* sets main post divider & divider bytes, but does not write them */
507 struct tda18271_priv *priv = fe->tuner_priv;
508 unsigned char *regs = priv->tda18271_regs;
509 u8 d, pd;
510 u32 div;
511
512 int ret = tda18271_lookup_pll_map(fe, MAIN_PLL, &freq, &pd, &d);
513 if (ret < 0)
514 goto fail;
515
516 regs[R_MPD] = (0x77 & pd);
517
518 switch (priv->mode) {
519 case TDA18271_ANALOG:
520 regs[R_MPD] &= ~0x08;
521 break;
522 case TDA18271_DIGITAL:
523 regs[R_MPD] |= 0x08;
524 break;
525 }
526
527 div = ((d * (freq / 1000)) << 7) / 125;
528
529 regs[R_MD1] = 0x7f & (div >> 16);
530 regs[R_MD2] = 0xff & (div >> 8);
531 regs[R_MD3] = 0xff & div;
532fail:
533 return ret;
534}
535
536int tda18271_calc_cal_pll(struct dvb_frontend *fe, u32 freq)
537{
538 /* sets cal post divider & divider bytes, but does not write them */
539 struct tda18271_priv *priv = fe->tuner_priv;
540 unsigned char *regs = priv->tda18271_regs;
541 u8 d, pd;
542 u32 div;
543
544 int ret = tda18271_lookup_pll_map(fe, CAL_PLL, &freq, &pd, &d);
545 if (ret < 0)
546 goto fail;
547
548 regs[R_CPD] = pd;
549
550 div = ((d * (freq / 1000)) << 7) / 125;
551
552 regs[R_CD1] = 0x7f & (div >> 16);
553 regs[R_CD2] = 0xff & (div >> 8);
554 regs[R_CD3] = 0xff & div;
555fail:
556 return ret;
557}
558
559/*---------------------------------------------------------------------*/
560
561int tda18271_calc_bp_filter(struct dvb_frontend *fe, u32 *freq)
562{
563 /* sets bp filter bits, but does not write them */
564 struct tda18271_priv *priv = fe->tuner_priv;
565 unsigned char *regs = priv->tda18271_regs;
566 u8 val;
567
568 int ret = tda18271_lookup_map(fe, BP_FILTER, freq, &val);
569 if (ret < 0)
570 goto fail;
571
572 regs[R_EP1] &= ~0x07; /* clear bp filter bits */
573 regs[R_EP1] |= (0x07 & val);
574fail:
575 return ret;
576}
577
578int tda18271_calc_km(struct dvb_frontend *fe, u32 *freq)
579{
580 /* sets K & M bits, but does not write them */
581 struct tda18271_priv *priv = fe->tuner_priv;
582 unsigned char *regs = priv->tda18271_regs;
583 u8 val;
584
585 int ret = tda18271_lookup_map(fe, RF_CAL_KMCO, freq, &val);
586 if (ret < 0)
587 goto fail;
588
589 regs[R_EB13] &= ~0x7c; /* clear k & m bits */
590 regs[R_EB13] |= (0x7c & val);
591fail:
592 return ret;
593}
594
595int tda18271_calc_rf_band(struct dvb_frontend *fe, u32 *freq)
596{
597 /* sets rf band bits, but does not write them */
598 struct tda18271_priv *priv = fe->tuner_priv;
599 unsigned char *regs = priv->tda18271_regs;
600 u8 val;
601
602 int ret = tda18271_lookup_map(fe, RF_BAND, freq, &val);
603 if (ret < 0)
604 goto fail;
605
606 regs[R_EP2] &= ~0xe0; /* clear rf band bits */
607 regs[R_EP2] |= (0xe0 & (val << 5));
608fail:
609 return ret;
610}
611
612int tda18271_calc_gain_taper(struct dvb_frontend *fe, u32 *freq)
613{
614 /* sets gain taper bits, but does not write them */
615 struct tda18271_priv *priv = fe->tuner_priv;
616 unsigned char *regs = priv->tda18271_regs;
617 u8 val;
618
619 int ret = tda18271_lookup_map(fe, GAIN_TAPER, freq, &val);
620 if (ret < 0)
621 goto fail;
622
623 regs[R_EP2] &= ~0x1f; /* clear gain taper bits */
624 regs[R_EP2] |= (0x1f & val);
625fail:
626 return ret;
627}
628
629int tda18271_calc_ir_measure(struct dvb_frontend *fe, u32 *freq)
630{
631 /* sets IR Meas bits, but does not write them */
632 struct tda18271_priv *priv = fe->tuner_priv;
633 unsigned char *regs = priv->tda18271_regs;
634 u8 val;
635
636 int ret = tda18271_lookup_map(fe, IR_MEASURE, freq, &val);
637 if (ret < 0)
638 goto fail;
639
640 regs[R_EP5] &= ~0x07;
641 regs[R_EP5] |= (0x07 & val);
642fail:
643 return ret;
644}
645
646int tda18271_calc_rf_cal(struct dvb_frontend *fe, u32 *freq)
647{
648 /* sets rf cal byte (RFC_Cprog), but does not write it */
649 struct tda18271_priv *priv = fe->tuner_priv;
650 unsigned char *regs = priv->tda18271_regs;
651 u8 val;
652
653 tda18271_lookup_map(fe, RF_CAL, freq, &val);
654
655 regs[R_EB14] = val;
656
657 return 0;
658}
659
660/*
661 * Overrides for Emacs so that we follow Linus's tabbing style.
662 * ---------------------------------------------------------------------------
663 * Local variables:
664 * c-basic-offset: 8
665 * End:
666 */
diff --git a/drivers/media/dvb/frontends/tda18271-fe.c b/drivers/media/dvb/frontends/tda18271-fe.c
deleted file mode 100644
index b262100ae897..000000000000
--- a/drivers/media/dvb/frontends/tda18271-fe.c
+++ /dev/null
@@ -1,1153 +0,0 @@
1/*
2 tda18271-fe.c - driver for the Philips / NXP TDA18271 silicon tuner
3
4 Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/delay.h>
22#include <linux/videodev2.h>
23#include "tda18271-priv.h"
24
25int tda18271_debug;
26module_param_named(debug, tda18271_debug, int, 0644);
27MODULE_PARM_DESC(debug, "set debug level "
28 "(info=1, map=2, reg=4, adv=8, cal=16 (or-able))");
29
30static int tda18271_cal_on_startup;
31module_param_named(cal, tda18271_cal_on_startup, int, 0644);
32MODULE_PARM_DESC(cal, "perform RF tracking filter calibration on startup");
33
34static DEFINE_MUTEX(tda18271_list_mutex);
35static LIST_HEAD(hybrid_tuner_instance_list);
36
37/*---------------------------------------------------------------------*/
38
39static inline int charge_pump_source(struct dvb_frontend *fe, int force)
40{
41 struct tda18271_priv *priv = fe->tuner_priv;
42 return tda18271_charge_pump_source(fe,
43 (priv->role == TDA18271_SLAVE) ?
44 TDA18271_CAL_PLL :
45 TDA18271_MAIN_PLL, force);
46}
47
48static int tda18271_channel_configuration(struct dvb_frontend *fe,
49 struct tda18271_std_map_item *map,
50 u32 freq, u32 bw)
51{
52 struct tda18271_priv *priv = fe->tuner_priv;
53 unsigned char *regs = priv->tda18271_regs;
54 u32 N;
55
56 /* update TV broadcast parameters */
57
58 /* set standard */
59 regs[R_EP3] &= ~0x1f; /* clear std bits */
60 regs[R_EP3] |= (map->agc_mode << 3) | map->std;
61
62 /* set rfagc to high speed mode */
63 regs[R_EP3] &= ~0x04;
64
65 /* set cal mode to normal */
66 regs[R_EP4] &= ~0x03;
67
68 /* update IF output level & IF notch frequency */
69 regs[R_EP4] &= ~0x1c; /* clear if level bits */
70 regs[R_EP4] |= (map->if_lvl << 2);
71
72 switch (priv->mode) {
73 case TDA18271_ANALOG:
74 regs[R_MPD] &= ~0x80; /* IF notch = 0 */
75 break;
76 case TDA18271_DIGITAL:
77 regs[R_MPD] |= 0x80; /* IF notch = 1 */
78 break;
79 }
80
81 /* update FM_RFn */
82 regs[R_EP4] &= ~0x80;
83 regs[R_EP4] |= map->fm_rfn << 7;
84
85 /* update rf top / if top */
86 regs[R_EB22] = 0x00;
87 regs[R_EB22] |= map->rfagc_top;
88 tda18271_write_regs(fe, R_EB22, 1);
89
90 /* --------------------------------------------------------------- */
91
92 /* disable Power Level Indicator */
93 regs[R_EP1] |= 0x40;
94
95 /* frequency dependent parameters */
96
97 tda18271_calc_ir_measure(fe, &freq);
98
99 tda18271_calc_bp_filter(fe, &freq);
100
101 tda18271_calc_rf_band(fe, &freq);
102
103 tda18271_calc_gain_taper(fe, &freq);
104
105 /* --------------------------------------------------------------- */
106
107 /* dual tuner and agc1 extra configuration */
108
109 switch (priv->role) {
110 case TDA18271_MASTER:
111 regs[R_EB1] |= 0x04; /* main vco */
112 break;
113 case TDA18271_SLAVE:
114 regs[R_EB1] &= ~0x04; /* cal vco */
115 break;
116 }
117
118 /* agc1 always active */
119 regs[R_EB1] &= ~0x02;
120
121 /* agc1 has priority on agc2 */
122 regs[R_EB1] &= ~0x01;
123
124 tda18271_write_regs(fe, R_EB1, 1);
125
126 /* --------------------------------------------------------------- */
127
128 N = map->if_freq * 1000 + freq;
129
130 switch (priv->role) {
131 case TDA18271_MASTER:
132 tda18271_calc_main_pll(fe, N);
133 tda18271_write_regs(fe, R_MPD, 4);
134 break;
135 case TDA18271_SLAVE:
136 tda18271_calc_cal_pll(fe, N);
137 tda18271_write_regs(fe, R_CPD, 4);
138
139 regs[R_MPD] = regs[R_CPD] & 0x7f;
140 tda18271_write_regs(fe, R_MPD, 1);
141 break;
142 }
143
144 tda18271_write_regs(fe, R_TM, 7);
145
146 /* force charge pump source */
147 charge_pump_source(fe, 1);
148
149 msleep(1);
150
151 /* return pll to normal operation */
152 charge_pump_source(fe, 0);
153
154 msleep(20);
155
156 /* set rfagc to normal speed mode */
157 if (map->fm_rfn)
158 regs[R_EP3] &= ~0x04;
159 else
160 regs[R_EP3] |= 0x04;
161 tda18271_write_regs(fe, R_EP3, 1);
162
163 return 0;
164}
165
166static int tda18271_read_thermometer(struct dvb_frontend *fe)
167{
168 struct tda18271_priv *priv = fe->tuner_priv;
169 unsigned char *regs = priv->tda18271_regs;
170 int tm;
171
172 /* switch thermometer on */
173 regs[R_TM] |= 0x10;
174 tda18271_write_regs(fe, R_TM, 1);
175
176 /* read thermometer info */
177 tda18271_read_regs(fe);
178
179 if ((((regs[R_TM] & 0x0f) == 0x00) && ((regs[R_TM] & 0x20) == 0x20)) ||
180 (((regs[R_TM] & 0x0f) == 0x08) && ((regs[R_TM] & 0x20) == 0x00))) {
181
182 if ((regs[R_TM] & 0x20) == 0x20)
183 regs[R_TM] &= ~0x20;
184 else
185 regs[R_TM] |= 0x20;
186
187 tda18271_write_regs(fe, R_TM, 1);
188
189 msleep(10); /* temperature sensing */
190
191 /* read thermometer info */
192 tda18271_read_regs(fe);
193 }
194
195 tm = tda18271_lookup_thermometer(fe);
196
197 /* switch thermometer off */
198 regs[R_TM] &= ~0x10;
199 tda18271_write_regs(fe, R_TM, 1);
200
201 /* set CAL mode to normal */
202 regs[R_EP4] &= ~0x03;
203 tda18271_write_regs(fe, R_EP4, 1);
204
205 return tm;
206}
207
208/* ------------------------------------------------------------------ */
209
210static int tda18271c2_rf_tracking_filters_correction(struct dvb_frontend *fe,
211 u32 freq)
212{
213 struct tda18271_priv *priv = fe->tuner_priv;
214 struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
215 unsigned char *regs = priv->tda18271_regs;
216 int tm_current, rfcal_comp, approx, i;
217 u8 dc_over_dt, rf_tab;
218
219 /* power up */
220 tda18271_set_standby_mode(fe, 0, 0, 0);
221
222 /* read die current temperature */
223 tm_current = tda18271_read_thermometer(fe);
224
225 /* frequency dependent parameters */
226
227 tda18271_calc_rf_cal(fe, &freq);
228 rf_tab = regs[R_EB14];
229
230 i = tda18271_lookup_rf_band(fe, &freq, NULL);
231 if (i < 0)
232 return -EINVAL;
233
234 if ((0 == map[i].rf3) || (freq / 1000 < map[i].rf2)) {
235 approx = map[i].rf_a1 *
236 (freq / 1000 - map[i].rf1) + map[i].rf_b1 + rf_tab;
237 } else {
238 approx = map[i].rf_a2 *
239 (freq / 1000 - map[i].rf2) + map[i].rf_b2 + rf_tab;
240 }
241
242 if (approx < 0)
243 approx = 0;
244 if (approx > 255)
245 approx = 255;
246
247 tda18271_lookup_map(fe, RF_CAL_DC_OVER_DT, &freq, &dc_over_dt);
248
249 /* calculate temperature compensation */
250 rfcal_comp = dc_over_dt * (tm_current - priv->tm_rfcal);
251
252 regs[R_EB14] = approx + rfcal_comp;
253 tda18271_write_regs(fe, R_EB14, 1);
254
255 return 0;
256}
257
258static int tda18271_por(struct dvb_frontend *fe)
259{
260 struct tda18271_priv *priv = fe->tuner_priv;
261 unsigned char *regs = priv->tda18271_regs;
262
263 /* power up detector 1 */
264 regs[R_EB12] &= ~0x20;
265 tda18271_write_regs(fe, R_EB12, 1);
266
267 regs[R_EB18] &= ~0x80; /* turn agc1 loop on */
268 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
269 tda18271_write_regs(fe, R_EB18, 1);
270
271 regs[R_EB21] |= 0x03; /* set agc2_gain to -6 dB */
272
273 /* POR mode */
274 tda18271_set_standby_mode(fe, 1, 0, 0);
275
276 /* disable 1.5 MHz low pass filter */
277 regs[R_EB23] &= ~0x04; /* forcelp_fc2_en = 0 */
278 regs[R_EB23] &= ~0x02; /* XXX: lp_fc[2] = 0 */
279 tda18271_write_regs(fe, R_EB21, 3);
280
281 return 0;
282}
283
284static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
285{
286 struct tda18271_priv *priv = fe->tuner_priv;
287 unsigned char *regs = priv->tda18271_regs;
288 u32 N;
289
290 /* set CAL mode to normal */
291 regs[R_EP4] &= ~0x03;
292 tda18271_write_regs(fe, R_EP4, 1);
293
294 /* switch off agc1 */
295 regs[R_EP3] |= 0x40; /* sm_lt = 1 */
296
297 regs[R_EB18] |= 0x03; /* set agc1_gain to 15 dB */
298 tda18271_write_regs(fe, R_EB18, 1);
299
300 /* frequency dependent parameters */
301
302 tda18271_calc_bp_filter(fe, &freq);
303 tda18271_calc_gain_taper(fe, &freq);
304 tda18271_calc_rf_band(fe, &freq);
305 tda18271_calc_km(fe, &freq);
306
307 tda18271_write_regs(fe, R_EP1, 3);
308 tda18271_write_regs(fe, R_EB13, 1);
309
310 /* main pll charge pump source */
311 tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1);
312
313 /* cal pll charge pump source */
314 tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 1);
315
316 /* force dcdc converter to 0 V */
317 regs[R_EB14] = 0x00;
318 tda18271_write_regs(fe, R_EB14, 1);
319
320 /* disable plls lock */
321 regs[R_EB20] &= ~0x20;
322 tda18271_write_regs(fe, R_EB20, 1);
323
324 /* set CAL mode to RF tracking filter calibration */
325 regs[R_EP4] |= 0x03;
326 tda18271_write_regs(fe, R_EP4, 2);
327
328 /* --------------------------------------------------------------- */
329
330 /* set the internal calibration signal */
331 N = freq;
332
333 tda18271_calc_cal_pll(fe, N);
334 tda18271_write_regs(fe, R_CPD, 4);
335
336 /* downconvert internal calibration */
337 N += 1000000;
338
339 tda18271_calc_main_pll(fe, N);
340 tda18271_write_regs(fe, R_MPD, 4);
341
342 msleep(5);
343
344 tda18271_write_regs(fe, R_EP2, 1);
345 tda18271_write_regs(fe, R_EP1, 1);
346 tda18271_write_regs(fe, R_EP2, 1);
347 tda18271_write_regs(fe, R_EP1, 1);
348
349 /* --------------------------------------------------------------- */
350
351 /* normal operation for the main pll */
352 tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0);
353
354 /* normal operation for the cal pll */
355 tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 0);
356
357 msleep(10); /* plls locking */
358
359 /* launch the rf tracking filters calibration */
360 regs[R_EB20] |= 0x20;
361 tda18271_write_regs(fe, R_EB20, 1);
362
363 msleep(60); /* calibration */
364
365 /* --------------------------------------------------------------- */
366
367 /* set CAL mode to normal */
368 regs[R_EP4] &= ~0x03;
369
370 /* switch on agc1 */
371 regs[R_EP3] &= ~0x40; /* sm_lt = 0 */
372
373 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
374 tda18271_write_regs(fe, R_EB18, 1);
375
376 tda18271_write_regs(fe, R_EP3, 2);
377
378 /* synchronization */
379 tda18271_write_regs(fe, R_EP1, 1);
380
381 /* get calibration result */
382 tda18271_read_extended(fe);
383
384 return regs[R_EB14];
385}
386
387static int tda18271_powerscan(struct dvb_frontend *fe,
388 u32 *freq_in, u32 *freq_out)
389{
390 struct tda18271_priv *priv = fe->tuner_priv;
391 unsigned char *regs = priv->tda18271_regs;
392 int sgn, bcal, count, wait;
393 u8 cid_target;
394 u16 count_limit;
395 u32 freq;
396
397 freq = *freq_in;
398
399 tda18271_calc_rf_band(fe, &freq);
400 tda18271_calc_rf_cal(fe, &freq);
401 tda18271_calc_gain_taper(fe, &freq);
402 tda18271_lookup_cid_target(fe, &freq, &cid_target, &count_limit);
403
404 tda18271_write_regs(fe, R_EP2, 1);
405 tda18271_write_regs(fe, R_EB14, 1);
406
407 /* downconvert frequency */
408 freq += 1000000;
409
410 tda18271_calc_main_pll(fe, freq);
411 tda18271_write_regs(fe, R_MPD, 4);
412
413 msleep(5); /* pll locking */
414
415 /* detection mode */
416 regs[R_EP4] &= ~0x03;
417 regs[R_EP4] |= 0x01;
418 tda18271_write_regs(fe, R_EP4, 1);
419
420 /* launch power detection measurement */
421 tda18271_write_regs(fe, R_EP2, 1);
422
423 /* read power detection info, stored in EB10 */
424 tda18271_read_extended(fe);
425
426 /* algorithm initialization */
427 sgn = 1;
428 *freq_out = *freq_in;
429 bcal = 0;
430 count = 0;
431 wait = false;
432
433 while ((regs[R_EB10] & 0x3f) < cid_target) {
434 /* downconvert updated freq to 1 MHz */
435 freq = *freq_in + (sgn * count) + 1000000;
436
437 tda18271_calc_main_pll(fe, freq);
438 tda18271_write_regs(fe, R_MPD, 4);
439
440 if (wait) {
441 msleep(5); /* pll locking */
442 wait = false;
443 } else
444 udelay(100); /* pll locking */
445
446 /* launch power detection measurement */
447 tda18271_write_regs(fe, R_EP2, 1);
448
449 /* read power detection info, stored in EB10 */
450 tda18271_read_extended(fe);
451
452 count += 200;
453
454 if (count <= count_limit)
455 continue;
456
457 if (sgn <= 0)
458 break;
459
460 sgn = -1 * sgn;
461 count = 200;
462 wait = true;
463 }
464
465 if ((regs[R_EB10] & 0x3f) >= cid_target) {
466 bcal = 1;
467 *freq_out = freq - 1000000;
468 } else
469 bcal = 0;
470
471 tda_cal("bcal = %d, freq_in = %d, freq_out = %d (freq = %d)\n",
472 bcal, *freq_in, *freq_out, freq);
473
474 return bcal;
475}
476
477static int tda18271_powerscan_init(struct dvb_frontend *fe)
478{
479 struct tda18271_priv *priv = fe->tuner_priv;
480 unsigned char *regs = priv->tda18271_regs;
481
482 /* set standard to digital */
483 regs[R_EP3] &= ~0x1f; /* clear std bits */
484 regs[R_EP3] |= 0x12;
485
486 /* set cal mode to normal */
487 regs[R_EP4] &= ~0x03;
488
489 /* update IF output level & IF notch frequency */
490 regs[R_EP4] &= ~0x1c; /* clear if level bits */
491
492 tda18271_write_regs(fe, R_EP3, 2);
493
494 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
495 tda18271_write_regs(fe, R_EB18, 1);
496
497 regs[R_EB21] &= ~0x03; /* set agc2_gain to -15 dB */
498
499 /* 1.5 MHz low pass filter */
500 regs[R_EB23] |= 0x04; /* forcelp_fc2_en = 1 */
501 regs[R_EB23] |= 0x02; /* lp_fc[2] = 1 */
502
503 tda18271_write_regs(fe, R_EB21, 3);
504
505 return 0;
506}
507
508static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
509{
510 struct tda18271_priv *priv = fe->tuner_priv;
511 struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
512 unsigned char *regs = priv->tda18271_regs;
513 int bcal, rf, i;
514#define RF1 0
515#define RF2 1
516#define RF3 2
517 u32 rf_default[3];
518 u32 rf_freq[3];
519 u8 prog_cal[3];
520 u8 prog_tab[3];
521
522 i = tda18271_lookup_rf_band(fe, &freq, NULL);
523
524 if (i < 0)
525 return i;
526
527 rf_default[RF1] = 1000 * map[i].rf1_def;
528 rf_default[RF2] = 1000 * map[i].rf2_def;
529 rf_default[RF3] = 1000 * map[i].rf3_def;
530
531 for (rf = RF1; rf <= RF3; rf++) {
532 if (0 == rf_default[rf])
533 return 0;
534 tda_cal("freq = %d, rf = %d\n", freq, rf);
535
536 /* look for optimized calibration frequency */
537 bcal = tda18271_powerscan(fe, &rf_default[rf], &rf_freq[rf]);
538
539 tda18271_calc_rf_cal(fe, &rf_freq[rf]);
540 prog_tab[rf] = regs[R_EB14];
541
542 if (1 == bcal)
543 prog_cal[rf] = tda18271_calibrate_rf(fe, rf_freq[rf]);
544 else
545 prog_cal[rf] = prog_tab[rf];
546
547 switch (rf) {
548 case RF1:
549 map[i].rf_a1 = 0;
550 map[i].rf_b1 = prog_cal[RF1] - prog_tab[RF1];
551 map[i].rf1 = rf_freq[RF1] / 1000;
552 break;
553 case RF2:
554 map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] -
555 prog_cal[RF1] + prog_tab[RF1]) /
556 ((rf_freq[RF2] - rf_freq[RF1]) / 1000);
557 map[i].rf2 = rf_freq[RF2] / 1000;
558 break;
559 case RF3:
560 map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] -
561 prog_cal[RF2] + prog_tab[RF2]) /
562 ((rf_freq[RF3] - rf_freq[RF2]) / 1000);
563 map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2];
564 map[i].rf3 = rf_freq[RF3] / 1000;
565 break;
566 default:
567 BUG();
568 }
569 }
570
571 return 0;
572}
573
574static int tda18271_calc_rf_filter_curve(struct dvb_frontend *fe)
575{
576 struct tda18271_priv *priv = fe->tuner_priv;
577 unsigned int i;
578
579 tda_info("tda18271: performing RF tracking filter calibration\n");
580
581 /* wait for die temperature stabilization */
582 msleep(200);
583
584 tda18271_powerscan_init(fe);
585
586 /* rf band calibration */
587 for (i = 0; priv->rf_cal_state[i].rfmax != 0; i++)
588 tda18271_rf_tracking_filters_init(fe, 1000 *
589 priv->rf_cal_state[i].rfmax);
590
591 priv->tm_rfcal = tda18271_read_thermometer(fe);
592
593 return 0;
594}
595
596/* ------------------------------------------------------------------ */
597
598static int tda18271c2_rf_cal_init(struct dvb_frontend *fe)
599{
600 struct tda18271_priv *priv = fe->tuner_priv;
601 unsigned char *regs = priv->tda18271_regs;
602
603 /* test RF_CAL_OK to see if we need init */
604 if ((regs[R_EP1] & 0x10) == 0)
605 priv->cal_initialized = false;
606
607 if (priv->cal_initialized)
608 return 0;
609
610 tda18271_calc_rf_filter_curve(fe);
611
612 tda18271_por(fe);
613
614 tda_info("tda18271: RF tracking filter calibration complete\n");
615
616 priv->cal_initialized = true;
617
618 return 0;
619}
620
621static int tda18271c1_rf_tracking_filter_calibration(struct dvb_frontend *fe,
622 u32 freq, u32 bw)
623{
624 struct tda18271_priv *priv = fe->tuner_priv;
625 unsigned char *regs = priv->tda18271_regs;
626 u32 N = 0;
627
628 /* calculate bp filter */
629 tda18271_calc_bp_filter(fe, &freq);
630 tda18271_write_regs(fe, R_EP1, 1);
631
632 regs[R_EB4] &= 0x07;
633 regs[R_EB4] |= 0x60;
634 tda18271_write_regs(fe, R_EB4, 1);
635
636 regs[R_EB7] = 0x60;
637 tda18271_write_regs(fe, R_EB7, 1);
638
639 regs[R_EB14] = 0x00;
640 tda18271_write_regs(fe, R_EB14, 1);
641
642 regs[R_EB20] = 0xcc;
643 tda18271_write_regs(fe, R_EB20, 1);
644
645 /* set cal mode to RF tracking filter calibration */
646 regs[R_EP4] |= 0x03;
647
648 /* calculate cal pll */
649
650 switch (priv->mode) {
651 case TDA18271_ANALOG:
652 N = freq - 1250000;
653 break;
654 case TDA18271_DIGITAL:
655 N = freq + bw / 2;
656 break;
657 }
658
659 tda18271_calc_cal_pll(fe, N);
660
661 /* calculate main pll */
662
663 switch (priv->mode) {
664 case TDA18271_ANALOG:
665 N = freq - 250000;
666 break;
667 case TDA18271_DIGITAL:
668 N = freq + bw / 2 + 1000000;
669 break;
670 }
671
672 tda18271_calc_main_pll(fe, N);
673
674 tda18271_write_regs(fe, R_EP3, 11);
675 msleep(5); /* RF tracking filter calibration initialization */
676
677 /* search for K,M,CO for RF calibration */
678 tda18271_calc_km(fe, &freq);
679 tda18271_write_regs(fe, R_EB13, 1);
680
681 /* search for rf band */
682 tda18271_calc_rf_band(fe, &freq);
683
684 /* search for gain taper */
685 tda18271_calc_gain_taper(fe, &freq);
686
687 tda18271_write_regs(fe, R_EP2, 1);
688 tda18271_write_regs(fe, R_EP1, 1);
689 tda18271_write_regs(fe, R_EP2, 1);
690 tda18271_write_regs(fe, R_EP1, 1);
691
692 regs[R_EB4] &= 0x07;
693 regs[R_EB4] |= 0x40;
694 tda18271_write_regs(fe, R_EB4, 1);
695
696 regs[R_EB7] = 0x40;
697 tda18271_write_regs(fe, R_EB7, 1);
698 msleep(10); /* pll locking */
699
700 regs[R_EB20] = 0xec;
701 tda18271_write_regs(fe, R_EB20, 1);
702 msleep(60); /* RF tracking filter calibration completion */
703
704 regs[R_EP4] &= ~0x03; /* set cal mode to normal */
705 tda18271_write_regs(fe, R_EP4, 1);
706
707 tda18271_write_regs(fe, R_EP1, 1);
708
709 /* RF tracking filter correction for VHF_Low band */
710 if (0 == tda18271_calc_rf_cal(fe, &freq))
711 tda18271_write_regs(fe, R_EB14, 1);
712
713 return 0;
714}
715
716/* ------------------------------------------------------------------ */
717
718static int tda18271_ir_cal_init(struct dvb_frontend *fe)
719{
720 struct tda18271_priv *priv = fe->tuner_priv;
721 unsigned char *regs = priv->tda18271_regs;
722
723 tda18271_read_regs(fe);
724
725 /* test IR_CAL_OK to see if we need init */
726 if ((regs[R_EP1] & 0x08) == 0)
727 tda18271_init_regs(fe);
728
729 return 0;
730}
731
732static int tda18271_init(struct dvb_frontend *fe)
733{
734 struct tda18271_priv *priv = fe->tuner_priv;
735
736 mutex_lock(&priv->lock);
737
738 /* power up */
739 tda18271_set_standby_mode(fe, 0, 0, 0);
740
741 /* initialization */
742 tda18271_ir_cal_init(fe);
743
744 if (priv->id == TDA18271HDC2)
745 tda18271c2_rf_cal_init(fe);
746
747 mutex_unlock(&priv->lock);
748
749 return 0;
750}
751
752static int tda18271_tune(struct dvb_frontend *fe,
753 struct tda18271_std_map_item *map, u32 freq, u32 bw)
754{
755 struct tda18271_priv *priv = fe->tuner_priv;
756
757 tda_dbg("freq = %d, ifc = %d, bw = %d, agc_mode = %d, std = %d\n",
758 freq, map->if_freq, bw, map->agc_mode, map->std);
759
760 tda18271_init(fe);
761
762 mutex_lock(&priv->lock);
763
764 switch (priv->id) {
765 case TDA18271HDC1:
766 tda18271c1_rf_tracking_filter_calibration(fe, freq, bw);
767 break;
768 case TDA18271HDC2:
769 tda18271c2_rf_tracking_filters_correction(fe, freq);
770 break;
771 }
772 tda18271_channel_configuration(fe, map, freq, bw);
773
774 mutex_unlock(&priv->lock);
775
776 return 0;
777}
778
779/* ------------------------------------------------------------------ */
780
781static int tda18271_set_params(struct dvb_frontend *fe,
782 struct dvb_frontend_parameters *params)
783{
784 struct tda18271_priv *priv = fe->tuner_priv;
785 struct tda18271_std_map *std_map = &priv->std;
786 struct tda18271_std_map_item *map;
787 int ret;
788 u32 bw, freq = params->frequency;
789
790 priv->mode = TDA18271_DIGITAL;
791
792 if (fe->ops.info.type == FE_ATSC) {
793 switch (params->u.vsb.modulation) {
794 case VSB_8:
795 case VSB_16:
796 map = &std_map->atsc_6;
797 break;
798 case QAM_64:
799 case QAM_256:
800 map = &std_map->qam_6;
801 break;
802 default:
803 tda_warn("modulation not set!\n");
804 return -EINVAL;
805 }
806#if 0
807 /* userspace request is already center adjusted */
808 freq += 1750000; /* Adjust to center (+1.75MHZ) */
809#endif
810 bw = 6000000;
811 } else if (fe->ops.info.type == FE_OFDM) {
812 switch (params->u.ofdm.bandwidth) {
813 case BANDWIDTH_6_MHZ:
814 bw = 6000000;
815 map = &std_map->dvbt_6;
816 break;
817 case BANDWIDTH_7_MHZ:
818 bw = 7000000;
819 map = &std_map->dvbt_7;
820 break;
821 case BANDWIDTH_8_MHZ:
822 bw = 8000000;
823 map = &std_map->dvbt_8;
824 break;
825 default:
826 tda_warn("bandwidth not set!\n");
827 return -EINVAL;
828 }
829 } else {
830 tda_warn("modulation type not supported!\n");
831 return -EINVAL;
832 }
833
834 /* When tuning digital, the analog demod must be tri-stated */
835 if (fe->ops.analog_ops.standby)
836 fe->ops.analog_ops.standby(fe);
837
838 ret = tda18271_tune(fe, map, freq, bw);
839
840 if (ret < 0)
841 goto fail;
842
843 priv->frequency = freq;
844 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ?
845 params->u.ofdm.bandwidth : 0;
846fail:
847 return ret;
848}
849
850static int tda18271_set_analog_params(struct dvb_frontend *fe,
851 struct analog_parameters *params)
852{
853 struct tda18271_priv *priv = fe->tuner_priv;
854 struct tda18271_std_map *std_map = &priv->std;
855 struct tda18271_std_map_item *map;
856 char *mode;
857 int ret;
858 u32 freq = params->frequency * 62500;
859
860 priv->mode = TDA18271_ANALOG;
861
862 if (params->mode == V4L2_TUNER_RADIO) {
863 freq = freq / 1000;
864 map = &std_map->fm_radio;
865 mode = "fm";
866 } else if (params->std & V4L2_STD_MN) {
867 map = &std_map->atv_mn;
868 mode = "MN";
869 } else if (params->std & V4L2_STD_B) {
870 map = &std_map->atv_b;
871 mode = "B";
872 } else if (params->std & V4L2_STD_GH) {
873 map = &std_map->atv_gh;
874 mode = "GH";
875 } else if (params->std & V4L2_STD_PAL_I) {
876 map = &std_map->atv_i;
877 mode = "I";
878 } else if (params->std & V4L2_STD_DK) {
879 map = &std_map->atv_dk;
880 mode = "DK";
881 } else if (params->std & V4L2_STD_SECAM_L) {
882 map = &std_map->atv_l;
883 mode = "L";
884 } else if (params->std & V4L2_STD_SECAM_LC) {
885 map = &std_map->atv_lc;
886 mode = "L'";
887 } else {
888 map = &std_map->atv_i;
889 mode = "xx";
890 }
891
892 tda_dbg("setting tda18271 to system %s\n", mode);
893
894 ret = tda18271_tune(fe, map, freq, 0);
895
896 if (ret < 0)
897 goto fail;
898
899 priv->frequency = freq;
900 priv->bandwidth = 0;
901fail:
902 return ret;
903}
904
905static int tda18271_sleep(struct dvb_frontend *fe)
906{
907 struct tda18271_priv *priv = fe->tuner_priv;
908
909 mutex_lock(&priv->lock);
910
911 /* standby mode w/ slave tuner output
912 * & loop thru & xtal oscillator on */
913 tda18271_set_standby_mode(fe, 1, 0, 0);
914
915 mutex_unlock(&priv->lock);
916
917 return 0;
918}
919
920static int tda18271_release(struct dvb_frontend *fe)
921{
922 struct tda18271_priv *priv = fe->tuner_priv;
923
924 mutex_lock(&tda18271_list_mutex);
925
926 if (priv)
927 hybrid_tuner_release_state(priv);
928
929 mutex_unlock(&tda18271_list_mutex);
930
931 fe->tuner_priv = NULL;
932
933 return 0;
934}
935
936static int tda18271_get_frequency(struct dvb_frontend *fe, u32 *frequency)
937{
938 struct tda18271_priv *priv = fe->tuner_priv;
939 *frequency = priv->frequency;
940 return 0;
941}
942
943static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
944{
945 struct tda18271_priv *priv = fe->tuner_priv;
946 *bandwidth = priv->bandwidth;
947 return 0;
948}
949
950/* ------------------------------------------------------------------ */
951
952#define tda18271_update_std(std_cfg, name) do { \
953 if (map->std_cfg.if_freq + \
954 map->std_cfg.agc_mode + map->std_cfg.std + \
955 map->std_cfg.if_lvl + map->std_cfg.rfagc_top > 0) { \
956 tda_dbg("Using custom std config for %s\n", name); \
957 memcpy(&std->std_cfg, &map->std_cfg, \
958 sizeof(struct tda18271_std_map_item)); \
959 } } while (0)
960
961#define tda18271_dump_std_item(std_cfg, name) do { \
962 tda_dbg("(%s) if_freq = %d, agc_mode = %d, std = %d, " \
963 "if_lvl = %d, rfagc_top = 0x%02x\n", \
964 name, std->std_cfg.if_freq, \
965 std->std_cfg.agc_mode, std->std_cfg.std, \
966 std->std_cfg.if_lvl, std->std_cfg.rfagc_top); \
967 } while (0)
968
969static int tda18271_dump_std_map(struct dvb_frontend *fe)
970{
971 struct tda18271_priv *priv = fe->tuner_priv;
972 struct tda18271_std_map *std = &priv->std;
973
974 tda_dbg("========== STANDARD MAP SETTINGS ==========\n");
975 tda18271_dump_std_item(fm_radio, " fm ");
976 tda18271_dump_std_item(atv_b, "atv b ");
977 tda18271_dump_std_item(atv_dk, "atv dk");
978 tda18271_dump_std_item(atv_gh, "atv gh");
979 tda18271_dump_std_item(atv_i, "atv i ");
980 tda18271_dump_std_item(atv_l, "atv l ");
981 tda18271_dump_std_item(atv_lc, "atv l'");
982 tda18271_dump_std_item(atv_mn, "atv mn");
983 tda18271_dump_std_item(atsc_6, "atsc 6");
984 tda18271_dump_std_item(dvbt_6, "dvbt 6");
985 tda18271_dump_std_item(dvbt_7, "dvbt 7");
986 tda18271_dump_std_item(dvbt_8, "dvbt 8");
987 tda18271_dump_std_item(qam_6, "qam 6 ");
988 tda18271_dump_std_item(qam_8, "qam 8 ");
989
990 return 0;
991}
992
993static int tda18271_update_std_map(struct dvb_frontend *fe,
994 struct tda18271_std_map *map)
995{
996 struct tda18271_priv *priv = fe->tuner_priv;
997 struct tda18271_std_map *std = &priv->std;
998
999 if (!map)
1000 return -EINVAL;
1001
1002 tda18271_update_std(fm_radio, "fm");
1003 tda18271_update_std(atv_b, "atv b");
1004 tda18271_update_std(atv_dk, "atv dk");
1005 tda18271_update_std(atv_gh, "atv gh");
1006 tda18271_update_std(atv_i, "atv i");
1007 tda18271_update_std(atv_l, "atv l");
1008 tda18271_update_std(atv_lc, "atv l'");
1009 tda18271_update_std(atv_mn, "atv mn");
1010 tda18271_update_std(atsc_6, "atsc 6");
1011 tda18271_update_std(dvbt_6, "dvbt 6");
1012 tda18271_update_std(dvbt_7, "dvbt 7");
1013 tda18271_update_std(dvbt_8, "dvbt 8");
1014 tda18271_update_std(qam_6, "qam 6");
1015 tda18271_update_std(qam_8, "qam 8");
1016
1017 return 0;
1018}
1019
1020static int tda18271_get_id(struct dvb_frontend *fe)
1021{
1022 struct tda18271_priv *priv = fe->tuner_priv;
1023 unsigned char *regs = priv->tda18271_regs;
1024 char *name;
1025 int ret = 0;
1026
1027 mutex_lock(&priv->lock);
1028 tda18271_read_regs(fe);
1029 mutex_unlock(&priv->lock);
1030
1031 switch (regs[R_ID] & 0x7f) {
1032 case 3:
1033 name = "TDA18271HD/C1";
1034 priv->id = TDA18271HDC1;
1035 break;
1036 case 4:
1037 name = "TDA18271HD/C2";
1038 priv->id = TDA18271HDC2;
1039 break;
1040 default:
1041 name = "Unknown device";
1042 ret = -EINVAL;
1043 break;
1044 }
1045
1046 tda_info("%s detected @ %d-%04x%s\n", name,
1047 i2c_adapter_id(priv->i2c_props.adap),
1048 priv->i2c_props.addr,
1049 (0 == ret) ? "" : ", device not supported.");
1050
1051 return ret;
1052}
1053
1054static struct dvb_tuner_ops tda18271_tuner_ops = {
1055 .info = {
1056 .name = "NXP TDA18271HD",
1057 .frequency_min = 45000000,
1058 .frequency_max = 864000000,
1059 .frequency_step = 62500
1060 },
1061 .init = tda18271_init,
1062 .sleep = tda18271_sleep,
1063 .set_params = tda18271_set_params,
1064 .set_analog_params = tda18271_set_analog_params,
1065 .release = tda18271_release,
1066 .get_frequency = tda18271_get_frequency,
1067 .get_bandwidth = tda18271_get_bandwidth,
1068};
1069
1070struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
1071 struct i2c_adapter *i2c,
1072 struct tda18271_config *cfg)
1073{
1074 struct tda18271_priv *priv = NULL;
1075 int instance;
1076
1077 mutex_lock(&tda18271_list_mutex);
1078
1079 instance = hybrid_tuner_request_state(struct tda18271_priv, priv,
1080 hybrid_tuner_instance_list,
1081 i2c, addr, "tda18271");
1082 switch (instance) {
1083 case 0:
1084 goto fail;
1085 break;
1086 case 1:
1087 /* new tuner instance */
1088 priv->gate = (cfg) ? cfg->gate : TDA18271_GATE_AUTO;
1089 priv->role = (cfg) ? cfg->role : TDA18271_MASTER;
1090 priv->cal_initialized = false;
1091 mutex_init(&priv->lock);
1092
1093 fe->tuner_priv = priv;
1094
1095 if (cfg)
1096 priv->small_i2c = cfg->small_i2c;
1097
1098 if (tda18271_get_id(fe) < 0)
1099 goto fail;
1100
1101 if (tda18271_assign_map_layout(fe) < 0)
1102 goto fail;
1103
1104 mutex_lock(&priv->lock);
1105 tda18271_init_regs(fe);
1106
1107 if ((tda18271_cal_on_startup) && (priv->id == TDA18271HDC2))
1108 tda18271c2_rf_cal_init(fe);
1109
1110 mutex_unlock(&priv->lock);
1111 break;
1112 default:
1113 /* existing tuner instance */
1114 fe->tuner_priv = priv;
1115
1116 /* allow dvb driver to override i2c gate setting */
1117 if ((cfg) && (cfg->gate != TDA18271_GATE_ANALOG))
1118 priv->gate = cfg->gate;
1119 break;
1120 }
1121
1122 /* override default std map with values in config struct */
1123 if ((cfg) && (cfg->std_map))
1124 tda18271_update_std_map(fe, cfg->std_map);
1125
1126 mutex_unlock(&tda18271_list_mutex);
1127
1128 memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
1129 sizeof(struct dvb_tuner_ops));
1130
1131 if (tda18271_debug & (DBG_MAP | DBG_ADV))
1132 tda18271_dump_std_map(fe);
1133
1134 return fe;
1135fail:
1136 mutex_unlock(&tda18271_list_mutex);
1137
1138 tda18271_release(fe);
1139 return NULL;
1140}
1141EXPORT_SYMBOL_GPL(tda18271_attach);
1142MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
1143MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
1144MODULE_LICENSE("GPL");
1145MODULE_VERSION("0.3");
1146
1147/*
1148 * Overrides for Emacs so that we follow Linus's tabbing style.
1149 * ---------------------------------------------------------------------------
1150 * Local variables:
1151 * c-basic-offset: 8
1152 * End:
1153 */
diff --git a/drivers/media/dvb/frontends/tda18271-priv.h b/drivers/media/dvb/frontends/tda18271-priv.h
deleted file mode 100644
index 2bc5eb368ea2..000000000000
--- a/drivers/media/dvb/frontends/tda18271-priv.h
+++ /dev/null
@@ -1,220 +0,0 @@
1/*
2 tda18271-priv.h - private header for the NXP TDA18271 silicon tuner
3
4 Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __TDA18271_PRIV_H__
22#define __TDA18271_PRIV_H__
23
24#include <linux/kernel.h>
25#include <linux/types.h>
26#include <linux/mutex.h>
27#include "tuner-i2c.h"
28#include "tda18271.h"
29
30#define R_ID 0x00 /* ID byte */
31#define R_TM 0x01 /* Thermo byte */
32#define R_PL 0x02 /* Power level byte */
33#define R_EP1 0x03 /* Easy Prog byte 1 */
34#define R_EP2 0x04 /* Easy Prog byte 2 */
35#define R_EP3 0x05 /* Easy Prog byte 3 */
36#define R_EP4 0x06 /* Easy Prog byte 4 */
37#define R_EP5 0x07 /* Easy Prog byte 5 */
38#define R_CPD 0x08 /* Cal Post-Divider byte */
39#define R_CD1 0x09 /* Cal Divider byte 1 */
40#define R_CD2 0x0a /* Cal Divider byte 2 */
41#define R_CD3 0x0b /* Cal Divider byte 3 */
42#define R_MPD 0x0c /* Main Post-Divider byte */
43#define R_MD1 0x0d /* Main Divider byte 1 */
44#define R_MD2 0x0e /* Main Divider byte 2 */
45#define R_MD3 0x0f /* Main Divider byte 3 */
46#define R_EB1 0x10 /* Extended byte 1 */
47#define R_EB2 0x11 /* Extended byte 2 */
48#define R_EB3 0x12 /* Extended byte 3 */
49#define R_EB4 0x13 /* Extended byte 4 */
50#define R_EB5 0x14 /* Extended byte 5 */
51#define R_EB6 0x15 /* Extended byte 6 */
52#define R_EB7 0x16 /* Extended byte 7 */
53#define R_EB8 0x17 /* Extended byte 8 */
54#define R_EB9 0x18 /* Extended byte 9 */
55#define R_EB10 0x19 /* Extended byte 10 */
56#define R_EB11 0x1a /* Extended byte 11 */
57#define R_EB12 0x1b /* Extended byte 12 */
58#define R_EB13 0x1c /* Extended byte 13 */
59#define R_EB14 0x1d /* Extended byte 14 */
60#define R_EB15 0x1e /* Extended byte 15 */
61#define R_EB16 0x1f /* Extended byte 16 */
62#define R_EB17 0x20 /* Extended byte 17 */
63#define R_EB18 0x21 /* Extended byte 18 */
64#define R_EB19 0x22 /* Extended byte 19 */
65#define R_EB20 0x23 /* Extended byte 20 */
66#define R_EB21 0x24 /* Extended byte 21 */
67#define R_EB22 0x25 /* Extended byte 22 */
68#define R_EB23 0x26 /* Extended byte 23 */
69
70#define TDA18271_NUM_REGS 39
71
72/*---------------------------------------------------------------------*/
73
74struct tda18271_rf_tracking_filter_cal {
75 u32 rfmax;
76 u8 rfband;
77 u32 rf1_def;
78 u32 rf2_def;
79 u32 rf3_def;
80 u32 rf1;
81 u32 rf2;
82 u32 rf3;
83 int rf_a1;
84 int rf_b1;
85 int rf_a2;
86 int rf_b2;
87};
88
89enum tda18271_pll {
90 TDA18271_MAIN_PLL,
91 TDA18271_CAL_PLL,
92};
93
94enum tda18271_mode {
95 TDA18271_ANALOG,
96 TDA18271_DIGITAL,
97};
98
99struct tda18271_map_layout;
100
101enum tda18271_ver {
102 TDA18271HDC1,
103 TDA18271HDC2,
104};
105
106struct tda18271_priv {
107 unsigned char tda18271_regs[TDA18271_NUM_REGS];
108
109 struct list_head hybrid_tuner_instance_list;
110 struct tuner_i2c_props i2c_props;
111
112 enum tda18271_mode mode;
113 enum tda18271_role role;
114 enum tda18271_i2c_gate gate;
115 enum tda18271_ver id;
116
117 unsigned int tm_rfcal;
118 unsigned int cal_initialized:1;
119 unsigned int small_i2c:1;
120
121 struct tda18271_map_layout *maps;
122 struct tda18271_std_map std;
123 struct tda18271_rf_tracking_filter_cal rf_cal_state[8];
124
125 struct mutex lock;
126
127 u32 frequency;
128 u32 bandwidth;
129};
130
131/*---------------------------------------------------------------------*/
132
133extern int tda18271_debug;
134
135#define DBG_INFO 1
136#define DBG_MAP 2
137#define DBG_REG 4
138#define DBG_ADV 8
139#define DBG_CAL 16
140
141#define tda_printk(kern, fmt, arg...) \
142 printk(kern "%s: " fmt, __func__, ##arg)
143
144#define dprintk(kern, lvl, fmt, arg...) do {\
145 if (tda18271_debug & lvl) \
146 tda_printk(kern, fmt, ##arg); } while (0)
147
148#define tda_info(fmt, arg...) printk(KERN_INFO fmt, ##arg)
149#define tda_warn(fmt, arg...) tda_printk(KERN_WARNING, fmt, ##arg)
150#define tda_err(fmt, arg...) tda_printk(KERN_ERR, fmt, ##arg)
151#define tda_dbg(fmt, arg...) dprintk(KERN_DEBUG, DBG_INFO, fmt, ##arg)
152#define tda_map(fmt, arg...) dprintk(KERN_DEBUG, DBG_MAP, fmt, ##arg)
153#define tda_reg(fmt, arg...) dprintk(KERN_DEBUG, DBG_REG, fmt, ##arg)
154#define tda_cal(fmt, arg...) dprintk(KERN_DEBUG, DBG_CAL, fmt, ##arg)
155
156/*---------------------------------------------------------------------*/
157
158enum tda18271_map_type {
159 /* tda18271_pll_map */
160 MAIN_PLL,
161 CAL_PLL,
162 /* tda18271_map */
163 RF_CAL,
164 RF_CAL_KMCO,
165 RF_CAL_DC_OVER_DT,
166 BP_FILTER,
167 RF_BAND,
168 GAIN_TAPER,
169 IR_MEASURE,
170};
171
172extern int tda18271_lookup_pll_map(struct dvb_frontend *fe,
173 enum tda18271_map_type map_type,
174 u32 *freq, u8 *post_div, u8 *div);
175extern int tda18271_lookup_map(struct dvb_frontend *fe,
176 enum tda18271_map_type map_type,
177 u32 *freq, u8 *val);
178
179extern int tda18271_lookup_thermometer(struct dvb_frontend *fe);
180
181extern int tda18271_lookup_rf_band(struct dvb_frontend *fe,
182 u32 *freq, u8 *rf_band);
183
184extern int tda18271_lookup_cid_target(struct dvb_frontend *fe,
185 u32 *freq, u8 *cid_target,
186 u16 *count_limit);
187
188extern int tda18271_assign_map_layout(struct dvb_frontend *fe);
189
190/*---------------------------------------------------------------------*/
191
192extern int tda18271_read_regs(struct dvb_frontend *fe);
193extern int tda18271_read_extended(struct dvb_frontend *fe);
194extern int tda18271_write_regs(struct dvb_frontend *fe, int idx, int len);
195extern int tda18271_init_regs(struct dvb_frontend *fe);
196
197extern int tda18271_charge_pump_source(struct dvb_frontend *fe,
198 enum tda18271_pll pll, int force);
199extern int tda18271_set_standby_mode(struct dvb_frontend *fe,
200 int sm, int sm_lt, int sm_xt);
201
202extern int tda18271_calc_main_pll(struct dvb_frontend *fe, u32 freq);
203extern int tda18271_calc_cal_pll(struct dvb_frontend *fe, u32 freq);
204
205extern int tda18271_calc_bp_filter(struct dvb_frontend *fe, u32 *freq);
206extern int tda18271_calc_km(struct dvb_frontend *fe, u32 *freq);
207extern int tda18271_calc_rf_band(struct dvb_frontend *fe, u32 *freq);
208extern int tda18271_calc_gain_taper(struct dvb_frontend *fe, u32 *freq);
209extern int tda18271_calc_ir_measure(struct dvb_frontend *fe, u32 *freq);
210extern int tda18271_calc_rf_cal(struct dvb_frontend *fe, u32 *freq);
211
212#endif /* __TDA18271_PRIV_H__ */
213
214/*
215 * Overrides for Emacs so that we follow Linus's tabbing style.
216 * ---------------------------------------------------------------------------
217 * Local variables:
218 * c-basic-offset: 8
219 * End:
220 */
diff --git a/drivers/media/dvb/frontends/tda18271-tables.c b/drivers/media/dvb/frontends/tda18271-tables.c
deleted file mode 100644
index 83e7561960c1..000000000000
--- a/drivers/media/dvb/frontends/tda18271-tables.c
+++ /dev/null
@@ -1,1313 +0,0 @@
1/*
2 tda18271-tables.c - driver for the Philips / NXP TDA18271 silicon tuner
3
4 Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include "tda18271-priv.h"
22
23struct tda18271_pll_map {
24 u32 lomax;
25 u8 pd; /* post div */
26 u8 d; /* div */
27};
28
29struct tda18271_map {
30 u32 rfmax;
31 u8 val;
32};
33
34/*---------------------------------------------------------------------*/
35
36static struct tda18271_pll_map tda18271c1_main_pll[] = {
37 { .lomax = 32000, .pd = 0x5f, .d = 0xf0 },
38 { .lomax = 35000, .pd = 0x5e, .d = 0xe0 },
39 { .lomax = 37000, .pd = 0x5d, .d = 0xd0 },
40 { .lomax = 41000, .pd = 0x5c, .d = 0xc0 },
41 { .lomax = 44000, .pd = 0x5b, .d = 0xb0 },
42 { .lomax = 49000, .pd = 0x5a, .d = 0xa0 },
43 { .lomax = 54000, .pd = 0x59, .d = 0x90 },
44 { .lomax = 61000, .pd = 0x58, .d = 0x80 },
45 { .lomax = 65000, .pd = 0x4f, .d = 0x78 },
46 { .lomax = 70000, .pd = 0x4e, .d = 0x70 },
47 { .lomax = 75000, .pd = 0x4d, .d = 0x68 },
48 { .lomax = 82000, .pd = 0x4c, .d = 0x60 },
49 { .lomax = 89000, .pd = 0x4b, .d = 0x58 },
50 { .lomax = 98000, .pd = 0x4a, .d = 0x50 },
51 { .lomax = 109000, .pd = 0x49, .d = 0x48 },
52 { .lomax = 123000, .pd = 0x48, .d = 0x40 },
53 { .lomax = 131000, .pd = 0x3f, .d = 0x3c },
54 { .lomax = 141000, .pd = 0x3e, .d = 0x38 },
55 { .lomax = 151000, .pd = 0x3d, .d = 0x34 },
56 { .lomax = 164000, .pd = 0x3c, .d = 0x30 },
57 { .lomax = 179000, .pd = 0x3b, .d = 0x2c },
58 { .lomax = 197000, .pd = 0x3a, .d = 0x28 },
59 { .lomax = 219000, .pd = 0x39, .d = 0x24 },
60 { .lomax = 246000, .pd = 0x38, .d = 0x20 },
61 { .lomax = 263000, .pd = 0x2f, .d = 0x1e },
62 { .lomax = 282000, .pd = 0x2e, .d = 0x1c },
63 { .lomax = 303000, .pd = 0x2d, .d = 0x1a },
64 { .lomax = 329000, .pd = 0x2c, .d = 0x18 },
65 { .lomax = 359000, .pd = 0x2b, .d = 0x16 },
66 { .lomax = 395000, .pd = 0x2a, .d = 0x14 },
67 { .lomax = 438000, .pd = 0x29, .d = 0x12 },
68 { .lomax = 493000, .pd = 0x28, .d = 0x10 },
69 { .lomax = 526000, .pd = 0x1f, .d = 0x0f },
70 { .lomax = 564000, .pd = 0x1e, .d = 0x0e },
71 { .lomax = 607000, .pd = 0x1d, .d = 0x0d },
72 { .lomax = 658000, .pd = 0x1c, .d = 0x0c },
73 { .lomax = 718000, .pd = 0x1b, .d = 0x0b },
74 { .lomax = 790000, .pd = 0x1a, .d = 0x0a },
75 { .lomax = 877000, .pd = 0x19, .d = 0x09 },
76 { .lomax = 987000, .pd = 0x18, .d = 0x08 },
77 { .lomax = 0, .pd = 0x00, .d = 0x00 }, /* end */
78};
79
80static struct tda18271_pll_map tda18271c2_main_pll[] = {
81 { .lomax = 33125, .pd = 0x57, .d = 0xf0 },
82 { .lomax = 35500, .pd = 0x56, .d = 0xe0 },
83 { .lomax = 38188, .pd = 0x55, .d = 0xd0 },
84 { .lomax = 41375, .pd = 0x54, .d = 0xc0 },
85 { .lomax = 45125, .pd = 0x53, .d = 0xb0 },
86 { .lomax = 49688, .pd = 0x52, .d = 0xa0 },
87 { .lomax = 55188, .pd = 0x51, .d = 0x90 },
88 { .lomax = 62125, .pd = 0x50, .d = 0x80 },
89 { .lomax = 66250, .pd = 0x47, .d = 0x78 },
90 { .lomax = 71000, .pd = 0x46, .d = 0x70 },
91 { .lomax = 76375, .pd = 0x45, .d = 0x68 },
92 { .lomax = 82750, .pd = 0x44, .d = 0x60 },
93 { .lomax = 90250, .pd = 0x43, .d = 0x58 },
94 { .lomax = 99375, .pd = 0x42, .d = 0x50 },
95 { .lomax = 110375, .pd = 0x41, .d = 0x48 },
96 { .lomax = 124250, .pd = 0x40, .d = 0x40 },
97 { .lomax = 132500, .pd = 0x37, .d = 0x3c },
98 { .lomax = 142000, .pd = 0x36, .d = 0x38 },
99 { .lomax = 152750, .pd = 0x35, .d = 0x34 },
100 { .lomax = 165500, .pd = 0x34, .d = 0x30 },
101 { .lomax = 180500, .pd = 0x33, .d = 0x2c },
102 { .lomax = 198750, .pd = 0x32, .d = 0x28 },
103 { .lomax = 220750, .pd = 0x31, .d = 0x24 },
104 { .lomax = 248500, .pd = 0x30, .d = 0x20 },
105 { .lomax = 265000, .pd = 0x27, .d = 0x1e },
106 { .lomax = 284000, .pd = 0x26, .d = 0x1c },
107 { .lomax = 305500, .pd = 0x25, .d = 0x1a },
108 { .lomax = 331000, .pd = 0x24, .d = 0x18 },
109 { .lomax = 361000, .pd = 0x23, .d = 0x16 },
110 { .lomax = 397500, .pd = 0x22, .d = 0x14 },
111 { .lomax = 441500, .pd = 0x21, .d = 0x12 },
112 { .lomax = 497000, .pd = 0x20, .d = 0x10 },
113 { .lomax = 530000, .pd = 0x17, .d = 0x0f },
114 { .lomax = 568000, .pd = 0x16, .d = 0x0e },
115 { .lomax = 611000, .pd = 0x15, .d = 0x0d },
116 { .lomax = 662000, .pd = 0x14, .d = 0x0c },
117 { .lomax = 722000, .pd = 0x13, .d = 0x0b },
118 { .lomax = 795000, .pd = 0x12, .d = 0x0a },
119 { .lomax = 883000, .pd = 0x11, .d = 0x09 },
120 { .lomax = 994000, .pd = 0x10, .d = 0x08 },
121 { .lomax = 0, .pd = 0x00, .d = 0x00 }, /* end */
122};
123
124static struct tda18271_pll_map tda18271c1_cal_pll[] = {
125 { .lomax = 33000, .pd = 0xdd, .d = 0xd0 },
126 { .lomax = 36000, .pd = 0xdc, .d = 0xc0 },
127 { .lomax = 40000, .pd = 0xdb, .d = 0xb0 },
128 { .lomax = 44000, .pd = 0xda, .d = 0xa0 },
129 { .lomax = 49000, .pd = 0xd9, .d = 0x90 },
130 { .lomax = 55000, .pd = 0xd8, .d = 0x80 },
131 { .lomax = 63000, .pd = 0xd3, .d = 0x70 },
132 { .lomax = 67000, .pd = 0xcd, .d = 0x68 },
133 { .lomax = 73000, .pd = 0xcc, .d = 0x60 },
134 { .lomax = 80000, .pd = 0xcb, .d = 0x58 },
135 { .lomax = 88000, .pd = 0xca, .d = 0x50 },
136 { .lomax = 98000, .pd = 0xc9, .d = 0x48 },
137 { .lomax = 110000, .pd = 0xc8, .d = 0x40 },
138 { .lomax = 126000, .pd = 0xc3, .d = 0x38 },
139 { .lomax = 135000, .pd = 0xbd, .d = 0x34 },
140 { .lomax = 147000, .pd = 0xbc, .d = 0x30 },
141 { .lomax = 160000, .pd = 0xbb, .d = 0x2c },
142 { .lomax = 176000, .pd = 0xba, .d = 0x28 },
143 { .lomax = 196000, .pd = 0xb9, .d = 0x24 },
144 { .lomax = 220000, .pd = 0xb8, .d = 0x20 },
145 { .lomax = 252000, .pd = 0xb3, .d = 0x1c },
146 { .lomax = 271000, .pd = 0xad, .d = 0x1a },
147 { .lomax = 294000, .pd = 0xac, .d = 0x18 },
148 { .lomax = 321000, .pd = 0xab, .d = 0x16 },
149 { .lomax = 353000, .pd = 0xaa, .d = 0x14 },
150 { .lomax = 392000, .pd = 0xa9, .d = 0x12 },
151 { .lomax = 441000, .pd = 0xa8, .d = 0x10 },
152 { .lomax = 505000, .pd = 0xa3, .d = 0x0e },
153 { .lomax = 543000, .pd = 0x9d, .d = 0x0d },
154 { .lomax = 589000, .pd = 0x9c, .d = 0x0c },
155 { .lomax = 642000, .pd = 0x9b, .d = 0x0b },
156 { .lomax = 707000, .pd = 0x9a, .d = 0x0a },
157 { .lomax = 785000, .pd = 0x99, .d = 0x09 },
158 { .lomax = 883000, .pd = 0x98, .d = 0x08 },
159 { .lomax = 1010000, .pd = 0x93, .d = 0x07 },
160 { .lomax = 0, .pd = 0x00, .d = 0x00 }, /* end */
161};
162
163static struct tda18271_pll_map tda18271c2_cal_pll[] = {
164 { .lomax = 33813, .pd = 0xdd, .d = 0xd0 },
165 { .lomax = 36625, .pd = 0xdc, .d = 0xc0 },
166 { .lomax = 39938, .pd = 0xdb, .d = 0xb0 },
167 { .lomax = 43938, .pd = 0xda, .d = 0xa0 },
168 { .lomax = 48813, .pd = 0xd9, .d = 0x90 },
169 { .lomax = 54938, .pd = 0xd8, .d = 0x80 },
170 { .lomax = 62813, .pd = 0xd3, .d = 0x70 },
171 { .lomax = 67625, .pd = 0xcd, .d = 0x68 },
172 { .lomax = 73250, .pd = 0xcc, .d = 0x60 },
173 { .lomax = 79875, .pd = 0xcb, .d = 0x58 },
174 { .lomax = 87875, .pd = 0xca, .d = 0x50 },
175 { .lomax = 97625, .pd = 0xc9, .d = 0x48 },
176 { .lomax = 109875, .pd = 0xc8, .d = 0x40 },
177 { .lomax = 125625, .pd = 0xc3, .d = 0x38 },
178 { .lomax = 135250, .pd = 0xbd, .d = 0x34 },
179 { .lomax = 146500, .pd = 0xbc, .d = 0x30 },
180 { .lomax = 159750, .pd = 0xbb, .d = 0x2c },
181 { .lomax = 175750, .pd = 0xba, .d = 0x28 },
182 { .lomax = 195250, .pd = 0xb9, .d = 0x24 },
183 { .lomax = 219750, .pd = 0xb8, .d = 0x20 },
184 { .lomax = 251250, .pd = 0xb3, .d = 0x1c },
185 { .lomax = 270500, .pd = 0xad, .d = 0x1a },
186 { .lomax = 293000, .pd = 0xac, .d = 0x18 },
187 { .lomax = 319500, .pd = 0xab, .d = 0x16 },
188 { .lomax = 351500, .pd = 0xaa, .d = 0x14 },
189 { .lomax = 390500, .pd = 0xa9, .d = 0x12 },
190 { .lomax = 439500, .pd = 0xa8, .d = 0x10 },
191 { .lomax = 502500, .pd = 0xa3, .d = 0x0e },
192 { .lomax = 541000, .pd = 0x9d, .d = 0x0d },
193 { .lomax = 586000, .pd = 0x9c, .d = 0x0c },
194 { .lomax = 639000, .pd = 0x9b, .d = 0x0b },
195 { .lomax = 703000, .pd = 0x9a, .d = 0x0a },
196 { .lomax = 781000, .pd = 0x99, .d = 0x09 },
197 { .lomax = 879000, .pd = 0x98, .d = 0x08 },
198 { .lomax = 0, .pd = 0x00, .d = 0x00 }, /* end */
199};
200
201static struct tda18271_map tda18271_bp_filter[] = {
202 { .rfmax = 62000, .val = 0x00 },
203 { .rfmax = 84000, .val = 0x01 },
204 { .rfmax = 100000, .val = 0x02 },
205 { .rfmax = 140000, .val = 0x03 },
206 { .rfmax = 170000, .val = 0x04 },
207 { .rfmax = 180000, .val = 0x05 },
208 { .rfmax = 865000, .val = 0x06 },
209 { .rfmax = 0, .val = 0x00 }, /* end */
210};
211
212static struct tda18271_map tda18271c1_km[] = {
213 { .rfmax = 61100, .val = 0x74 },
214 { .rfmax = 350000, .val = 0x40 },
215 { .rfmax = 720000, .val = 0x30 },
216 { .rfmax = 865000, .val = 0x40 },
217 { .rfmax = 0, .val = 0x00 }, /* end */
218};
219
220static struct tda18271_map tda18271c2_km[] = {
221 { .rfmax = 47900, .val = 0x38 },
222 { .rfmax = 61100, .val = 0x44 },
223 { .rfmax = 350000, .val = 0x30 },
224 { .rfmax = 720000, .val = 0x24 },
225 { .rfmax = 865000, .val = 0x3c },
226 { .rfmax = 0, .val = 0x00 }, /* end */
227};
228
229static struct tda18271_map tda18271_rf_band[] = {
230 { .rfmax = 47900, .val = 0x00 },
231 { .rfmax = 61100, .val = 0x01 },
232/* { .rfmax = 152600, .val = 0x02 }, */
233 { .rfmax = 121200, .val = 0x02 },
234 { .rfmax = 164700, .val = 0x03 },
235 { .rfmax = 203500, .val = 0x04 },
236 { .rfmax = 457800, .val = 0x05 },
237 { .rfmax = 865000, .val = 0x06 },
238 { .rfmax = 0, .val = 0x00 }, /* end */
239};
240
241static struct tda18271_map tda18271_gain_taper[] = {
242 { .rfmax = 45400, .val = 0x1f },
243 { .rfmax = 45800, .val = 0x1e },
244 { .rfmax = 46200, .val = 0x1d },
245 { .rfmax = 46700, .val = 0x1c },
246 { .rfmax = 47100, .val = 0x1b },
247 { .rfmax = 47500, .val = 0x1a },
248 { .rfmax = 47900, .val = 0x19 },
249 { .rfmax = 49600, .val = 0x17 },
250 { .rfmax = 51200, .val = 0x16 },
251 { .rfmax = 52900, .val = 0x15 },
252 { .rfmax = 54500, .val = 0x14 },
253 { .rfmax = 56200, .val = 0x13 },
254 { .rfmax = 57800, .val = 0x12 },
255 { .rfmax = 59500, .val = 0x11 },
256 { .rfmax = 61100, .val = 0x10 },
257 { .rfmax = 67600, .val = 0x0d },
258 { .rfmax = 74200, .val = 0x0c },
259 { .rfmax = 80700, .val = 0x0b },
260 { .rfmax = 87200, .val = 0x0a },
261 { .rfmax = 93800, .val = 0x09 },
262 { .rfmax = 100300, .val = 0x08 },
263 { .rfmax = 106900, .val = 0x07 },
264 { .rfmax = 113400, .val = 0x06 },
265 { .rfmax = 119900, .val = 0x05 },
266 { .rfmax = 126500, .val = 0x04 },
267 { .rfmax = 133000, .val = 0x03 },
268 { .rfmax = 139500, .val = 0x02 },
269 { .rfmax = 146100, .val = 0x01 },
270 { .rfmax = 152600, .val = 0x00 },
271 { .rfmax = 154300, .val = 0x1f },
272 { .rfmax = 156100, .val = 0x1e },
273 { .rfmax = 157800, .val = 0x1d },
274 { .rfmax = 159500, .val = 0x1c },
275 { .rfmax = 161200, .val = 0x1b },
276 { .rfmax = 163000, .val = 0x1a },
277 { .rfmax = 164700, .val = 0x19 },
278 { .rfmax = 170200, .val = 0x17 },
279 { .rfmax = 175800, .val = 0x16 },
280 { .rfmax = 181300, .val = 0x15 },
281 { .rfmax = 186900, .val = 0x14 },
282 { .rfmax = 192400, .val = 0x13 },
283 { .rfmax = 198000, .val = 0x12 },
284 { .rfmax = 203500, .val = 0x11 },
285 { .rfmax = 216200, .val = 0x14 },
286 { .rfmax = 228900, .val = 0x13 },
287 { .rfmax = 241600, .val = 0x12 },
288 { .rfmax = 254400, .val = 0x11 },
289 { .rfmax = 267100, .val = 0x10 },
290 { .rfmax = 279800, .val = 0x0f },
291 { .rfmax = 292500, .val = 0x0e },
292 { .rfmax = 305200, .val = 0x0d },
293 { .rfmax = 317900, .val = 0x0c },
294 { .rfmax = 330700, .val = 0x0b },
295 { .rfmax = 343400, .val = 0x0a },
296 { .rfmax = 356100, .val = 0x09 },
297 { .rfmax = 368800, .val = 0x08 },
298 { .rfmax = 381500, .val = 0x07 },
299 { .rfmax = 394200, .val = 0x06 },
300 { .rfmax = 406900, .val = 0x05 },
301 { .rfmax = 419700, .val = 0x04 },
302 { .rfmax = 432400, .val = 0x03 },
303 { .rfmax = 445100, .val = 0x02 },
304 { .rfmax = 457800, .val = 0x01 },
305 { .rfmax = 476300, .val = 0x19 },
306 { .rfmax = 494800, .val = 0x18 },
307 { .rfmax = 513300, .val = 0x17 },
308 { .rfmax = 531800, .val = 0x16 },
309 { .rfmax = 550300, .val = 0x15 },
310 { .rfmax = 568900, .val = 0x14 },
311 { .rfmax = 587400, .val = 0x13 },
312 { .rfmax = 605900, .val = 0x12 },
313 { .rfmax = 624400, .val = 0x11 },
314 { .rfmax = 642900, .val = 0x10 },
315 { .rfmax = 661400, .val = 0x0f },
316 { .rfmax = 679900, .val = 0x0e },
317 { .rfmax = 698400, .val = 0x0d },
318 { .rfmax = 716900, .val = 0x0c },
319 { .rfmax = 735400, .val = 0x0b },
320 { .rfmax = 753900, .val = 0x0a },
321 { .rfmax = 772500, .val = 0x09 },
322 { .rfmax = 791000, .val = 0x08 },
323 { .rfmax = 809500, .val = 0x07 },
324 { .rfmax = 828000, .val = 0x06 },
325 { .rfmax = 846500, .val = 0x05 },
326 { .rfmax = 865000, .val = 0x04 },
327 { .rfmax = 0, .val = 0x00 }, /* end */
328};
329
330static struct tda18271_map tda18271c1_rf_cal[] = {
331 { .rfmax = 41000, .val = 0x1e },
332 { .rfmax = 43000, .val = 0x30 },
333 { .rfmax = 45000, .val = 0x43 },
334 { .rfmax = 46000, .val = 0x4d },
335 { .rfmax = 47000, .val = 0x54 },
336 { .rfmax = 47900, .val = 0x64 },
337 { .rfmax = 49100, .val = 0x20 },
338 { .rfmax = 50000, .val = 0x22 },
339 { .rfmax = 51000, .val = 0x2a },
340 { .rfmax = 53000, .val = 0x32 },
341 { .rfmax = 55000, .val = 0x35 },
342 { .rfmax = 56000, .val = 0x3c },
343 { .rfmax = 57000, .val = 0x3f },
344 { .rfmax = 58000, .val = 0x48 },
345 { .rfmax = 59000, .val = 0x4d },
346 { .rfmax = 60000, .val = 0x58 },
347 { .rfmax = 61100, .val = 0x5f },
348 { .rfmax = 0, .val = 0x00 }, /* end */
349};
350
351static struct tda18271_map tda18271c2_rf_cal[] = {
352 { .rfmax = 41000, .val = 0x0f },
353 { .rfmax = 43000, .val = 0x1c },
354 { .rfmax = 45000, .val = 0x2f },
355 { .rfmax = 46000, .val = 0x39 },
356 { .rfmax = 47000, .val = 0x40 },
357 { .rfmax = 47900, .val = 0x50 },
358 { .rfmax = 49100, .val = 0x16 },
359 { .rfmax = 50000, .val = 0x18 },
360 { .rfmax = 51000, .val = 0x20 },
361 { .rfmax = 53000, .val = 0x28 },
362 { .rfmax = 55000, .val = 0x2b },
363 { .rfmax = 56000, .val = 0x32 },
364 { .rfmax = 57000, .val = 0x35 },
365 { .rfmax = 58000, .val = 0x3e },
366 { .rfmax = 59000, .val = 0x43 },
367 { .rfmax = 60000, .val = 0x4e },
368 { .rfmax = 61100, .val = 0x55 },
369 { .rfmax = 63000, .val = 0x0f },
370 { .rfmax = 64000, .val = 0x11 },
371 { .rfmax = 65000, .val = 0x12 },
372 { .rfmax = 66000, .val = 0x15 },
373 { .rfmax = 67000, .val = 0x16 },
374 { .rfmax = 68000, .val = 0x17 },
375 { .rfmax = 70000, .val = 0x19 },
376 { .rfmax = 71000, .val = 0x1c },
377 { .rfmax = 72000, .val = 0x1d },
378 { .rfmax = 73000, .val = 0x1f },
379 { .rfmax = 74000, .val = 0x20 },
380 { .rfmax = 75000, .val = 0x21 },
381 { .rfmax = 76000, .val = 0x24 },
382 { .rfmax = 77000, .val = 0x25 },
383 { .rfmax = 78000, .val = 0x27 },
384 { .rfmax = 80000, .val = 0x28 },
385 { .rfmax = 81000, .val = 0x29 },
386 { .rfmax = 82000, .val = 0x2d },
387 { .rfmax = 83000, .val = 0x2e },
388 { .rfmax = 84000, .val = 0x2f },
389 { .rfmax = 85000, .val = 0x31 },
390 { .rfmax = 86000, .val = 0x33 },
391 { .rfmax = 87000, .val = 0x34 },
392 { .rfmax = 88000, .val = 0x35 },
393 { .rfmax = 89000, .val = 0x37 },
394 { .rfmax = 90000, .val = 0x38 },
395 { .rfmax = 91000, .val = 0x39 },
396 { .rfmax = 93000, .val = 0x3c },
397 { .rfmax = 94000, .val = 0x3e },
398 { .rfmax = 95000, .val = 0x3f },
399 { .rfmax = 96000, .val = 0x40 },
400 { .rfmax = 97000, .val = 0x42 },
401 { .rfmax = 99000, .val = 0x45 },
402 { .rfmax = 100000, .val = 0x46 },
403 { .rfmax = 102000, .val = 0x48 },
404 { .rfmax = 103000, .val = 0x4a },
405 { .rfmax = 105000, .val = 0x4d },
406 { .rfmax = 106000, .val = 0x4e },
407 { .rfmax = 107000, .val = 0x50 },
408 { .rfmax = 108000, .val = 0x51 },
409 { .rfmax = 110000, .val = 0x54 },
410 { .rfmax = 111000, .val = 0x56 },
411 { .rfmax = 112000, .val = 0x57 },
412 { .rfmax = 113000, .val = 0x58 },
413 { .rfmax = 114000, .val = 0x59 },
414 { .rfmax = 115000, .val = 0x5c },
415 { .rfmax = 116000, .val = 0x5d },
416 { .rfmax = 117000, .val = 0x5f },
417 { .rfmax = 119000, .val = 0x60 },
418 { .rfmax = 120000, .val = 0x64 },
419 { .rfmax = 121000, .val = 0x65 },
420 { .rfmax = 122000, .val = 0x66 },
421 { .rfmax = 123000, .val = 0x68 },
422 { .rfmax = 124000, .val = 0x69 },
423 { .rfmax = 125000, .val = 0x6c },
424 { .rfmax = 126000, .val = 0x6d },
425 { .rfmax = 127000, .val = 0x6e },
426 { .rfmax = 128000, .val = 0x70 },
427 { .rfmax = 129000, .val = 0x71 },
428 { .rfmax = 130000, .val = 0x75 },
429 { .rfmax = 131000, .val = 0x77 },
430 { .rfmax = 132000, .val = 0x78 },
431 { .rfmax = 133000, .val = 0x7b },
432 { .rfmax = 134000, .val = 0x7e },
433 { .rfmax = 135000, .val = 0x81 },
434 { .rfmax = 136000, .val = 0x82 },
435 { .rfmax = 137000, .val = 0x87 },
436 { .rfmax = 138000, .val = 0x88 },
437 { .rfmax = 139000, .val = 0x8d },
438 { .rfmax = 140000, .val = 0x8e },
439 { .rfmax = 141000, .val = 0x91 },
440 { .rfmax = 142000, .val = 0x95 },
441 { .rfmax = 143000, .val = 0x9a },
442 { .rfmax = 144000, .val = 0x9d },
443 { .rfmax = 145000, .val = 0xa1 },
444 { .rfmax = 146000, .val = 0xa2 },
445 { .rfmax = 147000, .val = 0xa4 },
446 { .rfmax = 148000, .val = 0xa9 },
447 { .rfmax = 149000, .val = 0xae },
448 { .rfmax = 150000, .val = 0xb0 },
449 { .rfmax = 151000, .val = 0xb1 },
450 { .rfmax = 152000, .val = 0xb7 },
451 { .rfmax = 153000, .val = 0xbd },
452 { .rfmax = 154000, .val = 0x20 },
453 { .rfmax = 155000, .val = 0x22 },
454 { .rfmax = 156000, .val = 0x24 },
455 { .rfmax = 157000, .val = 0x25 },
456 { .rfmax = 158000, .val = 0x27 },
457 { .rfmax = 159000, .val = 0x29 },
458 { .rfmax = 160000, .val = 0x2c },
459 { .rfmax = 161000, .val = 0x2d },
460 { .rfmax = 163000, .val = 0x2e },
461 { .rfmax = 164000, .val = 0x2f },
462 { .rfmax = 165000, .val = 0x30 },
463 { .rfmax = 166000, .val = 0x11 },
464 { .rfmax = 167000, .val = 0x12 },
465 { .rfmax = 168000, .val = 0x13 },
466 { .rfmax = 169000, .val = 0x14 },
467 { .rfmax = 170000, .val = 0x15 },
468 { .rfmax = 172000, .val = 0x16 },
469 { .rfmax = 173000, .val = 0x17 },
470 { .rfmax = 174000, .val = 0x18 },
471 { .rfmax = 175000, .val = 0x1a },
472 { .rfmax = 176000, .val = 0x1b },
473 { .rfmax = 178000, .val = 0x1d },
474 { .rfmax = 179000, .val = 0x1e },
475 { .rfmax = 180000, .val = 0x1f },
476 { .rfmax = 181000, .val = 0x20 },
477 { .rfmax = 182000, .val = 0x21 },
478 { .rfmax = 183000, .val = 0x22 },
479 { .rfmax = 184000, .val = 0x24 },
480 { .rfmax = 185000, .val = 0x25 },
481 { .rfmax = 186000, .val = 0x26 },
482 { .rfmax = 187000, .val = 0x27 },
483 { .rfmax = 188000, .val = 0x29 },
484 { .rfmax = 189000, .val = 0x2a },
485 { .rfmax = 190000, .val = 0x2c },
486 { .rfmax = 191000, .val = 0x2d },
487 { .rfmax = 192000, .val = 0x2e },
488 { .rfmax = 193000, .val = 0x2f },
489 { .rfmax = 194000, .val = 0x30 },
490 { .rfmax = 195000, .val = 0x33 },
491 { .rfmax = 196000, .val = 0x35 },
492 { .rfmax = 198000, .val = 0x36 },
493 { .rfmax = 200000, .val = 0x38 },
494 { .rfmax = 201000, .val = 0x3c },
495 { .rfmax = 202000, .val = 0x3d },
496 { .rfmax = 203500, .val = 0x3e },
497 { .rfmax = 206000, .val = 0x0e },
498 { .rfmax = 208000, .val = 0x0f },
499 { .rfmax = 212000, .val = 0x10 },
500 { .rfmax = 216000, .val = 0x11 },
501 { .rfmax = 217000, .val = 0x12 },
502 { .rfmax = 218000, .val = 0x13 },
503 { .rfmax = 220000, .val = 0x14 },
504 { .rfmax = 222000, .val = 0x15 },
505 { .rfmax = 225000, .val = 0x16 },
506 { .rfmax = 228000, .val = 0x17 },
507 { .rfmax = 231000, .val = 0x18 },
508 { .rfmax = 234000, .val = 0x19 },
509 { .rfmax = 235000, .val = 0x1a },
510 { .rfmax = 236000, .val = 0x1b },
511 { .rfmax = 237000, .val = 0x1c },
512 { .rfmax = 240000, .val = 0x1d },
513 { .rfmax = 242000, .val = 0x1f },
514 { .rfmax = 247000, .val = 0x20 },
515 { .rfmax = 249000, .val = 0x21 },
516 { .rfmax = 252000, .val = 0x22 },
517 { .rfmax = 253000, .val = 0x23 },
518 { .rfmax = 254000, .val = 0x24 },
519 { .rfmax = 256000, .val = 0x25 },
520 { .rfmax = 259000, .val = 0x26 },
521 { .rfmax = 262000, .val = 0x27 },
522 { .rfmax = 264000, .val = 0x28 },
523 { .rfmax = 267000, .val = 0x29 },
524 { .rfmax = 269000, .val = 0x2a },
525 { .rfmax = 271000, .val = 0x2b },
526 { .rfmax = 273000, .val = 0x2c },
527 { .rfmax = 275000, .val = 0x2d },
528 { .rfmax = 277000, .val = 0x2e },
529 { .rfmax = 279000, .val = 0x2f },
530 { .rfmax = 282000, .val = 0x30 },
531 { .rfmax = 284000, .val = 0x31 },
532 { .rfmax = 286000, .val = 0x32 },
533 { .rfmax = 287000, .val = 0x33 },
534 { .rfmax = 290000, .val = 0x34 },
535 { .rfmax = 293000, .val = 0x35 },
536 { .rfmax = 295000, .val = 0x36 },
537 { .rfmax = 297000, .val = 0x37 },
538 { .rfmax = 300000, .val = 0x38 },
539 { .rfmax = 303000, .val = 0x39 },
540 { .rfmax = 305000, .val = 0x3a },
541 { .rfmax = 306000, .val = 0x3b },
542 { .rfmax = 307000, .val = 0x3c },
543 { .rfmax = 310000, .val = 0x3d },
544 { .rfmax = 312000, .val = 0x3e },
545 { .rfmax = 315000, .val = 0x3f },
546 { .rfmax = 318000, .val = 0x40 },
547 { .rfmax = 320000, .val = 0x41 },
548 { .rfmax = 323000, .val = 0x42 },
549 { .rfmax = 324000, .val = 0x43 },
550 { .rfmax = 325000, .val = 0x44 },
551 { .rfmax = 327000, .val = 0x45 },
552 { .rfmax = 331000, .val = 0x46 },
553 { .rfmax = 334000, .val = 0x47 },
554 { .rfmax = 337000, .val = 0x48 },
555 { .rfmax = 339000, .val = 0x49 },
556 { .rfmax = 340000, .val = 0x4a },
557 { .rfmax = 341000, .val = 0x4b },
558 { .rfmax = 343000, .val = 0x4c },
559 { .rfmax = 345000, .val = 0x4d },
560 { .rfmax = 349000, .val = 0x4e },
561 { .rfmax = 352000, .val = 0x4f },
562 { .rfmax = 353000, .val = 0x50 },
563 { .rfmax = 355000, .val = 0x51 },
564 { .rfmax = 357000, .val = 0x52 },
565 { .rfmax = 359000, .val = 0x53 },
566 { .rfmax = 361000, .val = 0x54 },
567 { .rfmax = 362000, .val = 0x55 },
568 { .rfmax = 364000, .val = 0x56 },
569 { .rfmax = 368000, .val = 0x57 },
570 { .rfmax = 370000, .val = 0x58 },
571 { .rfmax = 372000, .val = 0x59 },
572 { .rfmax = 375000, .val = 0x5a },
573 { .rfmax = 376000, .val = 0x5b },
574 { .rfmax = 377000, .val = 0x5c },
575 { .rfmax = 379000, .val = 0x5d },
576 { .rfmax = 382000, .val = 0x5e },
577 { .rfmax = 384000, .val = 0x5f },
578 { .rfmax = 385000, .val = 0x60 },
579 { .rfmax = 386000, .val = 0x61 },
580 { .rfmax = 388000, .val = 0x62 },
581 { .rfmax = 390000, .val = 0x63 },
582 { .rfmax = 393000, .val = 0x64 },
583 { .rfmax = 394000, .val = 0x65 },
584 { .rfmax = 396000, .val = 0x66 },
585 { .rfmax = 397000, .val = 0x67 },
586 { .rfmax = 398000, .val = 0x68 },
587 { .rfmax = 400000, .val = 0x69 },
588 { .rfmax = 402000, .val = 0x6a },
589 { .rfmax = 403000, .val = 0x6b },
590 { .rfmax = 407000, .val = 0x6c },
591 { .rfmax = 408000, .val = 0x6d },
592 { .rfmax = 409000, .val = 0x6e },
593 { .rfmax = 410000, .val = 0x6f },
594 { .rfmax = 411000, .val = 0x70 },
595 { .rfmax = 412000, .val = 0x71 },
596 { .rfmax = 413000, .val = 0x72 },
597 { .rfmax = 414000, .val = 0x73 },
598 { .rfmax = 417000, .val = 0x74 },
599 { .rfmax = 418000, .val = 0x75 },
600 { .rfmax = 420000, .val = 0x76 },
601 { .rfmax = 422000, .val = 0x77 },
602 { .rfmax = 423000, .val = 0x78 },
603 { .rfmax = 424000, .val = 0x79 },
604 { .rfmax = 427000, .val = 0x7a },
605 { .rfmax = 428000, .val = 0x7b },
606 { .rfmax = 429000, .val = 0x7d },
607 { .rfmax = 432000, .val = 0x7f },
608 { .rfmax = 434000, .val = 0x80 },
609 { .rfmax = 435000, .val = 0x81 },
610 { .rfmax = 436000, .val = 0x83 },
611 { .rfmax = 437000, .val = 0x84 },
612 { .rfmax = 438000, .val = 0x85 },
613 { .rfmax = 439000, .val = 0x86 },
614 { .rfmax = 440000, .val = 0x87 },
615 { .rfmax = 441000, .val = 0x88 },
616 { .rfmax = 442000, .val = 0x89 },
617 { .rfmax = 445000, .val = 0x8a },
618 { .rfmax = 446000, .val = 0x8b },
619 { .rfmax = 447000, .val = 0x8c },
620 { .rfmax = 448000, .val = 0x8e },
621 { .rfmax = 449000, .val = 0x8f },
622 { .rfmax = 450000, .val = 0x90 },
623 { .rfmax = 452000, .val = 0x91 },
624 { .rfmax = 453000, .val = 0x93 },
625 { .rfmax = 454000, .val = 0x94 },
626 { .rfmax = 456000, .val = 0x96 },
627 { .rfmax = 457000, .val = 0x98 },
628 { .rfmax = 461000, .val = 0x11 },
629 { .rfmax = 468000, .val = 0x12 },
630 { .rfmax = 472000, .val = 0x13 },
631 { .rfmax = 473000, .val = 0x14 },
632 { .rfmax = 474000, .val = 0x15 },
633 { .rfmax = 481000, .val = 0x16 },
634 { .rfmax = 486000, .val = 0x17 },
635 { .rfmax = 491000, .val = 0x18 },
636 { .rfmax = 498000, .val = 0x19 },
637 { .rfmax = 499000, .val = 0x1a },
638 { .rfmax = 501000, .val = 0x1b },
639 { .rfmax = 506000, .val = 0x1c },
640 { .rfmax = 511000, .val = 0x1d },
641 { .rfmax = 516000, .val = 0x1e },
642 { .rfmax = 520000, .val = 0x1f },
643 { .rfmax = 521000, .val = 0x20 },
644 { .rfmax = 525000, .val = 0x21 },
645 { .rfmax = 529000, .val = 0x22 },
646 { .rfmax = 533000, .val = 0x23 },
647 { .rfmax = 539000, .val = 0x24 },
648 { .rfmax = 541000, .val = 0x25 },
649 { .rfmax = 547000, .val = 0x26 },
650 { .rfmax = 549000, .val = 0x27 },
651 { .rfmax = 551000, .val = 0x28 },
652 { .rfmax = 556000, .val = 0x29 },
653 { .rfmax = 561000, .val = 0x2a },
654 { .rfmax = 563000, .val = 0x2b },
655 { .rfmax = 565000, .val = 0x2c },
656 { .rfmax = 569000, .val = 0x2d },
657 { .rfmax = 571000, .val = 0x2e },
658 { .rfmax = 577000, .val = 0x2f },
659 { .rfmax = 580000, .val = 0x30 },
660 { .rfmax = 582000, .val = 0x31 },
661 { .rfmax = 584000, .val = 0x32 },
662 { .rfmax = 588000, .val = 0x33 },
663 { .rfmax = 591000, .val = 0x34 },
664 { .rfmax = 596000, .val = 0x35 },
665 { .rfmax = 598000, .val = 0x36 },
666 { .rfmax = 603000, .val = 0x37 },
667 { .rfmax = 604000, .val = 0x38 },
668 { .rfmax = 606000, .val = 0x39 },
669 { .rfmax = 612000, .val = 0x3a },
670 { .rfmax = 615000, .val = 0x3b },
671 { .rfmax = 617000, .val = 0x3c },
672 { .rfmax = 621000, .val = 0x3d },
673 { .rfmax = 622000, .val = 0x3e },
674 { .rfmax = 625000, .val = 0x3f },
675 { .rfmax = 632000, .val = 0x40 },
676 { .rfmax = 633000, .val = 0x41 },
677 { .rfmax = 634000, .val = 0x42 },
678 { .rfmax = 642000, .val = 0x43 },
679 { .rfmax = 643000, .val = 0x44 },
680 { .rfmax = 647000, .val = 0x45 },
681 { .rfmax = 650000, .val = 0x46 },
682 { .rfmax = 652000, .val = 0x47 },
683 { .rfmax = 657000, .val = 0x48 },
684 { .rfmax = 661000, .val = 0x49 },
685 { .rfmax = 662000, .val = 0x4a },
686 { .rfmax = 665000, .val = 0x4b },
687 { .rfmax = 667000, .val = 0x4c },
688 { .rfmax = 670000, .val = 0x4d },
689 { .rfmax = 673000, .val = 0x4e },
690 { .rfmax = 676000, .val = 0x4f },
691 { .rfmax = 677000, .val = 0x50 },
692 { .rfmax = 681000, .val = 0x51 },
693 { .rfmax = 683000, .val = 0x52 },
694 { .rfmax = 686000, .val = 0x53 },
695 { .rfmax = 688000, .val = 0x54 },
696 { .rfmax = 689000, .val = 0x55 },
697 { .rfmax = 691000, .val = 0x56 },
698 { .rfmax = 695000, .val = 0x57 },
699 { .rfmax = 698000, .val = 0x58 },
700 { .rfmax = 703000, .val = 0x59 },
701 { .rfmax = 704000, .val = 0x5a },
702 { .rfmax = 705000, .val = 0x5b },
703 { .rfmax = 707000, .val = 0x5c },
704 { .rfmax = 710000, .val = 0x5d },
705 { .rfmax = 712000, .val = 0x5e },
706 { .rfmax = 717000, .val = 0x5f },
707 { .rfmax = 718000, .val = 0x60 },
708 { .rfmax = 721000, .val = 0x61 },
709 { .rfmax = 722000, .val = 0x62 },
710 { .rfmax = 723000, .val = 0x63 },
711 { .rfmax = 725000, .val = 0x64 },
712 { .rfmax = 727000, .val = 0x65 },
713 { .rfmax = 730000, .val = 0x66 },
714 { .rfmax = 732000, .val = 0x67 },
715 { .rfmax = 735000, .val = 0x68 },
716 { .rfmax = 740000, .val = 0x69 },
717 { .rfmax = 741000, .val = 0x6a },
718 { .rfmax = 742000, .val = 0x6b },
719 { .rfmax = 743000, .val = 0x6c },
720 { .rfmax = 745000, .val = 0x6d },
721 { .rfmax = 747000, .val = 0x6e },
722 { .rfmax = 748000, .val = 0x6f },
723 { .rfmax = 750000, .val = 0x70 },
724 { .rfmax = 752000, .val = 0x71 },
725 { .rfmax = 754000, .val = 0x72 },
726 { .rfmax = 757000, .val = 0x73 },
727 { .rfmax = 758000, .val = 0x74 },
728 { .rfmax = 760000, .val = 0x75 },
729 { .rfmax = 763000, .val = 0x76 },
730 { .rfmax = 764000, .val = 0x77 },
731 { .rfmax = 766000, .val = 0x78 },
732 { .rfmax = 767000, .val = 0x79 },
733 { .rfmax = 768000, .val = 0x7a },
734 { .rfmax = 773000, .val = 0x7b },
735 { .rfmax = 774000, .val = 0x7c },
736 { .rfmax = 776000, .val = 0x7d },
737 { .rfmax = 777000, .val = 0x7e },
738 { .rfmax = 778000, .val = 0x7f },
739 { .rfmax = 779000, .val = 0x80 },
740 { .rfmax = 781000, .val = 0x81 },
741 { .rfmax = 783000, .val = 0x82 },
742 { .rfmax = 784000, .val = 0x83 },
743 { .rfmax = 785000, .val = 0x84 },
744 { .rfmax = 786000, .val = 0x85 },
745 { .rfmax = 793000, .val = 0x86 },
746 { .rfmax = 794000, .val = 0x87 },
747 { .rfmax = 795000, .val = 0x88 },
748 { .rfmax = 797000, .val = 0x89 },
749 { .rfmax = 799000, .val = 0x8a },
750 { .rfmax = 801000, .val = 0x8b },
751 { .rfmax = 802000, .val = 0x8c },
752 { .rfmax = 803000, .val = 0x8d },
753 { .rfmax = 804000, .val = 0x8e },
754 { .rfmax = 810000, .val = 0x90 },
755 { .rfmax = 811000, .val = 0x91 },
756 { .rfmax = 812000, .val = 0x92 },
757 { .rfmax = 814000, .val = 0x93 },
758 { .rfmax = 816000, .val = 0x94 },
759 { .rfmax = 817000, .val = 0x96 },
760 { .rfmax = 818000, .val = 0x97 },
761 { .rfmax = 820000, .val = 0x98 },
762 { .rfmax = 821000, .val = 0x99 },
763 { .rfmax = 822000, .val = 0x9a },
764 { .rfmax = 828000, .val = 0x9b },
765 { .rfmax = 829000, .val = 0x9d },
766 { .rfmax = 830000, .val = 0x9f },
767 { .rfmax = 831000, .val = 0xa0 },
768 { .rfmax = 833000, .val = 0xa1 },
769 { .rfmax = 835000, .val = 0xa2 },
770 { .rfmax = 836000, .val = 0xa3 },
771 { .rfmax = 837000, .val = 0xa4 },
772 { .rfmax = 838000, .val = 0xa6 },
773 { .rfmax = 840000, .val = 0xa8 },
774 { .rfmax = 842000, .val = 0xa9 },
775 { .rfmax = 845000, .val = 0xaa },
776 { .rfmax = 846000, .val = 0xab },
777 { .rfmax = 847000, .val = 0xad },
778 { .rfmax = 848000, .val = 0xae },
779 { .rfmax = 852000, .val = 0xaf },
780 { .rfmax = 853000, .val = 0xb0 },
781 { .rfmax = 858000, .val = 0xb1 },
782 { .rfmax = 860000, .val = 0xb2 },
783 { .rfmax = 861000, .val = 0xb3 },
784 { .rfmax = 862000, .val = 0xb4 },
785 { .rfmax = 863000, .val = 0xb6 },
786 { .rfmax = 864000, .val = 0xb8 },
787 { .rfmax = 865000, .val = 0xb9 },
788 { .rfmax = 0, .val = 0x00 }, /* end */
789};
790
791static struct tda18271_map tda18271_ir_measure[] = {
792 { .rfmax = 30000, .val = 4 },
793 { .rfmax = 200000, .val = 5 },
794 { .rfmax = 600000, .val = 6 },
795 { .rfmax = 865000, .val = 7 },
796 { .rfmax = 0, .val = 0 }, /* end */
797};
798
799static struct tda18271_map tda18271_rf_cal_dc_over_dt[] = {
800 { .rfmax = 47900, .val = 0x00 },
801 { .rfmax = 55000, .val = 0x00 },
802 { .rfmax = 61100, .val = 0x0a },
803 { .rfmax = 64000, .val = 0x0a },
804 { .rfmax = 82000, .val = 0x14 },
805 { .rfmax = 84000, .val = 0x19 },
806 { .rfmax = 119000, .val = 0x1c },
807 { .rfmax = 124000, .val = 0x20 },
808 { .rfmax = 129000, .val = 0x2a },
809 { .rfmax = 134000, .val = 0x32 },
810 { .rfmax = 139000, .val = 0x39 },
811 { .rfmax = 144000, .val = 0x3e },
812 { .rfmax = 149000, .val = 0x3f },
813 { .rfmax = 152600, .val = 0x40 },
814 { .rfmax = 154000, .val = 0x40 },
815 { .rfmax = 164700, .val = 0x41 },
816 { .rfmax = 203500, .val = 0x32 },
817 { .rfmax = 353000, .val = 0x19 },
818 { .rfmax = 356000, .val = 0x1a },
819 { .rfmax = 359000, .val = 0x1b },
820 { .rfmax = 363000, .val = 0x1c },
821 { .rfmax = 366000, .val = 0x1d },
822 { .rfmax = 369000, .val = 0x1e },
823 { .rfmax = 373000, .val = 0x1f },
824 { .rfmax = 376000, .val = 0x20 },
825 { .rfmax = 379000, .val = 0x21 },
826 { .rfmax = 383000, .val = 0x22 },
827 { .rfmax = 386000, .val = 0x23 },
828 { .rfmax = 389000, .val = 0x24 },
829 { .rfmax = 393000, .val = 0x25 },
830 { .rfmax = 396000, .val = 0x26 },
831 { .rfmax = 399000, .val = 0x27 },
832 { .rfmax = 402000, .val = 0x28 },
833 { .rfmax = 404000, .val = 0x29 },
834 { .rfmax = 407000, .val = 0x2a },
835 { .rfmax = 409000, .val = 0x2b },
836 { .rfmax = 412000, .val = 0x2c },
837 { .rfmax = 414000, .val = 0x2d },
838 { .rfmax = 417000, .val = 0x2e },
839 { .rfmax = 419000, .val = 0x2f },
840 { .rfmax = 422000, .val = 0x30 },
841 { .rfmax = 424000, .val = 0x31 },
842 { .rfmax = 427000, .val = 0x32 },
843 { .rfmax = 429000, .val = 0x33 },
844 { .rfmax = 432000, .val = 0x34 },
845 { .rfmax = 434000, .val = 0x35 },
846 { .rfmax = 437000, .val = 0x36 },
847 { .rfmax = 439000, .val = 0x37 },
848 { .rfmax = 442000, .val = 0x38 },
849 { .rfmax = 444000, .val = 0x39 },
850 { .rfmax = 447000, .val = 0x3a },
851 { .rfmax = 449000, .val = 0x3b },
852 { .rfmax = 457800, .val = 0x3c },
853 { .rfmax = 465000, .val = 0x0f },
854 { .rfmax = 477000, .val = 0x12 },
855 { .rfmax = 483000, .val = 0x14 },
856 { .rfmax = 502000, .val = 0x19 },
857 { .rfmax = 508000, .val = 0x1b },
858 { .rfmax = 519000, .val = 0x1c },
859 { .rfmax = 522000, .val = 0x1d },
860 { .rfmax = 524000, .val = 0x1e },
861 { .rfmax = 534000, .val = 0x1f },
862 { .rfmax = 549000, .val = 0x20 },
863 { .rfmax = 554000, .val = 0x22 },
864 { .rfmax = 584000, .val = 0x24 },
865 { .rfmax = 589000, .val = 0x26 },
866 { .rfmax = 658000, .val = 0x27 },
867 { .rfmax = 664000, .val = 0x2c },
868 { .rfmax = 669000, .val = 0x2d },
869 { .rfmax = 699000, .val = 0x2e },
870 { .rfmax = 704000, .val = 0x30 },
871 { .rfmax = 709000, .val = 0x31 },
872 { .rfmax = 714000, .val = 0x32 },
873 { .rfmax = 724000, .val = 0x33 },
874 { .rfmax = 729000, .val = 0x36 },
875 { .rfmax = 739000, .val = 0x38 },
876 { .rfmax = 744000, .val = 0x39 },
877 { .rfmax = 749000, .val = 0x3b },
878 { .rfmax = 754000, .val = 0x3c },
879 { .rfmax = 759000, .val = 0x3d },
880 { .rfmax = 764000, .val = 0x3e },
881 { .rfmax = 769000, .val = 0x3f },
882 { .rfmax = 774000, .val = 0x40 },
883 { .rfmax = 779000, .val = 0x41 },
884 { .rfmax = 784000, .val = 0x43 },
885 { .rfmax = 789000, .val = 0x46 },
886 { .rfmax = 794000, .val = 0x48 },
887 { .rfmax = 799000, .val = 0x4b },
888 { .rfmax = 804000, .val = 0x4f },
889 { .rfmax = 809000, .val = 0x54 },
890 { .rfmax = 814000, .val = 0x59 },
891 { .rfmax = 819000, .val = 0x5d },
892 { .rfmax = 824000, .val = 0x61 },
893 { .rfmax = 829000, .val = 0x68 },
894 { .rfmax = 834000, .val = 0x6e },
895 { .rfmax = 839000, .val = 0x75 },
896 { .rfmax = 844000, .val = 0x7e },
897 { .rfmax = 849000, .val = 0x82 },
898 { .rfmax = 854000, .val = 0x84 },
899 { .rfmax = 859000, .val = 0x8f },
900 { .rfmax = 865000, .val = 0x9a },
901 { .rfmax = 0, .val = 0x00 }, /* end */
902};
903
904/*---------------------------------------------------------------------*/
905
906struct tda18271_thermo_map {
907 u8 d;
908 u8 r0;
909 u8 r1;
910};
911
912static struct tda18271_thermo_map tda18271_thermometer[] = {
913 { .d = 0x00, .r0 = 60, .r1 = 92 },
914 { .d = 0x01, .r0 = 62, .r1 = 94 },
915 { .d = 0x02, .r0 = 66, .r1 = 98 },
916 { .d = 0x03, .r0 = 64, .r1 = 96 },
917 { .d = 0x04, .r0 = 74, .r1 = 106 },
918 { .d = 0x05, .r0 = 72, .r1 = 104 },
919 { .d = 0x06, .r0 = 68, .r1 = 100 },
920 { .d = 0x07, .r0 = 70, .r1 = 102 },
921 { .d = 0x08, .r0 = 90, .r1 = 122 },
922 { .d = 0x09, .r0 = 88, .r1 = 120 },
923 { .d = 0x0a, .r0 = 84, .r1 = 116 },
924 { .d = 0x0b, .r0 = 86, .r1 = 118 },
925 { .d = 0x0c, .r0 = 76, .r1 = 108 },
926 { .d = 0x0d, .r0 = 78, .r1 = 110 },
927 { .d = 0x0e, .r0 = 82, .r1 = 114 },
928 { .d = 0x0f, .r0 = 80, .r1 = 112 },
929 { .d = 0x00, .r0 = 0, .r1 = 0 }, /* end */
930};
931
932int tda18271_lookup_thermometer(struct dvb_frontend *fe)
933{
934 struct tda18271_priv *priv = fe->tuner_priv;
935 unsigned char *regs = priv->tda18271_regs;
936 int val, i = 0;
937
938 while (tda18271_thermometer[i].d < (regs[R_TM] & 0x0f)) {
939 if (tda18271_thermometer[i + 1].d == 0)
940 break;
941 i++;
942 }
943
944 if ((regs[R_TM] & 0x20) == 0x20)
945 val = tda18271_thermometer[i].r1;
946 else
947 val = tda18271_thermometer[i].r0;
948
949 tda_map("(%d) tm = %d\n", i, val);
950
951 return val;
952}
953
954/*---------------------------------------------------------------------*/
955
956struct tda18271_cid_target_map {
957 u32 rfmax;
958 u8 target;
959 u16 limit;
960};
961
962static struct tda18271_cid_target_map tda18271_cid_target[] = {
963 { .rfmax = 46000, .target = 0x04, .limit = 1800 },
964 { .rfmax = 52200, .target = 0x0a, .limit = 1500 },
965 { .rfmax = 79100, .target = 0x01, .limit = 4000 },
966 { .rfmax = 136800, .target = 0x18, .limit = 4000 },
967 { .rfmax = 156700, .target = 0x18, .limit = 4000 },
968 { .rfmax = 156700, .target = 0x18, .limit = 4000 },
969 { .rfmax = 186250, .target = 0x0a, .limit = 4000 },
970 { .rfmax = 230000, .target = 0x0a, .limit = 4000 },
971 { .rfmax = 345000, .target = 0x18, .limit = 4000 },
972 { .rfmax = 426000, .target = 0x0e, .limit = 4000 },
973 { .rfmax = 489500, .target = 0x1e, .limit = 4000 },
974 { .rfmax = 697500, .target = 0x32, .limit = 4000 },
975 { .rfmax = 842000, .target = 0x3a, .limit = 4000 },
976 { .rfmax = 0, .target = 0x00, .limit = 0 }, /* end */
977};
978
979int tda18271_lookup_cid_target(struct dvb_frontend *fe,
980 u32 *freq, u8 *cid_target, u16 *count_limit)
981{
982 int i = 0;
983
984 while ((tda18271_cid_target[i].rfmax * 1000) < *freq) {
985 if (tda18271_cid_target[i + 1].rfmax == 0)
986 break;
987 i++;
988 }
989 *cid_target = tda18271_cid_target[i].target;
990 *count_limit = tda18271_cid_target[i].limit;
991
992 tda_map("(%d) cid_target = %02x, count_limit = %d\n", i,
993 tda18271_cid_target[i].target, tda18271_cid_target[i].limit);
994
995 return 0;
996}
997
998/*---------------------------------------------------------------------*/
999
1000static struct tda18271_rf_tracking_filter_cal tda18271_rf_band_template[] = {
1001 { .rfmax = 47900, .rfband = 0x00,
1002 .rf1_def = 46000, .rf2_def = 0, .rf3_def = 0 },
1003 { .rfmax = 61100, .rfband = 0x01,
1004 .rf1_def = 52200, .rf2_def = 0, .rf3_def = 0 },
1005 { .rfmax = 152600, .rfband = 0x02,
1006 .rf1_def = 70100, .rf2_def = 136800, .rf3_def = 0 },
1007 { .rfmax = 164700, .rfband = 0x03,
1008 .rf1_def = 156700, .rf2_def = 0, .rf3_def = 0 },
1009 { .rfmax = 203500, .rfband = 0x04,
1010 .rf1_def = 186250, .rf2_def = 0, .rf3_def = 0 },
1011 { .rfmax = 457800, .rfband = 0x05,
1012 .rf1_def = 230000, .rf2_def = 345000, .rf3_def = 426000 },
1013 { .rfmax = 865000, .rfband = 0x06,
1014 .rf1_def = 489500, .rf2_def = 697500, .rf3_def = 842000 },
1015 { .rfmax = 0, .rfband = 0x00,
1016 .rf1_def = 0, .rf2_def = 0, .rf3_def = 0 }, /* end */
1017};
1018
1019int tda18271_lookup_rf_band(struct dvb_frontend *fe, u32 *freq, u8 *rf_band)
1020{
1021 struct tda18271_priv *priv = fe->tuner_priv;
1022 struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
1023 int i = 0;
1024
1025 while ((map[i].rfmax * 1000) < *freq) {
1026 if (tda18271_debug & DBG_ADV)
1027 tda_map("(%d) rfmax = %d < freq = %d, "
1028 "rf1_def = %d, rf2_def = %d, rf3_def = %d, "
1029 "rf1 = %d, rf2 = %d, rf3 = %d, "
1030 "rf_a1 = %d, rf_a2 = %d, "
1031 "rf_b1 = %d, rf_b2 = %d\n",
1032 i, map[i].rfmax * 1000, *freq,
1033 map[i].rf1_def, map[i].rf2_def, map[i].rf3_def,
1034 map[i].rf1, map[i].rf2, map[i].rf3,
1035 map[i].rf_a1, map[i].rf_a2,
1036 map[i].rf_b1, map[i].rf_b2);
1037 if (map[i].rfmax == 0)
1038 return -EINVAL;
1039 i++;
1040 }
1041 if (rf_band)
1042 *rf_band = map[i].rfband;
1043
1044 tda_map("(%d) rf_band = %02x\n", i, map[i].rfband);
1045
1046 return i;
1047}
1048
1049/*---------------------------------------------------------------------*/
1050
1051struct tda18271_map_layout {
1052 struct tda18271_pll_map *main_pll;
1053 struct tda18271_pll_map *cal_pll;
1054
1055 struct tda18271_map *rf_cal;
1056 struct tda18271_map *rf_cal_kmco;
1057 struct tda18271_map *rf_cal_dc_over_dt;
1058
1059 struct tda18271_map *bp_filter;
1060 struct tda18271_map *rf_band;
1061 struct tda18271_map *gain_taper;
1062 struct tda18271_map *ir_measure;
1063};
1064
1065/*---------------------------------------------------------------------*/
1066
1067int tda18271_lookup_pll_map(struct dvb_frontend *fe,
1068 enum tda18271_map_type map_type,
1069 u32 *freq, u8 *post_div, u8 *div)
1070{
1071 struct tda18271_priv *priv = fe->tuner_priv;
1072 struct tda18271_pll_map *map = NULL;
1073 unsigned int i = 0;
1074 char *map_name;
1075 int ret = 0;
1076
1077 BUG_ON(!priv->maps);
1078
1079 switch (map_type) {
1080 case MAIN_PLL:
1081 map = priv->maps->main_pll;
1082 map_name = "main_pll";
1083 break;
1084 case CAL_PLL:
1085 map = priv->maps->cal_pll;
1086 map_name = "cal_pll";
1087 break;
1088 default:
1089 /* we should never get here */
1090 map_name = "undefined";
1091 break;
1092 }
1093
1094 if (!map) {
1095 tda_warn("%s map is not set!\n", map_name);
1096 ret = -EINVAL;
1097 goto fail;
1098 }
1099
1100 while ((map[i].lomax * 1000) < *freq) {
1101 if (map[i + 1].lomax == 0) {
1102 tda_map("%s: frequency (%d) out of range\n",
1103 map_name, *freq);
1104 ret = -ERANGE;
1105 break;
1106 }
1107 i++;
1108 }
1109 *post_div = map[i].pd;
1110 *div = map[i].d;
1111
1112 tda_map("(%d) %s: post div = 0x%02x, div = 0x%02x\n",
1113 i, map_name, *post_div, *div);
1114fail:
1115 return ret;
1116}
1117
1118int tda18271_lookup_map(struct dvb_frontend *fe,
1119 enum tda18271_map_type map_type,
1120 u32 *freq, u8 *val)
1121{
1122 struct tda18271_priv *priv = fe->tuner_priv;
1123 struct tda18271_map *map = NULL;
1124 unsigned int i = 0;
1125 char *map_name;
1126 int ret = 0;
1127
1128 BUG_ON(!priv->maps);
1129
1130 switch (map_type) {
1131 case BP_FILTER:
1132 map = priv->maps->bp_filter;
1133 map_name = "bp_filter";
1134 break;
1135 case RF_CAL_KMCO:
1136 map = priv->maps->rf_cal_kmco;
1137 map_name = "km";
1138 break;
1139 case RF_BAND:
1140 map = priv->maps->rf_band;
1141 map_name = "rf_band";
1142 break;
1143 case GAIN_TAPER:
1144 map = priv->maps->gain_taper;
1145 map_name = "gain_taper";
1146 break;
1147 case RF_CAL:
1148 map = priv->maps->rf_cal;
1149 map_name = "rf_cal";
1150 break;
1151 case IR_MEASURE:
1152 map = priv->maps->ir_measure;
1153 map_name = "ir_measure";
1154 break;
1155 case RF_CAL_DC_OVER_DT:
1156 map = priv->maps->rf_cal_dc_over_dt;
1157 map_name = "rf_cal_dc_over_dt";
1158 break;
1159 default:
1160 /* we should never get here */
1161 map_name = "undefined";
1162 break;
1163 }
1164
1165 if (!map) {
1166 tda_warn("%s map is not set!\n", map_name);
1167 ret = -EINVAL;
1168 goto fail;
1169 }
1170
1171 while ((map[i].rfmax * 1000) < *freq) {
1172 if (map[i + 1].rfmax == 0) {
1173 tda_map("%s: frequency (%d) out of range\n",
1174 map_name, *freq);
1175 ret = -ERANGE;
1176 break;
1177 }
1178 i++;
1179 }
1180 *val = map[i].val;
1181
1182 tda_map("(%d) %s: 0x%02x\n", i, map_name, *val);
1183fail:
1184 return ret;
1185}
1186
1187/*---------------------------------------------------------------------*/
1188
1189static struct tda18271_std_map tda18271c1_std_map = {
1190 .fm_radio = { .if_freq = 1250, .fm_rfn = 1, .agc_mode = 3, .std = 0,
1191 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x18 */
1192 .atv_b = { .if_freq = 6750, .fm_rfn = 0, .agc_mode = 1, .std = 6,
1193 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0e */
1194 .atv_dk = { .if_freq = 7750, .fm_rfn = 0, .agc_mode = 1, .std = 7,
1195 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0f */
1196 .atv_gh = { .if_freq = 7750, .fm_rfn = 0, .agc_mode = 1, .std = 7,
1197 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0f */
1198 .atv_i = { .if_freq = 7750, .fm_rfn = 0, .agc_mode = 1, .std = 7,
1199 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0f */
1200 .atv_l = { .if_freq = 7750, .fm_rfn = 0, .agc_mode = 1, .std = 7,
1201 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0f */
1202 .atv_lc = { .if_freq = 1250, .fm_rfn = 0, .agc_mode = 1, .std = 7,
1203 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0f */
1204 .atv_mn = { .if_freq = 5750, .fm_rfn = 0, .agc_mode = 1, .std = 5,
1205 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0d */
1206 .atsc_6 = { .if_freq = 3250, .fm_rfn = 0, .agc_mode = 3, .std = 4,
1207 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1c */
1208 .dvbt_6 = { .if_freq = 3300, .fm_rfn = 0, .agc_mode = 3, .std = 4,
1209 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1c */
1210 .dvbt_7 = { .if_freq = 3800, .fm_rfn = 0, .agc_mode = 3, .std = 5,
1211 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1d */
1212 .dvbt_8 = { .if_freq = 4300, .fm_rfn = 0, .agc_mode = 3, .std = 6,
1213 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1e */
1214 .qam_6 = { .if_freq = 4000, .fm_rfn = 0, .agc_mode = 3, .std = 5,
1215 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1d */
1216 .qam_8 = { .if_freq = 5000, .fm_rfn = 0, .agc_mode = 3, .std = 7,
1217 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1f */
1218};
1219
1220static struct tda18271_std_map tda18271c2_std_map = {
1221 .fm_radio = { .if_freq = 1250, .fm_rfn = 1, .agc_mode = 3, .std = 0,
1222 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x18 */
1223 .atv_b = { .if_freq = 6000, .fm_rfn = 0, .agc_mode = 1, .std = 5,
1224 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0d */
1225 .atv_dk = { .if_freq = 6900, .fm_rfn = 0, .agc_mode = 1, .std = 6,
1226 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0e */
1227 .atv_gh = { .if_freq = 7100, .fm_rfn = 0, .agc_mode = 1, .std = 6,
1228 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0e */
1229 .atv_i = { .if_freq = 7250, .fm_rfn = 0, .agc_mode = 1, .std = 6,
1230 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0e */
1231 .atv_l = { .if_freq = 6900, .fm_rfn = 0, .agc_mode = 1, .std = 6,
1232 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0e */
1233 .atv_lc = { .if_freq = 1250, .fm_rfn = 0, .agc_mode = 1, .std = 6,
1234 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0e */
1235 .atv_mn = { .if_freq = 5400, .fm_rfn = 0, .agc_mode = 1, .std = 4,
1236 .if_lvl = 0, .rfagc_top = 0x2c, }, /* EP3[4:0] 0x0c */
1237 .atsc_6 = { .if_freq = 3250, .fm_rfn = 0, .agc_mode = 3, .std = 4,
1238 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1c */
1239 .dvbt_6 = { .if_freq = 3300, .fm_rfn = 0, .agc_mode = 3, .std = 4,
1240 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1c */
1241 .dvbt_7 = { .if_freq = 3500, .fm_rfn = 0, .agc_mode = 3, .std = 4,
1242 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1c */
1243 .dvbt_8 = { .if_freq = 4000, .fm_rfn = 0, .agc_mode = 3, .std = 5,
1244 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1d */
1245 .qam_6 = { .if_freq = 4000, .fm_rfn = 0, .agc_mode = 3, .std = 5,
1246 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1d */
1247 .qam_8 = { .if_freq = 5000, .fm_rfn = 0, .agc_mode = 3, .std = 7,
1248 .if_lvl = 1, .rfagc_top = 0x37, }, /* EP3[4:0] 0x1f */
1249};
1250
1251/*---------------------------------------------------------------------*/
1252
1253static struct tda18271_map_layout tda18271c1_map_layout = {
1254 .main_pll = tda18271c1_main_pll,
1255 .cal_pll = tda18271c1_cal_pll,
1256
1257 .rf_cal = tda18271c1_rf_cal,
1258 .rf_cal_kmco = tda18271c1_km,
1259
1260 .bp_filter = tda18271_bp_filter,
1261 .rf_band = tda18271_rf_band,
1262 .gain_taper = tda18271_gain_taper,
1263 .ir_measure = tda18271_ir_measure,
1264};
1265
1266static struct tda18271_map_layout tda18271c2_map_layout = {
1267 .main_pll = tda18271c2_main_pll,
1268 .cal_pll = tda18271c2_cal_pll,
1269
1270 .rf_cal = tda18271c2_rf_cal,
1271 .rf_cal_kmco = tda18271c2_km,
1272
1273 .rf_cal_dc_over_dt = tda18271_rf_cal_dc_over_dt,
1274
1275 .bp_filter = tda18271_bp_filter,
1276 .rf_band = tda18271_rf_band,
1277 .gain_taper = tda18271_gain_taper,
1278 .ir_measure = tda18271_ir_measure,
1279};
1280
1281int tda18271_assign_map_layout(struct dvb_frontend *fe)
1282{
1283 struct tda18271_priv *priv = fe->tuner_priv;
1284 int ret = 0;
1285
1286 switch (priv->id) {
1287 case TDA18271HDC1:
1288 priv->maps = &tda18271c1_map_layout;
1289 memcpy(&priv->std, &tda18271c1_std_map,
1290 sizeof(struct tda18271_std_map));
1291 break;
1292 case TDA18271HDC2:
1293 priv->maps = &tda18271c2_map_layout;
1294 memcpy(&priv->std, &tda18271c2_std_map,
1295 sizeof(struct tda18271_std_map));
1296 break;
1297 default:
1298 ret = -EINVAL;
1299 break;
1300 }
1301 memcpy(priv->rf_cal_state, &tda18271_rf_band_template,
1302 sizeof(tda18271_rf_band_template));
1303
1304 return ret;
1305}
1306
1307/*
1308 * Overrides for Emacs so that we follow Linus's tabbing style.
1309 * ---------------------------------------------------------------------------
1310 * Local variables:
1311 * c-basic-offset: 8
1312 * End:
1313 */
diff --git a/drivers/media/dvb/frontends/tda18271.h b/drivers/media/dvb/frontends/tda18271.h
deleted file mode 100644
index 0e7af8d05a38..000000000000
--- a/drivers/media/dvb/frontends/tda18271.h
+++ /dev/null
@@ -1,99 +0,0 @@
1/*
2 tda18271.h - header for the Philips / NXP TDA18271 silicon tuner
3
4 Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __TDA18271_H__
22#define __TDA18271_H__
23
24#include <linux/i2c.h>
25#include "dvb_frontend.h"
26
27struct tda18271_std_map_item {
28 u16 if_freq;
29
30 /* EP3[4:3] */
31 unsigned int agc_mode:2;
32 /* EP3[2:0] */
33 unsigned int std:3;
34 /* EP4[7] */
35 unsigned int fm_rfn:1;
36 /* EP4[4:2] */
37 unsigned int if_lvl:3;
38 /* EB22[6:0] */
39 unsigned int rfagc_top:7;
40};
41
42struct tda18271_std_map {
43 struct tda18271_std_map_item fm_radio;
44 struct tda18271_std_map_item atv_b;
45 struct tda18271_std_map_item atv_dk;
46 struct tda18271_std_map_item atv_gh;
47 struct tda18271_std_map_item atv_i;
48 struct tda18271_std_map_item atv_l;
49 struct tda18271_std_map_item atv_lc;
50 struct tda18271_std_map_item atv_mn;
51 struct tda18271_std_map_item atsc_6;
52 struct tda18271_std_map_item dvbt_6;
53 struct tda18271_std_map_item dvbt_7;
54 struct tda18271_std_map_item dvbt_8;
55 struct tda18271_std_map_item qam_6;
56 struct tda18271_std_map_item qam_8;
57};
58
59enum tda18271_role {
60 TDA18271_MASTER = 0,
61 TDA18271_SLAVE,
62};
63
64enum tda18271_i2c_gate {
65 TDA18271_GATE_AUTO = 0,
66 TDA18271_GATE_ANALOG,
67 TDA18271_GATE_DIGITAL,
68};
69
70struct tda18271_config {
71 /* override default if freq / std settings (optional) */
72 struct tda18271_std_map *std_map;
73
74 /* master / slave tuner: master uses main pll, slave uses cal pll */
75 enum tda18271_role role;
76
77 /* use i2c gate provided by analog or digital demod */
78 enum tda18271_i2c_gate gate;
79
80 /* some i2c providers cant write all 39 registers at once */
81 unsigned int small_i2c:1;
82};
83
84#if defined(CONFIG_DVB_TDA18271) || (defined(CONFIG_DVB_TDA18271_MODULE) && defined(MODULE))
85extern struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
86 struct i2c_adapter *i2c,
87 struct tda18271_config *cfg);
88#else
89static inline struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe,
90 u8 addr,
91 struct i2c_adapter *i2c,
92 struct tda18271_config *cfg)
93{
94 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
95 return NULL;
96}
97#endif
98
99#endif /* __TDA18271_H__ */
diff --git a/drivers/media/dvb/frontends/tda827x.c b/drivers/media/dvb/frontends/tda827x.c
deleted file mode 100644
index d30d2c9094d9..000000000000
--- a/drivers/media/dvb/frontends/tda827x.c
+++ /dev/null
@@ -1,852 +0,0 @@
1/*
2 *
3 * (c) 2005 Hartmut Hackmann
4 * (c) 2007 Michael Krufky
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/module.h>
22#include <asm/types.h>
23#include <linux/dvb/frontend.h>
24#include <linux/videodev2.h>
25
26#include "tda827x.h"
27
28static int debug;
29module_param(debug, int, 0644);
30MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
31
32#define dprintk(args...) \
33 do { \
34 if (debug) printk(KERN_DEBUG "tda827x: " args); \
35 } while (0)
36
37struct tda827x_priv {
38 int i2c_addr;
39 struct i2c_adapter *i2c_adap;
40 struct tda827x_config *cfg;
41
42 unsigned int sgIF;
43 unsigned char lpsel;
44
45 u32 frequency;
46 u32 bandwidth;
47};
48
49static void tda827x_set_std(struct dvb_frontend *fe,
50 struct analog_parameters *params)
51{
52 struct tda827x_priv *priv = fe->tuner_priv;
53 char *mode;
54
55 priv->lpsel = 0;
56 if (params->std & V4L2_STD_MN) {
57 priv->sgIF = 92;
58 priv->lpsel = 1;
59 mode = "MN";
60 } else if (params->std & V4L2_STD_B) {
61 priv->sgIF = 108;
62 mode = "B";
63 } else if (params->std & V4L2_STD_GH) {
64 priv->sgIF = 124;
65 mode = "GH";
66 } else if (params->std & V4L2_STD_PAL_I) {
67 priv->sgIF = 124;
68 mode = "I";
69 } else if (params->std & V4L2_STD_DK) {
70 priv->sgIF = 124;
71 mode = "DK";
72 } else if (params->std & V4L2_STD_SECAM_L) {
73 priv->sgIF = 124;
74 mode = "L";
75 } else if (params->std & V4L2_STD_SECAM_LC) {
76 priv->sgIF = 20;
77 mode = "LC";
78 } else {
79 priv->sgIF = 124;
80 mode = "xx";
81 }
82
83 if (params->mode == V4L2_TUNER_RADIO)
84 priv->sgIF = 88; /* if frequency is 5.5 MHz */
85
86 dprintk("setting tda827x to system %s\n", mode);
87}
88
89
90/* ------------------------------------------------------------------ */
91
92struct tda827x_data {
93 u32 lomax;
94 u8 spd;
95 u8 bs;
96 u8 bp;
97 u8 cp;
98 u8 gc3;
99 u8 div1p5;
100};
101
102static const struct tda827x_data tda827x_table[] = {
103 { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
104 { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
105 { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
106 { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
107 { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
108 { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
109 { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
110 { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
111 { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
112 { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
113 { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
114 { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
115 { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
116 { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
117 { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
118 { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
119 { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
120 { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
121 { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
122 { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
123 { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
124 { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
125 { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
126 { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
127 { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
128 { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
129 { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
130 { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
131 { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
132};
133
134static int tda827xo_set_params(struct dvb_frontend *fe,
135 struct dvb_frontend_parameters *params)
136{
137 struct tda827x_priv *priv = fe->tuner_priv;
138 u8 buf[14];
139
140 struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
141 .buf = buf, .len = sizeof(buf) };
142 int i, tuner_freq, if_freq;
143 u32 N;
144
145 dprintk("%s:\n", __func__);
146 switch (params->u.ofdm.bandwidth) {
147 case BANDWIDTH_6_MHZ:
148 if_freq = 4000000;
149 break;
150 case BANDWIDTH_7_MHZ:
151 if_freq = 4500000;
152 break;
153 default: /* 8 MHz or Auto */
154 if_freq = 5000000;
155 break;
156 }
157 tuner_freq = params->frequency + if_freq;
158
159 i = 0;
160 while (tda827x_table[i].lomax < tuner_freq) {
161 if (tda827x_table[i + 1].lomax == 0)
162 break;
163 i++;
164 }
165
166 N = ((tuner_freq + 125000) / 250000) << (tda827x_table[i].spd + 2);
167 buf[0] = 0;
168 buf[1] = (N>>8) | 0x40;
169 buf[2] = N & 0xff;
170 buf[3] = 0;
171 buf[4] = 0x52;
172 buf[5] = (tda827x_table[i].spd << 6) + (tda827x_table[i].div1p5 << 5) +
173 (tda827x_table[i].bs << 3) +
174 tda827x_table[i].bp;
175 buf[6] = (tda827x_table[i].gc3 << 4) + 0x8f;
176 buf[7] = 0xbf;
177 buf[8] = 0x2a;
178 buf[9] = 0x05;
179 buf[10] = 0xff;
180 buf[11] = 0x00;
181 buf[12] = 0x00;
182 buf[13] = 0x40;
183
184 msg.len = 14;
185 if (fe->ops.i2c_gate_ctrl)
186 fe->ops.i2c_gate_ctrl(fe, 1);
187 if (i2c_transfer(priv->i2c_adap, &msg, 1) != 1) {
188 printk("%s: could not write to tuner at addr: 0x%02x\n",
189 __func__, priv->i2c_addr << 1);
190 return -EIO;
191 }
192 msleep(500);
193 /* correct CP value */
194 buf[0] = 0x30;
195 buf[1] = 0x50 + tda827x_table[i].cp;
196 msg.len = 2;
197
198 if (fe->ops.i2c_gate_ctrl)
199 fe->ops.i2c_gate_ctrl(fe, 1);
200 i2c_transfer(priv->i2c_adap, &msg, 1);
201
202 priv->frequency = tuner_freq - if_freq; // FIXME
203 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
204
205 return 0;
206}
207
208static int tda827xo_sleep(struct dvb_frontend *fe)
209{
210 struct tda827x_priv *priv = fe->tuner_priv;
211 static u8 buf[] = { 0x30, 0xd0 };
212 struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
213 .buf = buf, .len = sizeof(buf) };
214
215 dprintk("%s:\n", __func__);
216 if (fe->ops.i2c_gate_ctrl)
217 fe->ops.i2c_gate_ctrl(fe, 1);
218 i2c_transfer(priv->i2c_adap, &msg, 1);
219
220 if (priv->cfg && priv->cfg->sleep)
221 priv->cfg->sleep(fe);
222
223 return 0;
224}
225
226/* ------------------------------------------------------------------ */
227
228static int tda827xo_set_analog_params(struct dvb_frontend *fe,
229 struct analog_parameters *params)
230{
231 unsigned char tuner_reg[8];
232 unsigned char reg2[2];
233 u32 N;
234 int i;
235 struct tda827x_priv *priv = fe->tuner_priv;
236 struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0 };
237 unsigned int freq = params->frequency;
238
239 tda827x_set_std(fe, params);
240
241 if (params->mode == V4L2_TUNER_RADIO)
242 freq = freq / 1000;
243
244 N = freq + priv->sgIF;
245
246 i = 0;
247 while (tda827x_table[i].lomax < N * 62500) {
248 if (tda827x_table[i + 1].lomax == 0)
249 break;
250 i++;
251 }
252
253 N = N << tda827x_table[i].spd;
254
255 tuner_reg[0] = 0;
256 tuner_reg[1] = (unsigned char)(N>>8);
257 tuner_reg[2] = (unsigned char) N;
258 tuner_reg[3] = 0x40;
259 tuner_reg[4] = 0x52 + (priv->lpsel << 5);
260 tuner_reg[5] = (tda827x_table[i].spd << 6) +
261 (tda827x_table[i].div1p5 << 5) +
262 (tda827x_table[i].bs << 3) + tda827x_table[i].bp;
263 tuner_reg[6] = 0x8f + (tda827x_table[i].gc3 << 4);
264 tuner_reg[7] = 0x8f;
265
266 msg.buf = tuner_reg;
267 msg.len = 8;
268 i2c_transfer(priv->i2c_adap, &msg, 1);
269
270 msg.buf = reg2;
271 msg.len = 2;
272 reg2[0] = 0x80;
273 reg2[1] = 0;
274 i2c_transfer(priv->i2c_adap, &msg, 1);
275
276 reg2[0] = 0x60;
277 reg2[1] = 0xbf;
278 i2c_transfer(priv->i2c_adap, &msg, 1);
279
280 reg2[0] = 0x30;
281 reg2[1] = tuner_reg[4] + 0x80;
282 i2c_transfer(priv->i2c_adap, &msg, 1);
283
284 msleep(1);
285 reg2[0] = 0x30;
286 reg2[1] = tuner_reg[4] + 4;
287 i2c_transfer(priv->i2c_adap, &msg, 1);
288
289 msleep(1);
290 reg2[0] = 0x30;
291 reg2[1] = tuner_reg[4];
292 i2c_transfer(priv->i2c_adap, &msg, 1);
293
294 msleep(550);
295 reg2[0] = 0x30;
296 reg2[1] = (tuner_reg[4] & 0xfc) + tda827x_table[i].cp;
297 i2c_transfer(priv->i2c_adap, &msg, 1);
298
299 reg2[0] = 0x60;
300 reg2[1] = 0x3f;
301 i2c_transfer(priv->i2c_adap, &msg, 1);
302
303 reg2[0] = 0x80;
304 reg2[1] = 0x08; /* Vsync en */
305 i2c_transfer(priv->i2c_adap, &msg, 1);
306
307 priv->frequency = freq * 62500;
308
309 return 0;
310}
311
312static void tda827xo_agcf(struct dvb_frontend *fe)
313{
314 struct tda827x_priv *priv = fe->tuner_priv;
315 unsigned char data[] = { 0x80, 0x0c };
316 struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
317 .buf = data, .len = 2};
318
319 i2c_transfer(priv->i2c_adap, &msg, 1);
320}
321
322/* ------------------------------------------------------------------ */
323
324struct tda827xa_data {
325 u32 lomax;
326 u8 svco;
327 u8 spd;
328 u8 scr;
329 u8 sbs;
330 u8 gc3;
331};
332
333static const struct tda827xa_data tda827xa_dvbt[] = {
334 { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
335 { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
336 { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
337 { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
338 { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
339 { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
340 { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
341 { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
342 { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
343 { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
344 { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
345 { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
346 { .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
347 { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
348 { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
349 { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
350 { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
351 { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
352 { .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
353 { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
354 { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
355 { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
356 { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
357 { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
358 { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
359 { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
360 { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}
361};
362
363static struct tda827xa_data tda827xa_analog[] = {
364 { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 3},
365 { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 3},
366 { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 3},
367 { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 3},
368 { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
369 { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
370 { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
371 { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
372 { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
373 { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
374 { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 3},
375 { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 3},
376 { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
377 { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 3},
378 { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 3},
379 { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
380 { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
381 { .lomax = 554000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
382 { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
383 { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
384 { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
385 { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
386 { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
387 { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
388 { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
389 { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}
390};
391
392static int tda827xa_sleep(struct dvb_frontend *fe)
393{
394 struct tda827x_priv *priv = fe->tuner_priv;
395 static u8 buf[] = { 0x30, 0x90 };
396 struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
397 .buf = buf, .len = sizeof(buf) };
398
399 dprintk("%s:\n", __func__);
400 if (fe->ops.i2c_gate_ctrl)
401 fe->ops.i2c_gate_ctrl(fe, 1);
402
403 i2c_transfer(priv->i2c_adap, &msg, 1);
404
405 if (fe->ops.i2c_gate_ctrl)
406 fe->ops.i2c_gate_ctrl(fe, 0);
407
408 if (priv->cfg && priv->cfg->sleep)
409 priv->cfg->sleep(fe);
410
411 return 0;
412}
413
414static void tda827xa_lna_gain(struct dvb_frontend *fe, int high,
415 struct analog_parameters *params)
416{
417 struct tda827x_priv *priv = fe->tuner_priv;
418 unsigned char buf[] = {0x22, 0x01};
419 int arg;
420 int gp_func;
421 struct i2c_msg msg = { .addr = priv->cfg->switch_addr, .flags = 0,
422 .buf = buf, .len = sizeof(buf) };
423
424 if (NULL == priv->cfg) {
425 dprintk("tda827x_config not defined, cannot set LNA gain!\n");
426 return;
427 }
428 if (priv->cfg->config) {
429 if (high)
430 dprintk("setting LNA to high gain\n");
431 else
432 dprintk("setting LNA to low gain\n");
433 }
434 switch (priv->cfg->config) {
435 case 0: /* no LNA */
436 break;
437 case 1: /* switch is GPIO 0 of tda8290 */
438 case 2:
439 if (params == NULL) {
440 gp_func = 0;
441 arg = 0;
442 } else {
443 /* turn Vsync on */
444 gp_func = 1;
445 if (params->std & V4L2_STD_MN)
446 arg = 1;
447 else
448 arg = 0;
449 }
450 if (priv->cfg->tuner_callback)
451 priv->cfg->tuner_callback(priv->i2c_adap->algo_data,
452 gp_func, arg);
453 buf[1] = high ? 0 : 1;
454 if (priv->cfg->config == 2)
455 buf[1] = high ? 1 : 0;
456 i2c_transfer(priv->i2c_adap, &msg, 1);
457 break;
458 case 3: /* switch with GPIO of saa713x */
459 if (priv->cfg->tuner_callback)
460 priv->cfg->tuner_callback(priv->i2c_adap->algo_data, 0, high);
461 break;
462 }
463}
464
465static int tda827xa_set_params(struct dvb_frontend *fe,
466 struct dvb_frontend_parameters *params)
467{
468 struct tda827x_priv *priv = fe->tuner_priv;
469 u8 buf[11];
470
471 struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
472 .buf = buf, .len = sizeof(buf) };
473
474 int i, tuner_freq, if_freq;
475 u32 N;
476
477 dprintk("%s:\n", __func__);
478
479 tda827xa_lna_gain(fe, 1, NULL);
480 msleep(20);
481
482 switch (params->u.ofdm.bandwidth) {
483 case BANDWIDTH_6_MHZ:
484 if_freq = 4000000;
485 break;
486 case BANDWIDTH_7_MHZ:
487 if_freq = 4500000;
488 break;
489 default: /* 8 MHz or Auto */
490 if_freq = 5000000;
491 break;
492 }
493 tuner_freq = params->frequency + if_freq;
494
495 i = 0;
496 while (tda827xa_dvbt[i].lomax < tuner_freq) {
497 if(tda827xa_dvbt[i + 1].lomax == 0)
498 break;
499 i++;
500 }
501
502 N = ((tuner_freq + 31250) / 62500) << tda827xa_dvbt[i].spd;
503 buf[0] = 0; // subaddress
504 buf[1] = N >> 8;
505 buf[2] = N & 0xff;
506 buf[3] = 0;
507 buf[4] = 0x16;
508 buf[5] = (tda827xa_dvbt[i].spd << 5) + (tda827xa_dvbt[i].svco << 3) +
509 tda827xa_dvbt[i].sbs;
510 buf[6] = 0x4b + (tda827xa_dvbt[i].gc3 << 4);
511 buf[7] = 0x1c;
512 buf[8] = 0x06;
513 buf[9] = 0x24;
514 buf[10] = 0x00;
515 msg.len = 11;
516 if (fe->ops.i2c_gate_ctrl)
517 fe->ops.i2c_gate_ctrl(fe, 1);
518 if (i2c_transfer(priv->i2c_adap, &msg, 1) != 1) {
519 printk("%s: could not write to tuner at addr: 0x%02x\n",
520 __func__, priv->i2c_addr << 1);
521 return -EIO;
522 }
523 buf[0] = 0x90;
524 buf[1] = 0xff;
525 buf[2] = 0x60;
526 buf[3] = 0x00;
527 buf[4] = 0x59; // lpsel, for 6MHz + 2
528 msg.len = 5;
529 if (fe->ops.i2c_gate_ctrl)
530 fe->ops.i2c_gate_ctrl(fe, 1);
531 i2c_transfer(priv->i2c_adap, &msg, 1);
532
533 buf[0] = 0xa0;
534 buf[1] = 0x40;
535 msg.len = 2;
536 if (fe->ops.i2c_gate_ctrl)
537 fe->ops.i2c_gate_ctrl(fe, 1);
538 i2c_transfer(priv->i2c_adap, &msg, 1);
539
540 msleep(11);
541 msg.flags = I2C_M_RD;
542 if (fe->ops.i2c_gate_ctrl)
543 fe->ops.i2c_gate_ctrl(fe, 1);
544 i2c_transfer(priv->i2c_adap, &msg, 1);
545 msg.flags = 0;
546
547 buf[1] >>= 4;
548 dprintk("tda8275a AGC2 gain is: %d\n", buf[1]);
549 if ((buf[1]) < 2) {
550 tda827xa_lna_gain(fe, 0, NULL);
551 buf[0] = 0x60;
552 buf[1] = 0x0c;
553 if (fe->ops.i2c_gate_ctrl)
554 fe->ops.i2c_gate_ctrl(fe, 1);
555 i2c_transfer(priv->i2c_adap, &msg, 1);
556 }
557
558 buf[0] = 0xc0;
559 buf[1] = 0x99; // lpsel, for 6MHz + 2
560 if (fe->ops.i2c_gate_ctrl)
561 fe->ops.i2c_gate_ctrl(fe, 1);
562 i2c_transfer(priv->i2c_adap, &msg, 1);
563
564 buf[0] = 0x60;
565 buf[1] = 0x3c;
566 if (fe->ops.i2c_gate_ctrl)
567 fe->ops.i2c_gate_ctrl(fe, 1);
568 i2c_transfer(priv->i2c_adap, &msg, 1);
569
570 /* correct CP value */
571 buf[0] = 0x30;
572 buf[1] = 0x10 + tda827xa_dvbt[i].scr;
573 if (fe->ops.i2c_gate_ctrl)
574 fe->ops.i2c_gate_ctrl(fe, 1);
575 i2c_transfer(priv->i2c_adap, &msg, 1);
576
577 msleep(163);
578 buf[0] = 0xc0;
579 buf[1] = 0x39; // lpsel, for 6MHz + 2
580 if (fe->ops.i2c_gate_ctrl)
581 fe->ops.i2c_gate_ctrl(fe, 1);
582 i2c_transfer(priv->i2c_adap, &msg, 1);
583
584 msleep(3);
585 /* freeze AGC1 */
586 buf[0] = 0x50;
587 buf[1] = 0x4f + (tda827xa_dvbt[i].gc3 << 4);
588 if (fe->ops.i2c_gate_ctrl)
589 fe->ops.i2c_gate_ctrl(fe, 1);
590 i2c_transfer(priv->i2c_adap, &msg, 1);
591
592 priv->frequency = tuner_freq - if_freq; // FIXME
593 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
594
595 return 0;
596}
597
598
599static int tda827xa_set_analog_params(struct dvb_frontend *fe,
600 struct analog_parameters *params)
601{
602 unsigned char tuner_reg[11];
603 u32 N;
604 int i;
605 struct tda827x_priv *priv = fe->tuner_priv;
606 struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = 0,
607 .buf = tuner_reg, .len = sizeof(tuner_reg) };
608 unsigned int freq = params->frequency;
609
610 tda827x_set_std(fe, params);
611
612 tda827xa_lna_gain(fe, 1, params);
613 msleep(10);
614
615 if (params->mode == V4L2_TUNER_RADIO)
616 freq = freq / 1000;
617
618 N = freq + priv->sgIF;
619
620 i = 0;
621 while (tda827xa_analog[i].lomax < N * 62500) {
622 if (tda827xa_analog[i + 1].lomax == 0)
623 break;
624 i++;
625 }
626
627 N = N << tda827xa_analog[i].spd;
628
629 tuner_reg[0] = 0;
630 tuner_reg[1] = (unsigned char)(N>>8);
631 tuner_reg[2] = (unsigned char) N;
632 tuner_reg[3] = 0;
633 tuner_reg[4] = 0x16;
634 tuner_reg[5] = (tda827xa_analog[i].spd << 5) +
635 (tda827xa_analog[i].svco << 3) +
636 tda827xa_analog[i].sbs;
637 tuner_reg[6] = 0x8b + (tda827xa_analog[i].gc3 << 4);
638 tuner_reg[7] = 0x1c;
639 tuner_reg[8] = 4;
640 tuner_reg[9] = 0x20;
641 tuner_reg[10] = 0x00;
642 msg.len = 11;
643 i2c_transfer(priv->i2c_adap, &msg, 1);
644
645 tuner_reg[0] = 0x90;
646 tuner_reg[1] = 0xff;
647 tuner_reg[2] = 0xe0;
648 tuner_reg[3] = 0;
649 tuner_reg[4] = 0x99 + (priv->lpsel << 1);
650 msg.len = 5;
651 i2c_transfer(priv->i2c_adap, &msg, 1);
652
653 tuner_reg[0] = 0xa0;
654 tuner_reg[1] = 0xc0;
655 msg.len = 2;
656 i2c_transfer(priv->i2c_adap, &msg, 1);
657
658 tuner_reg[0] = 0x30;
659 tuner_reg[1] = 0x10 + tda827xa_analog[i].scr;
660 i2c_transfer(priv->i2c_adap, &msg, 1);
661
662 msg.flags = I2C_M_RD;
663 i2c_transfer(priv->i2c_adap, &msg, 1);
664 msg.flags = 0;
665 tuner_reg[1] >>= 4;
666 dprintk("AGC2 gain is: %d\n", tuner_reg[1]);
667 if (tuner_reg[1] < 1)
668 tda827xa_lna_gain(fe, 0, params);
669
670 msleep(100);
671 tuner_reg[0] = 0x60;
672 tuner_reg[1] = 0x3c;
673 i2c_transfer(priv->i2c_adap, &msg, 1);
674
675 msleep(163);
676 tuner_reg[0] = 0x50;
677 tuner_reg[1] = 0x8f + (tda827xa_analog[i].gc3 << 4);
678 i2c_transfer(priv->i2c_adap, &msg, 1);
679
680 tuner_reg[0] = 0x80;
681 tuner_reg[1] = 0x28;
682 i2c_transfer(priv->i2c_adap, &msg, 1);
683
684 tuner_reg[0] = 0xb0;
685 tuner_reg[1] = 0x01;
686 i2c_transfer(priv->i2c_adap, &msg, 1);
687
688 tuner_reg[0] = 0xc0;
689 tuner_reg[1] = 0x19 + (priv->lpsel << 1);
690 i2c_transfer(priv->i2c_adap, &msg, 1);
691
692 priv->frequency = freq * 62500;
693
694 return 0;
695}
696
697static void tda827xa_agcf(struct dvb_frontend *fe)
698{
699 struct tda827x_priv *priv = fe->tuner_priv;
700 unsigned char data[] = {0x80, 0x2c};
701 struct i2c_msg msg = {.addr = priv->i2c_addr, .flags = 0,
702 .buf = data, .len = 2};
703 i2c_transfer(priv->i2c_adap, &msg, 1);
704}
705
706/* ------------------------------------------------------------------ */
707
708static int tda827x_release(struct dvb_frontend *fe)
709{
710 kfree(fe->tuner_priv);
711 fe->tuner_priv = NULL;
712 return 0;
713}
714
715static int tda827x_get_frequency(struct dvb_frontend *fe, u32 *frequency)
716{
717 struct tda827x_priv *priv = fe->tuner_priv;
718 *frequency = priv->frequency;
719 return 0;
720}
721
722static int tda827x_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
723{
724 struct tda827x_priv *priv = fe->tuner_priv;
725 *bandwidth = priv->bandwidth;
726 return 0;
727}
728
729static int tda827x_init(struct dvb_frontend *fe)
730{
731 struct tda827x_priv *priv = fe->tuner_priv;
732 dprintk("%s:\n", __func__);
733 if (priv->cfg && priv->cfg->init)
734 priv->cfg->init(fe);
735
736 return 0;
737}
738
739static int tda827x_probe_version(struct dvb_frontend *fe);
740
741static int tda827x_initial_init(struct dvb_frontend *fe)
742{
743 int ret;
744 ret = tda827x_probe_version(fe);
745 if (ret)
746 return ret;
747 return fe->ops.tuner_ops.init(fe);
748}
749
750static int tda827x_initial_sleep(struct dvb_frontend *fe)
751{
752 int ret;
753 ret = tda827x_probe_version(fe);
754 if (ret)
755 return ret;
756 return fe->ops.tuner_ops.sleep(fe);
757}
758
759static struct dvb_tuner_ops tda827xo_tuner_ops = {
760 .info = {
761 .name = "Philips TDA827X",
762 .frequency_min = 55000000,
763 .frequency_max = 860000000,
764 .frequency_step = 250000
765 },
766 .release = tda827x_release,
767 .init = tda827x_initial_init,
768 .sleep = tda827x_initial_sleep,
769 .set_params = tda827xo_set_params,
770 .set_analog_params = tda827xo_set_analog_params,
771 .get_frequency = tda827x_get_frequency,
772 .get_bandwidth = tda827x_get_bandwidth,
773};
774
775static struct dvb_tuner_ops tda827xa_tuner_ops = {
776 .info = {
777 .name = "Philips TDA827XA",
778 .frequency_min = 44000000,
779 .frequency_max = 906000000,
780 .frequency_step = 62500
781 },
782 .release = tda827x_release,
783 .init = tda827x_init,
784 .sleep = tda827xa_sleep,
785 .set_params = tda827xa_set_params,
786 .set_analog_params = tda827xa_set_analog_params,
787 .get_frequency = tda827x_get_frequency,
788 .get_bandwidth = tda827x_get_bandwidth,
789};
790
791static int tda827x_probe_version(struct dvb_frontend *fe)
792{ u8 data;
793 struct tda827x_priv *priv = fe->tuner_priv;
794 struct i2c_msg msg = { .addr = priv->i2c_addr, .flags = I2C_M_RD,
795 .buf = &data, .len = 1 };
796 if (fe->ops.i2c_gate_ctrl)
797 fe->ops.i2c_gate_ctrl(fe, 1);
798 if (i2c_transfer(priv->i2c_adap, &msg, 1) != 1) {
799 printk("%s: could not read from tuner at addr: 0x%02x\n",
800 __func__, msg.addr << 1);
801 return -EIO;
802 }
803 if ((data & 0x3c) == 0) {
804 dprintk("tda827x tuner found\n");
805 fe->ops.tuner_ops.init = tda827x_init;
806 fe->ops.tuner_ops.sleep = tda827xo_sleep;
807 if (priv->cfg)
808 priv->cfg->agcf = tda827xo_agcf;
809 } else {
810 dprintk("tda827xa tuner found\n");
811 memcpy(&fe->ops.tuner_ops, &tda827xa_tuner_ops, sizeof(struct dvb_tuner_ops));
812 if (priv->cfg)
813 priv->cfg->agcf = tda827xa_agcf;
814 }
815 return 0;
816}
817
818struct dvb_frontend *tda827x_attach(struct dvb_frontend *fe, int addr,
819 struct i2c_adapter *i2c,
820 struct tda827x_config *cfg)
821{
822 struct tda827x_priv *priv = NULL;
823
824 dprintk("%s:\n", __func__);
825 priv = kzalloc(sizeof(struct tda827x_priv), GFP_KERNEL);
826 if (priv == NULL)
827 return NULL;
828
829 priv->i2c_addr = addr;
830 priv->i2c_adap = i2c;
831 priv->cfg = cfg;
832 memcpy(&fe->ops.tuner_ops, &tda827xo_tuner_ops, sizeof(struct dvb_tuner_ops));
833 fe->tuner_priv = priv;
834
835 dprintk("type set to %s\n", fe->ops.tuner_ops.info.name);
836
837 return fe;
838}
839EXPORT_SYMBOL_GPL(tda827x_attach);
840
841MODULE_DESCRIPTION("DVB TDA827x driver");
842MODULE_AUTHOR("Hartmut Hackmann <hartmut.hackmann@t-online.de>");
843MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
844MODULE_LICENSE("GPL");
845
846/*
847 * Overrides for Emacs so that we follow Linus's tabbing style.
848 * ---------------------------------------------------------------------------
849 * Local variables:
850 * c-basic-offset: 8
851 * End:
852 */
diff --git a/drivers/media/dvb/frontends/tda827x.h b/drivers/media/dvb/frontends/tda827x.h
deleted file mode 100644
index b73c23570dab..000000000000
--- a/drivers/media/dvb/frontends/tda827x.h
+++ /dev/null
@@ -1,69 +0,0 @@
1 /*
2 DVB Driver for Philips tda827x / tda827xa Silicon tuners
3
4 (c) 2005 Hartmut Hackmann
5 (c) 2007 Michael Krufky
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22 */
23
24#ifndef __DVB_TDA827X_H__
25#define __DVB_TDA827X_H__
26
27#include <linux/i2c.h>
28#include "dvb_frontend.h"
29
30struct tda827x_config
31{
32 /* saa7134 - provided callbacks */
33 int (*init) (struct dvb_frontend *fe);
34 int (*sleep) (struct dvb_frontend *fe);
35
36 /* interface to tda829x driver */
37 unsigned int config;
38 int switch_addr;
39 int (*tuner_callback) (void *dev, int command, int arg);
40
41 void (*agcf)(struct dvb_frontend *fe);
42};
43
44
45/**
46 * Attach a tda827x tuner to the supplied frontend structure.
47 *
48 * @param fe Frontend to attach to.
49 * @param addr i2c address of the tuner.
50 * @param i2c i2c adapter to use.
51 * @param cfg optional callback function pointers.
52 * @return FE pointer on success, NULL on failure.
53 */
54#if defined(CONFIG_DVB_TDA827X) || (defined(CONFIG_DVB_TDA827X_MODULE) && defined(MODULE))
55extern struct dvb_frontend* tda827x_attach(struct dvb_frontend *fe, int addr,
56 struct i2c_adapter *i2c,
57 struct tda827x_config *cfg);
58#else
59static inline struct dvb_frontend* tda827x_attach(struct dvb_frontend *fe,
60 int addr,
61 struct i2c_adapter *i2c,
62 struct tda827x_config *cfg)
63{
64 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
65 return NULL;
66}
67#endif // CONFIG_DVB_TDA827X
68
69#endif // __DVB_TDA827X_H__
diff --git a/drivers/media/dvb/frontends/xc5000.c b/drivers/media/dvb/frontends/xc5000.c
deleted file mode 100644
index 43d35bdb221f..000000000000
--- a/drivers/media/dvb/frontends/xc5000.c
+++ /dev/null
@@ -1,964 +0,0 @@
1/*
2 * Driver for Xceive XC5000 "QAM/8VSB single chip tuner"
3 *
4 * Copyright (c) 2007 Xceive Corporation
5 * Copyright (c) 2007 Steven Toth <stoth@hauppauge.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 *
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/module.h>
24#include <linux/moduleparam.h>
25#include <linux/videodev2.h>
26#include <linux/delay.h>
27#include <linux/dvb/frontend.h>
28#include <linux/i2c.h>
29
30#include "dvb_frontend.h"
31
32#include "xc5000.h"
33#include "xc5000_priv.h"
34
35static int debug;
36module_param(debug, int, 0644);
37MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
38
39#define dprintk(level,fmt, arg...) if (debug >= level) \
40 printk(KERN_INFO "%s: " fmt, "xc5000", ## arg)
41
42#define XC5000_DEFAULT_FIRMWARE "dvb-fe-xc5000-1.1.fw"
43#define XC5000_DEFAULT_FIRMWARE_SIZE 12332
44
45/* Misc Defines */
46#define MAX_TV_STANDARD 23
47#define XC_MAX_I2C_WRITE_LENGTH 64
48
49/* Signal Types */
50#define XC_RF_MODE_AIR 0
51#define XC_RF_MODE_CABLE 1
52
53/* Result codes */
54#define XC_RESULT_SUCCESS 0
55#define XC_RESULT_RESET_FAILURE 1
56#define XC_RESULT_I2C_WRITE_FAILURE 2
57#define XC_RESULT_I2C_READ_FAILURE 3
58#define XC_RESULT_OUT_OF_RANGE 5
59
60/* Product id */
61#define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000
62#define XC_PRODUCT_ID_FW_LOADED 0x1388
63
64/* Registers */
65#define XREG_INIT 0x00
66#define XREG_VIDEO_MODE 0x01
67#define XREG_AUDIO_MODE 0x02
68#define XREG_RF_FREQ 0x03
69#define XREG_D_CODE 0x04
70#define XREG_IF_OUT 0x05
71#define XREG_SEEK_MODE 0x07
72#define XREG_POWER_DOWN 0x0A
73#define XREG_SIGNALSOURCE 0x0D /* 0=Air, 1=Cable */
74#define XREG_SMOOTHEDCVBS 0x0E
75#define XREG_XTALFREQ 0x0F
76#define XREG_FINERFFREQ 0x10
77#define XREG_DDIMODE 0x11
78
79#define XREG_ADC_ENV 0x00
80#define XREG_QUALITY 0x01
81#define XREG_FRAME_LINES 0x02
82#define XREG_HSYNC_FREQ 0x03
83#define XREG_LOCK 0x04
84#define XREG_FREQ_ERROR 0x05
85#define XREG_SNR 0x06
86#define XREG_VERSION 0x07
87#define XREG_PRODUCT_ID 0x08
88#define XREG_BUSY 0x09
89
90/*
91 Basic firmware description. This will remain with
92 the driver for documentation purposes.
93
94 This represents an I2C firmware file encoded as a
95 string of unsigned char. Format is as follows:
96
97 char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB
98 char[1 ]=len0_LSB -> length of first write transaction
99 char[2 ]=data0 -> first byte to be sent
100 char[3 ]=data1
101 char[4 ]=data2
102 char[ ]=...
103 char[M ]=dataN -> last byte to be sent
104 char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB
105 char[M+2]=len1_LSB -> length of second write transaction
106 char[M+3]=data0
107 char[M+4]=data1
108 ...
109 etc.
110
111 The [len] value should be interpreted as follows:
112
113 len= len_MSB _ len_LSB
114 len=1111_1111_1111_1111 : End of I2C_SEQUENCE
115 len=0000_0000_0000_0000 : Reset command: Do hardware reset
116 len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767)
117 len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms
118
119 For the RESET and WAIT commands, the two following bytes will contain
120 immediately the length of the following transaction.
121
122*/
123typedef struct {
124 char *Name;
125 u16 AudioMode;
126 u16 VideoMode;
127} XC_TV_STANDARD;
128
129/* Tuner standards */
130#define MN_NTSC_PAL_BTSC 0
131#define MN_NTSC_PAL_A2 1
132#define MN_NTSC_PAL_EIAJ 2
133#define MN_NTSC_PAL_Mono 3
134#define BG_PAL_A2 4
135#define BG_PAL_NICAM 5
136#define BG_PAL_MONO 6
137#define I_PAL_NICAM 7
138#define I_PAL_NICAM_MONO 8
139#define DK_PAL_A2 9
140#define DK_PAL_NICAM 10
141#define DK_PAL_MONO 11
142#define DK_SECAM_A2DK1 12
143#define DK_SECAM_A2LDK3 13
144#define DK_SECAM_A2MONO 14
145#define L_SECAM_NICAM 15
146#define LC_SECAM_NICAM 16
147#define DTV6 17
148#define DTV8 18
149#define DTV7_8 19
150#define DTV7 20
151#define FM_Radio_INPUT2 21
152#define FM_Radio_INPUT1 22
153
154static XC_TV_STANDARD XC5000_Standard[MAX_TV_STANDARD] = {
155 {"M/N-NTSC/PAL-BTSC", 0x0400, 0x8020},
156 {"M/N-NTSC/PAL-A2", 0x0600, 0x8020},
157 {"M/N-NTSC/PAL-EIAJ", 0x0440, 0x8020},
158 {"M/N-NTSC/PAL-Mono", 0x0478, 0x8020},
159 {"B/G-PAL-A2", 0x0A00, 0x8049},
160 {"B/G-PAL-NICAM", 0x0C04, 0x8049},
161 {"B/G-PAL-MONO", 0x0878, 0x8059},
162 {"I-PAL-NICAM", 0x1080, 0x8009},
163 {"I-PAL-NICAM-MONO", 0x0E78, 0x8009},
164 {"D/K-PAL-A2", 0x1600, 0x8009},
165 {"D/K-PAL-NICAM", 0x0E80, 0x8009},
166 {"D/K-PAL-MONO", 0x1478, 0x8009},
167 {"D/K-SECAM-A2 DK1", 0x1200, 0x8009},
168 {"D/K-SECAM-A2 L/DK3",0x0E00, 0x8009},
169 {"D/K-SECAM-A2 MONO", 0x1478, 0x8009},
170 {"L-SECAM-NICAM", 0x8E82, 0x0009},
171 {"L'-SECAM-NICAM", 0x8E82, 0x4009},
172 {"DTV6", 0x00C0, 0x8002},
173 {"DTV8", 0x00C0, 0x800B},
174 {"DTV7/8", 0x00C0, 0x801B},
175 {"DTV7", 0x00C0, 0x8007},
176 {"FM Radio-INPUT2", 0x9802, 0x9002},
177 {"FM Radio-INPUT1", 0x0208, 0x9002}
178};
179
180static int xc5000_writeregs(struct xc5000_priv *priv, u8 *buf, u8 len);
181static int xc5000_readregs(struct xc5000_priv *priv, u8 *buf, u8 len);
182static void xc5000_TunerReset(struct dvb_frontend *fe);
183
184static int xc_send_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
185{
186 return xc5000_writeregs(priv, buf, len)
187 ? XC_RESULT_I2C_WRITE_FAILURE : XC_RESULT_SUCCESS;
188}
189
190static int xc_read_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
191{
192 return xc5000_readregs(priv, buf, len)
193 ? XC_RESULT_I2C_READ_FAILURE : XC_RESULT_SUCCESS;
194}
195
196static int xc_reset(struct dvb_frontend *fe)
197{
198 xc5000_TunerReset(fe);
199 return XC_RESULT_SUCCESS;
200}
201
202static void xc_wait(int wait_ms)
203{
204 msleep(wait_ms);
205}
206
207static void xc5000_TunerReset(struct dvb_frontend *fe)
208{
209 struct xc5000_priv *priv = fe->tuner_priv;
210 int ret;
211
212 dprintk(1, "%s()\n", __func__);
213
214 if (priv->cfg->tuner_callback) {
215 ret = priv->cfg->tuner_callback(priv->cfg->priv,
216 XC5000_TUNER_RESET, 0);
217 if (ret)
218 printk(KERN_ERR "xc5000: reset failed\n");
219 } else
220 printk(KERN_ERR "xc5000: no tuner reset callback function, fatal\n");
221}
222
223static int xc_write_reg(struct xc5000_priv *priv, u16 regAddr, u16 i2cData)
224{
225 u8 buf[4];
226 int WatchDogTimer = 5;
227 int result;
228
229 buf[0] = (regAddr >> 8) & 0xFF;
230 buf[1] = regAddr & 0xFF;
231 buf[2] = (i2cData >> 8) & 0xFF;
232 buf[3] = i2cData & 0xFF;
233 result = xc_send_i2c_data(priv, buf, 4);
234 if (result == XC_RESULT_SUCCESS) {
235 /* wait for busy flag to clear */
236 while ((WatchDogTimer > 0) && (result == XC_RESULT_SUCCESS)) {
237 buf[0] = 0;
238 buf[1] = XREG_BUSY;
239
240 result = xc_send_i2c_data(priv, buf, 2);
241 if (result == XC_RESULT_SUCCESS) {
242 result = xc_read_i2c_data(priv, buf, 2);
243 if (result == XC_RESULT_SUCCESS) {
244 if ((buf[0] == 0) && (buf[1] == 0)) {
245 /* busy flag cleared */
246 break;
247 } else {
248 xc_wait(100); /* wait 5 ms */
249 WatchDogTimer--;
250 }
251 }
252 }
253 }
254 }
255 if (WatchDogTimer < 0)
256 result = XC_RESULT_I2C_WRITE_FAILURE;
257
258 return result;
259}
260
261static int xc_read_reg(struct xc5000_priv *priv, u16 regAddr, u16 *i2cData)
262{
263 u8 buf[2];
264 int result;
265
266 buf[0] = (regAddr >> 8) & 0xFF;
267 buf[1] = regAddr & 0xFF;
268 result = xc_send_i2c_data(priv, buf, 2);
269 if (result != XC_RESULT_SUCCESS)
270 return result;
271
272 result = xc_read_i2c_data(priv, buf, 2);
273 if (result != XC_RESULT_SUCCESS)
274 return result;
275
276 *i2cData = buf[0] * 256 + buf[1];
277 return result;
278}
279
280static int xc_load_i2c_sequence(struct dvb_frontend *fe, u8 i2c_sequence[])
281{
282 struct xc5000_priv *priv = fe->tuner_priv;
283
284 int i, nbytes_to_send, result;
285 unsigned int len, pos, index;
286 u8 buf[XC_MAX_I2C_WRITE_LENGTH];
287
288 index=0;
289 while ((i2c_sequence[index]!=0xFF) || (i2c_sequence[index+1]!=0xFF)) {
290 len = i2c_sequence[index]* 256 + i2c_sequence[index+1];
291 if (len == 0x0000) {
292 /* RESET command */
293 result = xc_reset(fe);
294 index += 2;
295 if (result != XC_RESULT_SUCCESS)
296 return result;
297 } else if (len & 0x8000) {
298 /* WAIT command */
299 xc_wait(len & 0x7FFF);
300 index += 2;
301 } else {
302 /* Send i2c data whilst ensuring individual transactions
303 * do not exceed XC_MAX_I2C_WRITE_LENGTH bytes.
304 */
305 index += 2;
306 buf[0] = i2c_sequence[index];
307 buf[1] = i2c_sequence[index + 1];
308 pos = 2;
309 while (pos < len) {
310 if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2) {
311 nbytes_to_send = XC_MAX_I2C_WRITE_LENGTH;
312 } else {
313 nbytes_to_send = (len - pos + 2);
314 }
315 for (i=2; i<nbytes_to_send; i++) {
316 buf[i] = i2c_sequence[index + pos + i - 2];
317 }
318 result = xc_send_i2c_data(priv, buf, nbytes_to_send);
319
320 if (result != XC_RESULT_SUCCESS)
321 return result;
322
323 pos += nbytes_to_send - 2;
324 }
325 index += len;
326 }
327 }
328 return XC_RESULT_SUCCESS;
329}
330
331static int xc_initialize(struct xc5000_priv *priv)
332{
333 dprintk(1, "%s()\n", __func__);
334 return xc_write_reg(priv, XREG_INIT, 0);
335}
336
337static int xc_SetTVStandard(struct xc5000_priv *priv,
338 u16 VideoMode, u16 AudioMode)
339{
340 int ret;
341 dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, VideoMode, AudioMode);
342 dprintk(1, "%s() Standard = %s\n",
343 __func__,
344 XC5000_Standard[priv->video_standard].Name);
345
346 ret = xc_write_reg(priv, XREG_VIDEO_MODE, VideoMode);
347 if (ret == XC_RESULT_SUCCESS)
348 ret = xc_write_reg(priv, XREG_AUDIO_MODE, AudioMode);
349
350 return ret;
351}
352
353static int xc_shutdown(struct xc5000_priv *priv)
354{
355 return 0;
356 /* Fixme: cannot bring tuner back alive once shutdown
357 * without reloading the driver modules.
358 * return xc_write_reg(priv, XREG_POWER_DOWN, 0);
359 */
360}
361
362static int xc_SetSignalSource(struct xc5000_priv *priv, u16 rf_mode)
363{
364 dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode,
365 rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE");
366
367 if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE))
368 {
369 rf_mode = XC_RF_MODE_CABLE;
370 printk(KERN_ERR
371 "%s(), Invalid mode, defaulting to CABLE",
372 __func__);
373 }
374 return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode);
375}
376
377static const struct dvb_tuner_ops xc5000_tuner_ops;
378
379static int xc_set_RF_frequency(struct xc5000_priv *priv, u32 freq_hz)
380{
381 u16 freq_code;
382
383 dprintk(1, "%s(%u)\n", __func__, freq_hz);
384
385 if ((freq_hz > xc5000_tuner_ops.info.frequency_max) ||
386 (freq_hz < xc5000_tuner_ops.info.frequency_min))
387 return XC_RESULT_OUT_OF_RANGE;
388
389 freq_code = (u16)(freq_hz / 15625);
390
391 return xc_write_reg(priv, XREG_RF_FREQ, freq_code);
392}
393
394
395static int xc_set_IF_frequency(struct xc5000_priv *priv, u32 freq_khz)
396{
397 u32 freq_code = (freq_khz * 1024)/1000;
398 dprintk(1, "%s(freq_khz = %d) freq_code = 0x%x\n",
399 __func__, freq_khz, freq_code);
400
401 return xc_write_reg(priv, XREG_IF_OUT, freq_code);
402}
403
404
405static int xc_get_ADC_Envelope(struct xc5000_priv *priv, u16 *adc_envelope)
406{
407 return xc_read_reg(priv, XREG_ADC_ENV, adc_envelope);
408}
409
410static int xc_get_frequency_error(struct xc5000_priv *priv, u32 *freq_error_hz)
411{
412 int result;
413 u16 regData;
414 u32 tmp;
415
416 result = xc_read_reg(priv, XREG_FREQ_ERROR, &regData);
417 if (result)
418 return result;
419
420 tmp = (u32)regData;
421 (*freq_error_hz) = (tmp * 15625) / 1000;
422 return result;
423}
424
425static int xc_get_lock_status(struct xc5000_priv *priv, u16 *lock_status)
426{
427 return xc_read_reg(priv, XREG_LOCK, lock_status);
428}
429
430static int xc_get_version(struct xc5000_priv *priv,
431 u8 *hw_majorversion, u8 *hw_minorversion,
432 u8 *fw_majorversion, u8 *fw_minorversion)
433{
434 u16 data;
435 int result;
436
437 result = xc_read_reg(priv, XREG_VERSION, &data);
438 if (result)
439 return result;
440
441 (*hw_majorversion) = (data >> 12) & 0x0F;
442 (*hw_minorversion) = (data >> 8) & 0x0F;
443 (*fw_majorversion) = (data >> 4) & 0x0F;
444 (*fw_minorversion) = data & 0x0F;
445
446 return 0;
447}
448
449static int xc_get_hsync_freq(struct xc5000_priv *priv, u32 *hsync_freq_hz)
450{
451 u16 regData;
452 int result;
453
454 result = xc_read_reg(priv, XREG_HSYNC_FREQ, &regData);
455 if (result)
456 return result;
457
458 (*hsync_freq_hz) = ((regData & 0x0fff) * 763)/100;
459 return result;
460}
461
462static int xc_get_frame_lines(struct xc5000_priv *priv, u16 *frame_lines)
463{
464 return xc_read_reg(priv, XREG_FRAME_LINES, frame_lines);
465}
466
467static int xc_get_quality(struct xc5000_priv *priv, u16 *quality)
468{
469 return xc_read_reg(priv, XREG_QUALITY, quality);
470}
471
472static u16 WaitForLock(struct xc5000_priv *priv)
473{
474 u16 lockState = 0;
475 int watchDogCount = 40;
476
477 while ((lockState == 0) && (watchDogCount > 0)) {
478 xc_get_lock_status(priv, &lockState);
479 if (lockState != 1) {
480 xc_wait(5);
481 watchDogCount--;
482 }
483 }
484 return lockState;
485}
486
487static int xc_tune_channel(struct xc5000_priv *priv, u32 freq_hz)
488{
489 int found = 0;
490
491 dprintk(1, "%s(%u)\n", __func__, freq_hz);
492
493 if (xc_set_RF_frequency(priv, freq_hz) != XC_RESULT_SUCCESS)
494 return 0;
495
496 if (WaitForLock(priv) == 1)
497 found = 1;
498
499 return found;
500}
501
502static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val)
503{
504 u8 buf[2] = { reg >> 8, reg & 0xff };
505 u8 bval[2] = { 0, 0 };
506 struct i2c_msg msg[2] = {
507 { .addr = priv->cfg->i2c_address,
508 .flags = 0, .buf = &buf[0], .len = 2 },
509 { .addr = priv->cfg->i2c_address,
510 .flags = I2C_M_RD, .buf = &bval[0], .len = 2 },
511 };
512
513 if (i2c_transfer(priv->i2c, msg, 2) != 2) {
514 printk(KERN_WARNING "xc5000: I2C read failed\n");
515 return -EREMOTEIO;
516 }
517
518 *val = (bval[0] << 8) | bval[1];
519 return 0;
520}
521
522static int xc5000_writeregs(struct xc5000_priv *priv, u8 *buf, u8 len)
523{
524 struct i2c_msg msg = { .addr = priv->cfg->i2c_address,
525 .flags = 0, .buf = buf, .len = len };
526
527 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
528 printk(KERN_ERR "xc5000: I2C write failed (len=%i)\n",
529 (int)len);
530 return -EREMOTEIO;
531 }
532 return 0;
533}
534
535static int xc5000_readregs(struct xc5000_priv *priv, u8 *buf, u8 len)
536{
537 struct i2c_msg msg = { .addr = priv->cfg->i2c_address,
538 .flags = I2C_M_RD, .buf = buf, .len = len };
539
540 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
541 printk(KERN_ERR "xc5000 I2C read failed (len=%i)\n",(int)len);
542 return -EREMOTEIO;
543 }
544 return 0;
545}
546
547static int xc5000_fwupload(struct dvb_frontend* fe)
548{
549 struct xc5000_priv *priv = fe->tuner_priv;
550 const struct firmware *fw;
551 int ret;
552
553 /* request the firmware, this will block and timeout */
554 printk(KERN_INFO "xc5000: waiting for firmware upload (%s)...\n",
555 XC5000_DEFAULT_FIRMWARE);
556
557 ret = request_firmware(&fw, XC5000_DEFAULT_FIRMWARE, &priv->i2c->dev);
558 if (ret) {
559 printk(KERN_ERR "xc5000: Upload failed. (file not found?)\n");
560 ret = XC_RESULT_RESET_FAILURE;
561 goto out;
562 } else {
563 printk(KERN_INFO "xc5000: firmware read %Zu bytes.\n",
564 fw->size);
565 ret = XC_RESULT_SUCCESS;
566 }
567
568 if (fw->size != XC5000_DEFAULT_FIRMWARE_SIZE) {
569 printk(KERN_ERR "xc5000: firmware incorrect size\n");
570 ret = XC_RESULT_RESET_FAILURE;
571 } else {
572 printk(KERN_INFO "xc5000: firmware upload\n");
573 ret = xc_load_i2c_sequence(fe, fw->data );
574 }
575
576out:
577 release_firmware(fw);
578 return ret;
579}
580
581static void xc_debug_dump(struct xc5000_priv *priv)
582{
583 u16 adc_envelope;
584 u32 freq_error_hz = 0;
585 u16 lock_status;
586 u32 hsync_freq_hz = 0;
587 u16 frame_lines;
588 u16 quality;
589 u8 hw_majorversion = 0, hw_minorversion = 0;
590 u8 fw_majorversion = 0, fw_minorversion = 0;
591
592 /* Wait for stats to stabilize.
593 * Frame Lines needs two frame times after initial lock
594 * before it is valid.
595 */
596 xc_wait(100);
597
598 xc_get_ADC_Envelope(priv, &adc_envelope);
599 dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope);
600
601 xc_get_frequency_error(priv, &freq_error_hz);
602 dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz);
603
604 xc_get_lock_status(priv, &lock_status);
605 dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n",
606 lock_status);
607
608 xc_get_version(priv, &hw_majorversion, &hw_minorversion,
609 &fw_majorversion, &fw_minorversion);
610 dprintk(1, "*** HW: V%02x.%02x, FW: V%02x.%02x\n",
611 hw_majorversion, hw_minorversion,
612 fw_majorversion, fw_minorversion);
613
614 xc_get_hsync_freq(priv, &hsync_freq_hz);
615 dprintk(1, "*** Horizontal sync frequency = %d Hz\n", hsync_freq_hz);
616
617 xc_get_frame_lines(priv, &frame_lines);
618 dprintk(1, "*** Frame lines = %d\n", frame_lines);
619
620 xc_get_quality(priv, &quality);
621 dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality);
622}
623
624static int xc5000_set_params(struct dvb_frontend *fe,
625 struct dvb_frontend_parameters *params)
626{
627 struct xc5000_priv *priv = fe->tuner_priv;
628 int ret;
629
630 dprintk(1, "%s() frequency=%d (Hz)\n", __func__, params->frequency);
631
632 switch(params->u.vsb.modulation) {
633 case VSB_8:
634 case VSB_16:
635 dprintk(1, "%s() VSB modulation\n", __func__);
636 priv->rf_mode = XC_RF_MODE_AIR;
637 priv->freq_hz = params->frequency - 1750000;
638 priv->bandwidth = BANDWIDTH_6_MHZ;
639 priv->video_standard = DTV6;
640 break;
641 case QAM_64:
642 case QAM_256:
643 case QAM_AUTO:
644 dprintk(1, "%s() QAM modulation\n", __func__);
645 priv->rf_mode = XC_RF_MODE_CABLE;
646 priv->freq_hz = params->frequency - 1750000;
647 priv->bandwidth = BANDWIDTH_6_MHZ;
648 priv->video_standard = DTV6;
649 break;
650 default:
651 return -EINVAL;
652 }
653
654 dprintk(1, "%s() frequency=%d (compensated)\n",
655 __func__, priv->freq_hz);
656
657 ret = xc_SetSignalSource(priv, priv->rf_mode);
658 if (ret != XC_RESULT_SUCCESS) {
659 printk(KERN_ERR
660 "xc5000: xc_SetSignalSource(%d) failed\n",
661 priv->rf_mode);
662 return -EREMOTEIO;
663 }
664
665 ret = xc_SetTVStandard(priv,
666 XC5000_Standard[priv->video_standard].VideoMode,
667 XC5000_Standard[priv->video_standard].AudioMode);
668 if (ret != XC_RESULT_SUCCESS) {
669 printk(KERN_ERR "xc5000: xc_SetTVStandard failed\n");
670 return -EREMOTEIO;
671 }
672
673 ret = xc_set_IF_frequency(priv, priv->cfg->if_khz);
674 if (ret != XC_RESULT_SUCCESS) {
675 printk(KERN_ERR "xc5000: xc_Set_IF_frequency(%d) failed\n",
676 priv->cfg->if_khz);
677 return -EIO;
678 }
679
680 xc_tune_channel(priv, priv->freq_hz);
681
682 if (debug)
683 xc_debug_dump(priv);
684
685 return 0;
686}
687
688static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe);
689
690static int xc5000_set_analog_params(struct dvb_frontend *fe,
691 struct analog_parameters *params)
692{
693 struct xc5000_priv *priv = fe->tuner_priv;
694 int ret;
695
696 if(priv->fwloaded == 0)
697 xc_load_fw_and_init_tuner(fe);
698
699 dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n",
700 __func__, params->frequency);
701
702 priv->rf_mode = XC_RF_MODE_CABLE; /* Fix me: it could be air. */
703
704 /* params->frequency is in units of 62.5khz */
705 priv->freq_hz = params->frequency * 62500;
706
707 /* FIX ME: Some video standards may have several possible audio
708 standards. We simply default to one of them here.
709 */
710 if(params->std & V4L2_STD_MN) {
711 /* default to BTSC audio standard */
712 priv->video_standard = MN_NTSC_PAL_BTSC;
713 goto tune_channel;
714 }
715
716 if(params->std & V4L2_STD_PAL_BG) {
717 /* default to NICAM audio standard */
718 priv->video_standard = BG_PAL_NICAM;
719 goto tune_channel;
720 }
721
722 if(params->std & V4L2_STD_PAL_I) {
723 /* default to NICAM audio standard */
724 priv->video_standard = I_PAL_NICAM;
725 goto tune_channel;
726 }
727
728 if(params->std & V4L2_STD_PAL_DK) {
729 /* default to NICAM audio standard */
730 priv->video_standard = DK_PAL_NICAM;
731 goto tune_channel;
732 }
733
734 if(params->std & V4L2_STD_SECAM_DK) {
735 /* default to A2 DK1 audio standard */
736 priv->video_standard = DK_SECAM_A2DK1;
737 goto tune_channel;
738 }
739
740 if(params->std & V4L2_STD_SECAM_L) {
741 priv->video_standard = L_SECAM_NICAM;
742 goto tune_channel;
743 }
744
745 if(params->std & V4L2_STD_SECAM_LC) {
746 priv->video_standard = LC_SECAM_NICAM;
747 goto tune_channel;
748 }
749
750tune_channel:
751 ret = xc_SetSignalSource(priv, priv->rf_mode);
752 if (ret != XC_RESULT_SUCCESS) {
753 printk(KERN_ERR
754 "xc5000: xc_SetSignalSource(%d) failed\n",
755 priv->rf_mode);
756 return -EREMOTEIO;
757 }
758
759 ret = xc_SetTVStandard(priv,
760 XC5000_Standard[priv->video_standard].VideoMode,
761 XC5000_Standard[priv->video_standard].AudioMode);
762 if (ret != XC_RESULT_SUCCESS) {
763 printk(KERN_ERR "xc5000: xc_SetTVStandard failed\n");
764 return -EREMOTEIO;
765 }
766
767 xc_tune_channel(priv, priv->freq_hz);
768
769 if (debug)
770 xc_debug_dump(priv);
771
772 return 0;
773}
774
775static int xc5000_get_frequency(struct dvb_frontend *fe, u32 *freq)
776{
777 struct xc5000_priv *priv = fe->tuner_priv;
778 dprintk(1, "%s()\n", __func__);
779 *freq = priv->freq_hz;
780 return 0;
781}
782
783static int xc5000_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
784{
785 struct xc5000_priv *priv = fe->tuner_priv;
786 dprintk(1, "%s()\n", __func__);
787
788 *bw = priv->bandwidth;
789 return 0;
790}
791
792static int xc5000_get_status(struct dvb_frontend *fe, u32 *status)
793{
794 struct xc5000_priv *priv = fe->tuner_priv;
795 u16 lock_status = 0;
796
797 xc_get_lock_status(priv, &lock_status);
798
799 dprintk(1, "%s() lock_status = 0x%08x\n", __func__, lock_status);
800
801 *status = lock_status;
802
803 return 0;
804}
805
806static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe)
807{
808 struct xc5000_priv *priv = fe->tuner_priv;
809 int ret = 0;
810
811 if (priv->fwloaded == 0) {
812 ret = xc5000_fwupload(fe);
813 if (ret != XC_RESULT_SUCCESS)
814 return ret;
815 priv->fwloaded = 1;
816 }
817
818 /* Start the tuner self-calibration process */
819 ret |= xc_initialize(priv);
820
821 /* Wait for calibration to complete.
822 * We could continue but XC5000 will clock stretch subsequent
823 * I2C transactions until calibration is complete. This way we
824 * don't have to rely on clock stretching working.
825 */
826 xc_wait( 100 );
827
828 /* Default to "CABLE" mode */
829 ret |= xc_write_reg(priv, XREG_SIGNALSOURCE, XC_RF_MODE_CABLE);
830
831 return ret;
832}
833
834static int xc5000_sleep(struct dvb_frontend *fe)
835{
836 struct xc5000_priv *priv = fe->tuner_priv;
837 int ret;
838
839 dprintk(1, "%s()\n", __func__);
840
841 /* On Pinnacle PCTV HD 800i, the tuner cannot be reinitialized
842 * once shutdown without reloading the driver. Maybe I am not
843 * doing something right.
844 *
845 */
846
847 ret = xc_shutdown(priv);
848 if(ret != XC_RESULT_SUCCESS) {
849 printk(KERN_ERR
850 "xc5000: %s() unable to shutdown tuner\n",
851 __func__);
852 return -EREMOTEIO;
853 }
854 else {
855 /* priv->fwloaded = 0; */
856 return XC_RESULT_SUCCESS;
857 }
858}
859
860static int xc5000_init(struct dvb_frontend *fe)
861{
862 struct xc5000_priv *priv = fe->tuner_priv;
863 dprintk(1, "%s()\n", __func__);
864
865 if (xc_load_fw_and_init_tuner(fe) != XC_RESULT_SUCCESS) {
866 printk(KERN_ERR "xc5000: Unable to initialise tuner\n");
867 return -EREMOTEIO;
868 }
869
870 if (debug)
871 xc_debug_dump(priv);
872
873 return 0;
874}
875
876static int xc5000_release(struct dvb_frontend *fe)
877{
878 dprintk(1, "%s()\n", __func__);
879 kfree(fe->tuner_priv);
880 fe->tuner_priv = NULL;
881 return 0;
882}
883
884static const struct dvb_tuner_ops xc5000_tuner_ops = {
885 .info = {
886 .name = "Xceive XC5000",
887 .frequency_min = 1000000,
888 .frequency_max = 1023000000,
889 .frequency_step = 50000,
890 },
891
892 .release = xc5000_release,
893 .init = xc5000_init,
894 .sleep = xc5000_sleep,
895
896 .set_params = xc5000_set_params,
897 .set_analog_params = xc5000_set_analog_params,
898 .get_frequency = xc5000_get_frequency,
899 .get_bandwidth = xc5000_get_bandwidth,
900 .get_status = xc5000_get_status
901};
902
903struct dvb_frontend * xc5000_attach(struct dvb_frontend *fe,
904 struct i2c_adapter *i2c,
905 struct xc5000_config *cfg)
906{
907 struct xc5000_priv *priv = NULL;
908 u16 id = 0;
909
910 dprintk(1, "%s()\n", __func__);
911
912 priv = kzalloc(sizeof(struct xc5000_priv), GFP_KERNEL);
913 if (priv == NULL)
914 return NULL;
915
916 priv->cfg = cfg;
917 priv->bandwidth = BANDWIDTH_6_MHZ;
918 priv->i2c = i2c;
919
920 /* Check if firmware has been loaded. It is possible that another
921 instance of the driver has loaded the firmware.
922 */
923 if (xc5000_readreg(priv, XREG_PRODUCT_ID, &id) != 0) {
924 kfree(priv);
925 return NULL;
926 }
927
928 switch(id) {
929 case XC_PRODUCT_ID_FW_LOADED:
930 printk(KERN_INFO
931 "xc5000: Successfully identified at address 0x%02x\n",
932 cfg->i2c_address);
933 printk(KERN_INFO
934 "xc5000: Firmware has been loaded previously\n");
935 priv->fwloaded = 1;
936 break;
937 case XC_PRODUCT_ID_FW_NOT_LOADED:
938 printk(KERN_INFO
939 "xc5000: Successfully identified at address 0x%02x\n",
940 cfg->i2c_address);
941 printk(KERN_INFO
942 "xc5000: Firmware has not been loaded previously\n");
943 priv->fwloaded = 0;
944 break;
945 default:
946 printk(KERN_ERR
947 "xc5000: Device not found at addr 0x%02x (0x%x)\n",
948 cfg->i2c_address, id);
949 kfree(priv);
950 return NULL;
951 }
952
953 memcpy(&fe->ops.tuner_ops, &xc5000_tuner_ops,
954 sizeof(struct dvb_tuner_ops));
955
956 fe->tuner_priv = priv;
957
958 return fe;
959}
960EXPORT_SYMBOL(xc5000_attach);
961
962MODULE_AUTHOR("Steven Toth");
963MODULE_DESCRIPTION("Xceive xc5000 silicon tuner driver");
964MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/xc5000.h b/drivers/media/dvb/frontends/xc5000.h
deleted file mode 100644
index b890883a0cdc..000000000000
--- a/drivers/media/dvb/frontends/xc5000.h
+++ /dev/null
@@ -1,63 +0,0 @@
1/*
2 * Driver for Xceive XC5000 "QAM/8VSB single chip tuner"
3 *
4 * Copyright (c) 2007 Steven Toth <stoth@hauppauge.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#ifndef __XC5000_H__
23#define __XC5000_H__
24
25#include <linux/firmware.h>
26
27struct dvb_frontend;
28struct i2c_adapter;
29
30struct xc5000_config {
31 u8 i2c_address;
32 u32 if_khz;
33
34 /* For each bridge framework, when it attaches either analog or digital,
35 * it has to store a reference back to its _core equivalent structure,
36 * so that it can service the hardware by steering gpio's etc.
37 * Each bridge implementation is different so cast priv accordingly.
38 * The xc5000 driver cares not for this value, other than ensuring
39 * it's passed back to a bridge during tuner_callback().
40 */
41 void *priv;
42 int (*tuner_callback) (void *priv, int command, int arg);
43};
44
45/* xc5000 callback command */
46#define XC5000_TUNER_RESET 0
47
48#if defined(CONFIG_DVB_TUNER_XC5000) || \
49 (defined(CONFIG_DVB_TUNER_XC5000_MODULE) && defined(MODULE))
50extern struct dvb_frontend* xc5000_attach(struct dvb_frontend *fe,
51 struct i2c_adapter *i2c,
52 struct xc5000_config *cfg);
53#else
54static inline struct dvb_frontend* xc5000_attach(struct dvb_frontend *fe,
55 struct i2c_adapter *i2c,
56 struct xc5000_config *cfg)
57{
58 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
59 return NULL;
60}
61#endif // CONFIG_DVB_TUNER_XC5000
62
63#endif // __XC5000_H__
diff --git a/drivers/media/dvb/frontends/xc5000_priv.h b/drivers/media/dvb/frontends/xc5000_priv.h
deleted file mode 100644
index 13b2d19341da..000000000000
--- a/drivers/media/dvb/frontends/xc5000_priv.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * Driver for Xceive XC5000 "QAM/8VSB single chip tuner"
3 *
4 * Copyright (c) 2007 Steven Toth <stoth@hauppauge.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#ifndef XC5000_PRIV_H
23#define XC5000_PRIV_H
24
25struct xc5000_priv {
26 struct xc5000_config *cfg;
27 struct i2c_adapter *i2c;
28
29 u32 freq_hz;
30 u32 bandwidth;
31 u8 video_standard;
32 u8 rf_mode;
33 u8 fwloaded;
34};
35
36#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-22 10:26:48 -0400