diff options
author | Jeff Garzik <jgarzik@pobox.com> | 2005-12-12 15:24:45 -0500 |
---|---|---|
committer | Jeff Garzik <jgarzik@pobox.com> | 2005-12-12 15:24:45 -0500 |
commit | b1086eef813ecee09bd6b8ae364acf0fad065cba (patch) | |
tree | bc723bbdfc2898252e3fd8e14320d7fac58dca4b /drivers/media/dvb/frontends | |
parent | 003a20c81ec278595820d3829b544e90919f6f61 (diff) | |
parent | 49d7bc64283970ee83d2c954d04ba00d04e5943d (diff) |
Merge branch 'master'
Diffstat (limited to 'drivers/media/dvb/frontends')
23 files changed, 254 insertions, 254 deletions
diff --git a/drivers/media/dvb/frontends/at76c651.c b/drivers/media/dvb/frontends/at76c651.c index 72a2b5455b0b..8e0f4b3a1417 100644 --- a/drivers/media/dvb/frontends/at76c651.c +++ b/drivers/media/dvb/frontends/at76c651.c | |||
@@ -361,9 +361,9 @@ static int at76c651_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | |||
361 | 361 | ||
362 | static int at76c651_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *fesettings) | 362 | static int at76c651_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *fesettings) |
363 | { | 363 | { |
364 | fesettings->min_delay_ms = 50; | 364 | fesettings->min_delay_ms = 50; |
365 | fesettings->step_size = 0; | 365 | fesettings->step_size = 0; |
366 | fesettings->max_drift = 0; | 366 | fesettings->max_drift = 0; |
367 | return 0; | 367 | return 0; |
368 | } | 368 | } |
369 | 369 | ||
diff --git a/drivers/media/dvb/frontends/bcm3510.c b/drivers/media/dvb/frontends/bcm3510.c index f6d4ee78bdd4..8ceb9a33c7af 100644 --- a/drivers/media/dvb/frontends/bcm3510.c +++ b/drivers/media/dvb/frontends/bcm3510.c | |||
@@ -69,7 +69,7 @@ MODULE_PARM_DESC(debug, "set debugging level (1=info,2=i2c (|-able))."); | |||
69 | #define dbufout(b,l,m) {\ | 69 | #define dbufout(b,l,m) {\ |
70 | int i; \ | 70 | int i; \ |
71 | for (i = 0; i < l; i++) \ | 71 | for (i = 0; i < l; i++) \ |
72 | m("%02x ",b[i]); \ | 72 | m("%02x ",b[i]); \ |
73 | } | 73 | } |
74 | #define deb_info(args...) dprintk(0x01,args) | 74 | #define deb_info(args...) dprintk(0x01,args) |
75 | #define deb_i2c(args...) dprintk(0x02,args) | 75 | #define deb_i2c(args...) dprintk(0x02,args) |
@@ -827,7 +827,7 @@ static struct dvb_frontend_ops bcm3510_ops = { | |||
827 | .type = FE_ATSC, | 827 | .type = FE_ATSC, |
828 | .frequency_min = 54000000, | 828 | .frequency_min = 54000000, |
829 | .frequency_max = 803000000, | 829 | .frequency_max = 803000000, |
830 | /* stepsize is just a guess */ | 830 | /* stepsize is just a guess */ |
831 | .frequency_stepsize = 0, | 831 | .frequency_stepsize = 0, |
832 | .caps = | 832 | .caps = |
833 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | 833 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | |
diff --git a/drivers/media/dvb/frontends/cx22700.c b/drivers/media/dvb/frontends/cx22700.c index 0c2ed4438618..755f774f6b7d 100644 --- a/drivers/media/dvb/frontends/cx22700.c +++ b/drivers/media/dvb/frontends/cx22700.c | |||
@@ -355,10 +355,10 @@ static int cx22700_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_par | |||
355 | 355 | ||
356 | static int cx22700_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) | 356 | static int cx22700_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) |
357 | { | 357 | { |
358 | fesettings->min_delay_ms = 150; | 358 | fesettings->min_delay_ms = 150; |
359 | fesettings->step_size = 166667; | 359 | fesettings->step_size = 166667; |
360 | fesettings->max_drift = 166667*2; | 360 | fesettings->max_drift = 166667*2; |
361 | return 0; | 361 | return 0; |
362 | } | 362 | } |
363 | 363 | ||
364 | static void cx22700_release(struct dvb_frontend* fe) | 364 | static void cx22700_release(struct dvb_frontend* fe) |
@@ -407,7 +407,7 @@ static struct dvb_frontend_ops cx22700_ops = { | |||
407 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | 407 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | |
408 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | | 408 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | |
409 | FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | | 409 | FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | |
410 | FE_CAN_RECOVER | 410 | FE_CAN_RECOVER |
411 | }, | 411 | }, |
412 | 412 | ||
413 | .release = cx22700_release, | 413 | .release = cx22700_release, |
diff --git a/drivers/media/dvb/frontends/cx22702.c b/drivers/media/dvb/frontends/cx22702.c index d9a8ede14b45..5de0e6d350b1 100644 --- a/drivers/media/dvb/frontends/cx22702.c +++ b/drivers/media/dvb/frontends/cx22702.c | |||
@@ -2,7 +2,7 @@ | |||
2 | Conexant 22702 DVB OFDM demodulator driver | 2 | Conexant 22702 DVB OFDM demodulator driver |
3 | 3 | ||
4 | based on: | 4 | based on: |
5 | Alps TDMB7 DVB OFDM demodulator driver | 5 | Alps TDMB7 DVB OFDM demodulator driver |
6 | 6 | ||
7 | Copyright (C) 2001-2002 Convergence Integrated Media GmbH | 7 | Copyright (C) 2001-2002 Convergence Integrated Media GmbH |
8 | Holger Waechtler <holger@convergence.de> | 8 | Holger Waechtler <holger@convergence.de> |
diff --git a/drivers/media/dvb/frontends/cx22702.h b/drivers/media/dvb/frontends/cx22702.h index 1f250885d2ce..5633976a58f1 100644 --- a/drivers/media/dvb/frontends/cx22702.h +++ b/drivers/media/dvb/frontends/cx22702.h | |||
@@ -2,7 +2,7 @@ | |||
2 | Conexant 22702 DVB OFDM demodulator driver | 2 | Conexant 22702 DVB OFDM demodulator driver |
3 | 3 | ||
4 | based on: | 4 | based on: |
5 | Alps TDMB7 DVB OFDM demodulator driver | 5 | Alps TDMB7 DVB OFDM demodulator driver |
6 | 6 | ||
7 | Copyright (C) 2001-2002 Convergence Integrated Media GmbH | 7 | Copyright (C) 2001-2002 Convergence Integrated Media GmbH |
8 | Holger Waechtler <holger@convergence.de> | 8 | Holger Waechtler <holger@convergence.de> |
diff --git a/drivers/media/dvb/frontends/cx24110.c b/drivers/media/dvb/frontends/cx24110.c index 654d7dc879d9..0c4db80ec332 100644 --- a/drivers/media/dvb/frontends/cx24110.c +++ b/drivers/media/dvb/frontends/cx24110.c | |||
@@ -55,81 +55,81 @@ static int debug; | |||
55 | } while (0) | 55 | } while (0) |
56 | 56 | ||
57 | static struct {u8 reg; u8 data;} cx24110_regdata[]= | 57 | static struct {u8 reg; u8 data;} cx24110_regdata[]= |
58 | /* Comments beginning with @ denote this value should | 58 | /* Comments beginning with @ denote this value should |
59 | be the default */ | 59 | be the default */ |
60 | {{0x09,0x01}, /* SoftResetAll */ | 60 | {{0x09,0x01}, /* SoftResetAll */ |
61 | {0x09,0x00}, /* release reset */ | 61 | {0x09,0x00}, /* release reset */ |
62 | {0x01,0xe8}, /* MSB of code rate 27.5MS/s */ | 62 | {0x01,0xe8}, /* MSB of code rate 27.5MS/s */ |
63 | {0x02,0x17}, /* middle byte " */ | 63 | {0x02,0x17}, /* middle byte " */ |
64 | {0x03,0x29}, /* LSB " */ | 64 | {0x03,0x29}, /* LSB " */ |
65 | {0x05,0x03}, /* @ DVB mode, standard code rate 3/4 */ | 65 | {0x05,0x03}, /* @ DVB mode, standard code rate 3/4 */ |
66 | {0x06,0xa5}, /* @ PLL 60MHz */ | 66 | {0x06,0xa5}, /* @ PLL 60MHz */ |
67 | {0x07,0x01}, /* @ Fclk, i.e. sampling clock, 60MHz */ | 67 | {0x07,0x01}, /* @ Fclk, i.e. sampling clock, 60MHz */ |
68 | {0x0a,0x00}, /* @ partial chip disables, do not set */ | 68 | {0x0a,0x00}, /* @ partial chip disables, do not set */ |
69 | {0x0b,0x01}, /* set output clock in gapped mode, start signal low | 69 | {0x0b,0x01}, /* set output clock in gapped mode, start signal low |
70 | active for first byte */ | 70 | active for first byte */ |
71 | {0x0c,0x11}, /* no parity bytes, large hold time, serial data out */ | 71 | {0x0c,0x11}, /* no parity bytes, large hold time, serial data out */ |
72 | {0x0d,0x6f}, /* @ RS Sync/Unsync thresholds */ | 72 | {0x0d,0x6f}, /* @ RS Sync/Unsync thresholds */ |
73 | {0x10,0x40}, /* chip doc is misleading here: write bit 6 as 1 | 73 | {0x10,0x40}, /* chip doc is misleading here: write bit 6 as 1 |
74 | to avoid starting the BER counter. Reset the | 74 | to avoid starting the BER counter. Reset the |
75 | CRC test bit. Finite counting selected */ | 75 | CRC test bit. Finite counting selected */ |
76 | {0x15,0xff}, /* @ size of the limited time window for RS BER | 76 | {0x15,0xff}, /* @ size of the limited time window for RS BER |
77 | estimation. It is <value>*256 RS blocks, this | 77 | estimation. It is <value>*256 RS blocks, this |
78 | gives approx. 2.6 sec at 27.5MS/s, rate 3/4 */ | 78 | gives approx. 2.6 sec at 27.5MS/s, rate 3/4 */ |
79 | {0x16,0x00}, /* @ enable all RS output ports */ | 79 | {0x16,0x00}, /* @ enable all RS output ports */ |
80 | {0x17,0x04}, /* @ time window allowed for the RS to sync */ | 80 | {0x17,0x04}, /* @ time window allowed for the RS to sync */ |
81 | {0x18,0xae}, /* @ allow all standard DVB code rates to be scanned | 81 | {0x18,0xae}, /* @ allow all standard DVB code rates to be scanned |
82 | for automatically */ | 82 | for automatically */ |
83 | /* leave the current code rate and normalization | 83 | /* leave the current code rate and normalization |
84 | registers as they are after reset... */ | 84 | registers as they are after reset... */ |
85 | {0x21,0x10}, /* @ during AutoAcq, search each viterbi setting | 85 | {0x21,0x10}, /* @ during AutoAcq, search each viterbi setting |
86 | only once */ | 86 | only once */ |
87 | {0x23,0x18}, /* @ size of the limited time window for Viterbi BER | 87 | {0x23,0x18}, /* @ size of the limited time window for Viterbi BER |
88 | estimation. It is <value>*65536 channel bits, i.e. | 88 | estimation. It is <value>*65536 channel bits, i.e. |
89 | approx. 38ms at 27.5MS/s, rate 3/4 */ | 89 | approx. 38ms at 27.5MS/s, rate 3/4 */ |
90 | {0x24,0x24}, /* do not trigger Viterbi CRC test. Finite count window */ | 90 | {0x24,0x24}, /* do not trigger Viterbi CRC test. Finite count window */ |
91 | /* leave front-end AGC parameters at default values */ | 91 | /* leave front-end AGC parameters at default values */ |
92 | /* leave decimation AGC parameters at default values */ | 92 | /* leave decimation AGC parameters at default values */ |
93 | {0x35,0x40}, /* disable all interrupts. They are not connected anyway */ | 93 | {0x35,0x40}, /* disable all interrupts. They are not connected anyway */ |
94 | {0x36,0xff}, /* clear all interrupt pending flags */ | 94 | {0x36,0xff}, /* clear all interrupt pending flags */ |
95 | {0x37,0x00}, /* @ fully enable AutoAcqq state machine */ | 95 | {0x37,0x00}, /* @ fully enable AutoAcqq state machine */ |
96 | {0x38,0x07}, /* @ enable fade recovery, but not autostart AutoAcq */ | 96 | {0x38,0x07}, /* @ enable fade recovery, but not autostart AutoAcq */ |
97 | /* leave the equalizer parameters on their default values */ | 97 | /* leave the equalizer parameters on their default values */ |
98 | /* leave the final AGC parameters on their default values */ | 98 | /* leave the final AGC parameters on their default values */ |
99 | {0x41,0x00}, /* @ MSB of front-end derotator frequency */ | 99 | {0x41,0x00}, /* @ MSB of front-end derotator frequency */ |
100 | {0x42,0x00}, /* @ middle bytes " */ | 100 | {0x42,0x00}, /* @ middle bytes " */ |
101 | {0x43,0x00}, /* @ LSB " */ | 101 | {0x43,0x00}, /* @ LSB " */ |
102 | /* leave the carrier tracking loop parameters on default */ | 102 | /* leave the carrier tracking loop parameters on default */ |
103 | /* leave the bit timing loop parameters at gefault */ | 103 | /* leave the bit timing loop parameters at gefault */ |
104 | {0x56,0x4d}, /* set the filtune voltage to 2.7V, as recommended by */ | 104 | {0x56,0x4d}, /* set the filtune voltage to 2.7V, as recommended by */ |
105 | /* the cx24108 data sheet for symbol rates above 15MS/s */ | 105 | /* the cx24108 data sheet for symbol rates above 15MS/s */ |
106 | {0x57,0x00}, /* @ Filter sigma delta enabled, positive */ | 106 | {0x57,0x00}, /* @ Filter sigma delta enabled, positive */ |
107 | {0x61,0x95}, /* GPIO pins 1-4 have special function */ | 107 | {0x61,0x95}, /* GPIO pins 1-4 have special function */ |
108 | {0x62,0x05}, /* GPIO pin 5 has special function, pin 6 is GPIO */ | 108 | {0x62,0x05}, /* GPIO pin 5 has special function, pin 6 is GPIO */ |
109 | {0x63,0x00}, /* All GPIO pins use CMOS output characteristics */ | 109 | {0x63,0x00}, /* All GPIO pins use CMOS output characteristics */ |
110 | {0x64,0x20}, /* GPIO 6 is input, all others are outputs */ | 110 | {0x64,0x20}, /* GPIO 6 is input, all others are outputs */ |
111 | {0x6d,0x30}, /* tuner auto mode clock freq 62kHz */ | 111 | {0x6d,0x30}, /* tuner auto mode clock freq 62kHz */ |
112 | {0x70,0x15}, /* use auto mode, tuner word is 21 bits long */ | 112 | {0x70,0x15}, /* use auto mode, tuner word is 21 bits long */ |
113 | {0x73,0x00}, /* @ disable several demod bypasses */ | 113 | {0x73,0x00}, /* @ disable several demod bypasses */ |
114 | {0x74,0x00}, /* @ " */ | 114 | {0x74,0x00}, /* @ " */ |
115 | {0x75,0x00} /* @ " */ | 115 | {0x75,0x00} /* @ " */ |
116 | /* the remaining registers are for SEC */ | 116 | /* the remaining registers are for SEC */ |
117 | }; | 117 | }; |
118 | 118 | ||
119 | 119 | ||
120 | static int cx24110_writereg (struct cx24110_state* state, int reg, int data) | 120 | static int cx24110_writereg (struct cx24110_state* state, int reg, int data) |
121 | { | 121 | { |
122 | u8 buf [] = { reg, data }; | 122 | u8 buf [] = { reg, data }; |
123 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; | 123 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; |
124 | int err; | 124 | int err; |
125 | 125 | ||
126 | if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { | 126 | if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { |
127 | dprintk ("%s: writereg error (err == %i, reg == 0x%02x," | 127 | dprintk ("%s: writereg error (err == %i, reg == 0x%02x," |
128 | " data == 0x%02x)\n", __FUNCTION__, err, reg, data); | 128 | " data == 0x%02x)\n", __FUNCTION__, err, reg, data); |
129 | return -EREMOTEIO; | 129 | return -EREMOTEIO; |
130 | } | 130 | } |
131 | 131 | ||
132 | return 0; | 132 | return 0; |
133 | } | 133 | } |
134 | 134 | ||
135 | static int cx24110_readreg (struct cx24110_state* state, u8 reg) | 135 | static int cx24110_readreg (struct cx24110_state* state, u8 reg) |
@@ -153,27 +153,27 @@ static int cx24110_set_inversion (struct cx24110_state* state, fe_spectral_inver | |||
153 | 153 | ||
154 | switch (inversion) { | 154 | switch (inversion) { |
155 | case INVERSION_OFF: | 155 | case INVERSION_OFF: |
156 | cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)|0x1); | 156 | cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)|0x1); |
157 | /* AcqSpectrInvDis on. No idea why someone should want this */ | 157 | /* AcqSpectrInvDis on. No idea why someone should want this */ |
158 | cx24110_writereg(state,0x5,cx24110_readreg(state,0x5)&0xf7); | 158 | cx24110_writereg(state,0x5,cx24110_readreg(state,0x5)&0xf7); |
159 | /* Initial value 0 at start of acq */ | 159 | /* Initial value 0 at start of acq */ |
160 | cx24110_writereg(state,0x22,cx24110_readreg(state,0x22)&0xef); | 160 | cx24110_writereg(state,0x22,cx24110_readreg(state,0x22)&0xef); |
161 | /* current value 0 */ | 161 | /* current value 0 */ |
162 | /* The cx24110 manual tells us this reg is read-only. | 162 | /* The cx24110 manual tells us this reg is read-only. |
163 | But what the heck... set it ayways */ | 163 | But what the heck... set it ayways */ |
164 | break; | 164 | break; |
165 | case INVERSION_ON: | 165 | case INVERSION_ON: |
166 | cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)|0x1); | 166 | cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)|0x1); |
167 | /* AcqSpectrInvDis on. No idea why someone should want this */ | 167 | /* AcqSpectrInvDis on. No idea why someone should want this */ |
168 | cx24110_writereg(state,0x5,cx24110_readreg(state,0x5)|0x08); | 168 | cx24110_writereg(state,0x5,cx24110_readreg(state,0x5)|0x08); |
169 | /* Initial value 1 at start of acq */ | 169 | /* Initial value 1 at start of acq */ |
170 | cx24110_writereg(state,0x22,cx24110_readreg(state,0x22)|0x10); | 170 | cx24110_writereg(state,0x22,cx24110_readreg(state,0x22)|0x10); |
171 | /* current value 1 */ | 171 | /* current value 1 */ |
172 | break; | 172 | break; |
173 | case INVERSION_AUTO: | 173 | case INVERSION_AUTO: |
174 | cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)&0xfe); | 174 | cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)&0xfe); |
175 | /* AcqSpectrInvDis off. Leave initial & current states as is */ | 175 | /* AcqSpectrInvDis off. Leave initial & current states as is */ |
176 | break; | 176 | break; |
177 | default: | 177 | default: |
178 | return -EINVAL; | 178 | return -EINVAL; |
179 | } | 179 | } |
@@ -185,18 +185,18 @@ static int cx24110_set_fec (struct cx24110_state* state, fe_code_rate_t fec) | |||
185 | { | 185 | { |
186 | /* fixme (low): error handling */ | 186 | /* fixme (low): error handling */ |
187 | 187 | ||
188 | static const int rate[]={-1,1,2,3,5,7,-1}; | 188 | static const int rate[]={-1,1,2,3,5,7,-1}; |
189 | static const int g1[]={-1,0x01,0x02,0x05,0x15,0x45,-1}; | 189 | static const int g1[]={-1,0x01,0x02,0x05,0x15,0x45,-1}; |
190 | static const int g2[]={-1,0x01,0x03,0x06,0x1a,0x7a,-1}; | 190 | static const int g2[]={-1,0x01,0x03,0x06,0x1a,0x7a,-1}; |
191 | 191 | ||
192 | /* Well, the AutoAcq engine of the cx24106 and 24110 automatically | 192 | /* Well, the AutoAcq engine of the cx24106 and 24110 automatically |
193 | searches all enabled viterbi rates, and can handle non-standard | 193 | searches all enabled viterbi rates, and can handle non-standard |
194 | rates as well. */ | 194 | rates as well. */ |
195 | 195 | ||
196 | if (fec>FEC_AUTO) | 196 | if (fec>FEC_AUTO) |
197 | fec=FEC_AUTO; | 197 | fec=FEC_AUTO; |
198 | 198 | ||
199 | if (fec==FEC_AUTO) { /* (re-)establish AutoAcq behaviour */ | 199 | if (fec==FEC_AUTO) { /* (re-)establish AutoAcq behaviour */ |
200 | cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)&0xdf); | 200 | cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)&0xdf); |
201 | /* clear AcqVitDis bit */ | 201 | /* clear AcqVitDis bit */ |
202 | cx24110_writereg(state,0x18,0xae); | 202 | cx24110_writereg(state,0x18,0xae); |
@@ -208,7 +208,7 @@ static int cx24110_set_fec (struct cx24110_state* state, fe_code_rate_t fec) | |||
208 | cx24110_writereg(state,0x1a,0x05); cx24110_writereg(state,0x1b,0x06); | 208 | cx24110_writereg(state,0x1a,0x05); cx24110_writereg(state,0x1b,0x06); |
209 | /* set the puncture registers for code rate 3/4 */ | 209 | /* set the puncture registers for code rate 3/4 */ |
210 | return 0; | 210 | return 0; |
211 | } else { | 211 | } else { |
212 | cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)|0x20); | 212 | cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)|0x20); |
213 | /* set AcqVitDis bit */ | 213 | /* set AcqVitDis bit */ |
214 | if(rate[fec]>0) { | 214 | if(rate[fec]>0) { |
@@ -219,10 +219,10 @@ static int cx24110_set_fec (struct cx24110_state* state, fe_code_rate_t fec) | |||
219 | cx24110_writereg(state,0x1a,g1[fec]); | 219 | cx24110_writereg(state,0x1a,g1[fec]); |
220 | cx24110_writereg(state,0x1b,g2[fec]); | 220 | cx24110_writereg(state,0x1b,g2[fec]); |
221 | /* not sure if this is the right way: I always used AutoAcq mode */ | 221 | /* not sure if this is the right way: I always used AutoAcq mode */ |
222 | } else | 222 | } else |
223 | return -EOPNOTSUPP; | 223 | return -EOPNOTSUPP; |
224 | /* fixme (low): which is the correct return code? */ | 224 | /* fixme (low): which is the correct return code? */ |
225 | }; | 225 | }; |
226 | return 0; | 226 | return 0; |
227 | } | 227 | } |
228 | 228 | ||
@@ -245,72 +245,72 @@ static fe_code_rate_t cx24110_get_fec (struct cx24110_state* state) | |||
245 | static int cx24110_set_symbolrate (struct cx24110_state* state, u32 srate) | 245 | static int cx24110_set_symbolrate (struct cx24110_state* state, u32 srate) |
246 | { | 246 | { |
247 | /* fixme (low): add error handling */ | 247 | /* fixme (low): add error handling */ |
248 | u32 ratio; | 248 | u32 ratio; |
249 | u32 tmp, fclk, BDRI; | 249 | u32 tmp, fclk, BDRI; |
250 | 250 | ||
251 | static const u32 bands[]={5000000UL,15000000UL,90999000UL/2}; | 251 | static const u32 bands[]={5000000UL,15000000UL,90999000UL/2}; |
252 | int i; | 252 | int i; |
253 | 253 | ||
254 | dprintk("cx24110 debug: entering %s(%d)\n",__FUNCTION__,srate); | 254 | dprintk("cx24110 debug: entering %s(%d)\n",__FUNCTION__,srate); |
255 | if (srate>90999000UL/2) | 255 | if (srate>90999000UL/2) |
256 | srate=90999000UL/2; | 256 | srate=90999000UL/2; |
257 | if (srate<500000) | 257 | if (srate<500000) |
258 | srate=500000; | 258 | srate=500000; |
259 | 259 | ||
260 | for(i=0;(i<sizeof(bands)/sizeof(bands[0]))&&(srate>bands[i]);i++) | 260 | for(i=0;(i<sizeof(bands)/sizeof(bands[0]))&&(srate>bands[i]);i++) |
261 | ; | 261 | ; |
262 | /* first, check which sample rate is appropriate: 45, 60 80 or 90 MHz, | 262 | /* first, check which sample rate is appropriate: 45, 60 80 or 90 MHz, |
263 | and set the PLL accordingly (R07[1:0] Fclk, R06[7:4] PLLmult, | 263 | and set the PLL accordingly (R07[1:0] Fclk, R06[7:4] PLLmult, |
264 | R06[3:0] PLLphaseDetGain */ | 264 | R06[3:0] PLLphaseDetGain */ |
265 | tmp=cx24110_readreg(state,0x07)&0xfc; | 265 | tmp=cx24110_readreg(state,0x07)&0xfc; |
266 | if(srate<90999000UL/4) { /* sample rate 45MHz*/ | 266 | if(srate<90999000UL/4) { /* sample rate 45MHz*/ |
267 | cx24110_writereg(state,0x07,tmp); | 267 | cx24110_writereg(state,0x07,tmp); |
268 | cx24110_writereg(state,0x06,0x78); | 268 | cx24110_writereg(state,0x06,0x78); |
269 | fclk=90999000UL/2; | 269 | fclk=90999000UL/2; |
270 | } else if(srate<60666000UL/2) { /* sample rate 60MHz */ | 270 | } else if(srate<60666000UL/2) { /* sample rate 60MHz */ |
271 | cx24110_writereg(state,0x07,tmp|0x1); | 271 | cx24110_writereg(state,0x07,tmp|0x1); |
272 | cx24110_writereg(state,0x06,0xa5); | 272 | cx24110_writereg(state,0x06,0xa5); |
273 | fclk=60666000UL; | 273 | fclk=60666000UL; |
274 | } else if(srate<80888000UL/2) { /* sample rate 80MHz */ | 274 | } else if(srate<80888000UL/2) { /* sample rate 80MHz */ |
275 | cx24110_writereg(state,0x07,tmp|0x2); | 275 | cx24110_writereg(state,0x07,tmp|0x2); |
276 | cx24110_writereg(state,0x06,0x87); | 276 | cx24110_writereg(state,0x06,0x87); |
277 | fclk=80888000UL; | 277 | fclk=80888000UL; |
278 | } else { /* sample rate 90MHz */ | 278 | } else { /* sample rate 90MHz */ |
279 | cx24110_writereg(state,0x07,tmp|0x3); | 279 | cx24110_writereg(state,0x07,tmp|0x3); |
280 | cx24110_writereg(state,0x06,0x78); | 280 | cx24110_writereg(state,0x06,0x78); |
281 | fclk=90999000UL; | 281 | fclk=90999000UL; |
282 | }; | 282 | }; |
283 | dprintk("cx24110 debug: fclk %d Hz\n",fclk); | 283 | dprintk("cx24110 debug: fclk %d Hz\n",fclk); |
284 | /* we need to divide two integers with approx. 27 bits in 32 bit | 284 | /* we need to divide two integers with approx. 27 bits in 32 bit |
285 | arithmetic giving a 25 bit result */ | 285 | arithmetic giving a 25 bit result */ |
286 | /* the maximum dividend is 90999000/2, 0x02b6446c, this number is | 286 | /* the maximum dividend is 90999000/2, 0x02b6446c, this number is |
287 | also the most complex divisor. Hence, the dividend has, | 287 | also the most complex divisor. Hence, the dividend has, |
288 | assuming 32bit unsigned arithmetic, 6 clear bits on top, the | 288 | assuming 32bit unsigned arithmetic, 6 clear bits on top, the |
289 | divisor 2 unused bits at the bottom. Also, the quotient is | 289 | divisor 2 unused bits at the bottom. Also, the quotient is |
290 | always less than 1/2. Borrowed from VES1893.c, of course */ | 290 | always less than 1/2. Borrowed from VES1893.c, of course */ |
291 | 291 | ||
292 | tmp=srate<<6; | 292 | tmp=srate<<6; |
293 | BDRI=fclk>>2; | 293 | BDRI=fclk>>2; |
294 | ratio=(tmp/BDRI); | 294 | ratio=(tmp/BDRI); |
295 | 295 | ||
296 | tmp=(tmp%BDRI)<<8; | 296 | tmp=(tmp%BDRI)<<8; |
297 | ratio=(ratio<<8)+(tmp/BDRI); | 297 | ratio=(ratio<<8)+(tmp/BDRI); |
298 | 298 | ||
299 | tmp=(tmp%BDRI)<<8; | 299 | tmp=(tmp%BDRI)<<8; |
300 | ratio=(ratio<<8)+(tmp/BDRI); | 300 | ratio=(ratio<<8)+(tmp/BDRI); |
301 | 301 | ||
302 | tmp=(tmp%BDRI)<<1; | 302 | tmp=(tmp%BDRI)<<1; |
303 | ratio=(ratio<<1)+(tmp/BDRI); | 303 | ratio=(ratio<<1)+(tmp/BDRI); |
304 | 304 | ||
305 | dprintk("srate= %d (range %d, up to %d)\n", srate,i,bands[i]); | 305 | dprintk("srate= %d (range %d, up to %d)\n", srate,i,bands[i]); |
306 | dprintk("fclk = %d\n", fclk); | 306 | dprintk("fclk = %d\n", fclk); |
307 | dprintk("ratio= %08x\n", ratio); | 307 | dprintk("ratio= %08x\n", ratio); |
308 | 308 | ||
309 | cx24110_writereg(state, 0x1, (ratio>>16)&0xff); | 309 | cx24110_writereg(state, 0x1, (ratio>>16)&0xff); |
310 | cx24110_writereg(state, 0x2, (ratio>>8)&0xff); | 310 | cx24110_writereg(state, 0x2, (ratio>>8)&0xff); |
311 | cx24110_writereg(state, 0x3, (ratio)&0xff); | 311 | cx24110_writereg(state, 0x3, (ratio)&0xff); |
312 | 312 | ||
313 | return 0; | 313 | return 0; |
314 | 314 | ||
315 | } | 315 | } |
316 | 316 | ||
@@ -324,48 +324,48 @@ int cx24110_pll_write (struct dvb_frontend* fe, u32 data) | |||
324 | 324 | ||
325 | dprintk("cx24110 debug: cx24108_write(%8.8x)\n",data); | 325 | dprintk("cx24110 debug: cx24108_write(%8.8x)\n",data); |
326 | 326 | ||
327 | cx24110_writereg(state,0x6d,0x30); /* auto mode at 62kHz */ | 327 | cx24110_writereg(state,0x6d,0x30); /* auto mode at 62kHz */ |
328 | cx24110_writereg(state,0x70,0x15); /* auto mode 21 bits */ | 328 | cx24110_writereg(state,0x70,0x15); /* auto mode 21 bits */ |
329 | 329 | ||
330 | /* if the auto tuner writer is still busy, clear it out */ | 330 | /* if the auto tuner writer is still busy, clear it out */ |
331 | while (cx24110_readreg(state,0x6d)&0x80) | 331 | while (cx24110_readreg(state,0x6d)&0x80) |
332 | cx24110_writereg(state,0x72,0); | 332 | cx24110_writereg(state,0x72,0); |
333 | 333 | ||
334 | /* write the topmost 8 bits */ | 334 | /* write the topmost 8 bits */ |
335 | cx24110_writereg(state,0x72,(data>>24)&0xff); | 335 | cx24110_writereg(state,0x72,(data>>24)&0xff); |
336 | 336 | ||
337 | /* wait for the send to be completed */ | 337 | /* wait for the send to be completed */ |
338 | while ((cx24110_readreg(state,0x6d)&0xc0)==0x80) | 338 | while ((cx24110_readreg(state,0x6d)&0xc0)==0x80) |
339 | ; | 339 | ; |
340 | 340 | ||
341 | /* send another 8 bytes */ | 341 | /* send another 8 bytes */ |
342 | cx24110_writereg(state,0x72,(data>>16)&0xff); | 342 | cx24110_writereg(state,0x72,(data>>16)&0xff); |
343 | while ((cx24110_readreg(state,0x6d)&0xc0)==0x80) | 343 | while ((cx24110_readreg(state,0x6d)&0xc0)==0x80) |
344 | ; | 344 | ; |
345 | 345 | ||
346 | /* and the topmost 5 bits of this byte */ | 346 | /* and the topmost 5 bits of this byte */ |
347 | cx24110_writereg(state,0x72,(data>>8)&0xff); | 347 | cx24110_writereg(state,0x72,(data>>8)&0xff); |
348 | while ((cx24110_readreg(state,0x6d)&0xc0)==0x80) | 348 | while ((cx24110_readreg(state,0x6d)&0xc0)==0x80) |
349 | ; | 349 | ; |
350 | 350 | ||
351 | /* now strobe the enable line once */ | 351 | /* now strobe the enable line once */ |
352 | cx24110_writereg(state,0x6d,0x32); | 352 | cx24110_writereg(state,0x6d,0x32); |
353 | cx24110_writereg(state,0x6d,0x30); | 353 | cx24110_writereg(state,0x6d,0x30); |
354 | 354 | ||
355 | return 0; | 355 | return 0; |
356 | } | 356 | } |
357 | 357 | ||
358 | static int cx24110_initfe(struct dvb_frontend* fe) | 358 | static int cx24110_initfe(struct dvb_frontend* fe) |
359 | { | 359 | { |
360 | struct cx24110_state *state = fe->demodulator_priv; | 360 | struct cx24110_state *state = fe->demodulator_priv; |
361 | /* fixme (low): error handling */ | 361 | /* fixme (low): error handling */ |
362 | int i; | 362 | int i; |
363 | 363 | ||
364 | dprintk("%s: init chip\n", __FUNCTION__); | 364 | dprintk("%s: init chip\n", __FUNCTION__); |
365 | 365 | ||
366 | for(i=0;i<sizeof(cx24110_regdata)/sizeof(cx24110_regdata[0]);i++) { | 366 | for(i=0;i<sizeof(cx24110_regdata)/sizeof(cx24110_regdata[0]);i++) { |
367 | cx24110_writereg(state, cx24110_regdata[i].reg, cx24110_regdata[i].data); | 367 | cx24110_writereg(state, cx24110_regdata[i].reg, cx24110_regdata[i].data); |
368 | }; | 368 | }; |
369 | 369 | ||
370 | if (state->config->pll_init) state->config->pll_init(fe); | 370 | if (state->config->pll_init) state->config->pll_init(fe); |
371 | 371 | ||
diff --git a/drivers/media/dvb/frontends/l64781.c b/drivers/media/dvb/frontends/l64781.c index 19b4bf7c21a7..1c7c91224472 100644 --- a/drivers/media/dvb/frontends/l64781.c +++ b/drivers/media/dvb/frontends/l64781.c | |||
@@ -2,7 +2,7 @@ | |||
2 | driver for LSI L64781 COFDM demodulator | 2 | driver for LSI L64781 COFDM demodulator |
3 | 3 | ||
4 | Copyright (C) 2001 Holger Waechtler for Convergence Integrated Media GmbH | 4 | Copyright (C) 2001 Holger Waechtler for Convergence Integrated Media GmbH |
5 | Marko Kohtala <marko.kohtala@luukku.com> | 5 | Marko Kohtala <marko.kohtala@luukku.com> |
6 | 6 | ||
7 | This program is free software; you can redistribute it and/or modify | 7 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | 8 | it under the terms of the GNU General Public License as published by |
@@ -433,7 +433,7 @@ static int l64781_init(struct dvb_frontend* fe) | |||
433 | { | 433 | { |
434 | struct l64781_state* state = fe->demodulator_priv; | 434 | struct l64781_state* state = fe->demodulator_priv; |
435 | 435 | ||
436 | reset_and_configure (state); | 436 | reset_and_configure (state); |
437 | 437 | ||
438 | /* Power up */ | 438 | /* Power up */ |
439 | l64781_writereg (state, 0x3e, 0xa5); | 439 | l64781_writereg (state, 0x3e, 0xa5); |
@@ -456,9 +456,9 @@ static int l64781_init(struct dvb_frontend* fe) | |||
456 | l64781_writereg (state, 0x0d, 0x8c); | 456 | l64781_writereg (state, 0x0d, 0x8c); |
457 | 457 | ||
458 | /* With ppm=8000, it seems the DTR_SENSITIVITY will result in | 458 | /* With ppm=8000, it seems the DTR_SENSITIVITY will result in |
459 | value of 2 with all possible bandwidths and guard | 459 | value of 2 with all possible bandwidths and guard |
460 | intervals, which is the initial value anyway. */ | 460 | intervals, which is the initial value anyway. */ |
461 | /*l64781_writereg (state, 0x19, 0x92);*/ | 461 | /*l64781_writereg (state, 0x19, 0x92);*/ |
462 | 462 | ||
463 | /* Everything is two's complement, soft bit and CSI_OUT too */ | 463 | /* Everything is two's complement, soft bit and CSI_OUT too */ |
464 | l64781_writereg (state, 0x1e, 0x09); | 464 | l64781_writereg (state, 0x1e, 0x09); |
@@ -477,10 +477,10 @@ static int l64781_init(struct dvb_frontend* fe) | |||
477 | static int l64781_get_tune_settings(struct dvb_frontend* fe, | 477 | static int l64781_get_tune_settings(struct dvb_frontend* fe, |
478 | struct dvb_frontend_tune_settings* fesettings) | 478 | struct dvb_frontend_tune_settings* fesettings) |
479 | { | 479 | { |
480 | fesettings->min_delay_ms = 4000; | 480 | fesettings->min_delay_ms = 4000; |
481 | fesettings->step_size = 0; | 481 | fesettings->step_size = 0; |
482 | fesettings->max_drift = 0; | 482 | fesettings->max_drift = 0; |
483 | return 0; | 483 | return 0; |
484 | } | 484 | } |
485 | 485 | ||
486 | static void l64781_release(struct dvb_frontend* fe) | 486 | static void l64781_release(struct dvb_frontend* fe) |
@@ -522,7 +522,7 @@ struct dvb_frontend* l64781_attach(const struct l64781_config* config, | |||
522 | 522 | ||
523 | /* The chip always responds to reads */ | 523 | /* The chip always responds to reads */ |
524 | if (i2c_transfer(state->i2c, msg, 2) != 2) { | 524 | if (i2c_transfer(state->i2c, msg, 2) != 2) { |
525 | dprintk("No response to read on I2C bus\n"); | 525 | dprintk("No response to read on I2C bus\n"); |
526 | goto error; | 526 | goto error; |
527 | } | 527 | } |
528 | 528 | ||
@@ -531,7 +531,7 @@ struct dvb_frontend* l64781_attach(const struct l64781_config* config, | |||
531 | 531 | ||
532 | /* Reading the POWER_DOWN register always returns 0 */ | 532 | /* Reading the POWER_DOWN register always returns 0 */ |
533 | if (reg0x3e != 0) { | 533 | if (reg0x3e != 0) { |
534 | dprintk("Device doesn't look like L64781\n"); | 534 | dprintk("Device doesn't look like L64781\n"); |
535 | goto error; | 535 | goto error; |
536 | } | 536 | } |
537 | 537 | ||
@@ -540,7 +540,7 @@ struct dvb_frontend* l64781_attach(const struct l64781_config* config, | |||
540 | 540 | ||
541 | /* Responds to all reads with 0 */ | 541 | /* Responds to all reads with 0 */ |
542 | if (l64781_readreg(state, 0x1a) != 0) { | 542 | if (l64781_readreg(state, 0x1a) != 0) { |
543 | dprintk("Read 1 returned unexpcted value\n"); | 543 | dprintk("Read 1 returned unexpcted value\n"); |
544 | goto error; | 544 | goto error; |
545 | } | 545 | } |
546 | 546 | ||
@@ -549,7 +549,7 @@ struct dvb_frontend* l64781_attach(const struct l64781_config* config, | |||
549 | 549 | ||
550 | /* Responds with register default value */ | 550 | /* Responds with register default value */ |
551 | if (l64781_readreg(state, 0x1a) != 0xa1) { | 551 | if (l64781_readreg(state, 0x1a) != 0xa1) { |
552 | dprintk("Read 2 returned unexpcted value\n"); | 552 | dprintk("Read 2 returned unexpcted value\n"); |
553 | goto error; | 553 | goto error; |
554 | } | 554 | } |
555 | 555 | ||
diff --git a/drivers/media/dvb/frontends/l64781.h b/drivers/media/dvb/frontends/l64781.h index 7e30fb0fdfa7..947f65f87465 100644 --- a/drivers/media/dvb/frontends/l64781.h +++ b/drivers/media/dvb/frontends/l64781.h | |||
@@ -2,7 +2,7 @@ | |||
2 | driver for LSI L64781 COFDM demodulator | 2 | driver for LSI L64781 COFDM demodulator |
3 | 3 | ||
4 | Copyright (C) 2001 Holger Waechtler for Convergence Integrated Media GmbH | 4 | Copyright (C) 2001 Holger Waechtler for Convergence Integrated Media GmbH |
5 | Marko Kohtala <marko.kohtala@luukku.com> | 5 | Marko Kohtala <marko.kohtala@luukku.com> |
6 | 6 | ||
7 | This program is free software; you can redistribute it and/or modify | 7 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | 8 | it under the terms of the GNU General Public License as published by |
diff --git a/drivers/media/dvb/frontends/lgdt330x.c b/drivers/media/dvb/frontends/lgdt330x.c index 6a33f5a19a8d..cb5301865d07 100644 --- a/drivers/media/dvb/frontends/lgdt330x.c +++ b/drivers/media/dvb/frontends/lgdt330x.c | |||
@@ -301,10 +301,10 @@ static int lgdt330x_set_parameters(struct dvb_frontend* fe, | |||
301 | static u8 lgdt3303_8vsb_44_data[] = { | 301 | static u8 lgdt3303_8vsb_44_data[] = { |
302 | 0x04, 0x00, | 302 | 0x04, 0x00, |
303 | 0x0d, 0x40, | 303 | 0x0d, 0x40, |
304 | 0x0e, 0x87, | 304 | 0x0e, 0x87, |
305 | 0x0f, 0x8e, | 305 | 0x0f, 0x8e, |
306 | 0x10, 0x01, | 306 | 0x10, 0x01, |
307 | 0x47, 0x8b }; | 307 | 0x47, 0x8b }; |
308 | 308 | ||
309 | /* | 309 | /* |
310 | * Array of byte pairs <address, value> | 310 | * Array of byte pairs <address, value> |
diff --git a/drivers/media/dvb/frontends/mt312.c b/drivers/media/dvb/frontends/mt312.c index 9c67f406d581..8d672283c93d 100644 --- a/drivers/media/dvb/frontends/mt312.c +++ b/drivers/media/dvb/frontends/mt312.c | |||
@@ -554,7 +554,7 @@ static int mt312_set_frontend(struct dvb_frontend* fe, | |||
554 | if ((ret = mt312_write(state, SYM_RATE_H, buf, sizeof(buf))) < 0) | 554 | if ((ret = mt312_write(state, SYM_RATE_H, buf, sizeof(buf))) < 0) |
555 | return ret; | 555 | return ret; |
556 | 556 | ||
557 | mt312_reset(state, 0); | 557 | mt312_reset(state, 0); |
558 | 558 | ||
559 | return 0; | 559 | return 0; |
560 | } | 560 | } |
@@ -695,7 +695,7 @@ static struct dvb_frontend_ops vp310_mt312_ops = { | |||
695 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | | 695 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | |
696 | FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | | 696 | FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | |
697 | FE_CAN_FEC_AUTO | FE_CAN_QPSK | FE_CAN_MUTE_TS | | 697 | FE_CAN_FEC_AUTO | FE_CAN_QPSK | FE_CAN_MUTE_TS | |
698 | FE_CAN_RECOVER | 698 | FE_CAN_RECOVER |
699 | }, | 699 | }, |
700 | 700 | ||
701 | .release = mt312_release, | 701 | .release = mt312_release, |
diff --git a/drivers/media/dvb/frontends/nxt2002.c b/drivers/media/dvb/frontends/nxt2002.c index 30786b1911bd..52c416043a62 100644 --- a/drivers/media/dvb/frontends/nxt2002.c +++ b/drivers/media/dvb/frontends/nxt2002.c | |||
@@ -527,7 +527,7 @@ static int nxt2002_read_snr(struct dvb_frontend* fe, u16* snr) | |||
527 | else | 527 | else |
528 | snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) ); | 528 | snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) ); |
529 | 529 | ||
530 | /* the value reported back from the frontend will be FFFF=32db 0000=0db */ | 530 | /* the value reported back from the frontend will be FFFF=32db 0000=0db */ |
531 | 531 | ||
532 | *snr = snrdb * (0xFFFF/32000); | 532 | *snr = snrdb * (0xFFFF/32000); |
533 | 533 | ||
@@ -646,7 +646,7 @@ struct dvb_frontend* nxt2002_attach(const struct nxt2002_config* config, | |||
646 | memcpy(&state->ops, &nxt2002_ops, sizeof(struct dvb_frontend_ops)); | 646 | memcpy(&state->ops, &nxt2002_ops, sizeof(struct dvb_frontend_ops)); |
647 | state->initialised = 0; | 647 | state->initialised = 0; |
648 | 648 | ||
649 | /* Check the first 5 registers to ensure this a revision we can handle */ | 649 | /* Check the first 5 registers to ensure this a revision we can handle */ |
650 | 650 | ||
651 | i2c_readbytes(state, 0x00, buf, 5); | 651 | i2c_readbytes(state, 0x00, buf, 5); |
652 | if (buf[0] != 0x04) goto error; /* device id */ | 652 | if (buf[0] != 0x04) goto error; /* device id */ |
@@ -672,7 +672,7 @@ static struct dvb_frontend_ops nxt2002_ops = { | |||
672 | .type = FE_ATSC, | 672 | .type = FE_ATSC, |
673 | .frequency_min = 54000000, | 673 | .frequency_min = 54000000, |
674 | .frequency_max = 860000000, | 674 | .frequency_max = 860000000, |
675 | /* stepsize is just a guess */ | 675 | /* stepsize is just a guess */ |
676 | .frequency_stepsize = 166666, | 676 | .frequency_stepsize = 166666, |
677 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | 677 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | |
678 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | | 678 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | |
diff --git a/drivers/media/dvb/frontends/nxt200x.c b/drivers/media/dvb/frontends/nxt200x.c index 84b62881cea7..aeafef46e3eb 100644 --- a/drivers/media/dvb/frontends/nxt200x.c +++ b/drivers/media/dvb/frontends/nxt200x.c | |||
@@ -339,7 +339,7 @@ static int nxt200x_writetuner (struct nxt200x_state* state, u8* data) | |||
339 | switch (state->demod_chip) { | 339 | switch (state->demod_chip) { |
340 | case NXT2004: | 340 | case NXT2004: |
341 | if (i2c_writebytes(state, state->config->pll_address, data, 4)) | 341 | if (i2c_writebytes(state, state->config->pll_address, data, 4)) |
342 | printk(KERN_WARNING "nxt200x: error writing to tuner\n"); | 342 | printk(KERN_WARNING "nxt200x: error writing to tuner\n"); |
343 | /* wait until we have a lock */ | 343 | /* wait until we have a lock */ |
344 | while (count < 20) { | 344 | while (count < 20) { |
345 | i2c_readbytes(state, state->config->pll_address, &buf, 1); | 345 | i2c_readbytes(state, state->config->pll_address, &buf, 1); |
@@ -497,7 +497,7 @@ static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware | |||
497 | 497 | ||
498 | /* calculate firmware CRC */ | 498 | /* calculate firmware CRC */ |
499 | for (position = 0; position < fw->size; position++) { | 499 | for (position = 0; position < fw->size; position++) { |
500 | crc = nxt200x_crc(crc, fw->data[position]); | 500 | crc = nxt200x_crc(crc, fw->data[position]); |
501 | } | 501 | } |
502 | 502 | ||
503 | buf[0] = rambase >> 8; | 503 | buf[0] = rambase >> 8; |
diff --git a/drivers/media/dvb/frontends/nxt6000.c b/drivers/media/dvb/frontends/nxt6000.c index 88a57b791112..a458a3bfff70 100644 --- a/drivers/media/dvb/frontends/nxt6000.c +++ b/drivers/media/dvb/frontends/nxt6000.c | |||
@@ -574,11 +574,11 @@ static struct dvb_frontend_ops nxt6000_ops = { | |||
574 | .symbol_rate_max = 9360000, /* FIXME */ | 574 | .symbol_rate_max = 9360000, /* FIXME */ |
575 | .symbol_rate_tolerance = 4000, | 575 | .symbol_rate_tolerance = 4000, |
576 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | 576 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | |
577 | FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | | 577 | FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | |
578 | FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO | | 578 | FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO | |
579 | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO | | 579 | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO | |
580 | FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO | | 580 | FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO | |
581 | FE_CAN_HIERARCHY_AUTO, | 581 | FE_CAN_HIERARCHY_AUTO, |
582 | }, | 582 | }, |
583 | 583 | ||
584 | .release = nxt6000_release, | 584 | .release = nxt6000_release, |
diff --git a/drivers/media/dvb/frontends/or51132.c b/drivers/media/dvb/frontends/or51132.c index 78bded861d02..80e0f28127b7 100644 --- a/drivers/media/dvb/frontends/or51132.c +++ b/drivers/media/dvb/frontends/or51132.c | |||
@@ -503,7 +503,7 @@ static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength) | |||
503 | rcvr_stat = rec_buf[1]; | 503 | rcvr_stat = rec_buf[1]; |
504 | usK = (rcvr_stat & 0x10) ? 3 : 0; | 504 | usK = (rcvr_stat & 0x10) ? 3 : 0; |
505 | 505 | ||
506 | /* The value reported back from the frontend will be FFFF=100% 0000=0% */ | 506 | /* The value reported back from the frontend will be FFFF=100% 0000=0% */ |
507 | signal_strength = (((8952 - i20Log10(snr_equ) - usK*100)/3+5)*65535)/1000; | 507 | signal_strength = (((8952 - i20Log10(snr_equ) - usK*100)/3+5)*65535)/1000; |
508 | if (signal_strength > 0xffff) | 508 | if (signal_strength > 0xffff) |
509 | *strength = 0xffff; | 509 | *strength = 0xffff; |
diff --git a/drivers/media/dvb/frontends/s5h1420.c b/drivers/media/dvb/frontends/s5h1420.c index f265418e3261..18715091aed8 100644 --- a/drivers/media/dvb/frontends/s5h1420.c +++ b/drivers/media/dvb/frontends/s5h1420.c | |||
@@ -494,7 +494,7 @@ static int s5h1420_getfreqoffset(struct s5h1420_state* state) | |||
494 | } | 494 | } |
495 | 495 | ||
496 | static void s5h1420_setfec_inversion(struct s5h1420_state* state, | 496 | static void s5h1420_setfec_inversion(struct s5h1420_state* state, |
497 | struct dvb_frontend_parameters *p) | 497 | struct dvb_frontend_parameters *p) |
498 | { | 498 | { |
499 | u8 inversion = 0; | 499 | u8 inversion = 0; |
500 | 500 | ||
@@ -521,8 +521,8 @@ static void s5h1420_setfec_inversion(struct s5h1420_state* state, | |||
521 | 521 | ||
522 | case FEC_3_4: | 522 | case FEC_3_4: |
523 | s5h1420_writereg(state, 0x30, 0x04); | 523 | s5h1420_writereg(state, 0x30, 0x04); |
524 | s5h1420_writereg(state, 0x31, 0x12 | inversion); | 524 | s5h1420_writereg(state, 0x31, 0x12 | inversion); |
525 | break; | 525 | break; |
526 | 526 | ||
527 | case FEC_5_6: | 527 | case FEC_5_6: |
528 | s5h1420_writereg(state, 0x30, 0x08); | 528 | s5h1420_writereg(state, 0x30, 0x08); |
diff --git a/drivers/media/dvb/frontends/s5h1420.h b/drivers/media/dvb/frontends/s5h1420.h index 872028ddf2a2..73296f13c324 100644 --- a/drivers/media/dvb/frontends/s5h1420.h +++ b/drivers/media/dvb/frontends/s5h1420.h | |||
@@ -39,6 +39,6 @@ struct s5h1420_config | |||
39 | }; | 39 | }; |
40 | 40 | ||
41 | extern struct dvb_frontend* s5h1420_attach(const struct s5h1420_config* config, | 41 | extern struct dvb_frontend* s5h1420_attach(const struct s5h1420_config* config, |
42 | struct i2c_adapter* i2c); | 42 | struct i2c_adapter* i2c); |
43 | 43 | ||
44 | #endif // S5H1420_H | 44 | #endif // S5H1420_H |
diff --git a/drivers/media/dvb/frontends/sp8870.c b/drivers/media/dvb/frontends/sp8870.c index 1c6b2e9264bc..fc06cd6b46c3 100644 --- a/drivers/media/dvb/frontends/sp8870.c +++ b/drivers/media/dvb/frontends/sp8870.c | |||
@@ -67,16 +67,16 @@ static int debug; | |||
67 | 67 | ||
68 | static int sp8870_writereg (struct sp8870_state* state, u16 reg, u16 data) | 68 | static int sp8870_writereg (struct sp8870_state* state, u16 reg, u16 data) |
69 | { | 69 | { |
70 | u8 buf [] = { reg >> 8, reg & 0xff, data >> 8, data & 0xff }; | 70 | u8 buf [] = { reg >> 8, reg & 0xff, data >> 8, data & 0xff }; |
71 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 4 }; | 71 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 4 }; |
72 | int err; | 72 | int err; |
73 | 73 | ||
74 | if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) { | 74 | if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) { |
75 | dprintk ("%s: writereg error (err == %i, reg == 0x%02x, data == 0x%02x)\n", __FUNCTION__, err, reg, data); | 75 | dprintk ("%s: writereg error (err == %i, reg == 0x%02x, data == 0x%02x)\n", __FUNCTION__, err, reg, data); |
76 | return -EREMOTEIO; | 76 | return -EREMOTEIO; |
77 | } | 77 | } |
78 | 78 | ||
79 | return 0; | 79 | return 0; |
80 | } | 80 | } |
81 | 81 | ||
82 | static int sp8870_readreg (struct sp8870_state* state, u16 reg) | 82 | static int sp8870_readreg (struct sp8870_state* state, u16 reg) |
@@ -305,7 +305,7 @@ static int sp8870_set_frontend_parameters (struct dvb_frontend* fe, | |||
305 | static int sp8870_init (struct dvb_frontend* fe) | 305 | static int sp8870_init (struct dvb_frontend* fe) |
306 | { | 306 | { |
307 | struct sp8870_state* state = fe->demodulator_priv; | 307 | struct sp8870_state* state = fe->demodulator_priv; |
308 | const struct firmware *fw = NULL; | 308 | const struct firmware *fw = NULL; |
309 | 309 | ||
310 | sp8870_wake_up(state); | 310 | sp8870_wake_up(state); |
311 | if (state->initialised) return 0; | 311 | if (state->initialised) return 0; |
@@ -534,10 +534,10 @@ static int sp8870_sleep(struct dvb_frontend* fe) | |||
534 | 534 | ||
535 | static int sp8870_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) | 535 | static int sp8870_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) |
536 | { | 536 | { |
537 | fesettings->min_delay_ms = 350; | 537 | fesettings->min_delay_ms = 350; |
538 | fesettings->step_size = 0; | 538 | fesettings->step_size = 0; |
539 | fesettings->max_drift = 0; | 539 | fesettings->max_drift = 0; |
540 | return 0; | 540 | return 0; |
541 | } | 541 | } |
542 | 542 | ||
543 | static void sp8870_release(struct dvb_frontend* fe) | 543 | static void sp8870_release(struct dvb_frontend* fe) |
diff --git a/drivers/media/dvb/frontends/sp887x.c b/drivers/media/dvb/frontends/sp887x.c index 73384e75625e..e3b665782243 100644 --- a/drivers/media/dvb/frontends/sp887x.c +++ b/drivers/media/dvb/frontends/sp887x.c | |||
@@ -80,7 +80,7 @@ static int sp887x_readreg (struct sp887x_state* state, u16 reg) | |||
80 | u8 b1 [2]; | 80 | u8 b1 [2]; |
81 | int ret; | 81 | int ret; |
82 | struct i2c_msg msg[] = {{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 }, | 82 | struct i2c_msg msg[] = {{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 }, |
83 | { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 2 }}; | 83 | { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 2 }}; |
84 | 84 | ||
85 | if ((ret = i2c_transfer(state->i2c, msg, 2)) != 2) { | 85 | if ((ret = i2c_transfer(state->i2c, msg, 2)) != 2) { |
86 | printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret); | 86 | printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret); |
@@ -498,7 +498,7 @@ static int sp887x_sleep(struct dvb_frontend* fe) | |||
498 | static int sp887x_init(struct dvb_frontend* fe) | 498 | static int sp887x_init(struct dvb_frontend* fe) |
499 | { | 499 | { |
500 | struct sp887x_state* state = fe->demodulator_priv; | 500 | struct sp887x_state* state = fe->demodulator_priv; |
501 | const struct firmware *fw = NULL; | 501 | const struct firmware *fw = NULL; |
502 | int ret; | 502 | int ret; |
503 | 503 | ||
504 | if (!state->initialised) { | 504 | if (!state->initialised) { |
@@ -528,10 +528,10 @@ static int sp887x_init(struct dvb_frontend* fe) | |||
528 | 528 | ||
529 | static int sp887x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) | 529 | static int sp887x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) |
530 | { | 530 | { |
531 | fesettings->min_delay_ms = 350; | 531 | fesettings->min_delay_ms = 350; |
532 | fesettings->step_size = 166666*2; | 532 | fesettings->step_size = 166666*2; |
533 | fesettings->max_drift = (166666*2)+1; | 533 | fesettings->max_drift = (166666*2)+1; |
534 | return 0; | 534 | return 0; |
535 | } | 535 | } |
536 | 536 | ||
537 | static void sp887x_release(struct dvb_frontend* fe) | 537 | static void sp887x_release(struct dvb_frontend* fe) |
@@ -581,7 +581,7 @@ static struct dvb_frontend_ops sp887x_ops = { | |||
581 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | 581 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | |
582 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | | 582 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | |
583 | FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | | 583 | FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | |
584 | FE_CAN_RECOVER | 584 | FE_CAN_RECOVER |
585 | }, | 585 | }, |
586 | 586 | ||
587 | .release = sp887x_release, | 587 | .release = sp887x_release, |
diff --git a/drivers/media/dvb/frontends/stv0299.c b/drivers/media/dvb/frontends/stv0299.c index 29c48665e130..177d71d56b67 100644 --- a/drivers/media/dvb/frontends/stv0299.c +++ b/drivers/media/dvb/frontends/stv0299.c | |||
@@ -95,7 +95,7 @@ static int stv0299_writeregI (struct stv0299_state* state, u8 reg, u8 data) | |||
95 | 95 | ||
96 | int stv0299_writereg (struct dvb_frontend* fe, u8 reg, u8 data) | 96 | int stv0299_writereg (struct dvb_frontend* fe, u8 reg, u8 data) |
97 | { | 97 | { |
98 | struct stv0299_state* state = fe->demodulator_priv; | 98 | struct stv0299_state* state = fe->demodulator_priv; |
99 | 99 | ||
100 | return stv0299_writeregI(state, reg, data); | 100 | return stv0299_writeregI(state, reg, data); |
101 | } | 101 | } |
@@ -220,7 +220,7 @@ static int stv0299_wait_diseqc_idle (struct stv0299_state* state, int timeout) | |||
220 | 220 | ||
221 | static int stv0299_set_symbolrate (struct dvb_frontend* fe, u32 srate) | 221 | static int stv0299_set_symbolrate (struct dvb_frontend* fe, u32 srate) |
222 | { | 222 | { |
223 | struct stv0299_state* state = fe->demodulator_priv; | 223 | struct stv0299_state* state = fe->demodulator_priv; |
224 | u64 big = srate; | 224 | u64 big = srate; |
225 | u32 ratio; | 225 | u32 ratio; |
226 | 226 | ||
@@ -271,7 +271,7 @@ static int stv0299_get_symbolrate (struct stv0299_state* state) | |||
271 | static int stv0299_send_diseqc_msg (struct dvb_frontend* fe, | 271 | static int stv0299_send_diseqc_msg (struct dvb_frontend* fe, |
272 | struct dvb_diseqc_master_cmd *m) | 272 | struct dvb_diseqc_master_cmd *m) |
273 | { | 273 | { |
274 | struct stv0299_state* state = fe->demodulator_priv; | 274 | struct stv0299_state* state = fe->demodulator_priv; |
275 | u8 val; | 275 | u8 val; |
276 | int i; | 276 | int i; |
277 | 277 | ||
@@ -301,7 +301,7 @@ static int stv0299_send_diseqc_msg (struct dvb_frontend* fe, | |||
301 | 301 | ||
302 | static int stv0299_send_diseqc_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t burst) | 302 | static int stv0299_send_diseqc_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t burst) |
303 | { | 303 | { |
304 | struct stv0299_state* state = fe->demodulator_priv; | 304 | struct stv0299_state* state = fe->demodulator_priv; |
305 | u8 val; | 305 | u8 val; |
306 | 306 | ||
307 | dprintk ("%s\n", __FUNCTION__); | 307 | dprintk ("%s\n", __FUNCTION__); |
@@ -328,7 +328,7 @@ static int stv0299_send_diseqc_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t | |||
328 | 328 | ||
329 | static int stv0299_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | 329 | static int stv0299_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone) |
330 | { | 330 | { |
331 | struct stv0299_state* state = fe->demodulator_priv; | 331 | struct stv0299_state* state = fe->demodulator_priv; |
332 | u8 val; | 332 | u8 val; |
333 | 333 | ||
334 | if (stv0299_wait_diseqc_idle (state, 100) < 0) | 334 | if (stv0299_wait_diseqc_idle (state, 100) < 0) |
@@ -350,7 +350,7 @@ static int stv0299_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | |||
350 | 350 | ||
351 | static int stv0299_set_voltage (struct dvb_frontend* fe, fe_sec_voltage_t voltage) | 351 | static int stv0299_set_voltage (struct dvb_frontend* fe, fe_sec_voltage_t voltage) |
352 | { | 352 | { |
353 | struct stv0299_state* state = fe->demodulator_priv; | 353 | struct stv0299_state* state = fe->demodulator_priv; |
354 | u8 reg0x08; | 354 | u8 reg0x08; |
355 | u8 reg0x0c; | 355 | u8 reg0x0c; |
356 | 356 | ||
@@ -442,7 +442,7 @@ static int stv0299_send_legacy_dish_cmd (struct dvb_frontend* fe, u32 cmd) | |||
442 | 442 | ||
443 | static int stv0299_init (struct dvb_frontend* fe) | 443 | static int stv0299_init (struct dvb_frontend* fe) |
444 | { | 444 | { |
445 | struct stv0299_state* state = fe->demodulator_priv; | 445 | struct stv0299_state* state = fe->demodulator_priv; |
446 | int i; | 446 | int i; |
447 | 447 | ||
448 | dprintk("stv0299: init chip\n"); | 448 | dprintk("stv0299: init chip\n"); |
@@ -461,7 +461,7 @@ static int stv0299_init (struct dvb_frontend* fe) | |||
461 | 461 | ||
462 | static int stv0299_read_status(struct dvb_frontend* fe, fe_status_t* status) | 462 | static int stv0299_read_status(struct dvb_frontend* fe, fe_status_t* status) |
463 | { | 463 | { |
464 | struct stv0299_state* state = fe->demodulator_priv; | 464 | struct stv0299_state* state = fe->demodulator_priv; |
465 | 465 | ||
466 | u8 signal = 0xff - stv0299_readreg (state, 0x18); | 466 | u8 signal = 0xff - stv0299_readreg (state, 0x18); |
467 | u8 sync = stv0299_readreg (state, 0x1b); | 467 | u8 sync = stv0299_readreg (state, 0x1b); |
@@ -489,7 +489,7 @@ static int stv0299_read_status(struct dvb_frontend* fe, fe_status_t* status) | |||
489 | 489 | ||
490 | static int stv0299_read_ber(struct dvb_frontend* fe, u32* ber) | 490 | static int stv0299_read_ber(struct dvb_frontend* fe, u32* ber) |
491 | { | 491 | { |
492 | struct stv0299_state* state = fe->demodulator_priv; | 492 | struct stv0299_state* state = fe->demodulator_priv; |
493 | 493 | ||
494 | if (state->errmode != STATUS_BER) return 0; | 494 | if (state->errmode != STATUS_BER) return 0; |
495 | *ber = (stv0299_readreg (state, 0x1d) << 8) | stv0299_readreg (state, 0x1e); | 495 | *ber = (stv0299_readreg (state, 0x1d) << 8) | stv0299_readreg (state, 0x1e); |
@@ -499,7 +499,7 @@ static int stv0299_read_ber(struct dvb_frontend* fe, u32* ber) | |||
499 | 499 | ||
500 | static int stv0299_read_signal_strength(struct dvb_frontend* fe, u16* strength) | 500 | static int stv0299_read_signal_strength(struct dvb_frontend* fe, u16* strength) |
501 | { | 501 | { |
502 | struct stv0299_state* state = fe->demodulator_priv; | 502 | struct stv0299_state* state = fe->demodulator_priv; |
503 | 503 | ||
504 | s32 signal = 0xffff - ((stv0299_readreg (state, 0x18) << 8) | 504 | s32 signal = 0xffff - ((stv0299_readreg (state, 0x18) << 8) |
505 | | stv0299_readreg (state, 0x19)); | 505 | | stv0299_readreg (state, 0x19)); |
@@ -516,7 +516,7 @@ static int stv0299_read_signal_strength(struct dvb_frontend* fe, u16* strength) | |||
516 | 516 | ||
517 | static int stv0299_read_snr(struct dvb_frontend* fe, u16* snr) | 517 | static int stv0299_read_snr(struct dvb_frontend* fe, u16* snr) |
518 | { | 518 | { |
519 | struct stv0299_state* state = fe->demodulator_priv; | 519 | struct stv0299_state* state = fe->demodulator_priv; |
520 | 520 | ||
521 | s32 xsnr = 0xffff - ((stv0299_readreg (state, 0x24) << 8) | 521 | s32 xsnr = 0xffff - ((stv0299_readreg (state, 0x24) << 8) |
522 | | stv0299_readreg (state, 0x25)); | 522 | | stv0299_readreg (state, 0x25)); |
@@ -528,7 +528,7 @@ static int stv0299_read_snr(struct dvb_frontend* fe, u16* snr) | |||
528 | 528 | ||
529 | static int stv0299_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | 529 | static int stv0299_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) |
530 | { | 530 | { |
531 | struct stv0299_state* state = fe->demodulator_priv; | 531 | struct stv0299_state* state = fe->demodulator_priv; |
532 | 532 | ||
533 | if (state->errmode != STATUS_UCBLOCKS) *ucblocks = 0; | 533 | if (state->errmode != STATUS_UCBLOCKS) *ucblocks = 0; |
534 | else *ucblocks = (stv0299_readreg (state, 0x1d) << 8) | stv0299_readreg (state, 0x1e); | 534 | else *ucblocks = (stv0299_readreg (state, 0x1d) << 8) | stv0299_readreg (state, 0x1e); |
@@ -538,7 +538,7 @@ static int stv0299_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | |||
538 | 538 | ||
539 | static int stv0299_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters * p) | 539 | static int stv0299_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters * p) |
540 | { | 540 | { |
541 | struct stv0299_state* state = fe->demodulator_priv; | 541 | struct stv0299_state* state = fe->demodulator_priv; |
542 | int invval = 0; | 542 | int invval = 0; |
543 | 543 | ||
544 | dprintk ("%s : FE_SET_FRONTEND\n", __FUNCTION__); | 544 | dprintk ("%s : FE_SET_FRONTEND\n", __FUNCTION__); |
@@ -571,7 +571,7 @@ static int stv0299_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_par | |||
571 | 571 | ||
572 | static int stv0299_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters * p) | 572 | static int stv0299_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters * p) |
573 | { | 573 | { |
574 | struct stv0299_state* state = fe->demodulator_priv; | 574 | struct stv0299_state* state = fe->demodulator_priv; |
575 | s32 derot_freq; | 575 | s32 derot_freq; |
576 | int invval; | 576 | int invval; |
577 | 577 | ||
@@ -596,7 +596,7 @@ static int stv0299_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_par | |||
596 | 596 | ||
597 | static int stv0299_sleep(struct dvb_frontend* fe) | 597 | static int stv0299_sleep(struct dvb_frontend* fe) |
598 | { | 598 | { |
599 | struct stv0299_state* state = fe->demodulator_priv; | 599 | struct stv0299_state* state = fe->demodulator_priv; |
600 | 600 | ||
601 | stv0299_writeregI(state, 0x02, 0x80); | 601 | stv0299_writeregI(state, 0x02, 0x80); |
602 | state->initialised = 0; | 602 | state->initialised = 0; |
@@ -606,7 +606,7 @@ static int stv0299_sleep(struct dvb_frontend* fe) | |||
606 | 606 | ||
607 | static int stv0299_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) | 607 | static int stv0299_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) |
608 | { | 608 | { |
609 | struct stv0299_state* state = fe->demodulator_priv; | 609 | struct stv0299_state* state = fe->demodulator_priv; |
610 | 610 | ||
611 | fesettings->min_delay_ms = state->config->min_delay_ms; | 611 | fesettings->min_delay_ms = state->config->min_delay_ms; |
612 | if (fesettings->parameters.u.qpsk.symbol_rate < 10000000) { | 612 | if (fesettings->parameters.u.qpsk.symbol_rate < 10000000) { |
@@ -658,7 +658,7 @@ struct dvb_frontend* stv0299_attach(const struct stv0299_config* config, | |||
658 | 658 | ||
659 | /* create dvb_frontend */ | 659 | /* create dvb_frontend */ |
660 | state->frontend.ops = &state->ops; | 660 | state->frontend.ops = &state->ops; |
661 | state->frontend.demodulator_priv = state; | 661 | state->frontend.demodulator_priv = state; |
662 | return &state->frontend; | 662 | return &state->frontend; |
663 | 663 | ||
664 | error: | 664 | error: |
@@ -714,7 +714,7 @@ MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); | |||
714 | 714 | ||
715 | MODULE_DESCRIPTION("ST STV0299 DVB Demodulator driver"); | 715 | MODULE_DESCRIPTION("ST STV0299 DVB Demodulator driver"); |
716 | MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Peter Schildmann, Felix Domke, " | 716 | MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Peter Schildmann, Felix Domke, " |
717 | "Andreas Oberritter, Andrew de Quincey, Kenneth Aafløy"); | 717 | "Andreas Oberritter, Andrew de Quincey, Kenneth Aafløy"); |
718 | MODULE_LICENSE("GPL"); | 718 | MODULE_LICENSE("GPL"); |
719 | 719 | ||
720 | EXPORT_SYMBOL(stv0299_writereg); | 720 | EXPORT_SYMBOL(stv0299_writereg); |
diff --git a/drivers/media/dvb/frontends/tda10021.c b/drivers/media/dvb/frontends/tda10021.c index eaf130e666d8..425cd19136fe 100644 --- a/drivers/media/dvb/frontends/tda10021.c +++ b/drivers/media/dvb/frontends/tda10021.c | |||
@@ -1,10 +1,10 @@ | |||
1 | /* | 1 | /* |
2 | TDA10021 - Single Chip Cable Channel Receiver driver module | 2 | TDA10021 - Single Chip Cable Channel Receiver driver module |
3 | used on the the Siemens DVB-C cards | 3 | used on the the Siemens DVB-C cards |
4 | 4 | ||
5 | Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de> | 5 | Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de> |
6 | Copyright (C) 2004 Markus Schulz <msc@antzsystem.de> | 6 | Copyright (C) 2004 Markus Schulz <msc@antzsystem.de> |
7 | Support for TDA10021 | 7 | Support for TDA10021 |
8 | 8 | ||
9 | This program is free software; you can redistribute it and/or modify | 9 | This program is free software; you can redistribute it and/or modify |
10 | it under the terms of the GNU General Public License as published by | 10 | it under the terms of the GNU General Public License as published by |
@@ -76,9 +76,9 @@ static u8 tda10021_inittab[0x40]= | |||
76 | 76 | ||
77 | static int tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data) | 77 | static int tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data) |
78 | { | 78 | { |
79 | u8 buf[] = { reg, data }; | 79 | u8 buf[] = { reg, data }; |
80 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; | 80 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; |
81 | int ret; | 81 | int ret; |
82 | 82 | ||
83 | ret = i2c_transfer (state->i2c, &msg, 1); | 83 | ret = i2c_transfer (state->i2c, &msg, 1); |
84 | if (ret != 1) | 84 | if (ret != 1) |
@@ -95,7 +95,7 @@ static u8 tda10021_readreg (struct tda10021_state* state, u8 reg) | |||
95 | u8 b0 [] = { reg }; | 95 | u8 b0 [] = { reg }; |
96 | u8 b1 [] = { 0 }; | 96 | u8 b1 [] = { 0 }; |
97 | struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 }, | 97 | struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 }, |
98 | { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } }; | 98 | { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } }; |
99 | int ret; | 99 | int ret; |
100 | 100 | ||
101 | ret = i2c_transfer (state->i2c, msg, 2); | 101 | ret = i2c_transfer (state->i2c, msg, 2); |
diff --git a/drivers/media/dvb/frontends/tda10021.h b/drivers/media/dvb/frontends/tda10021.h index 7d6a51ce291e..53be939e8c55 100644 --- a/drivers/media/dvb/frontends/tda10021.h +++ b/drivers/media/dvb/frontends/tda10021.h | |||
@@ -1,10 +1,10 @@ | |||
1 | /* | 1 | /* |
2 | TDA10021 - Single Chip Cable Channel Receiver driver module | 2 | TDA10021 - Single Chip Cable Channel Receiver driver module |
3 | used on the the Siemens DVB-C cards | 3 | used on the the Siemens DVB-C cards |
4 | 4 | ||
5 | Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de> | 5 | Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de> |
6 | Copyright (C) 2004 Markus Schulz <msc@antzsystem.de> | 6 | Copyright (C) 2004 Markus Schulz <msc@antzsystem.de> |
7 | Support for TDA10021 | 7 | Support for TDA10021 |
8 | 8 | ||
9 | This program is free software; you can redistribute it and/or modify | 9 | This program is free software; you can redistribute it and/or modify |
10 | it under the terms of the GNU General Public License as published by | 10 | it under the terms of the GNU General Public License as published by |
diff --git a/drivers/media/dvb/frontends/tda1004x.c b/drivers/media/dvb/frontends/tda1004x.c index 7968743826fc..dd02aff467fe 100644 --- a/drivers/media/dvb/frontends/tda1004x.c +++ b/drivers/media/dvb/frontends/tda1004x.c | |||
@@ -475,7 +475,7 @@ static int tda10046_fwupload(struct dvb_frontend* fe) | |||
475 | ret = state->config->request_firmware(fe, &fw, TDA10046_DEFAULT_FIRMWARE); | 475 | ret = state->config->request_firmware(fe, &fw, TDA10046_DEFAULT_FIRMWARE); |
476 | if (ret) { | 476 | if (ret) { |
477 | printk(KERN_ERR "tda1004x: no firmware upload (timeout or file not found?)\n"); | 477 | printk(KERN_ERR "tda1004x: no firmware upload (timeout or file not found?)\n"); |
478 | return ret; | 478 | return ret; |
479 | } | 479 | } |
480 | tda1004x_write_mask(state, TDA1004X_CONFC4, 8, 8); // going to boot from HOST | 480 | tda1004x_write_mask(state, TDA1004X_CONFC4, 8, 8); // going to boot from HOST |
481 | ret = tda1004x_do_upload(state, fw->data, fw->size, TDA10046H_CODE_CPT, TDA10046H_CODE_IN); | 481 | ret = tda1004x_do_upload(state, fw->data, fw->size, TDA10046H_CODE_CPT, TDA10046H_CODE_IN); |
diff --git a/drivers/media/dvb/frontends/tda8083.c b/drivers/media/dvb/frontends/tda8083.c index c05cf1861051..91baa9cedd79 100644 --- a/drivers/media/dvb/frontends/tda8083.c +++ b/drivers/media/dvb/frontends/tda8083.c | |||
@@ -66,13 +66,13 @@ static int tda8083_writereg (struct tda8083_state* state, u8 reg, u8 data) | |||
66 | u8 buf [] = { reg, data }; | 66 | u8 buf [] = { reg, data }; |
67 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; | 67 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; |
68 | 68 | ||
69 | ret = i2c_transfer(state->i2c, &msg, 1); | 69 | ret = i2c_transfer(state->i2c, &msg, 1); |
70 | 70 | ||
71 | if (ret != 1) | 71 | if (ret != 1) |
72 | dprintk ("%s: writereg error (reg %02x, ret == %i)\n", | 72 | dprintk ("%s: writereg error (reg %02x, ret == %i)\n", |
73 | __FUNCTION__, reg, ret); | 73 | __FUNCTION__, reg, ret); |
74 | 74 | ||
75 | return (ret != 1) ? -1 : 0; | 75 | return (ret != 1) ? -1 : 0; |
76 | } | 76 | } |
77 | 77 | ||
78 | static int tda8083_readregs (struct tda8083_state* state, u8 reg1, u8 *b, u8 len) | 78 | static int tda8083_readregs (struct tda8083_state* state, u8 reg1, u8 *b, u8 len) |
@@ -87,7 +87,7 @@ static int tda8083_readregs (struct tda8083_state* state, u8 reg1, u8 *b, u8 len | |||
87 | dprintk ("%s: readreg error (reg %02x, ret == %i)\n", | 87 | dprintk ("%s: readreg error (reg %02x, ret == %i)\n", |
88 | __FUNCTION__, reg1, ret); | 88 | __FUNCTION__, reg1, ret); |
89 | 89 | ||
90 | return ret == 2 ? 0 : -1; | 90 | return ret == 2 ? 0 : -1; |
91 | } | 91 | } |
92 | 92 | ||
93 | static inline u8 tda8083_readreg (struct tda8083_state* state, u8 reg) | 93 | static inline u8 tda8083_readreg (struct tda8083_state* state, u8 reg) |
@@ -132,14 +132,14 @@ static fe_code_rate_t tda8083_get_fec (struct tda8083_state* state) | |||
132 | 132 | ||
133 | static int tda8083_set_symbolrate (struct tda8083_state* state, u32 srate) | 133 | static int tda8083_set_symbolrate (struct tda8083_state* state, u32 srate) |
134 | { | 134 | { |
135 | u32 ratio; | 135 | u32 ratio; |
136 | u32 tmp; | 136 | u32 tmp; |
137 | u8 filter; | 137 | u8 filter; |
138 | 138 | ||
139 | if (srate > 32000000) | 139 | if (srate > 32000000) |
140 | srate = 32000000; | 140 | srate = 32000000; |
141 | if (srate < 500000) | 141 | if (srate < 500000) |
142 | srate = 500000; | 142 | srate = 500000; |
143 | 143 | ||
144 | filter = 0; | 144 | filter = 0; |
145 | if (srate < 24000000) | 145 | if (srate < 24000000) |
@@ -174,7 +174,7 @@ static void tda8083_wait_diseqc_fifo (struct tda8083_state* state, int timeout) | |||
174 | unsigned long start = jiffies; | 174 | unsigned long start = jiffies; |
175 | 175 | ||
176 | while (jiffies - start < timeout && | 176 | while (jiffies - start < timeout && |
177 | !(tda8083_readreg(state, 0x02) & 0x80)) | 177 | !(tda8083_readreg(state, 0x02) & 0x80)) |
178 | { | 178 | { |
179 | msleep(50); | 179 | msleep(50); |
180 | }; | 180 | }; |