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authorMatthias Schwarzott <zzam@gentoo.org>2008-04-12 14:04:48 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-04-24 13:09:40 -0400
commit111221fb676176dc90638d6004f1c26164ddd5ae (patch)
tree3ebd78a1eb4a77fbbb7ccc91bec92a3564f7923d /drivers/media/dvb/frontends/mt312.c
parent82cd2dff4a5562a081c8bbf449a1ae7b9ecb5b1b (diff)
V4L/DVB (7573): mt312: Supports different xtal frequencies
Do not hardcode xtal frequency but allow different values for future zl10313 support. Signed-off-by: Matthias Schwarzott <zzam@gentoo.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/dvb/frontends/mt312.c')
-rw-r--r--drivers/media/dvb/frontends/mt312.c33
1 files changed, 17 insertions, 16 deletions
diff --git a/drivers/media/dvb/frontends/mt312.c b/drivers/media/dvb/frontends/mt312.c
index 32b419477887..1f478c8c0d4a 100644
--- a/drivers/media/dvb/frontends/mt312.c
+++ b/drivers/media/dvb/frontends/mt312.c
@@ -43,7 +43,8 @@ struct mt312_state {
43 struct dvb_frontend frontend; 43 struct dvb_frontend frontend;
44 44
45 u8 id; 45 u8 id;
46 u8 frequency; 46 unsigned long xtal;
47 u8 freq_mult;
47}; 48};
48 49
49static int debug; 50static int debug;
@@ -53,8 +54,6 @@ static int debug;
53 printk(KERN_DEBUG "mt312: " args); \ 54 printk(KERN_DEBUG "mt312: " args); \
54 } while (0) 55 } while (0)
55 56
56#define MT312_SYS_CLK 90000000UL /* 90 MHz */
57#define MT312_LPOWER_SYS_CLK 60000000UL /* 60 MHz */
58#define MT312_PLL_CLK 10000000UL /* 10 MHz */ 57#define MT312_PLL_CLK 10000000UL /* 10 MHz */
59 58
60static int mt312_read(struct mt312_state *state, const enum mt312_reg_addr reg, 59static int mt312_read(struct mt312_state *state, const enum mt312_reg_addr reg,
@@ -209,7 +208,7 @@ static int mt312_get_symbol_rate(struct mt312_state *state, u32 *sr)
209 dprintk("sym_rat_op=%d dec_ratio=%d\n", 208 dprintk("sym_rat_op=%d dec_ratio=%d\n",
210 sym_rat_op, dec_ratio); 209 sym_rat_op, dec_ratio);
211 dprintk("*sr(manual) = %lu\n", 210 dprintk("*sr(manual) = %lu\n",
212 (((MT312_PLL_CLK * 8192) / (sym_rat_op + 8192)) * 211 (((state->xtal * 8192) / (sym_rat_op + 8192)) *
213 2) - dec_ratio); 212 2) - dec_ratio);
214 } 213 }
215 214
@@ -242,7 +241,7 @@ static int mt312_initfe(struct dvb_frontend *fe)
242 241
243 /* wake up */ 242 /* wake up */
244 ret = mt312_writereg(state, CONFIG, 243 ret = mt312_writereg(state, CONFIG,
245 (state->frequency == 60 ? 0x88 : 0x8c)); 244 (state->freq_mult == 6 ? 0x88 : 0x8c));
246 if (ret < 0) 245 if (ret < 0)
247 return ret; 246 return ret;
248 247
@@ -266,11 +265,10 @@ static int mt312_initfe(struct dvb_frontend *fe)
266 } 265 }
267 266
268 /* SYS_CLK */ 267 /* SYS_CLK */
269 buf[0] = mt312_div((state->frequency == 60 ? MT312_LPOWER_SYS_CLK : 268 buf[0] = mt312_div(state->xtal * state->freq_mult * 2, 1000000);
270 MT312_SYS_CLK) * 2, 1000000);
271 269
272 /* DISEQC_RATIO */ 270 /* DISEQC_RATIO */
273 buf[1] = mt312_div(MT312_PLL_CLK, 22000 * 4); 271 buf[1] = mt312_div(state->xtal, 22000 * 4);
274 272
275 ret = mt312_write(state, SYS_CLK, buf, sizeof(buf)); 273 ret = mt312_write(state, SYS_CLK, buf, sizeof(buf));
276 if (ret < 0) 274 if (ret < 0)
@@ -535,17 +533,17 @@ static int mt312_set_frontend(struct dvb_frontend *fe,
535 return ret; 533 return ret;
536 if (p->u.qpsk.symbol_rate >= 30000000) { 534 if (p->u.qpsk.symbol_rate >= 30000000) {
537 /* Note that 30MS/s should use 90MHz */ 535 /* Note that 30MS/s should use 90MHz */
538 if ((config_val & 0x0c) == 0x08) { 536 if (state->freq_mult == 6) {
539 /* We are running 60MHz */ 537 /* We are running 60MHz */
540 state->frequency = 90; 538 state->freq_mult = 9;
541 ret = mt312_initfe(fe); 539 ret = mt312_initfe(fe);
542 if (ret < 0) 540 if (ret < 0)
543 return ret; 541 return ret;
544 } 542 }
545 } else { 543 } else {
546 if ((config_val & 0x0c) == 0x0C) { 544 if (state->freq_mult == 9) {
547 /* We are running 90MHz */ 545 /* We are running 90MHz */
548 state->frequency = 60; 546 state->freq_mult = 6;
549 ret = mt312_initfe(fe); 547 ret = mt312_initfe(fe);
550 if (ret < 0) 548 if (ret < 0)
551 return ret; 549 return ret;
@@ -664,6 +662,7 @@ static void mt312_release(struct dvb_frontend *fe)
664 kfree(state); 662 kfree(state);
665} 663}
666 664
665#define MT312_SYS_CLK 90000000UL /* 90 MHz */
667static struct dvb_frontend_ops vp310_mt312_ops = { 666static struct dvb_frontend_ops vp310_mt312_ops = {
668 667
669 .info = { 668 .info = {
@@ -671,8 +670,8 @@ static struct dvb_frontend_ops vp310_mt312_ops = {
671 .type = FE_QPSK, 670 .type = FE_QPSK,
672 .frequency_min = 950000, 671 .frequency_min = 950000,
673 .frequency_max = 2150000, 672 .frequency_max = 2150000,
674 .frequency_stepsize = (MT312_PLL_CLK / 1000) / 128, 673 .frequency_stepsize = (MT312_PLL_CLK / 1000) / 128, /* FIXME: adjust freq to real used xtal */
675 .symbol_rate_min = MT312_SYS_CLK / 128, 674 .symbol_rate_min = MT312_SYS_CLK / 128, /* FIXME as above */
676 .symbol_rate_max = MT312_SYS_CLK / 2, 675 .symbol_rate_max = MT312_SYS_CLK / 2,
677 .caps = 676 .caps =
678 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | 677 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
@@ -729,11 +728,13 @@ struct dvb_frontend *vp310_mt312_attach(const struct mt312_config *config,
729 switch (state->id) { 728 switch (state->id) {
730 case ID_VP310: 729 case ID_VP310:
731 strcpy(state->frontend.ops.info.name, "Zarlink VP310 DVB-S"); 730 strcpy(state->frontend.ops.info.name, "Zarlink VP310 DVB-S");
732 state->frequency = 90; 731 state->xtal = MT312_PLL_CLK;
732 state->freq_mult = 9;
733 break; 733 break;
734 case ID_MT312: 734 case ID_MT312:
735 strcpy(state->frontend.ops.info.name, "Zarlink MT312 DVB-S"); 735 strcpy(state->frontend.ops.info.name, "Zarlink MT312 DVB-S");
736 state->frequency = 60; 736 state->xtal = MT312_PLL_CLK;
737 state->freq_mult = 6;
737 break; 738 break;
738 default: 739 default:
739 printk(KERN_WARNING "Only Zarlink VP310/MT312" 740 printk(KERN_WARNING "Only Zarlink VP310/MT312"