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authorMauro Carvalho Chehab <mchehab@redhat.com>2010-09-27 19:52:43 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2010-12-29 05:16:27 -0500
commitb9ede79ada766eec535e1230970bd885489d5990 (patch)
tree978446509479962465adcc5d3385284e86935adb /drivers/media/dvb/frontends/mb86a20s.c
parentca3dfd6a6f8364c1d51e548adb4564702f1141e9 (diff)
[media] add a driver for mb86a20s
This adds the trivial bits to mb86a20s. As the driver won't touch at the channel/layer parameters, this may not be enough for receiving all channels, especially ISDB-Tsb, but the driver worked properly for receiving video channels on my tests. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb/frontends/mb86a20s.c')
-rw-r--r--drivers/media/dvb/frontends/mb86a20s.c584
1 files changed, 584 insertions, 0 deletions
diff --git a/drivers/media/dvb/frontends/mb86a20s.c b/drivers/media/dvb/frontends/mb86a20s.c
new file mode 100644
index 000000000000..1e6bec6aa0f9
--- /dev/null
+++ b/drivers/media/dvb/frontends/mb86a20s.c
@@ -0,0 +1,584 @@
1/*
2 * Fujitu mb86a20s ISDB-T/ISDB-Tsb Module driver
3 *
4 * Copyright (C) 2010 Mauro Carvalho Chehab <mchehab@redhat.com>
5 * Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
6 *
7 * FIXME: Need to port to DVB v5.2 API
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18
19#include <linux/kernel.h>
20#include <asm/div64.h>
21
22#include "dvb_frontend.h"
23#include "mb86a20s.h"
24
25static int debug = 1;
26module_param(debug, int, 0644);
27MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
28
29#define rc(args...) do { \
30 printk(KERN_ERR "mb86a20s: " args); \
31} while (0)
32
33#define dprintk(args...) \
34 do { \
35 if (debug) { \
36 printk(KERN_DEBUG "mb86a20s: %s: ", __func__); \
37 printk(args); \
38 } \
39 } while (0)
40
41struct mb86a20s_state {
42 struct i2c_adapter *i2c;
43 const struct mb86a20s_config *config;
44
45 struct dvb_frontend frontend;
46
47
48
49
50};
51
52struct regdata {
53 u8 reg;
54 u8 data;
55};
56
57/*
58 * Initialization sequence: Use whatevere default values that PV SBTVD
59 * does on its initialisation, obtained via USB snoop
60 */
61static struct regdata mb86a20s_init[] = {
62 { 0x70, 0x0f },
63 { 0x70, 0xff },
64 { 0x08, 0x01 },
65 { 0x09, 0x3e },
66 { 0x50, 0xd1 },
67 { 0x51, 0x22 },
68 { 0x39, 0x01 },
69 { 0x71, 0x00 },
70 { 0x28, 0x2a },
71 { 0x29, 0x00 },
72 { 0x2a, 0xff },
73 { 0x2b, 0x80 },
74 { 0x28, 0x20 },
75 { 0x29, 0x33 },
76 { 0x2a, 0xdf },
77 { 0x2b, 0xa9 },
78 { 0x3b, 0x21 },
79 { 0x3c, 0x3a },
80 { 0x01, 0x0d },
81 { 0x04, 0x08 },
82 { 0x05, 0x05 },
83 { 0x04, 0x0e },
84 { 0x05, 0x00 },
85 { 0x04, 0x0f },
86 { 0x05, 0x14 },
87 { 0x04, 0x0b },
88 { 0x05, 0x8c },
89 { 0x04, 0x00 },
90 { 0x05, 0x00 },
91 { 0x04, 0x01 },
92 { 0x05, 0x07 },
93 { 0x04, 0x02 },
94 { 0x05, 0x0f },
95 { 0x04, 0x03 },
96 { 0x05, 0xa0 },
97 { 0x04, 0x09 },
98 { 0x05, 0x00 },
99 { 0x04, 0x0a },
100 { 0x05, 0xff },
101 { 0x04, 0x27 },
102 { 0x05, 0x64 },
103 { 0x04, 0x28 },
104 { 0x05, 0x00 },
105 { 0x04, 0x1e },
106 { 0x05, 0xff },
107 { 0x04, 0x29 },
108 { 0x05, 0x0a },
109 { 0x04, 0x32 },
110 { 0x05, 0x0a },
111 { 0x04, 0x14 },
112 { 0x05, 0x02 },
113 { 0x04, 0x04 },
114 { 0x05, 0x00 },
115 { 0x04, 0x05 },
116 { 0x05, 0x22 },
117 { 0x04, 0x06 },
118 { 0x05, 0x0e },
119 { 0x04, 0x07 },
120 { 0x05, 0xd8 },
121 { 0x04, 0x12 },
122 { 0x05, 0x00 },
123 { 0x04, 0x13 },
124 { 0x05, 0xff },
125 { 0x52, 0x01 },
126 { 0x50, 0xa7 },
127 { 0x51, 0x00 },
128 { 0x50, 0xa8 },
129 { 0x51, 0xff },
130 { 0x50, 0xa9 },
131 { 0x51, 0xff },
132 { 0x50, 0xaa },
133 { 0x51, 0x00 },
134 { 0x50, 0xab },
135 { 0x51, 0xff },
136 { 0x50, 0xac },
137 { 0x51, 0xff },
138 { 0x50, 0xad },
139 { 0x51, 0x00 },
140 { 0x50, 0xae },
141 { 0x51, 0xff },
142 { 0x50, 0xaf },
143 { 0x51, 0xff },
144 { 0x5e, 0x07 },
145 { 0x50, 0xdc },
146 { 0x51, 0x01 },
147 { 0x50, 0xdd },
148 { 0x51, 0xf4 },
149 { 0x50, 0xde },
150 { 0x51, 0x01 },
151 { 0x50, 0xdf },
152 { 0x51, 0xf4 },
153 { 0x50, 0xe0 },
154 { 0x51, 0x01 },
155 { 0x50, 0xe1 },
156 { 0x51, 0xf4 },
157 { 0x50, 0xb0 },
158 { 0x51, 0x07 },
159 { 0x50, 0xb2 },
160 { 0x51, 0xff },
161 { 0x50, 0xb3 },
162 { 0x51, 0xff },
163 { 0x50, 0xb4 },
164 { 0x51, 0xff },
165 { 0x50, 0xb5 },
166 { 0x51, 0xff },
167 { 0x50, 0xb6 },
168 { 0x51, 0xff },
169 { 0x50, 0xb7 },
170 { 0x51, 0xff },
171 { 0x50, 0x50 },
172 { 0x51, 0x02 },
173 { 0x50, 0x51 },
174 { 0x51, 0x04 },
175 { 0x45, 0x04 },
176 { 0x48, 0x04 },
177 { 0x50, 0xd5 },
178 { 0x51, 0x01 },
179 { 0x50, 0xd6 },
180 { 0x51, 0x1f },
181 { 0x50, 0xd2 },
182 { 0x51, 0x03 },
183 { 0x50, 0xd7 },
184 { 0x51, 0x3f },
185 { 0x1c, 0x01 },
186 { 0x28, 0x06 },
187 { 0x29, 0x00 },
188 { 0x2a, 0x00 },
189 { 0x2b, 0x03 },
190 { 0x28, 0x07 },
191 { 0x29, 0x00 },
192 { 0x2a, 0x00 },
193 { 0x2b, 0x0d },
194 { 0x28, 0x08 },
195 { 0x29, 0x00 },
196 { 0x2a, 0x00 },
197 { 0x2b, 0x02 },
198 { 0x28, 0x09 },
199 { 0x29, 0x00 },
200 { 0x2a, 0x00 },
201 { 0x2b, 0x01 },
202 { 0x28, 0x0a },
203 { 0x29, 0x00 },
204 { 0x2a, 0x00 },
205 { 0x2b, 0x21 },
206 { 0x28, 0x0b },
207 { 0x29, 0x00 },
208 { 0x2a, 0x00 },
209 { 0x2b, 0x29 },
210 { 0x28, 0x0c },
211 { 0x29, 0x00 },
212 { 0x2a, 0x00 },
213 { 0x2b, 0x16 },
214 { 0x28, 0x0d },
215 { 0x29, 0x00 },
216 { 0x2a, 0x00 },
217 { 0x2b, 0x31 },
218 { 0x28, 0x0e },
219 { 0x29, 0x00 },
220 { 0x2a, 0x00 },
221 { 0x2b, 0x0e },
222 { 0x28, 0x0f },
223 { 0x29, 0x00 },
224 { 0x2a, 0x00 },
225 { 0x2b, 0x4e },
226 { 0x28, 0x10 },
227 { 0x29, 0x00 },
228 { 0x2a, 0x00 },
229 { 0x2b, 0x46 },
230 { 0x28, 0x11 },
231 { 0x29, 0x00 },
232 { 0x2a, 0x00 },
233 { 0x2b, 0x0f },
234 { 0x28, 0x12 },
235 { 0x29, 0x00 },
236 { 0x2a, 0x00 },
237 { 0x2b, 0x56 },
238 { 0x28, 0x13 },
239 { 0x29, 0x00 },
240 { 0x2a, 0x00 },
241 { 0x2b, 0x35 },
242 { 0x28, 0x14 },
243 { 0x29, 0x00 },
244 { 0x2a, 0x01 },
245 { 0x2b, 0xbe },
246 { 0x28, 0x15 },
247 { 0x29, 0x00 },
248 { 0x2a, 0x01 },
249 { 0x2b, 0x84 },
250 { 0x28, 0x16 },
251 { 0x29, 0x00 },
252 { 0x2a, 0x03 },
253 { 0x2b, 0xee },
254 { 0x28, 0x17 },
255 { 0x29, 0x00 },
256 { 0x2a, 0x00 },
257 { 0x2b, 0x98 },
258 { 0x28, 0x18 },
259 { 0x29, 0x00 },
260 { 0x2a, 0x00 },
261 { 0x2b, 0x9f },
262 { 0x28, 0x19 },
263 { 0x29, 0x00 },
264 { 0x2a, 0x07 },
265 { 0x2b, 0xb2 },
266 { 0x28, 0x1a },
267 { 0x29, 0x00 },
268 { 0x2a, 0x06 },
269 { 0x2b, 0xc2 },
270 { 0x28, 0x1b },
271 { 0x29, 0x00 },
272 { 0x2a, 0x07 },
273 { 0x2b, 0x4a },
274 { 0x28, 0x1c },
275 { 0x29, 0x00 },
276 { 0x2a, 0x01 },
277 { 0x2b, 0xbc },
278 { 0x28, 0x1d },
279 { 0x29, 0x00 },
280 { 0x2a, 0x04 },
281 { 0x2b, 0xba },
282 { 0x28, 0x1e },
283 { 0x29, 0x00 },
284 { 0x2a, 0x06 },
285 { 0x2b, 0x14 },
286 { 0x50, 0x1e },
287 { 0x51, 0x5d },
288 { 0x50, 0x22 },
289 { 0x51, 0x00 },
290 { 0x50, 0x23 },
291 { 0x51, 0xc8 },
292 { 0x50, 0x24 },
293 { 0x51, 0x00 },
294 { 0x50, 0x25 },
295 { 0x51, 0xf0 },
296 { 0x50, 0x26 },
297 { 0x51, 0x00 },
298 { 0x50, 0x27 },
299 { 0x51, 0xc3 },
300 { 0x50, 0x39 },
301 { 0x51, 0x02 },
302 { 0x50, 0xd5 },
303 { 0x51, 0x01 },
304 { 0xd0, 0x00 },
305};
306
307static struct regdata mb86a20s_reset_reception[] = {
308 { 0x70, 0xf0 },
309 { 0x70, 0xff },
310 { 0x08, 0x01 },
311 { 0x08, 0x00 },
312};
313
314static int mb86a20s_i2c_writereg(struct mb86a20s_state *state,
315 u8 i2c_addr, int reg, int data)
316{
317 u8 buf[] = { reg, data };
318 struct i2c_msg msg = {
319 .addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
320 };
321 int rc;
322
323 rc = i2c_transfer(state->i2c, &msg, 1);
324 if (rc != 1) {
325 printk("%s: writereg rcor(rc == %i, reg == 0x%02x,"
326 " data == 0x%02x)\n", __func__, rc, reg, data);
327 return rc;
328 }
329
330 return 0;
331}
332
333static int mb86a20s_i2c_writeregdata(struct mb86a20s_state *state,
334 u8 i2c_addr, struct regdata *rd, int size)
335{
336 int i, rc;
337
338 for (i = 0; i < size; i++) {
339 rc = mb86a20s_i2c_writereg(state, i2c_addr, rd[i].reg,
340 rd[i].data);
341 if (rc < 0)
342 return rc;
343 }
344 return 0;
345}
346
347static int mb86a20s_i2c_readreg(struct mb86a20s_state *state,
348 u8 i2c_addr, u8 reg)
349{
350 u8 val;
351 int rc;
352 struct i2c_msg msg[] = {
353 { .addr = i2c_addr, .flags = 0, .buf = &reg, .len = 1 },
354 { .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
355 };
356
357 rc = i2c_transfer(state->i2c, msg, 2);
358
359 if (rc != 2) {
360 rc("%s: reg=0x%x (rcor=%d)\n", __func__, reg, rc);
361 return rc;
362 }
363
364 return val;
365}
366
367#define mb86a20s_readreg(state, reg) \
368 mb86a20s_i2c_readreg(state, state->config->demod_address, reg)
369#define mb86a20s_writereg(state, reg, val) \
370 mb86a20s_i2c_writereg(state, state->config->demod_address, reg, val)
371#define mb86a20s_writeregdata(state, regdata) \
372 mb86a20s_i2c_writeregdata(state, state->config->demod_address, \
373 regdata, ARRAY_SIZE(regdata))
374
375static int mb86a20s_initfe(struct dvb_frontend *fe)
376{
377 struct mb86a20s_state *state = fe->demodulator_priv;
378 int rc;
379
380 dprintk("\n");
381
382 /* Initialize the frontend */
383 rc = mb86a20s_writeregdata(state, mb86a20s_init);
384 if (rc < 0)
385 return rc;
386
387 return 0;
388}
389
390static int mb86a20s_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
391{
392 struct mb86a20s_state *state = fe->demodulator_priv;
393 unsigned rf_max, rf_min, rf;
394 u8 val;
395
396 dprintk("\n");
397
398 /* Does a binary search to get RF strength */
399 rf_max = 0xfff;
400 rf_min = 0;
401 do {
402 rf = (rf_max + rf_min) / 2;
403 mb86a20s_writereg(state, 0x04, 0x1f);
404 mb86a20s_writereg(state, 0x05, rf >> 8);
405 mb86a20s_writereg(state, 0x04, 0x20);
406 mb86a20s_writereg(state, 0x04, rf);
407
408 val = mb86a20s_readreg(state, 0x02);
409 if (val & 0x08)
410 rf_min = (rf_max + rf_min) / 2;
411 else
412 rf_max = (rf_max + rf_min) / 2;
413 if (rf_max - rf_min < 4) {
414 *strength = (((rf_max + rf_min) / 2) * 65535) / 4095;
415 break;
416 }
417 } while (1);
418
419 dprintk("signal strength = %d\n", *strength);
420
421 return 0;
422}
423
424static int mb86a20s_read_status(struct dvb_frontend *fe, fe_status_t *status)
425{
426 struct mb86a20s_state *state = fe->demodulator_priv;
427 u8 val;
428
429 dprintk("\n");
430 *status = 0;
431
432 val = mb86a20s_readreg(state, 0x0a) & 0xf;
433
434 if (val >= 2)
435 *status |= FE_HAS_SIGNAL;
436
437 if (val >= 4)
438 *status |= FE_HAS_CARRIER;
439
440 if (val >= 5)
441 *status |= FE_HAS_VITERBI;
442
443 if (val >= 7)
444 *status |= FE_HAS_SYNC;
445
446 if (val >= 8) /* Maybe 9? */
447 *status |= FE_HAS_LOCK;
448
449 dprintk("val = %d, status = 0x%02x\n", val, *status);
450
451 return 0;
452}
453
454static int mb86a20s_set_frontend(struct dvb_frontend *fe,
455 struct dvb_frontend_parameters *p)
456{
457 struct mb86a20s_state *state = fe->demodulator_priv;
458 int rc;
459
460 dprintk("\n");
461
462 fe->ops.tuner_ops.set_params(fe, p);
463 rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception);
464
465 return rc;
466}
467
468static int mb86a20s_get_frontend(struct dvb_frontend *fe,
469 struct dvb_frontend_parameters *p)
470{
471
472 /* FIXME: For now, it does nothing */
473
474 fe->dtv_property_cache.bandwidth_hz = 6000000;
475 fe->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_AUTO;
476 fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_AUTO;
477 fe->dtv_property_cache.isdbt_partial_reception = 0;
478
479 return 0;
480}
481
482static int mb86a20s_tune(struct dvb_frontend *fe,
483 struct dvb_frontend_parameters *params,
484 unsigned int mode_flags,
485 unsigned int *delay,
486 fe_status_t *status)
487{
488 int rc = 0;
489
490 dprintk("\n");
491
492 if (params != NULL)
493 rc = mb86a20s_set_frontend(fe, params);
494
495 if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
496 mb86a20s_read_status(fe, status);
497
498 return rc;
499}
500
501static void mb86a20s_release(struct dvb_frontend *fe)
502{
503 struct mb86a20s_state *state = fe->demodulator_priv;
504
505 dprintk("\n");
506
507 kfree(state);
508}
509
510static struct dvb_frontend_ops mb86a20s_ops;
511
512struct dvb_frontend *mb86a20s_attach(const struct mb86a20s_config *config,
513 struct i2c_adapter *i2c)
514{
515 u8 rev;
516
517 /* allocate memory for the internal state */
518 struct mb86a20s_state *state =
519 kzalloc(sizeof(struct mb86a20s_state), GFP_KERNEL);
520
521 dprintk("\n");
522 if (state == NULL) {
523 rc("Unable to kzalloc\n");
524 goto error;
525 }
526
527 /* setup the state */
528 state->config = config;
529 state->i2c = i2c;
530
531 /* create dvb_frontend */
532 memcpy(&state->frontend.ops, &mb86a20s_ops,
533 sizeof(struct dvb_frontend_ops));
534 state->frontend.demodulator_priv = state;
535
536 /* Check if it is a mb86a20s frontend */
537 rev = mb86a20s_readreg(state, 0);
538
539 if (rev == 0x13) {
540 printk(KERN_INFO "Detected a Fujitsu mb86a20s frontend\n");
541 } else {
542 printk(KERN_ERR "Frontend revision %d is unknown - aborting.\n",
543 rev);
544 goto error;
545 }
546
547 return &state->frontend;
548
549error:
550 kfree(state);
551 return NULL;
552}
553EXPORT_SYMBOL(mb86a20s_attach);
554
555static struct dvb_frontend_ops mb86a20s_ops = {
556 /* Use dib8000 values per default */
557 .info = {
558 .name = "Fujitsu mb86A20s",
559 .type = FE_OFDM,
560 .caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER |
561 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
562 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
563 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
564 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_QAM_AUTO |
565 FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_HIERARCHY_AUTO,
566 /* Actually, those values depend on the used tuner */
567 .frequency_min = 45000000,
568 .frequency_max = 864000000,
569 .frequency_stepsize = 62500,
570 },
571
572 .release = mb86a20s_release,
573
574 .init = mb86a20s_initfe,
575 .set_frontend = mb86a20s_set_frontend,
576 .get_frontend = mb86a20s_get_frontend,
577 .read_status = mb86a20s_read_status,
578 .read_signal_strength = mb86a20s_read_signal_strength,
579 .tune = mb86a20s_tune,
580};
581
582MODULE_DESCRIPTION("DVB Frontend module for Fujitsu mb86A20s hardware");
583MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
584MODULE_LICENSE("GPL");