diff options
author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-12-22 17:06:20 -0500 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-12-31 06:15:34 -0500 |
commit | c1f814f49904ae5b275407f71aefd3a31c774098 (patch) | |
tree | d6cb68dfbf989b34cbdb071a13792436cc771fa2 /drivers/media/dvb/frontends/dib3000mc.c | |
parent | a73efc05b7fc7686b6333c48732a0ba5777e3726 (diff) |
[media] dibx000: convert set_fontend to use DVBv5 parameters
Instead of using dvb_frontend_parameters struct, that were
designed for a subset of the supported standards, use the DVBv5
cache information.
Also, fill the supported delivery systems at dvb_frontend_ops
struct.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb/frontends/dib3000mc.c')
-rw-r--r-- | drivers/media/dvb/frontends/dib3000mc.c | 131 |
1 files changed, 70 insertions, 61 deletions
diff --git a/drivers/media/dvb/frontends/dib3000mc.c b/drivers/media/dvb/frontends/dib3000mc.c index 7ec0e028984b..7472429e47ae 100644 --- a/drivers/media/dvb/frontends/dib3000mc.c +++ b/drivers/media/dvb/frontends/dib3000mc.c | |||
@@ -438,11 +438,14 @@ static void dib3000mc_set_adp_cfg(struct dib3000mc_state *state, s16 qam) | |||
438 | dib3000mc_write_word(state, reg, cfg[reg - 129]); | 438 | dib3000mc_write_word(state, reg, cfg[reg - 129]); |
439 | } | 439 | } |
440 | 440 | ||
441 | static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_frontend_parameters *ch, u16 seq) | 441 | static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, |
442 | struct dtv_frontend_properties *ch, u16 seq) | ||
442 | { | 443 | { |
443 | u16 value; | 444 | u16 value; |
444 | dib3000mc_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)); | 445 | u32 bw = BANDWIDTH_TO_KHZ(ch->bandwidth_hz); |
445 | dib3000mc_set_timing(state, ch->u.ofdm.transmission_mode, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth), 0); | 446 | |
447 | dib3000mc_set_bandwidth(state, bw); | ||
448 | dib3000mc_set_timing(state, ch->transmission_mode, bw, 0); | ||
446 | 449 | ||
447 | // if (boost) | 450 | // if (boost) |
448 | // dib3000mc_write_word(state, 100, (11 << 6) + 6); | 451 | // dib3000mc_write_word(state, 100, (11 << 6) + 6); |
@@ -471,22 +474,22 @@ static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_ | |||
471 | dib3000mc_write_word(state, 97,0); | 474 | dib3000mc_write_word(state, 97,0); |
472 | dib3000mc_write_word(state, 98,0); | 475 | dib3000mc_write_word(state, 98,0); |
473 | 476 | ||
474 | dib3000mc_set_impulse_noise(state, 0, ch->u.ofdm.transmission_mode); | 477 | dib3000mc_set_impulse_noise(state, 0, ch->transmission_mode); |
475 | 478 | ||
476 | value = 0; | 479 | value = 0; |
477 | switch (ch->u.ofdm.transmission_mode) { | 480 | switch (ch->transmission_mode) { |
478 | case TRANSMISSION_MODE_2K: value |= (0 << 7); break; | 481 | case TRANSMISSION_MODE_2K: value |= (0 << 7); break; |
479 | default: | 482 | default: |
480 | case TRANSMISSION_MODE_8K: value |= (1 << 7); break; | 483 | case TRANSMISSION_MODE_8K: value |= (1 << 7); break; |
481 | } | 484 | } |
482 | switch (ch->u.ofdm.guard_interval) { | 485 | switch (ch->guard_interval) { |
483 | case GUARD_INTERVAL_1_32: value |= (0 << 5); break; | 486 | case GUARD_INTERVAL_1_32: value |= (0 << 5); break; |
484 | case GUARD_INTERVAL_1_16: value |= (1 << 5); break; | 487 | case GUARD_INTERVAL_1_16: value |= (1 << 5); break; |
485 | case GUARD_INTERVAL_1_4: value |= (3 << 5); break; | 488 | case GUARD_INTERVAL_1_4: value |= (3 << 5); break; |
486 | default: | 489 | default: |
487 | case GUARD_INTERVAL_1_8: value |= (2 << 5); break; | 490 | case GUARD_INTERVAL_1_8: value |= (2 << 5); break; |
488 | } | 491 | } |
489 | switch (ch->u.ofdm.constellation) { | 492 | switch (ch->modulation) { |
490 | case QPSK: value |= (0 << 3); break; | 493 | case QPSK: value |= (0 << 3); break; |
491 | case QAM_16: value |= (1 << 3); break; | 494 | case QAM_16: value |= (1 << 3); break; |
492 | default: | 495 | default: |
@@ -502,11 +505,11 @@ static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_ | |||
502 | dib3000mc_write_word(state, 5, (1 << 8) | ((seq & 0xf) << 4)); | 505 | dib3000mc_write_word(state, 5, (1 << 8) | ((seq & 0xf) << 4)); |
503 | 506 | ||
504 | value = 0; | 507 | value = 0; |
505 | if (ch->u.ofdm.hierarchy_information == 1) | 508 | if (ch->hierarchy == 1) |
506 | value |= (1 << 4); | 509 | value |= (1 << 4); |
507 | if (1 == 1) | 510 | if (1 == 1) |
508 | value |= 1; | 511 | value |= 1; |
509 | switch ((ch->u.ofdm.hierarchy_information == 0 || 1 == 1) ? ch->u.ofdm.code_rate_HP : ch->u.ofdm.code_rate_LP) { | 512 | switch ((ch->hierarchy == 0 || 1 == 1) ? ch->code_rate_HP : ch->code_rate_LP) { |
510 | case FEC_2_3: value |= (2 << 1); break; | 513 | case FEC_2_3: value |= (2 << 1); break; |
511 | case FEC_3_4: value |= (3 << 1); break; | 514 | case FEC_3_4: value |= (3 << 1); break; |
512 | case FEC_5_6: value |= (5 << 1); break; | 515 | case FEC_5_6: value |= (5 << 1); break; |
@@ -517,12 +520,12 @@ static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_ | |||
517 | dib3000mc_write_word(state, 181, value); | 520 | dib3000mc_write_word(state, 181, value); |
518 | 521 | ||
519 | // diversity synchro delay add 50% SFN margin | 522 | // diversity synchro delay add 50% SFN margin |
520 | switch (ch->u.ofdm.transmission_mode) { | 523 | switch (ch->transmission_mode) { |
521 | case TRANSMISSION_MODE_8K: value = 256; break; | 524 | case TRANSMISSION_MODE_8K: value = 256; break; |
522 | case TRANSMISSION_MODE_2K: | 525 | case TRANSMISSION_MODE_2K: |
523 | default: value = 64; break; | 526 | default: value = 64; break; |
524 | } | 527 | } |
525 | switch (ch->u.ofdm.guard_interval) { | 528 | switch (ch->guard_interval) { |
526 | case GUARD_INTERVAL_1_16: value *= 2; break; | 529 | case GUARD_INTERVAL_1_16: value *= 2; break; |
527 | case GUARD_INTERVAL_1_8: value *= 4; break; | 530 | case GUARD_INTERVAL_1_8: value *= 4; break; |
528 | case GUARD_INTERVAL_1_4: value *= 8; break; | 531 | case GUARD_INTERVAL_1_4: value *= 8; break; |
@@ -540,27 +543,28 @@ static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_ | |||
540 | 543 | ||
541 | msleep(30); | 544 | msleep(30); |
542 | 545 | ||
543 | dib3000mc_set_impulse_noise(state, state->cfg->impulse_noise_mode, ch->u.ofdm.transmission_mode); | 546 | dib3000mc_set_impulse_noise(state, state->cfg->impulse_noise_mode, ch->transmission_mode); |
544 | } | 547 | } |
545 | 548 | ||
546 | static int dib3000mc_autosearch_start(struct dvb_frontend *demod, struct dvb_frontend_parameters *chan) | 549 | static int dib3000mc_autosearch_start(struct dvb_frontend *demod) |
547 | { | 550 | { |
551 | struct dtv_frontend_properties *chan = &demod->dtv_property_cache; | ||
548 | struct dib3000mc_state *state = demod->demodulator_priv; | 552 | struct dib3000mc_state *state = demod->demodulator_priv; |
549 | u16 reg; | 553 | u16 reg; |
550 | // u32 val; | 554 | // u32 val; |
551 | struct dvb_frontend_parameters schan; | 555 | struct dtv_frontend_properties schan; |
552 | 556 | ||
553 | schan = *chan; | 557 | schan = *chan; |
554 | 558 | ||
555 | /* TODO what is that ? */ | 559 | /* TODO what is that ? */ |
556 | 560 | ||
557 | /* a channel for autosearch */ | 561 | /* a channel for autosearch */ |
558 | schan.u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; | 562 | schan.transmission_mode = TRANSMISSION_MODE_8K; |
559 | schan.u.ofdm.guard_interval = GUARD_INTERVAL_1_32; | 563 | schan.guard_interval = GUARD_INTERVAL_1_32; |
560 | schan.u.ofdm.constellation = QAM_64; | 564 | schan.modulation = QAM_64; |
561 | schan.u.ofdm.code_rate_HP = FEC_2_3; | 565 | schan.code_rate_HP = FEC_2_3; |
562 | schan.u.ofdm.code_rate_LP = FEC_2_3; | 566 | schan.code_rate_LP = FEC_2_3; |
563 | schan.u.ofdm.hierarchy_information = 0; | 567 | schan.hierarchy = 0; |
564 | 568 | ||
565 | dib3000mc_set_channel_cfg(state, &schan, 11); | 569 | dib3000mc_set_channel_cfg(state, &schan, 11); |
566 | 570 | ||
@@ -586,8 +590,9 @@ static int dib3000mc_autosearch_is_irq(struct dvb_frontend *demod) | |||
586 | return 0; // still pending | 590 | return 0; // still pending |
587 | } | 591 | } |
588 | 592 | ||
589 | static int dib3000mc_tune(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) | 593 | static int dib3000mc_tune(struct dvb_frontend *demod) |
590 | { | 594 | { |
595 | struct dtv_frontend_properties *ch = &demod->dtv_property_cache; | ||
591 | struct dib3000mc_state *state = demod->demodulator_priv; | 596 | struct dib3000mc_state *state = demod->demodulator_priv; |
592 | 597 | ||
593 | // ** configure demod ** | 598 | // ** configure demod ** |
@@ -603,8 +608,8 @@ static int dib3000mc_tune(struct dvb_frontend *demod, struct dvb_frontend_parame | |||
603 | dib3000mc_write_word(state, 108, 0x0000); // P_pha3_force_pha_shift | 608 | dib3000mc_write_word(state, 108, 0x0000); // P_pha3_force_pha_shift |
604 | } | 609 | } |
605 | 610 | ||
606 | dib3000mc_set_adp_cfg(state, (u8)ch->u.ofdm.constellation); | 611 | dib3000mc_set_adp_cfg(state, (u8)ch->modulation); |
607 | if (ch->u.ofdm.transmission_mode == TRANSMISSION_MODE_8K) { | 612 | if (ch->transmission_mode == TRANSMISSION_MODE_8K) { |
608 | dib3000mc_write_word(state, 26, 38528); | 613 | dib3000mc_write_word(state, 26, 38528); |
609 | dib3000mc_write_word(state, 33, 8); | 614 | dib3000mc_write_word(state, 33, 8); |
610 | } else { | 615 | } else { |
@@ -613,7 +618,8 @@ static int dib3000mc_tune(struct dvb_frontend *demod, struct dvb_frontend_parame | |||
613 | } | 618 | } |
614 | 619 | ||
615 | if (dib3000mc_read_word(state, 509) & 0x80) | 620 | if (dib3000mc_read_word(state, 509) & 0x80) |
616 | dib3000mc_set_timing(state, ch->u.ofdm.transmission_mode, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth), 1); | 621 | dib3000mc_set_timing(state, ch->transmission_mode, |
622 | BANDWIDTH_TO_KHZ(ch->bandwidth_hz), 1); | ||
617 | 623 | ||
618 | return 0; | 624 | return 0; |
619 | } | 625 | } |
@@ -627,70 +633,70 @@ struct i2c_adapter * dib3000mc_get_tuner_i2c_master(struct dvb_frontend *demod, | |||
627 | EXPORT_SYMBOL(dib3000mc_get_tuner_i2c_master); | 633 | EXPORT_SYMBOL(dib3000mc_get_tuner_i2c_master); |
628 | 634 | ||
629 | static int dib3000mc_get_frontend(struct dvb_frontend* fe, | 635 | static int dib3000mc_get_frontend(struct dvb_frontend* fe, |
630 | struct dvb_frontend_parameters *fep) | 636 | struct dtv_frontend_properties *fep) |
631 | { | 637 | { |
632 | struct dib3000mc_state *state = fe->demodulator_priv; | 638 | struct dib3000mc_state *state = fe->demodulator_priv; |
633 | u16 tps = dib3000mc_read_word(state,458); | 639 | u16 tps = dib3000mc_read_word(state,458); |
634 | 640 | ||
635 | fep->inversion = INVERSION_AUTO; | 641 | fep->inversion = INVERSION_AUTO; |
636 | 642 | ||
637 | fep->u.ofdm.bandwidth = state->current_bandwidth; | 643 | fep->bandwidth_hz = state->current_bandwidth; |
638 | 644 | ||
639 | switch ((tps >> 8) & 0x1) { | 645 | switch ((tps >> 8) & 0x1) { |
640 | case 0: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K; break; | 646 | case 0: fep->transmission_mode = TRANSMISSION_MODE_2K; break; |
641 | case 1: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; break; | 647 | case 1: fep->transmission_mode = TRANSMISSION_MODE_8K; break; |
642 | } | 648 | } |
643 | 649 | ||
644 | switch (tps & 0x3) { | 650 | switch (tps & 0x3) { |
645 | case 0: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_32; break; | 651 | case 0: fep->guard_interval = GUARD_INTERVAL_1_32; break; |
646 | case 1: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_16; break; | 652 | case 1: fep->guard_interval = GUARD_INTERVAL_1_16; break; |
647 | case 2: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_8; break; | 653 | case 2: fep->guard_interval = GUARD_INTERVAL_1_8; break; |
648 | case 3: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_4; break; | 654 | case 3: fep->guard_interval = GUARD_INTERVAL_1_4; break; |
649 | } | 655 | } |
650 | 656 | ||
651 | switch ((tps >> 13) & 0x3) { | 657 | switch ((tps >> 13) & 0x3) { |
652 | case 0: fep->u.ofdm.constellation = QPSK; break; | 658 | case 0: fep->modulation = QPSK; break; |
653 | case 1: fep->u.ofdm.constellation = QAM_16; break; | 659 | case 1: fep->modulation = QAM_16; break; |
654 | case 2: | 660 | case 2: |
655 | default: fep->u.ofdm.constellation = QAM_64; break; | 661 | default: fep->modulation = QAM_64; break; |
656 | } | 662 | } |
657 | 663 | ||
658 | /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */ | 664 | /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */ |
659 | /* (tps >> 12) & 0x1 == hrch is used, (tps >> 9) & 0x7 == alpha */ | 665 | /* (tps >> 12) & 0x1 == hrch is used, (tps >> 9) & 0x7 == alpha */ |
660 | 666 | ||
661 | fep->u.ofdm.hierarchy_information = HIERARCHY_NONE; | 667 | fep->hierarchy = HIERARCHY_NONE; |
662 | switch ((tps >> 5) & 0x7) { | 668 | switch ((tps >> 5) & 0x7) { |
663 | case 1: fep->u.ofdm.code_rate_HP = FEC_1_2; break; | 669 | case 1: fep->code_rate_HP = FEC_1_2; break; |
664 | case 2: fep->u.ofdm.code_rate_HP = FEC_2_3; break; | 670 | case 2: fep->code_rate_HP = FEC_2_3; break; |
665 | case 3: fep->u.ofdm.code_rate_HP = FEC_3_4; break; | 671 | case 3: fep->code_rate_HP = FEC_3_4; break; |
666 | case 5: fep->u.ofdm.code_rate_HP = FEC_5_6; break; | 672 | case 5: fep->code_rate_HP = FEC_5_6; break; |
667 | case 7: | 673 | case 7: |
668 | default: fep->u.ofdm.code_rate_HP = FEC_7_8; break; | 674 | default: fep->code_rate_HP = FEC_7_8; break; |
669 | 675 | ||
670 | } | 676 | } |
671 | 677 | ||
672 | switch ((tps >> 2) & 0x7) { | 678 | switch ((tps >> 2) & 0x7) { |
673 | case 1: fep->u.ofdm.code_rate_LP = FEC_1_2; break; | 679 | case 1: fep->code_rate_LP = FEC_1_2; break; |
674 | case 2: fep->u.ofdm.code_rate_LP = FEC_2_3; break; | 680 | case 2: fep->code_rate_LP = FEC_2_3; break; |
675 | case 3: fep->u.ofdm.code_rate_LP = FEC_3_4; break; | 681 | case 3: fep->code_rate_LP = FEC_3_4; break; |
676 | case 5: fep->u.ofdm.code_rate_LP = FEC_5_6; break; | 682 | case 5: fep->code_rate_LP = FEC_5_6; break; |
677 | case 7: | 683 | case 7: |
678 | default: fep->u.ofdm.code_rate_LP = FEC_7_8; break; | 684 | default: fep->code_rate_LP = FEC_7_8; break; |
679 | } | 685 | } |
680 | 686 | ||
681 | return 0; | 687 | return 0; |
682 | } | 688 | } |
683 | 689 | ||
684 | static int dib3000mc_set_frontend(struct dvb_frontend* fe, | 690 | static int dib3000mc_set_frontend(struct dvb_frontend *fe) |
685 | struct dvb_frontend_parameters *fep) | ||
686 | { | 691 | { |
692 | struct dtv_frontend_properties *fep = &fe->dtv_property_cache, tmp; | ||
687 | struct dib3000mc_state *state = fe->demodulator_priv; | 693 | struct dib3000mc_state *state = fe->demodulator_priv; |
688 | int ret; | 694 | int ret; |
689 | 695 | ||
690 | dib3000mc_set_output_mode(state, OUTMODE_HIGH_Z); | 696 | dib3000mc_set_output_mode(state, OUTMODE_HIGH_Z); |
691 | 697 | ||
692 | state->current_bandwidth = fep->u.ofdm.bandwidth; | 698 | state->current_bandwidth = fep->bandwidth_hz; |
693 | dib3000mc_set_bandwidth(state, BANDWIDTH_TO_KHZ(fep->u.ofdm.bandwidth)); | 699 | dib3000mc_set_bandwidth(state, BANDWIDTH_TO_KHZ(fep->bandwidth_hz)); |
694 | 700 | ||
695 | /* maybe the parameter has been changed */ | 701 | /* maybe the parameter has been changed */ |
696 | state->sfn_workaround_active = buggy_sfn_workaround; | 702 | state->sfn_workaround_active = buggy_sfn_workaround; |
@@ -700,13 +706,15 @@ static int dib3000mc_set_frontend(struct dvb_frontend* fe, | |||
700 | msleep(100); | 706 | msleep(100); |
701 | } | 707 | } |
702 | 708 | ||
703 | if (fep->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO || | 709 | if (fep->transmission_mode == TRANSMISSION_MODE_AUTO || |
704 | fep->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO || | 710 | fep->guard_interval == GUARD_INTERVAL_AUTO || |
705 | fep->u.ofdm.constellation == QAM_AUTO || | 711 | fep->modulation == QAM_AUTO || |
706 | fep->u.ofdm.code_rate_HP == FEC_AUTO) { | 712 | fep->code_rate_HP == FEC_AUTO) { |
707 | int i = 1000, found; | 713 | int i = 1000, found; |
708 | 714 | ||
709 | dib3000mc_autosearch_start(fe, fep); | 715 | tmp = *fep; |
716 | |||
717 | dib3000mc_autosearch_start(fe); | ||
710 | do { | 718 | do { |
711 | msleep(1); | 719 | msleep(1); |
712 | found = dib3000mc_autosearch_is_irq(fe); | 720 | found = dib3000mc_autosearch_is_irq(fe); |
@@ -716,14 +724,14 @@ static int dib3000mc_set_frontend(struct dvb_frontend* fe, | |||
716 | if (found == 0 || found == 1) | 724 | if (found == 0 || found == 1) |
717 | return 0; // no channel found | 725 | return 0; // no channel found |
718 | 726 | ||
719 | dib3000mc_get_frontend(fe, fep); | 727 | dib3000mc_get_frontend(fe, &tmp); |
720 | } | 728 | } |
721 | 729 | ||
722 | ret = dib3000mc_tune(fe, fep); | 730 | ret = dib3000mc_tune(fe); |
723 | 731 | ||
724 | /* make this a config parameter */ | 732 | /* make this a config parameter */ |
725 | dib3000mc_set_output_mode(state, OUTMODE_MPEG2_FIFO); | 733 | dib3000mc_set_output_mode(state, OUTMODE_MPEG2_FIFO); |
726 | return ret; | 734 | return ret; |
727 | } | 735 | } |
728 | 736 | ||
729 | static int dib3000mc_read_status(struct dvb_frontend *fe, fe_status_t *stat) | 737 | static int dib3000mc_read_status(struct dvb_frontend *fe, fe_status_t *stat) |
@@ -897,6 +905,7 @@ error: | |||
897 | EXPORT_SYMBOL(dib3000mc_attach); | 905 | EXPORT_SYMBOL(dib3000mc_attach); |
898 | 906 | ||
899 | static struct dvb_frontend_ops dib3000mc_ops = { | 907 | static struct dvb_frontend_ops dib3000mc_ops = { |
908 | .delsys = { SYS_DVBT }, | ||
900 | .info = { | 909 | .info = { |
901 | .name = "DiBcom 3000MC/P", | 910 | .name = "DiBcom 3000MC/P", |
902 | .type = FE_OFDM, | 911 | .type = FE_OFDM, |
@@ -918,9 +927,9 @@ static struct dvb_frontend_ops dib3000mc_ops = { | |||
918 | .init = dib3000mc_init, | 927 | .init = dib3000mc_init, |
919 | .sleep = dib3000mc_sleep, | 928 | .sleep = dib3000mc_sleep, |
920 | 929 | ||
921 | .set_frontend_legacy = dib3000mc_set_frontend, | 930 | .set_frontend = dib3000mc_set_frontend, |
922 | .get_tune_settings = dib3000mc_fe_get_tune_settings, | 931 | .get_tune_settings = dib3000mc_fe_get_tune_settings, |
923 | .get_frontend_legacy = dib3000mc_get_frontend, | 932 | .get_frontend = dib3000mc_get_frontend, |
924 | 933 | ||
925 | .read_status = dib3000mc_read_status, | 934 | .read_status = dib3000mc_read_status, |
926 | .read_ber = dib3000mc_read_ber, | 935 | .read_ber = dib3000mc_read_ber, |