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authorIgor M. Liplianin <liplianin@me.by>2010-01-17 10:23:04 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2010-02-26 13:10:42 -0500
commit5eb3291fe84b30a8e2fda31fd5fa44c40575f283 (patch)
tree9929cd4aeb10b66b3de4c0f29062dba1958e0d6a /drivers/media/dvb/dm1105/dm1105.c
parent34d2f9bf189c36ef8642cf6b64e80dfb756d888f (diff)
V4L/DVB: dm1105: use macro for read/write registers
This is for better readability and smaller size of code lines. Also it is for future improvements like GPIO handling. Signed-off-by: Igor M. Liplianin <liplianin@me.by> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb/dm1105/dm1105.c')
-rw-r--r--drivers/media/dvb/dm1105/dm1105.c95
1 files changed, 55 insertions, 40 deletions
diff --git a/drivers/media/dvb/dm1105/dm1105.c b/drivers/media/dvb/dm1105/dm1105.c
index abc26adec2a8..383cca378b8c 100644
--- a/drivers/media/dvb/dm1105/dm1105.c
+++ b/drivers/media/dvb/dm1105/dm1105.c
@@ -311,6 +311,22 @@ struct dm1105_dev {
311 311
312#define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg])) 312#define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg]))
313 313
314#define dm_readb(reg) inb(dm_io_mem(reg))
315#define dm_writeb(reg, value) outb((value), (dm_io_mem(reg)))
316
317#define dm_readw(reg) inw(dm_io_mem(reg))
318#define dm_writew(reg, value) outw((value), (dm_io_mem(reg)))
319
320#define dm_readl(reg) inl(dm_io_mem(reg))
321#define dm_writel(reg, value) outl((value), (dm_io_mem(reg)))
322
323#define dm_andorl(reg, mask, value) \
324 outl((inl(dm_io_mem(reg)) & ~(mask)) |\
325 ((value) & (mask)), (dm_io_mem(reg)))
326
327#define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit))
328#define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0)
329
314static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap, 330static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
315 struct i2c_msg *msgs, int num) 331 struct i2c_msg *msgs, int num)
316{ 332{
@@ -321,19 +337,19 @@ static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
321 337
322 dev = i2c_adap->algo_data; 338 dev = i2c_adap->algo_data;
323 for (i = 0; i < num; i++) { 339 for (i = 0; i < num; i++) {
324 outb(0x00, dm_io_mem(DM1105_I2CCTR)); 340 dm_writeb(DM1105_I2CCTR, 0x00);
325 if (msgs[i].flags & I2C_M_RD) { 341 if (msgs[i].flags & I2C_M_RD) {
326 /* read bytes */ 342 /* read bytes */
327 addr = msgs[i].addr << 1; 343 addr = msgs[i].addr << 1;
328 addr |= 1; 344 addr |= 1;
329 outb(addr, dm_io_mem(DM1105_I2CDAT)); 345 dm_writeb(DM1105_I2CDAT, addr);
330 for (byte = 0; byte < msgs[i].len; byte++) 346 for (byte = 0; byte < msgs[i].len; byte++)
331 outb(0, dm_io_mem(DM1105_I2CDAT + byte + 1)); 347 dm_writeb(DM1105_I2CDAT + byte + 1, 0);
332 348
333 outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR)); 349 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
334 for (j = 0; j < 55; j++) { 350 for (j = 0; j < 55; j++) {
335 mdelay(10); 351 mdelay(10);
336 status = inb(dm_io_mem(DM1105_I2CSTS)); 352 status = dm_readb(DM1105_I2CSTS);
337 if ((status & 0xc0) == 0x40) 353 if ((status & 0xc0) == 0x40)
338 break; 354 break;
339 } 355 }
@@ -341,7 +357,7 @@ static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
341 return -1; 357 return -1;
342 358
343 for (byte = 0; byte < msgs[i].len; byte++) { 359 for (byte = 0; byte < msgs[i].len; byte++) {
344 rc = inb(dm_io_mem(DM1105_I2CDAT + byte + 1)); 360 rc = dm_readb(DM1105_I2CDAT + byte + 1);
345 if (rc < 0) 361 if (rc < 0)
346 goto err; 362 goto err;
347 msgs[i].buf[byte] = rc; 363 msgs[i].buf[byte] = rc;
@@ -352,16 +368,16 @@ static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
352 len = msgs[i].len - 1; 368 len = msgs[i].len - 1;
353 k = 1; 369 k = 1;
354 do { 370 do {
355 outb(msgs[i].addr << 1, dm_io_mem(DM1105_I2CDAT)); 371 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
356 outb(0xf7, dm_io_mem(DM1105_I2CDAT + 1)); 372 dm_writeb(DM1105_I2CDAT + 1, 0xf7);
357 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) { 373 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
358 data = msgs[i].buf[k + byte]; 374 data = msgs[i].buf[k + byte];
359 outb(data, dm_io_mem(DM1105_I2CDAT + byte + 2)); 375 dm_writeb(DM1105_I2CDAT + byte + 2, data);
360 } 376 }
361 outb(0x82 + (len > 48 ? 48 : len), dm_io_mem(DM1105_I2CCTR)); 377 dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
362 for (j = 0; j < 25; j++) { 378 for (j = 0; j < 25; j++) {
363 mdelay(10); 379 mdelay(10);
364 status = inb(dm_io_mem(DM1105_I2CSTS)); 380 status = dm_readb(DM1105_I2CSTS);
365 if ((status & 0xc0) == 0x40) 381 if ((status & 0xc0) == 0x40)
366 break; 382 break;
367 } 383 }
@@ -374,15 +390,15 @@ static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
374 } while (len > 0); 390 } while (len > 0);
375 } else { 391 } else {
376 /* write bytes */ 392 /* write bytes */
377 outb(msgs[i].addr<<1, dm_io_mem(DM1105_I2CDAT)); 393 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
378 for (byte = 0; byte < msgs[i].len; byte++) { 394 for (byte = 0; byte < msgs[i].len; byte++) {
379 data = msgs[i].buf[byte]; 395 data = msgs[i].buf[byte];
380 outb(data, dm_io_mem(DM1105_I2CDAT + byte + 1)); 396 dm_writeb(DM1105_I2CDAT + byte + 1, data);
381 } 397 }
382 outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR)); 398 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
383 for (j = 0; j < 25; j++) { 399 for (j = 0; j < 25; j++) {
384 mdelay(10); 400 mdelay(10);
385 status = inb(dm_io_mem(DM1105_I2CSTS)); 401 status = dm_readb(DM1105_I2CSTS);
386 if ((status & 0xc0) == 0x40) 402 if ((status & 0xc0) == 0x40)
387 break; 403 break;
388 } 404 }
@@ -437,20 +453,20 @@ static int dm1105_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
437 lnb_18v = DM1105_LNB_18V; 453 lnb_18v = DM1105_LNB_18V;
438 } 454 }
439 455
440 outl(lnb_mask, dm_io_mem(DM1105_GPIOCTR)); 456 dm_writel(DM1105_GPIOCTR, lnb_mask);
441 if (voltage == SEC_VOLTAGE_18) 457 if (voltage == SEC_VOLTAGE_18)
442 outl(lnb_18v , dm_io_mem(DM1105_GPIOVAL)); 458 dm_writel(DM1105_GPIOVAL, lnb_18v);
443 else if (voltage == SEC_VOLTAGE_13) 459 else if (voltage == SEC_VOLTAGE_13)
444 outl(lnb_13v, dm_io_mem(DM1105_GPIOVAL)); 460 dm_writel(DM1105_GPIOVAL, lnb_13v);
445 else 461 else
446 outl(lnb_off, dm_io_mem(DM1105_GPIOVAL)); 462 dm_writel(DM1105_GPIOVAL, lnb_off);
447 463
448 return 0; 464 return 0;
449} 465}
450 466
451static void dm1105_set_dma_addr(struct dm1105_dev *dev) 467static void dm1105_set_dma_addr(struct dm1105_dev *dev)
452{ 468{
453 outl(cpu_to_le32(dev->dma_addr), dm_io_mem(DM1105_STADR)); 469 dm_writel(DM1105_STADR, cpu_to_le32(dev->dma_addr));
454} 470}
455 471
456static int __devinit dm1105_dma_map(struct dm1105_dev *dev) 472static int __devinit dm1105_dma_map(struct dm1105_dev *dev)
@@ -472,14 +488,14 @@ static void dm1105_dma_unmap(struct dm1105_dev *dev)
472 488
473static void dm1105_enable_irqs(struct dm1105_dev *dev) 489static void dm1105_enable_irqs(struct dm1105_dev *dev)
474{ 490{
475 outb(INTMAK_ALLMASK, dm_io_mem(DM1105_INTMAK)); 491 dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
476 outb(1, dm_io_mem(DM1105_CR)); 492 dm_writeb(DM1105_CR, 1);
477} 493}
478 494
479static void dm1105_disable_irqs(struct dm1105_dev *dev) 495static void dm1105_disable_irqs(struct dm1105_dev *dev)
480{ 496{
481 outb(INTMAK_IRM, dm_io_mem(DM1105_INTMAK)); 497 dm_writeb(DM1105_INTMAK, INTMAK_IRM);
482 outb(0, dm_io_mem(DM1105_CR)); 498 dm_writeb(DM1105_CR, 0);
483} 499}
484 500
485static int dm1105_start_feed(struct dvb_demux_feed *f) 501static int dm1105_start_feed(struct dvb_demux_feed *f)
@@ -533,7 +549,7 @@ static void dm1105_dmx_buffer(struct work_struct *work)
533 /* bad packet found */ 549 /* bad packet found */
534 if ((dev->PacketErrorCount >= 2) && 550 if ((dev->PacketErrorCount >= 2) &&
535 (dev->dmarst == 0)) { 551 (dev->dmarst == 0)) {
536 outb(1, dm_io_mem(DM1105_RST)); 552 dm_writeb(DM1105_RST, 1);
537 dev->wrp = 0; 553 dev->wrp = 0;
538 dev->PacketErrorCount = 0; 554 dev->PacketErrorCount = 0;
539 dev->dmarst = 0; 555 dev->dmarst = 0;
@@ -556,18 +572,17 @@ static irqreturn_t dm1105_irq(int irq, void *dev_id)
556 struct dm1105_dev *dev = dev_id; 572 struct dm1105_dev *dev = dev_id;
557 573
558 /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */ 574 /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
559 unsigned int intsts = inb(dm_io_mem(DM1105_INTSTS)); 575 unsigned int intsts = dm_readb(DM1105_INTSTS);
560 outb(intsts, dm_io_mem(DM1105_INTSTS)); 576 dm_writeb(DM1105_INTSTS, intsts);
561 577
562 switch (intsts) { 578 switch (intsts) {
563 case INTSTS_TSIRQ: 579 case INTSTS_TSIRQ:
564 case (INTSTS_TSIRQ | INTSTS_IR): 580 case (INTSTS_TSIRQ | INTSTS_IR):
565 dev->nextwrp = inl(dm_io_mem(DM1105_WRP)) - 581 dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
566 inl(dm_io_mem(DM1105_STADR));
567 queue_work(dev->wq, &dev->work); 582 queue_work(dev->wq, &dev->work);
568 break; 583 break;
569 case INTSTS_IR: 584 case INTSTS_IR:
570 dev->ir.ir_command = inl(dm_io_mem(DM1105_IRCODE)); 585 dev->ir.ir_command = dm_readl(DM1105_IRCODE);
571 schedule_work(&dev->ir.work); 586 schedule_work(&dev->ir.work);
572 break; 587 break;
573 } 588 }
@@ -626,24 +641,24 @@ static int __devinit dm1105_hw_init(struct dm1105_dev *dev)
626{ 641{
627 dm1105_disable_irqs(dev); 642 dm1105_disable_irqs(dev);
628 643
629 outb(0, dm_io_mem(DM1105_HOST_CTR)); 644 dm_writeb(DM1105_HOST_CTR, 0);
630 645
631 /*DATALEN 188,*/ 646 /*DATALEN 188,*/
632 outb(188, dm_io_mem(DM1105_DTALENTH)); 647 dm_writeb(DM1105_DTALENTH, 188);
633 /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/ 648 /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
634 outw(0xc10a, dm_io_mem(DM1105_TSCTR)); 649 dm_writew(DM1105_TSCTR, 0xc10a);
635 650
636 /* map DMA and set address */ 651 /* map DMA and set address */
637 dm1105_dma_map(dev); 652 dm1105_dma_map(dev);
638 dm1105_set_dma_addr(dev); 653 dm1105_set_dma_addr(dev);
639 /* big buffer */ 654 /* big buffer */
640 outl(5*DM1105_DMA_BYTES, dm_io_mem(DM1105_RLEN)); 655 dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
641 outb(47, dm_io_mem(DM1105_INTCNT)); 656 dm_writeb(DM1105_INTCNT, 47);
642 657
643 /* IR NEC mode enable */ 658 /* IR NEC mode enable */
644 outb((DM1105_IR_EN | DM1105_SYS_CHK), dm_io_mem(DM1105_IRCTR)); 659 dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
645 outb(0, dm_io_mem(DM1105_IRMODE)); 660 dm_writeb(DM1105_IRMODE, 0);
646 outw(0, dm_io_mem(DM1105_SYSTEMCODE)); 661 dm_writew(DM1105_SYSTEMCODE, 0);
647 662
648 return 0; 663 return 0;
649} 664}
@@ -653,8 +668,8 @@ static void dm1105_hw_exit(struct dm1105_dev *dev)
653 dm1105_disable_irqs(dev); 668 dm1105_disable_irqs(dev);
654 669
655 /* IR disable */ 670 /* IR disable */
656 outb(0, dm_io_mem(DM1105_IRCTR)); 671 dm_writeb(DM1105_IRCTR, 0);
657 outb(INTMAK_NONEMASK, dm_io_mem(DM1105_INTMAK)); 672 dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
658 673
659 dm1105_dma_unmap(dev); 674 dm1105_dma_unmap(dev);
660} 675}