aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/media/dvb-frontends
diff options
context:
space:
mode:
authorMauro Carvalho Chehab <m.chehab@samsung.com>2014-01-27 00:33:18 -0500
committerMauro Carvalho Chehab <m.chehab@samsung.com>2014-03-04 12:40:00 -0500
commit244c0e06bfd4e5bce46914bb11b0aac7de73831e (patch)
tree48fbe3991a2a70542dc846655859921c9cd94431 /drivers/media/dvb-frontends
parent80bff4b07595cf086e5d1cda4fd6e740affff5c5 (diff)
[media] drx-j: get rid of function wrappers
On several places, the I2C functions are just wrappers to others. Get rid of it. Acked-by: Devin Heitmueller <dheitmueller@kernellabs.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'drivers/media/dvb-frontends')
-rw-r--r--drivers/media/dvb-frontends/drx39xyj/drx_driver.h2
-rw-r--r--drivers/media/dvb-frontends/drx39xyj/drxj.c2210
2 files changed, 1026 insertions, 1186 deletions
diff --git a/drivers/media/dvb-frontends/drx39xyj/drx_driver.h b/drivers/media/dvb-frontends/drx39xyj/drx_driver.h
index f3098b6bd006..8419989b4c38 100644
--- a/drivers/media/dvb-frontends/drx39xyj/drx_driver.h
+++ b/drivers/media/dvb-frontends/drx39xyj/drx_driver.h
@@ -1940,8 +1940,6 @@ struct drx_demod_instance;
1940* \struct struct drx_demod_instance * \brief Top structure of demodulator instance. 1940* \struct struct drx_demod_instance * \brief Top structure of demodulator instance.
1941*/ 1941*/
1942struct drx_demod_instance { 1942struct drx_demod_instance {
1943 /* type specific demodulator data */
1944 struct drx_access_func *my_access_funct;
1945 /**< data access protocol functions */ 1943 /**< data access protocol functions */
1946 struct i2c_device_addr *my_i2c_dev_addr; 1944 struct i2c_device_addr *my_i2c_dev_addr;
1947 /**< i2c address and device identifier */ 1945 /**< i2c address and device identifier */
diff --git a/drivers/media/dvb-frontends/drx39xyj/drxj.c b/drivers/media/dvb-frontends/drx39xyj/drxj.c
index 8dc53345dd06..7a28c20d2594 100644
--- a/drivers/media/dvb-frontends/drx39xyj/drxj.c
+++ b/drivers/media/dvb-frontends/drx39xyj/drxj.c
@@ -226,12 +226,6 @@ DEFINES
226#define DRXJ_SCAN_TIMEOUT 1000 226#define DRXJ_SCAN_TIMEOUT 1000
227 227
228/** 228/**
229* \def DRXJ_DAP
230* \brief Name of structure containing all data access protocol functions.
231*/
232#define DRXJ_DAP drx_dap_drxj_funct_g
233
234/**
235* \def HI_I2C_DELAY 229* \def HI_I2C_DELAY
236* \brief HI timing delay for I2C timing (in nano seconds) 230* \brief HI timing delay for I2C timing (in nano seconds)
237* 231*
@@ -535,70 +529,38 @@ GLOBAL VARIABLES
535 * DRXJ DAP structures 529 * DRXJ DAP structures
536 */ 530 */
537 531
538static int drxj_dap_read_block(struct i2c_device_addr *dev_addr, 532static int drxdap_fasi_read_block(struct i2c_device_addr *dev_addr,
539 u32 addr, 533 u32 addr,
540 u16 datasize, 534 u16 datasize,
541 u8 *data, u32 flags); 535 u8 *data, u32 flags);
542 536
543static int drxj_dap_read_modify_write_reg8(struct i2c_device_addr *dev_addr,
544 u32 waddr,
545 u32 raddr,
546 u8 wdata, u8 *rdata);
547 537
548static int drxj_dap_read_modify_write_reg16(struct i2c_device_addr *dev_addr, 538static int drxj_dap_read_modify_write_reg16(struct i2c_device_addr *dev_addr,
549 u32 waddr, 539 u32 waddr,
550 u32 raddr, 540 u32 raddr,
551 u16 wdata, u16 *rdata); 541 u16 wdata, u16 *rdata);
552 542
553static int drxj_dap_read_modify_write_reg32(struct i2c_device_addr *dev_addr,
554 u32 waddr,
555 u32 raddr,
556 u32 wdata, u32 *rdata);
557
558static int drxj_dap_read_reg8(struct i2c_device_addr *dev_addr,
559 u32 addr,
560 u8 *data, u32 flags);
561
562static int drxj_dap_read_reg16(struct i2c_device_addr *dev_addr, 543static int drxj_dap_read_reg16(struct i2c_device_addr *dev_addr,
563 u32 addr, 544 u32 addr,
564 u16 *data, u32 flags); 545 u16 *data, u32 flags);
565 546
566static int drxj_dap_read_reg32(struct i2c_device_addr *dev_addr, 547static int drxdap_fasi_read_reg32(struct i2c_device_addr *dev_addr,
567 u32 addr, 548 u32 addr,
568 u32 *data, u32 flags); 549 u32 *data, u32 flags);
569 550
570static int drxj_dap_write_block(struct i2c_device_addr *dev_addr, 551static int drxdap_fasi_write_block(struct i2c_device_addr *dev_addr,
571 u32 addr, 552 u32 addr,
572 u16 datasize, 553 u16 datasize,
573 u8 *data, u32 flags); 554 u8 *data, u32 flags);
574 555
575static int drxj_dap_write_reg8(struct i2c_device_addr *dev_addr,
576 u32 addr,
577 u8 data, u32 flags);
578
579static int drxj_dap_write_reg16(struct i2c_device_addr *dev_addr, 556static int drxj_dap_write_reg16(struct i2c_device_addr *dev_addr,
580 u32 addr, 557 u32 addr,
581 u16 data, u32 flags); 558 u16 data, u32 flags);
582 559
583static int drxj_dap_write_reg32(struct i2c_device_addr *dev_addr, 560static int drxdap_fasi_write_reg32(struct i2c_device_addr *dev_addr,
584 u32 addr, 561 u32 addr,
585 u32 data, u32 flags); 562 u32 data, u32 flags);
586 563
587/* The structure containing the protocol interface */
588struct drx_access_func drx_dap_drxj_funct_g = {
589 drxj_dap_write_block, /* Supported */
590 drxj_dap_read_block, /* Supported */
591 drxj_dap_write_reg8, /* Not supported */
592 drxj_dap_read_reg8, /* Not supported */
593 drxj_dap_read_modify_write_reg8, /* Not supported */
594 drxj_dap_write_reg16, /* Supported */
595 drxj_dap_read_reg16, /* Supported */
596 drxj_dap_read_modify_write_reg16, /* Supported */
597 drxj_dap_write_reg32, /* Supported */
598 drxj_dap_read_reg32, /* Supported */
599 drxj_dap_read_modify_write_reg32, /* Not supported */
600};
601
602struct drxj_data drxj_data_g = { 564struct drxj_data drxj_data_g = {
603 false, /* has_lna : true if LNA (aka PGA) present */ 565 false, /* has_lna : true if LNA (aka PGA) present */
604 false, /* has_oob : true if OOB supported */ 566 false, /* has_oob : true if OOB supported */
@@ -929,7 +891,6 @@ struct drx_common_attr drxj_default_comm_attr_g = {
929* \brief Default drxj demodulator instance. 891* \brief Default drxj demodulator instance.
930*/ 892*/
931struct drx_demod_instance drxj_default_demod_g = { 893struct drx_demod_instance drxj_default_demod_g = {
932 &DRXJ_DAP, /* data access protocol functions */
933 &drxj_default_addr_g, /* i2c address & device id */ 894 &drxj_default_addr_g, /* i2c address & device id */
934 &drxj_default_comm_attr_g, /* demod common attributes */ 895 &drxj_default_comm_attr_g, /* demod common attributes */
935 &drxj_data_g /* demod device specific attributes */ 896 &drxj_data_g /* demod device specific attributes */
@@ -1540,43 +1501,6 @@ bool is_handled_by_aud_tr_if(u32 addr)
1540 1501
1541/*============================================================================*/ 1502/*============================================================================*/
1542 1503
1543/* Functions not supported by protocol*/
1544
1545static int drxdap_fasi_write_reg8(struct i2c_device_addr *dev_addr, /* address of I2C device */
1546 u32 addr, /* address of register */
1547 u8 data, /* data to write */
1548 u32 flags)
1549{ /* special device flags */
1550 return -EIO;
1551}
1552
1553static int drxdap_fasi_read_reg8(struct i2c_device_addr *dev_addr, /* address of I2C device */
1554 u32 addr, /* address of register */
1555 u8 *data, /* buffer to receive data */
1556 u32 flags)
1557{ /* special device flags */
1558 return -EIO;
1559}
1560
1561static int drxdap_fasi_read_modify_write_reg8(struct i2c_device_addr *dev_addr, /* address of I2C device */
1562 u32 waddr, /* address of register */
1563 u32 raddr, /* address to read back from */
1564 u8 datain, /* data to send */
1565 u8 *dataout)
1566{ /* data to receive back */
1567 return -EIO;
1568}
1569
1570static int drxdap_fasi_read_modify_write_reg32(struct i2c_device_addr *dev_addr, /* address of I2C device */
1571 u32 waddr, /* address of register */
1572 u32 raddr, /* address to read back from */
1573 u32 datain, /* data to send */
1574 u32 *dataout)
1575{ /* data to receive back */
1576 return -EIO;
1577}
1578
1579
1580int drxbsp_i2c_write_read(struct i2c_device_addr *w_dev_addr, 1504int drxbsp_i2c_write_read(struct i2c_device_addr *w_dev_addr,
1581 u16 w_count, 1505 u16 w_count,
1582 u8 *wData, 1506 u8 *wData,
@@ -2073,27 +1997,6 @@ static int drxdap_fasi_write_reg32(struct i2c_device_addr *dev_addr,
2073 return drxdap_fasi_write_block(dev_addr, addr, sizeof(data), buf, flags); 1997 return drxdap_fasi_write_block(dev_addr, addr, sizeof(data), buf, flags);
2074} 1998}
2075 1999
2076static int drxj_dap_read_block(struct i2c_device_addr *dev_addr,
2077 u32 addr,
2078 u16 datasize,
2079 u8 *data, u32 flags)
2080{
2081 return drxdap_fasi_read_block(dev_addr,
2082 addr, datasize, data, flags);
2083}
2084
2085/*============================================================================*/
2086
2087static int drxj_dap_read_modify_write_reg8(struct i2c_device_addr *dev_addr,
2088 u32 waddr,
2089 u32 raddr,
2090 u8 wdata, u8 *rdata)
2091{
2092 return drxdap_fasi_read_modify_write_reg8(dev_addr,
2093 waddr,
2094 raddr, wdata, rdata);
2095}
2096
2097/*============================================================================*/ 2000/*============================================================================*/
2098 2001
2099/** 2002/**
@@ -2172,26 +2075,6 @@ static int drxj_dap_read_modify_write_reg16(struct i2c_device_addr *dev_addr,
2172#endif 2075#endif
2173} 2076}
2174 2077
2175/*============================================================================*/
2176
2177static int drxj_dap_read_modify_write_reg32(struct i2c_device_addr *dev_addr,
2178 u32 waddr,
2179 u32 raddr,
2180 u32 wdata, u32 *rdata)
2181{
2182 return drxdap_fasi_read_modify_write_reg32(dev_addr,
2183 waddr,
2184 raddr, wdata, rdata);
2185}
2186
2187/*============================================================================*/
2188
2189static int drxj_dap_read_reg8(struct i2c_device_addr *dev_addr,
2190 u32 addr,
2191 u8 *data, u32 flags)
2192{
2193 return drxdap_fasi_read_reg8(dev_addr, addr, data, flags);
2194}
2195 2078
2196/*============================================================================*/ 2079/*============================================================================*/
2197 2080
@@ -2296,41 +2179,10 @@ static int drxj_dap_read_reg16(struct i2c_device_addr *dev_addr,
2296 if (is_handled_by_aud_tr_if(addr)) 2179 if (is_handled_by_aud_tr_if(addr))
2297 stat = drxj_dap_read_aud_reg16(dev_addr, addr, data); 2180 stat = drxj_dap_read_aud_reg16(dev_addr, addr, data);
2298 else 2181 else
2299 stat = drxdap_fasi_read_reg16(dev_addr, 2182 stat = drxdap_fasi_read_reg16(dev_addr, addr, data, flags);
2300 addr, data, flags);
2301 2183
2302 return stat; 2184 return stat;
2303} 2185}
2304
2305/*============================================================================*/
2306
2307static int drxj_dap_read_reg32(struct i2c_device_addr *dev_addr,
2308 u32 addr,
2309 u32 *data, u32 flags)
2310{
2311 return drxdap_fasi_read_reg32(dev_addr, addr, data, flags);
2312}
2313
2314/*============================================================================*/
2315
2316static int drxj_dap_write_block(struct i2c_device_addr *dev_addr,
2317 u32 addr,
2318 u16 datasize,
2319 u8 *data, u32 flags)
2320{
2321 return drxdap_fasi_write_block(dev_addr,
2322 addr, datasize, data, flags);
2323}
2324
2325/*============================================================================*/
2326
2327static int drxj_dap_write_reg8(struct i2c_device_addr *dev_addr,
2328 u32 addr,
2329 u8 data, u32 flags)
2330{
2331 return drxdap_fasi_write_reg8(dev_addr, addr, data, flags);
2332}
2333
2334/*============================================================================*/ 2186/*============================================================================*/
2335 2187
2336/** 2188/**
@@ -2413,15 +2265,6 @@ static int drxj_dap_write_reg16(struct i2c_device_addr *dev_addr,
2413 2265
2414/*============================================================================*/ 2266/*============================================================================*/
2415 2267
2416static int drxj_dap_write_reg32(struct i2c_device_addr *dev_addr,
2417 u32 addr,
2418 u32 data, u32 flags)
2419{
2420 return drxdap_fasi_write_reg32(dev_addr, addr, data, flags);
2421}
2422
2423/*============================================================================*/
2424
2425/* Free data ram in SIO HI */ 2268/* Free data ram in SIO HI */
2426#define SIO_HI_RA_RAM_USR_BEGIN__A 0x420040 2269#define SIO_HI_RA_RAM_USR_BEGIN__A 0x420040
2427#define SIO_HI_RA_RAM_USR_END__A 0x420060 2270#define SIO_HI_RA_RAM_USR_END__A 0x420060
@@ -2627,34 +2470,34 @@ hi_command(struct i2c_device_addr *dev_addr, const struct drxj_hi_cmd *cmd, u16
2627 2470
2628 case SIO_HI_RA_RAM_CMD_CONFIG: 2471 case SIO_HI_RA_RAM_CMD_CONFIG:
2629 case SIO_HI_RA_RAM_CMD_ATOMIC_COPY: 2472 case SIO_HI_RA_RAM_CMD_ATOMIC_COPY:
2630 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_HI_RA_RAM_PAR_6__A, cmd->param6, 0); 2473 rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_6__A, cmd->param6, 0);
2631 if (rc != 0) { 2474 if (rc != 0) {
2632 pr_err("error %d\n", rc); 2475 pr_err("error %d\n", rc);
2633 goto rw_error; 2476 goto rw_error;
2634 } 2477 }
2635 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_HI_RA_RAM_PAR_5__A, cmd->param5, 0); 2478 rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_5__A, cmd->param5, 0);
2636 if (rc != 0) { 2479 if (rc != 0) {
2637 pr_err("error %d\n", rc); 2480 pr_err("error %d\n", rc);
2638 goto rw_error; 2481 goto rw_error;
2639 } 2482 }
2640 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_HI_RA_RAM_PAR_4__A, cmd->param4, 0); 2483 rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_4__A, cmd->param4, 0);
2641 if (rc != 0) { 2484 if (rc != 0) {
2642 pr_err("error %d\n", rc); 2485 pr_err("error %d\n", rc);
2643 goto rw_error; 2486 goto rw_error;
2644 } 2487 }
2645 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_HI_RA_RAM_PAR_3__A, cmd->param3, 0); 2488 rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_3__A, cmd->param3, 0);
2646 if (rc != 0) { 2489 if (rc != 0) {
2647 pr_err("error %d\n", rc); 2490 pr_err("error %d\n", rc);
2648 goto rw_error; 2491 goto rw_error;
2649 } 2492 }
2650 /* fallthrough */ 2493 /* fallthrough */
2651 case SIO_HI_RA_RAM_CMD_BRDCTRL: 2494 case SIO_HI_RA_RAM_CMD_BRDCTRL:
2652 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_HI_RA_RAM_PAR_2__A, cmd->param2, 0); 2495 rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_2__A, cmd->param2, 0);
2653 if (rc != 0) { 2496 if (rc != 0) {
2654 pr_err("error %d\n", rc); 2497 pr_err("error %d\n", rc);
2655 goto rw_error; 2498 goto rw_error;
2656 } 2499 }
2657 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_HI_RA_RAM_PAR_1__A, cmd->param1, 0); 2500 rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_1__A, cmd->param1, 0);
2658 if (rc != 0) { 2501 if (rc != 0) {
2659 pr_err("error %d\n", rc); 2502 pr_err("error %d\n", rc);
2660 goto rw_error; 2503 goto rw_error;
@@ -2670,7 +2513,7 @@ hi_command(struct i2c_device_addr *dev_addr, const struct drxj_hi_cmd *cmd, u16
2670 } 2513 }
2671 2514
2672 /* Write command */ 2515 /* Write command */
2673 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_HI_RA_RAM_CMD__A, cmd->cmd, 0); 2516 rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_CMD__A, cmd->cmd, 0);
2674 if (rc != 0) { 2517 if (rc != 0) {
2675 pr_err("error %d\n", rc); 2518 pr_err("error %d\n", rc);
2676 goto rw_error; 2519 goto rw_error;
@@ -2693,7 +2536,7 @@ hi_command(struct i2c_device_addr *dev_addr, const struct drxj_hi_cmd *cmd, u16
2693 goto rw_error; 2536 goto rw_error;
2694 } 2537 }
2695 2538
2696 rc = DRXJ_DAP.read_reg16func(dev_addr, SIO_HI_RA_RAM_CMD__A, &wait_cmd, 0); 2539 rc = drxj_dap_read_reg16(dev_addr, SIO_HI_RA_RAM_CMD__A, &wait_cmd, 0);
2697 if (rc != 0) { 2540 if (rc != 0) {
2698 pr_err("error %d\n", rc); 2541 pr_err("error %d\n", rc);
2699 goto rw_error; 2542 goto rw_error;
@@ -2701,7 +2544,7 @@ hi_command(struct i2c_device_addr *dev_addr, const struct drxj_hi_cmd *cmd, u16
2701 } while (wait_cmd != 0); 2544 } while (wait_cmd != 0);
2702 2545
2703 /* Read result */ 2546 /* Read result */
2704 rc = DRXJ_DAP.read_reg16func(dev_addr, SIO_HI_RA_RAM_RES__A, result, 0); 2547 rc = drxj_dap_read_reg16(dev_addr, SIO_HI_RA_RAM_RES__A, result, 0);
2705 if (rc != 0) { 2548 if (rc != 0) {
2706 pr_err("error %d\n", rc); 2549 pr_err("error %d\n", rc);
2707 goto rw_error; 2550 goto rw_error;
@@ -2739,7 +2582,7 @@ static int init_hi(const struct drx_demod_instance *demod)
2739 dev_addr = demod->my_i2c_dev_addr; 2582 dev_addr = demod->my_i2c_dev_addr;
2740 2583
2741 /* PATCH for bug 5003, HI ucode v3.1.0 */ 2584 /* PATCH for bug 5003, HI ucode v3.1.0 */
2742 rc = DRXJ_DAP.write_reg16func(dev_addr, 0x4301D7, 0x801, 0); 2585 rc = drxj_dap_write_reg16(dev_addr, 0x4301D7, 0x801, 0);
2743 if (rc != 0) { 2586 if (rc != 0) {
2744 pr_err("error %d\n", rc); 2587 pr_err("error %d\n", rc);
2745 goto rw_error; 2588 goto rw_error;
@@ -2825,17 +2668,17 @@ static int get_device_capabilities(struct drx_demod_instance *demod)
2825 ext_attr = (struct drxj_data *) demod->my_ext_attr; 2668 ext_attr = (struct drxj_data *) demod->my_ext_attr;
2826 dev_addr = demod->my_i2c_dev_addr; 2669 dev_addr = demod->my_i2c_dev_addr;
2827 2670
2828 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0); 2671 rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0);
2829 if (rc != 0) { 2672 if (rc != 0) {
2830 pr_err("error %d\n", rc); 2673 pr_err("error %d\n", rc);
2831 goto rw_error; 2674 goto rw_error;
2832 } 2675 }
2833 rc = DRXJ_DAP.read_reg16func(dev_addr, SIO_PDR_OHW_CFG__A, &sio_pdr_ohw_cfg, 0); 2676 rc = drxj_dap_read_reg16(dev_addr, SIO_PDR_OHW_CFG__A, &sio_pdr_ohw_cfg, 0);
2834 if (rc != 0) { 2677 if (rc != 0) {
2835 pr_err("error %d\n", rc); 2678 pr_err("error %d\n", rc);
2836 goto rw_error; 2679 goto rw_error;
2837 } 2680 }
2838 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY__PRE, 0); 2681 rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY__PRE, 0);
2839 if (rc != 0) { 2682 if (rc != 0) {
2840 pr_err("error %d\n", rc); 2683 pr_err("error %d\n", rc);
2841 goto rw_error; 2684 goto rw_error;
@@ -2865,7 +2708,7 @@ static int get_device_capabilities(struct drx_demod_instance *demod)
2865 Determine device capabilities 2708 Determine device capabilities
2866 Based on pinning v47 2709 Based on pinning v47
2867 */ 2710 */
2868 rc = DRXJ_DAP.read_reg32func(dev_addr, SIO_TOP_JTAGID_LO__A, &sio_top_jtagid_lo, 0); 2711 rc = drxdap_fasi_read_reg32(dev_addr, SIO_TOP_JTAGID_LO__A, &sio_top_jtagid_lo, 0);
2869 if (rc != 0) { 2712 if (rc != 0) {
2870 pr_err("error %d\n", rc); 2713 pr_err("error %d\n", rc);
2871 goto rw_error; 2714 goto rw_error;
@@ -2874,18 +2717,18 @@ static int get_device_capabilities(struct drx_demod_instance *demod)
2874 2717
2875 switch ((sio_top_jtagid_lo >> 12) & 0xFF) { 2718 switch ((sio_top_jtagid_lo >> 12) & 0xFF) {
2876 case 0x31: 2719 case 0x31:
2877 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0); 2720 rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0);
2878 if (rc != 0) { 2721 if (rc != 0) {
2879 pr_err("error %d\n", rc); 2722 pr_err("error %d\n", rc);
2880 goto rw_error; 2723 goto rw_error;
2881 } 2724 }
2882 rc = DRXJ_DAP.read_reg16func(dev_addr, SIO_PDR_UIO_IN_HI__A, &bid, 0); 2725 rc = drxj_dap_read_reg16(dev_addr, SIO_PDR_UIO_IN_HI__A, &bid, 0);
2883 if (rc != 0) { 2726 if (rc != 0) {
2884 pr_err("error %d\n", rc); 2727 pr_err("error %d\n", rc);
2885 goto rw_error; 2728 goto rw_error;
2886 } 2729 }
2887 bid = (bid >> 10) & 0xf; 2730 bid = (bid >> 10) & 0xf;
2888 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY__PRE, 0); 2731 rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY__PRE, 0);
2889 if (rc != 0) { 2732 if (rc != 0) {
2890 pr_err("error %d\n", rc); 2733 pr_err("error %d\n", rc);
2891 goto rw_error; 2734 goto rw_error;
@@ -3121,51 +2964,51 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o
3121 return 0; 2964 return 0;
3122 } 2965 }
3123 2966
3124 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_OCR_INVERT__A, 0, 0); 2967 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_OCR_INVERT__A, 0, 0);
3125 if (rc != 0) { 2968 if (rc != 0) {
3126 pr_err("error %d\n", rc); 2969 pr_err("error %d\n", rc);
3127 goto rw_error; 2970 goto rw_error;
3128 } 2971 }
3129 switch (ext_attr->standard) { 2972 switch (ext_attr->standard) {
3130 case DRX_STANDARD_8VSB: 2973 case DRX_STANDARD_8VSB:
3131 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_FCT_USAGE__A, 7, 0); 2974 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_FCT_USAGE__A, 7, 0);
3132 if (rc != 0) { 2975 if (rc != 0) {
3133 pr_err("error %d\n", rc); 2976 pr_err("error %d\n", rc);
3134 goto rw_error; 2977 goto rw_error;
3135 } /* 2048 bytes fifo ram */ 2978 } /* 2048 bytes fifo ram */
3136 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_TMD_CTL_UPD_RATE__A, 10, 0); 2979 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_TMD_CTL_UPD_RATE__A, 10, 0);
3137 if (rc != 0) { 2980 if (rc != 0) {
3138 pr_err("error %d\n", rc); 2981 pr_err("error %d\n", rc);
3139 goto rw_error; 2982 goto rw_error;
3140 } 2983 }
3141 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_TMD_INT_UPD_RATE__A, 10, 0); 2984 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_TMD_INT_UPD_RATE__A, 10, 0);
3142 if (rc != 0) { 2985 if (rc != 0) {
3143 pr_err("error %d\n", rc); 2986 pr_err("error %d\n", rc);
3144 goto rw_error; 2987 goto rw_error;
3145 } 2988 }
3146 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_AVR_PARM_A__A, 5, 0); 2989 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_AVR_PARM_A__A, 5, 0);
3147 if (rc != 0) { 2990 if (rc != 0) {
3148 pr_err("error %d\n", rc); 2991 pr_err("error %d\n", rc);
3149 goto rw_error; 2992 goto rw_error;
3150 } 2993 }
3151 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_AVR_PARM_B__A, 7, 0); 2994 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_AVR_PARM_B__A, 7, 0);
3152 if (rc != 0) { 2995 if (rc != 0) {
3153 pr_err("error %d\n", rc); 2996 pr_err("error %d\n", rc);
3154 goto rw_error; 2997 goto rw_error;
3155 } 2998 }
3156 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_RCN_GAIN__A, 10, 0); 2999 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_RCN_GAIN__A, 10, 0);
3157 if (rc != 0) { 3000 if (rc != 0) {
3158 pr_err("error %d\n", rc); 3001 pr_err("error %d\n", rc);
3159 goto rw_error; 3002 goto rw_error;
3160 } 3003 }
3161 /* Low Water Mark for synchronization */ 3004 /* Low Water Mark for synchronization */
3162 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_SNC_LWM__A, 3, 0); 3005 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_SNC_LWM__A, 3, 0);
3163 if (rc != 0) { 3006 if (rc != 0) {
3164 pr_err("error %d\n", rc); 3007 pr_err("error %d\n", rc);
3165 goto rw_error; 3008 goto rw_error;
3166 } 3009 }
3167 /* High Water Mark for synchronization */ 3010 /* High Water Mark for synchronization */
3168 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_SNC_HWM__A, 5, 0); 3011 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_SNC_HWM__A, 5, 0);
3169 if (rc != 0) { 3012 if (rc != 0) {
3170 pr_err("error %d\n", rc); 3013 pr_err("error %d\n", rc);
3171 goto rw_error; 3014 goto rw_error;
@@ -3198,50 +3041,50 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o
3198 (ext_attr->curr_symbol_rate / 8) * nr_bits * 188; 3041 (ext_attr->curr_symbol_rate / 8) * nr_bits * 188;
3199 /* pass through b/c Annex A/c need following settings */ 3042 /* pass through b/c Annex A/c need following settings */
3200 case DRX_STANDARD_ITU_B: 3043 case DRX_STANDARD_ITU_B:
3201 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_FCT_USAGE__A, FEC_OC_FCT_USAGE__PRE, 0); 3044 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_FCT_USAGE__A, FEC_OC_FCT_USAGE__PRE, 0);
3202 if (rc != 0) { 3045 if (rc != 0) {
3203 pr_err("error %d\n", rc); 3046 pr_err("error %d\n", rc);
3204 goto rw_error; 3047 goto rw_error;
3205 } 3048 }
3206 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_TMD_CTL_UPD_RATE__A, FEC_OC_TMD_CTL_UPD_RATE__PRE, 0); 3049 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_TMD_CTL_UPD_RATE__A, FEC_OC_TMD_CTL_UPD_RATE__PRE, 0);
3207 if (rc != 0) { 3050 if (rc != 0) {
3208 pr_err("error %d\n", rc); 3051 pr_err("error %d\n", rc);
3209 goto rw_error; 3052 goto rw_error;
3210 } 3053 }
3211 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_TMD_INT_UPD_RATE__A, 5, 0); 3054 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_TMD_INT_UPD_RATE__A, 5, 0);
3212 if (rc != 0) { 3055 if (rc != 0) {
3213 pr_err("error %d\n", rc); 3056 pr_err("error %d\n", rc);
3214 goto rw_error; 3057 goto rw_error;
3215 } 3058 }
3216 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_AVR_PARM_A__A, FEC_OC_AVR_PARM_A__PRE, 0); 3059 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_AVR_PARM_A__A, FEC_OC_AVR_PARM_A__PRE, 0);
3217 if (rc != 0) { 3060 if (rc != 0) {
3218 pr_err("error %d\n", rc); 3061 pr_err("error %d\n", rc);
3219 goto rw_error; 3062 goto rw_error;
3220 } 3063 }
3221 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_AVR_PARM_B__A, FEC_OC_AVR_PARM_B__PRE, 0); 3064 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_AVR_PARM_B__A, FEC_OC_AVR_PARM_B__PRE, 0);
3222 if (rc != 0) { 3065 if (rc != 0) {
3223 pr_err("error %d\n", rc); 3066 pr_err("error %d\n", rc);
3224 goto rw_error; 3067 goto rw_error;
3225 } 3068 }
3226 if (cfg_data->static_clk == true) { 3069 if (cfg_data->static_clk == true) {
3227 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_RCN_GAIN__A, 0xD, 0); 3070 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_RCN_GAIN__A, 0xD, 0);
3228 if (rc != 0) { 3071 if (rc != 0) {
3229 pr_err("error %d\n", rc); 3072 pr_err("error %d\n", rc);
3230 goto rw_error; 3073 goto rw_error;
3231 } 3074 }
3232 } else { 3075 } else {
3233 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_RCN_GAIN__A, FEC_OC_RCN_GAIN__PRE, 0); 3076 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_RCN_GAIN__A, FEC_OC_RCN_GAIN__PRE, 0);
3234 if (rc != 0) { 3077 if (rc != 0) {
3235 pr_err("error %d\n", rc); 3078 pr_err("error %d\n", rc);
3236 goto rw_error; 3079 goto rw_error;
3237 } 3080 }
3238 } 3081 }
3239 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_SNC_LWM__A, 2, 0); 3082 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_SNC_LWM__A, 2, 0);
3240 if (rc != 0) { 3083 if (rc != 0) {
3241 pr_err("error %d\n", rc); 3084 pr_err("error %d\n", rc);
3242 goto rw_error; 3085 goto rw_error;
3243 } 3086 }
3244 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_SNC_HWM__A, 12, 0); 3087 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_SNC_HWM__A, 12, 0);
3245 if (rc != 0) { 3088 if (rc != 0) {
3246 pr_err("error %d\n", rc); 3089 pr_err("error %d\n", rc);
3247 goto rw_error; 3090 goto rw_error;
@@ -3252,12 +3095,12 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o
3252 } /* swtich (standard) */ 3095 } /* swtich (standard) */
3253 3096
3254 /* Check insertion of the Reed-Solomon parity bytes */ 3097 /* Check insertion of the Reed-Solomon parity bytes */
3255 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_MODE__A, &fec_oc_reg_mode, 0); 3098 rc = drxj_dap_read_reg16(dev_addr, FEC_OC_MODE__A, &fec_oc_reg_mode, 0);
3256 if (rc != 0) { 3099 if (rc != 0) {
3257 pr_err("error %d\n", rc); 3100 pr_err("error %d\n", rc);
3258 goto rw_error; 3101 goto rw_error;
3259 } 3102 }
3260 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_IPR_MODE__A, &fec_oc_reg_ipr_mode, 0); 3103 rc = drxj_dap_read_reg16(dev_addr, FEC_OC_IPR_MODE__A, &fec_oc_reg_ipr_mode, 0);
3261 if (rc != 0) { 3104 if (rc != 0) {
3262 pr_err("error %d\n", rc); 3105 pr_err("error %d\n", rc);
3263 goto rw_error; 3106 goto rw_error;
@@ -3413,70 +3256,70 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o
3413 dto_rate = 3256 dto_rate =
3414 frac28(bit_rate, common_attr->sys_clock_freq * 1000); 3257 frac28(bit_rate, common_attr->sys_clock_freq * 1000);
3415 dto_rate >>= 3; 3258 dto_rate >>= 3;
3416 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DTO_RATE_HI__A, (u16)((dto_rate >> 16) & FEC_OC_DTO_RATE_HI__M), 0); 3259 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DTO_RATE_HI__A, (u16)((dto_rate >> 16) & FEC_OC_DTO_RATE_HI__M), 0);
3417 if (rc != 0) { 3260 if (rc != 0) {
3418 pr_err("error %d\n", rc); 3261 pr_err("error %d\n", rc);
3419 goto rw_error; 3262 goto rw_error;
3420 } 3263 }
3421 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DTO_RATE_LO__A, (u16)(dto_rate & FEC_OC_DTO_RATE_LO_RATE_LO__M), 0); 3264 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DTO_RATE_LO__A, (u16)(dto_rate & FEC_OC_DTO_RATE_LO_RATE_LO__M), 0);
3422 if (rc != 0) { 3265 if (rc != 0) {
3423 pr_err("error %d\n", rc); 3266 pr_err("error %d\n", rc);
3424 goto rw_error; 3267 goto rw_error;
3425 } 3268 }
3426 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DTO_MODE__A, FEC_OC_DTO_MODE_DYNAMIC__M | FEC_OC_DTO_MODE_OFFSET_ENABLE__M, 0); 3269 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DTO_MODE__A, FEC_OC_DTO_MODE_DYNAMIC__M | FEC_OC_DTO_MODE_OFFSET_ENABLE__M, 0);
3427 if (rc != 0) { 3270 if (rc != 0) {
3428 pr_err("error %d\n", rc); 3271 pr_err("error %d\n", rc);
3429 goto rw_error; 3272 goto rw_error;
3430 } 3273 }
3431 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_FCT_MODE__A, FEC_OC_FCT_MODE_RAT_ENA__M | FEC_OC_FCT_MODE_VIRT_ENA__M, 0); 3274 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_FCT_MODE__A, FEC_OC_FCT_MODE_RAT_ENA__M | FEC_OC_FCT_MODE_VIRT_ENA__M, 0);
3432 if (rc != 0) { 3275 if (rc != 0) {
3433 pr_err("error %d\n", rc); 3276 pr_err("error %d\n", rc);
3434 goto rw_error; 3277 goto rw_error;
3435 } 3278 }
3436 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DTO_BURST_LEN__A, fec_oc_dto_burst_len, 0); 3279 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DTO_BURST_LEN__A, fec_oc_dto_burst_len, 0);
3437 if (rc != 0) { 3280 if (rc != 0) {
3438 pr_err("error %d\n", rc); 3281 pr_err("error %d\n", rc);
3439 goto rw_error; 3282 goto rw_error;
3440 } 3283 }
3441 if (ext_attr->mpeg_output_clock_rate != DRXJ_MPEGOUTPUT_CLOCK_RATE_AUTO) 3284 if (ext_attr->mpeg_output_clock_rate != DRXJ_MPEGOUTPUT_CLOCK_RATE_AUTO)
3442 fec_oc_dto_period = ext_attr->mpeg_output_clock_rate - 1; 3285 fec_oc_dto_period = ext_attr->mpeg_output_clock_rate - 1;
3443 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DTO_PERIOD__A, fec_oc_dto_period, 0); 3286 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DTO_PERIOD__A, fec_oc_dto_period, 0);
3444 if (rc != 0) { 3287 if (rc != 0) {
3445 pr_err("error %d\n", rc); 3288 pr_err("error %d\n", rc);
3446 goto rw_error; 3289 goto rw_error;
3447 } 3290 }
3448 } else { /* Dynamic mode */ 3291 } else { /* Dynamic mode */
3449 3292
3450 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DTO_MODE__A, FEC_OC_DTO_MODE_DYNAMIC__M, 0); 3293 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DTO_MODE__A, FEC_OC_DTO_MODE_DYNAMIC__M, 0);
3451 if (rc != 0) { 3294 if (rc != 0) {
3452 pr_err("error %d\n", rc); 3295 pr_err("error %d\n", rc);
3453 goto rw_error; 3296 goto rw_error;
3454 } 3297 }
3455 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_FCT_MODE__A, 0, 0); 3298 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_FCT_MODE__A, 0, 0);
3456 if (rc != 0) { 3299 if (rc != 0) {
3457 pr_err("error %d\n", rc); 3300 pr_err("error %d\n", rc);
3458 goto rw_error; 3301 goto rw_error;
3459 } 3302 }
3460 } 3303 }
3461 3304
3462 rc = DRXJ_DAP.write_reg32func(dev_addr, FEC_OC_RCN_CTL_RATE_LO__A, rcn_rate, 0); 3305 rc = drxdap_fasi_write_reg32(dev_addr, FEC_OC_RCN_CTL_RATE_LO__A, rcn_rate, 0);
3463 if (rc != 0) { 3306 if (rc != 0) {
3464 pr_err("error %d\n", rc); 3307 pr_err("error %d\n", rc);
3465 goto rw_error; 3308 goto rw_error;
3466 } 3309 }
3467 3310
3468 /* Write appropriate registers with requested configuration */ 3311 /* Write appropriate registers with requested configuration */
3469 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_MODE__A, fec_oc_reg_mode, 0); 3312 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_MODE__A, fec_oc_reg_mode, 0);
3470 if (rc != 0) { 3313 if (rc != 0) {
3471 pr_err("error %d\n", rc); 3314 pr_err("error %d\n", rc);
3472 goto rw_error; 3315 goto rw_error;
3473 } 3316 }
3474 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_IPR_MODE__A, fec_oc_reg_ipr_mode, 0); 3317 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_IPR_MODE__A, fec_oc_reg_ipr_mode, 0);
3475 if (rc != 0) { 3318 if (rc != 0) {
3476 pr_err("error %d\n", rc); 3319 pr_err("error %d\n", rc);
3477 goto rw_error; 3320 goto rw_error;
3478 } 3321 }
3479 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_IPR_INVERT__A, fec_oc_reg_ipr_invert, 0); 3322 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_IPR_INVERT__A, fec_oc_reg_ipr_invert, 0);
3480 if (rc != 0) { 3323 if (rc != 0) {
3481 pr_err("error %d\n", rc); 3324 pr_err("error %d\n", rc);
3482 goto rw_error; 3325 goto rw_error;
@@ -3484,28 +3327,28 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o
3484 3327
3485 /* enabling for both parallel and serial now */ 3328 /* enabling for both parallel and serial now */
3486 /* Write magic word to enable pdr reg write */ 3329 /* Write magic word to enable pdr reg write */
3487 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, 0xFABA, 0); 3330 rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, 0xFABA, 0);
3488 if (rc != 0) { 3331 if (rc != 0) {
3489 pr_err("error %d\n", rc); 3332 pr_err("error %d\n", rc);
3490 goto rw_error; 3333 goto rw_error;
3491 } 3334 }
3492 /* Set MPEG TS pads to outputmode */ 3335 /* Set MPEG TS pads to outputmode */
3493 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MSTRT_CFG__A, 0x0013, 0); 3336 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MSTRT_CFG__A, 0x0013, 0);
3494 if (rc != 0) { 3337 if (rc != 0) {
3495 pr_err("error %d\n", rc); 3338 pr_err("error %d\n", rc);
3496 goto rw_error; 3339 goto rw_error;
3497 } 3340 }
3498 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MERR_CFG__A, 0x0013, 0); 3341 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MERR_CFG__A, 0x0013, 0);
3499 if (rc != 0) { 3342 if (rc != 0) {
3500 pr_err("error %d\n", rc); 3343 pr_err("error %d\n", rc);
3501 goto rw_error; 3344 goto rw_error;
3502 } 3345 }
3503 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MCLK_CFG__A, MPEG_OUTPUT_CLK_DRIVE_STRENGTH << SIO_PDR_MCLK_CFG_DRIVE__B | 0x03 << SIO_PDR_MCLK_CFG_MODE__B, 0); 3346 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MCLK_CFG__A, MPEG_OUTPUT_CLK_DRIVE_STRENGTH << SIO_PDR_MCLK_CFG_DRIVE__B | 0x03 << SIO_PDR_MCLK_CFG_MODE__B, 0);
3504 if (rc != 0) { 3347 if (rc != 0) {
3505 pr_err("error %d\n", rc); 3348 pr_err("error %d\n", rc);
3506 goto rw_error; 3349 goto rw_error;
3507 } 3350 }
3508 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MVAL_CFG__A, 0x0013, 0); 3351 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MVAL_CFG__A, 0x0013, 0);
3509 if (rc != 0) { 3352 if (rc != 0) {
3510 pr_err("error %d\n", rc); 3353 pr_err("error %d\n", rc);
3511 goto rw_error; 3354 goto rw_error;
@@ -3513,7 +3356,7 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o
3513 sio_pdr_md_cfg = 3356 sio_pdr_md_cfg =
3514 MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH << 3357 MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH <<
3515 SIO_PDR_MD0_CFG_DRIVE__B | 0x03 << SIO_PDR_MD0_CFG_MODE__B; 3358 SIO_PDR_MD0_CFG_DRIVE__B | 0x03 << SIO_PDR_MD0_CFG_MODE__B;
3516 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD0_CFG__A, sio_pdr_md_cfg, 0); 3359 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD0_CFG__A, sio_pdr_md_cfg, 0);
3517 if (rc != 0) { 3360 if (rc != 0) {
3518 pr_err("error %d\n", rc); 3361 pr_err("error %d\n", rc);
3519 goto rw_error; 3362 goto rw_error;
@@ -3523,171 +3366,171 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o
3523 MPEG_PARALLEL_OUTPUT_PIN_DRIVE_STRENGTH << 3366 MPEG_PARALLEL_OUTPUT_PIN_DRIVE_STRENGTH <<
3524 SIO_PDR_MD0_CFG_DRIVE__B | 0x03 << 3367 SIO_PDR_MD0_CFG_DRIVE__B | 0x03 <<
3525 SIO_PDR_MD0_CFG_MODE__B; 3368 SIO_PDR_MD0_CFG_MODE__B;
3526 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD0_CFG__A, sio_pdr_md_cfg, 0); 3369 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD0_CFG__A, sio_pdr_md_cfg, 0);
3527 if (rc != 0) { 3370 if (rc != 0) {
3528 pr_err("error %d\n", rc); 3371 pr_err("error %d\n", rc);
3529 goto rw_error; 3372 goto rw_error;
3530 } 3373 }
3531 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD1_CFG__A, sio_pdr_md_cfg, 0); 3374 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD1_CFG__A, sio_pdr_md_cfg, 0);
3532 if (rc != 0) { 3375 if (rc != 0) {
3533 pr_err("error %d\n", rc); 3376 pr_err("error %d\n", rc);
3534 goto rw_error; 3377 goto rw_error;
3535 } 3378 }
3536 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD2_CFG__A, sio_pdr_md_cfg, 0); 3379 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD2_CFG__A, sio_pdr_md_cfg, 0);
3537 if (rc != 0) { 3380 if (rc != 0) {
3538 pr_err("error %d\n", rc); 3381 pr_err("error %d\n", rc);
3539 goto rw_error; 3382 goto rw_error;
3540 } 3383 }
3541 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD3_CFG__A, sio_pdr_md_cfg, 0); 3384 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD3_CFG__A, sio_pdr_md_cfg, 0);
3542 if (rc != 0) { 3385 if (rc != 0) {
3543 pr_err("error %d\n", rc); 3386 pr_err("error %d\n", rc);
3544 goto rw_error; 3387 goto rw_error;
3545 } 3388 }
3546 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD4_CFG__A, sio_pdr_md_cfg, 0); 3389 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD4_CFG__A, sio_pdr_md_cfg, 0);
3547 if (rc != 0) { 3390 if (rc != 0) {
3548 pr_err("error %d\n", rc); 3391 pr_err("error %d\n", rc);
3549 goto rw_error; 3392 goto rw_error;
3550 } 3393 }
3551 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD5_CFG__A, sio_pdr_md_cfg, 0); 3394 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD5_CFG__A, sio_pdr_md_cfg, 0);
3552 if (rc != 0) { 3395 if (rc != 0) {
3553 pr_err("error %d\n", rc); 3396 pr_err("error %d\n", rc);
3554 goto rw_error; 3397 goto rw_error;
3555 } 3398 }
3556 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD6_CFG__A, sio_pdr_md_cfg, 0); 3399 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD6_CFG__A, sio_pdr_md_cfg, 0);
3557 if (rc != 0) { 3400 if (rc != 0) {
3558 pr_err("error %d\n", rc); 3401 pr_err("error %d\n", rc);
3559 goto rw_error; 3402 goto rw_error;
3560 } 3403 }
3561 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD7_CFG__A, sio_pdr_md_cfg, 0); 3404 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD7_CFG__A, sio_pdr_md_cfg, 0);
3562 if (rc != 0) { 3405 if (rc != 0) {
3563 pr_err("error %d\n", rc); 3406 pr_err("error %d\n", rc);
3564 goto rw_error; 3407 goto rw_error;
3565 } 3408 }
3566 } else { /* MPEG data output is serial -> set MD1 to MD7 to tri-state */ 3409 } else { /* MPEG data output is serial -> set MD1 to MD7 to tri-state */
3567 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD1_CFG__A, 0x0000, 0); 3410 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD1_CFG__A, 0x0000, 0);
3568 if (rc != 0) { 3411 if (rc != 0) {
3569 pr_err("error %d\n", rc); 3412 pr_err("error %d\n", rc);
3570 goto rw_error; 3413 goto rw_error;
3571 } 3414 }
3572 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD2_CFG__A, 0x0000, 0); 3415 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD2_CFG__A, 0x0000, 0);
3573 if (rc != 0) { 3416 if (rc != 0) {
3574 pr_err("error %d\n", rc); 3417 pr_err("error %d\n", rc);
3575 goto rw_error; 3418 goto rw_error;
3576 } 3419 }
3577 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD3_CFG__A, 0x0000, 0); 3420 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD3_CFG__A, 0x0000, 0);
3578 if (rc != 0) { 3421 if (rc != 0) {
3579 pr_err("error %d\n", rc); 3422 pr_err("error %d\n", rc);
3580 goto rw_error; 3423 goto rw_error;
3581 } 3424 }
3582 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD4_CFG__A, 0x0000, 0); 3425 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD4_CFG__A, 0x0000, 0);
3583 if (rc != 0) { 3426 if (rc != 0) {
3584 pr_err("error %d\n", rc); 3427 pr_err("error %d\n", rc);
3585 goto rw_error; 3428 goto rw_error;
3586 } 3429 }
3587 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD5_CFG__A, 0x0000, 0); 3430 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD5_CFG__A, 0x0000, 0);
3588 if (rc != 0) { 3431 if (rc != 0) {
3589 pr_err("error %d\n", rc); 3432 pr_err("error %d\n", rc);
3590 goto rw_error; 3433 goto rw_error;
3591 } 3434 }
3592 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD6_CFG__A, 0x0000, 0); 3435 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD6_CFG__A, 0x0000, 0);
3593 if (rc != 0) { 3436 if (rc != 0) {
3594 pr_err("error %d\n", rc); 3437 pr_err("error %d\n", rc);
3595 goto rw_error; 3438 goto rw_error;
3596 } 3439 }
3597 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD7_CFG__A, 0x0000, 0); 3440 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD7_CFG__A, 0x0000, 0);
3598 if (rc != 0) { 3441 if (rc != 0) {
3599 pr_err("error %d\n", rc); 3442 pr_err("error %d\n", rc);
3600 goto rw_error; 3443 goto rw_error;
3601 } 3444 }
3602 } 3445 }
3603 /* Enable Monitor Bus output over MPEG pads and ctl input */ 3446 /* Enable Monitor Bus output over MPEG pads and ctl input */
3604 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MON_CFG__A, 0x0000, 0); 3447 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MON_CFG__A, 0x0000, 0);
3605 if (rc != 0) { 3448 if (rc != 0) {
3606 pr_err("error %d\n", rc); 3449 pr_err("error %d\n", rc);
3607 goto rw_error; 3450 goto rw_error;
3608 } 3451 }
3609 /* Write nomagic word to enable pdr reg write */ 3452 /* Write nomagic word to enable pdr reg write */
3610 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0); 3453 rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0);
3611 if (rc != 0) { 3454 if (rc != 0) {
3612 pr_err("error %d\n", rc); 3455 pr_err("error %d\n", rc);
3613 goto rw_error; 3456 goto rw_error;
3614 } 3457 }
3615 } else { 3458 } else {
3616 /* Write magic word to enable pdr reg write */ 3459 /* Write magic word to enable pdr reg write */
3617 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, 0xFABA, 0); 3460 rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, 0xFABA, 0);
3618 if (rc != 0) { 3461 if (rc != 0) {
3619 pr_err("error %d\n", rc); 3462 pr_err("error %d\n", rc);
3620 goto rw_error; 3463 goto rw_error;
3621 } 3464 }
3622 /* Set MPEG TS pads to inputmode */ 3465 /* Set MPEG TS pads to inputmode */
3623 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MSTRT_CFG__A, 0x0000, 0); 3466 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MSTRT_CFG__A, 0x0000, 0);
3624 if (rc != 0) { 3467 if (rc != 0) {
3625 pr_err("error %d\n", rc); 3468 pr_err("error %d\n", rc);
3626 goto rw_error; 3469 goto rw_error;
3627 } 3470 }
3628 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MERR_CFG__A, 0x0000, 0); 3471 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MERR_CFG__A, 0x0000, 0);
3629 if (rc != 0) { 3472 if (rc != 0) {
3630 pr_err("error %d\n", rc); 3473 pr_err("error %d\n", rc);
3631 goto rw_error; 3474 goto rw_error;
3632 } 3475 }
3633 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MCLK_CFG__A, 0x0000, 0); 3476 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MCLK_CFG__A, 0x0000, 0);
3634 if (rc != 0) { 3477 if (rc != 0) {
3635 pr_err("error %d\n", rc); 3478 pr_err("error %d\n", rc);
3636 goto rw_error; 3479 goto rw_error;
3637 } 3480 }
3638 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MVAL_CFG__A, 0x0000, 0); 3481 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MVAL_CFG__A, 0x0000, 0);
3639 if (rc != 0) { 3482 if (rc != 0) {
3640 pr_err("error %d\n", rc); 3483 pr_err("error %d\n", rc);
3641 goto rw_error; 3484 goto rw_error;
3642 } 3485 }
3643 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD0_CFG__A, 0x0000, 0); 3486 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD0_CFG__A, 0x0000, 0);
3644 if (rc != 0) { 3487 if (rc != 0) {
3645 pr_err("error %d\n", rc); 3488 pr_err("error %d\n", rc);
3646 goto rw_error; 3489 goto rw_error;
3647 } 3490 }
3648 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD1_CFG__A, 0x0000, 0); 3491 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD1_CFG__A, 0x0000, 0);
3649 if (rc != 0) { 3492 if (rc != 0) {
3650 pr_err("error %d\n", rc); 3493 pr_err("error %d\n", rc);
3651 goto rw_error; 3494 goto rw_error;
3652 } 3495 }
3653 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD2_CFG__A, 0x0000, 0); 3496 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD2_CFG__A, 0x0000, 0);
3654 if (rc != 0) { 3497 if (rc != 0) {
3655 pr_err("error %d\n", rc); 3498 pr_err("error %d\n", rc);
3656 goto rw_error; 3499 goto rw_error;
3657 } 3500 }
3658 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD3_CFG__A, 0x0000, 0); 3501 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD3_CFG__A, 0x0000, 0);
3659 if (rc != 0) { 3502 if (rc != 0) {
3660 pr_err("error %d\n", rc); 3503 pr_err("error %d\n", rc);
3661 goto rw_error; 3504 goto rw_error;
3662 } 3505 }
3663 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD4_CFG__A, 0x0000, 0); 3506 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD4_CFG__A, 0x0000, 0);
3664 if (rc != 0) { 3507 if (rc != 0) {
3665 pr_err("error %d\n", rc); 3508 pr_err("error %d\n", rc);
3666 goto rw_error; 3509 goto rw_error;
3667 } 3510 }
3668 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD5_CFG__A, 0x0000, 0); 3511 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD5_CFG__A, 0x0000, 0);
3669 if (rc != 0) { 3512 if (rc != 0) {
3670 pr_err("error %d\n", rc); 3513 pr_err("error %d\n", rc);
3671 goto rw_error; 3514 goto rw_error;
3672 } 3515 }
3673 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD6_CFG__A, 0x0000, 0); 3516 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD6_CFG__A, 0x0000, 0);
3674 if (rc != 0) { 3517 if (rc != 0) {
3675 pr_err("error %d\n", rc); 3518 pr_err("error %d\n", rc);
3676 goto rw_error; 3519 goto rw_error;
3677 } 3520 }
3678 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD7_CFG__A, 0x0000, 0); 3521 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD7_CFG__A, 0x0000, 0);
3679 if (rc != 0) { 3522 if (rc != 0) {
3680 pr_err("error %d\n", rc); 3523 pr_err("error %d\n", rc);
3681 goto rw_error; 3524 goto rw_error;
3682 } 3525 }
3683 /* Enable Monitor Bus output over MPEG pads and ctl input */ 3526 /* Enable Monitor Bus output over MPEG pads and ctl input */
3684 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MON_CFG__A, 0x0000, 0); 3527 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MON_CFG__A, 0x0000, 0);
3685 if (rc != 0) { 3528 if (rc != 0) {
3686 pr_err("error %d\n", rc); 3529 pr_err("error %d\n", rc);
3687 goto rw_error; 3530 goto rw_error;
3688 } 3531 }
3689 /* Write nomagic word to enable pdr reg write */ 3532 /* Write nomagic word to enable pdr reg write */
3690 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0); 3533 rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0);
3691 if (rc != 0) { 3534 if (rc != 0) {
3692 pr_err("error %d\n", rc); 3535 pr_err("error %d\n", rc);
3693 goto rw_error; 3536 goto rw_error;
@@ -3758,7 +3601,7 @@ ctrl_get_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o
3758 goto rw_error; 3601 goto rw_error;
3759 } 3602 }
3760 if ((lock_status == DRX_LOCKED)) { 3603 if ((lock_status == DRX_LOCKED)) {
3761 rc = DRXJ_DAP.read_reg32func(dev_addr, FEC_OC_RCN_DYN_RATE_LO__A, &rate_reg, 0); 3604 rc = drxdap_fasi_read_reg32(dev_addr, FEC_OC_RCN_DYN_RATE_LO__A, &rate_reg, 0);
3762 if (rc != 0) { 3605 if (rc != 0) {
3763 pr_err("error %d\n", rc); 3606 pr_err("error %d\n", rc);
3764 goto rw_error; 3607 goto rw_error;
@@ -3804,17 +3647,17 @@ static int set_mpegtei_handling(struct drx_demod_instance *demod)
3804 dev_addr = demod->my_i2c_dev_addr; 3647 dev_addr = demod->my_i2c_dev_addr;
3805 ext_attr = (struct drxj_data *) demod->my_ext_attr; 3648 ext_attr = (struct drxj_data *) demod->my_ext_attr;
3806 3649
3807 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_DPR_MODE__A, &fec_oc_dpr_mode, 0); 3650 rc = drxj_dap_read_reg16(dev_addr, FEC_OC_DPR_MODE__A, &fec_oc_dpr_mode, 0);
3808 if (rc != 0) { 3651 if (rc != 0) {
3809 pr_err("error %d\n", rc); 3652 pr_err("error %d\n", rc);
3810 goto rw_error; 3653 goto rw_error;
3811 } 3654 }
3812 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_SNC_MODE__A, &fec_oc_snc_mode, 0); 3655 rc = drxj_dap_read_reg16(dev_addr, FEC_OC_SNC_MODE__A, &fec_oc_snc_mode, 0);
3813 if (rc != 0) { 3656 if (rc != 0) {
3814 pr_err("error %d\n", rc); 3657 pr_err("error %d\n", rc);
3815 goto rw_error; 3658 goto rw_error;
3816 } 3659 }
3817 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_EMS_MODE__A, &fec_oc_ems_mode, 0); 3660 rc = drxj_dap_read_reg16(dev_addr, FEC_OC_EMS_MODE__A, &fec_oc_ems_mode, 0);
3818 if (rc != 0) { 3661 if (rc != 0) {
3819 pr_err("error %d\n", rc); 3662 pr_err("error %d\n", rc);
3820 goto rw_error; 3663 goto rw_error;
@@ -3834,17 +3677,17 @@ static int set_mpegtei_handling(struct drx_demod_instance *demod)
3834 fec_oc_ems_mode |= ((0x01) << (FEC_OC_EMS_MODE_MODE__B)); 3677 fec_oc_ems_mode |= ((0x01) << (FEC_OC_EMS_MODE_MODE__B));
3835 } 3678 }
3836 3679
3837 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DPR_MODE__A, fec_oc_dpr_mode, 0); 3680 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DPR_MODE__A, fec_oc_dpr_mode, 0);
3838 if (rc != 0) { 3681 if (rc != 0) {
3839 pr_err("error %d\n", rc); 3682 pr_err("error %d\n", rc);
3840 goto rw_error; 3683 goto rw_error;
3841 } 3684 }
3842 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_SNC_MODE__A, fec_oc_snc_mode, 0); 3685 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_SNC_MODE__A, fec_oc_snc_mode, 0);
3843 if (rc != 0) { 3686 if (rc != 0) {
3844 pr_err("error %d\n", rc); 3687 pr_err("error %d\n", rc);
3845 goto rw_error; 3688 goto rw_error;
3846 } 3689 }
3847 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_EMS_MODE__A, fec_oc_ems_mode, 0); 3690 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_EMS_MODE__A, fec_oc_ems_mode, 0);
3848 if (rc != 0) { 3691 if (rc != 0) {
3849 pr_err("error %d\n", rc); 3692 pr_err("error %d\n", rc);
3850 goto rw_error; 3693 goto rw_error;
@@ -3875,7 +3718,7 @@ static int bit_reverse_mpeg_output(struct drx_demod_instance *demod)
3875 dev_addr = demod->my_i2c_dev_addr; 3718 dev_addr = demod->my_i2c_dev_addr;
3876 ext_attr = (struct drxj_data *) demod->my_ext_attr; 3719 ext_attr = (struct drxj_data *) demod->my_ext_attr;
3877 3720
3878 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_IPR_MODE__A, &fec_oc_ipr_mode, 0); 3721 rc = drxj_dap_read_reg16(dev_addr, FEC_OC_IPR_MODE__A, &fec_oc_ipr_mode, 0);
3879 if (rc != 0) { 3722 if (rc != 0) {
3880 pr_err("error %d\n", rc); 3723 pr_err("error %d\n", rc);
3881 goto rw_error; 3724 goto rw_error;
@@ -3887,7 +3730,7 @@ static int bit_reverse_mpeg_output(struct drx_demod_instance *demod)
3887 if (ext_attr->bit_reverse_mpeg_outout) 3730 if (ext_attr->bit_reverse_mpeg_outout)
3888 fec_oc_ipr_mode |= FEC_OC_IPR_MODE_REVERSE_ORDER__M; 3731 fec_oc_ipr_mode |= FEC_OC_IPR_MODE_REVERSE_ORDER__M;
3889 3732
3890 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_IPR_MODE__A, fec_oc_ipr_mode, 0); 3733 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_IPR_MODE__A, fec_oc_ipr_mode, 0);
3891 if (rc != 0) { 3734 if (rc != 0) {
3892 pr_err("error %d\n", rc); 3735 pr_err("error %d\n", rc);
3893 goto rw_error; 3736 goto rw_error;
@@ -3919,7 +3762,7 @@ static int set_mpeg_output_clock_rate(struct drx_demod_instance *demod)
3919 ext_attr = (struct drxj_data *) demod->my_ext_attr; 3762 ext_attr = (struct drxj_data *) demod->my_ext_attr;
3920 3763
3921 if (ext_attr->mpeg_output_clock_rate != DRXJ_MPEGOUTPUT_CLOCK_RATE_AUTO) { 3764 if (ext_attr->mpeg_output_clock_rate != DRXJ_MPEGOUTPUT_CLOCK_RATE_AUTO) {
3922 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DTO_PERIOD__A, ext_attr->mpeg_output_clock_rate - 1, 0); 3765 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DTO_PERIOD__A, ext_attr->mpeg_output_clock_rate - 1, 0);
3923 if (rc != 0) { 3766 if (rc != 0) {
3924 pr_err("error %d\n", rc); 3767 pr_err("error %d\n", rc);
3925 goto rw_error; 3768 goto rw_error;
@@ -3956,7 +3799,7 @@ static int set_mpeg_start_width(struct drx_demod_instance *demod)
3956 3799
3957 if ((common_attr->mpeg_cfg.static_clk == true) 3800 if ((common_attr->mpeg_cfg.static_clk == true)
3958 && (common_attr->mpeg_cfg.enable_parallel == false)) { 3801 && (common_attr->mpeg_cfg.enable_parallel == false)) {
3959 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_COMM_MB__A, &fec_oc_comm_mb, 0); 3802 rc = drxj_dap_read_reg16(dev_addr, FEC_OC_COMM_MB__A, &fec_oc_comm_mb, 0);
3960 if (rc != 0) { 3803 if (rc != 0) {
3961 pr_err("error %d\n", rc); 3804 pr_err("error %d\n", rc);
3962 goto rw_error; 3805 goto rw_error;
@@ -3964,7 +3807,7 @@ static int set_mpeg_start_width(struct drx_demod_instance *demod)
3964 fec_oc_comm_mb &= ~FEC_OC_COMM_MB_CTL_ON; 3807 fec_oc_comm_mb &= ~FEC_OC_COMM_MB_CTL_ON;
3965 if (ext_attr->mpeg_start_width == DRXJ_MPEG_START_WIDTH_8CLKCYC) 3808 if (ext_attr->mpeg_start_width == DRXJ_MPEG_START_WIDTH_8CLKCYC)
3966 fec_oc_comm_mb |= FEC_OC_COMM_MB_CTL_ON; 3809 fec_oc_comm_mb |= FEC_OC_COMM_MB_CTL_ON;
3967 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_COMM_MB__A, fec_oc_comm_mb, 0); 3810 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_COMM_MB__A, fec_oc_comm_mb, 0);
3968 if (rc != 0) { 3811 if (rc != 0) {
3969 pr_err("error %d\n", rc); 3812 pr_err("error %d\n", rc);
3970 goto rw_error; 3813 goto rw_error;
@@ -4073,7 +3916,7 @@ ctrl_get_cfg_mpeg_output_misc(struct drx_demod_instance *demod,
4073 if (ext_attr->mpeg_output_clock_rate != DRXJ_MPEGOUTPUT_CLOCK_RATE_AUTO) { 3916 if (ext_attr->mpeg_output_clock_rate != DRXJ_MPEGOUTPUT_CLOCK_RATE_AUTO) {
4074 cfg_data->mpeg_output_clock_rate = ext_attr->mpeg_output_clock_rate; 3917 cfg_data->mpeg_output_clock_rate = ext_attr->mpeg_output_clock_rate;
4075 } else { 3918 } else {
4076 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, FEC_OC_DTO_PERIOD__A, &data, 0); 3919 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, FEC_OC_DTO_PERIOD__A, &data, 0);
4077 if (rc != 0) { 3920 if (rc != 0) {
4078 pr_err("error %d\n", rc); 3921 pr_err("error %d\n", rc);
4079 goto rw_error; 3922 goto rw_error;
@@ -4110,17 +3953,17 @@ ctrl_get_cfg_hw_cfg(struct drx_demod_instance *demod, struct drxj_cfg_hw_cfg *cf
4110 if (cfg_data == NULL) 3953 if (cfg_data == NULL)
4111 return -EINVAL; 3954 return -EINVAL;
4112 3955
4113 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, 0xFABA, 0); 3956 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, 0xFABA, 0);
4114 if (rc != 0) { 3957 if (rc != 0) {
4115 pr_err("error %d\n", rc); 3958 pr_err("error %d\n", rc);
4116 goto rw_error; 3959 goto rw_error;
4117 } 3960 }
4118 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SIO_PDR_OHW_CFG__A, &data, 0); 3961 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SIO_PDR_OHW_CFG__A, &data, 0);
4119 if (rc != 0) { 3962 if (rc != 0) {
4120 pr_err("error %d\n", rc); 3963 pr_err("error %d\n", rc);
4121 goto rw_error; 3964 goto rw_error;
4122 } 3965 }
4123 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0); 3966 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0);
4124 if (rc != 0) { 3967 if (rc != 0) {
4125 pr_err("error %d\n", rc); 3968 pr_err("error %d\n", rc);
4126 goto rw_error; 3969 goto rw_error;
@@ -4160,7 +4003,7 @@ static int ctrl_set_uio_cfg(struct drx_demod_instance *demod, struct drxuio_cfg
4160 ext_attr = (struct drxj_data *) demod->my_ext_attr; 4003 ext_attr = (struct drxj_data *) demod->my_ext_attr;
4161 4004
4162 /* Write magic word to enable pdr reg write */ 4005 /* Write magic word to enable pdr reg write */
4163 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0); 4006 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0);
4164 if (rc != 0) { 4007 if (rc != 0) {
4165 pr_err("error %d\n", rc); 4008 pr_err("error %d\n", rc);
4166 goto rw_error; 4009 goto rw_error;
@@ -4180,7 +4023,7 @@ static int ctrl_set_uio_cfg(struct drx_demod_instance *demod, struct drxuio_cfg
4180 case DRX_UIO_MODE_DISABLE: 4023 case DRX_UIO_MODE_DISABLE:
4181 ext_attr->uio_sma_tx_mode = uio_cfg->mode; 4024 ext_attr->uio_sma_tx_mode = uio_cfg->mode;
4182 /* pad configuration register is set 0 - input mode */ 4025 /* pad configuration register is set 0 - input mode */
4183 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_SMA_TX_CFG__A, 0, 0); 4026 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_SMA_TX_CFG__A, 0, 0);
4184 if (rc != 0) { 4027 if (rc != 0) {
4185 pr_err("error %d\n", rc); 4028 pr_err("error %d\n", rc);
4186 goto rw_error; 4029 goto rw_error;
@@ -4203,7 +4046,7 @@ static int ctrl_set_uio_cfg(struct drx_demod_instance *demod, struct drxuio_cfg
4203 case DRX_UIO_MODE_DISABLE: 4046 case DRX_UIO_MODE_DISABLE:
4204 ext_attr->uio_sma_rx_mode = uio_cfg->mode; 4047 ext_attr->uio_sma_rx_mode = uio_cfg->mode;
4205 /* pad configuration register is set 0 - input mode */ 4048 /* pad configuration register is set 0 - input mode */
4206 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_SMA_RX_CFG__A, 0, 0); 4049 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_SMA_RX_CFG__A, 0, 0);
4207 if (rc != 0) { 4050 if (rc != 0) {
4208 pr_err("error %d\n", rc); 4051 pr_err("error %d\n", rc);
4209 goto rw_error; 4052 goto rw_error;
@@ -4227,7 +4070,7 @@ static int ctrl_set_uio_cfg(struct drx_demod_instance *demod, struct drxuio_cfg
4227 case DRX_UIO_MODE_DISABLE: 4070 case DRX_UIO_MODE_DISABLE:
4228 ext_attr->uio_gpio_mode = uio_cfg->mode; 4071 ext_attr->uio_gpio_mode = uio_cfg->mode;
4229 /* pad configuration register is set 0 - input mode */ 4072 /* pad configuration register is set 0 - input mode */
4230 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_GPIO_CFG__A, 0, 0); 4073 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_GPIO_CFG__A, 0, 0);
4231 if (rc != 0) { 4074 if (rc != 0) {
4232 pr_err("error %d\n", rc); 4075 pr_err("error %d\n", rc);
4233 goto rw_error; 4076 goto rw_error;
@@ -4249,7 +4092,7 @@ static int ctrl_set_uio_cfg(struct drx_demod_instance *demod, struct drxuio_cfg
4249 break; 4092 break;
4250 case DRX_UIO_MODE_DISABLE: 4093 case DRX_UIO_MODE_DISABLE:
4251 /* pad configuration register is set 0 - input mode */ 4094 /* pad configuration register is set 0 - input mode */
4252 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_IRQN_CFG__A, 0, 0); 4095 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_IRQN_CFG__A, 0, 0);
4253 if (rc != 0) { 4096 if (rc != 0) {
4254 pr_err("error %d\n", rc); 4097 pr_err("error %d\n", rc);
4255 goto rw_error; 4098 goto rw_error;
@@ -4268,7 +4111,7 @@ static int ctrl_set_uio_cfg(struct drx_demod_instance *demod, struct drxuio_cfg
4268 } /* switch ( uio_cfg->uio ) */ 4111 } /* switch ( uio_cfg->uio ) */
4269 4112
4270 /* Write magic word to disable pdr reg write */ 4113 /* Write magic word to disable pdr reg write */
4271 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0); 4114 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0);
4272 if (rc != 0) { 4115 if (rc != 0) {
4273 pr_err("error %d\n", rc); 4116 pr_err("error %d\n", rc);
4274 goto rw_error; 4117 goto rw_error;
@@ -4343,7 +4186,7 @@ ctrl_uio_write(struct drx_demod_instance *demod, struct drxuio_data *uio_data)
4343 ext_attr = (struct drxj_data *) demod->my_ext_attr; 4186 ext_attr = (struct drxj_data *) demod->my_ext_attr;
4344 4187
4345 /* Write magic word to enable pdr reg write */ 4188 /* Write magic word to enable pdr reg write */
4346 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0); 4189 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0);
4347 if (rc != 0) { 4190 if (rc != 0) {
4348 pr_err("error %d\n", rc); 4191 pr_err("error %d\n", rc);
4349 goto rw_error; 4192 goto rw_error;
@@ -4365,14 +4208,14 @@ ctrl_uio_write(struct drx_demod_instance *demod, struct drxuio_data *uio_data)
4365 /* io_pad_cfg_drive is set to power 2 (23 mA) */ 4208 /* io_pad_cfg_drive is set to power 2 (23 mA) */
4366 4209
4367 /* write to io pad configuration register - output mode */ 4210 /* write to io pad configuration register - output mode */
4368 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_SMA_TX_CFG__A, pin_cfg_value, 0); 4211 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_SMA_TX_CFG__A, pin_cfg_value, 0);
4369 if (rc != 0) { 4212 if (rc != 0) {
4370 pr_err("error %d\n", rc); 4213 pr_err("error %d\n", rc);
4371 goto rw_error; 4214 goto rw_error;
4372 } 4215 }
4373 4216
4374 /* use corresponding bit in io data output registar */ 4217 /* use corresponding bit in io data output registar */
4375 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_LO__A, &value, 0); 4218 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_LO__A, &value, 0);
4376 if (rc != 0) { 4219 if (rc != 0) {
4377 pr_err("error %d\n", rc); 4220 pr_err("error %d\n", rc);
4378 goto rw_error; 4221 goto rw_error;
@@ -4383,7 +4226,7 @@ ctrl_uio_write(struct drx_demod_instance *demod, struct drxuio_data *uio_data)
4383 value |= 0x8000; /* write one to 15th bit - 1st UIO */ 4226 value |= 0x8000; /* write one to 15th bit - 1st UIO */
4384 4227
4385 /* write back to io data output register */ 4228 /* write back to io data output register */
4386 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_LO__A, value, 0); 4229 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_LO__A, value, 0);
4387 if (rc != 0) { 4230 if (rc != 0) {
4388 pr_err("error %d\n", rc); 4231 pr_err("error %d\n", rc);
4389 goto rw_error; 4232 goto rw_error;
@@ -4404,14 +4247,14 @@ ctrl_uio_write(struct drx_demod_instance *demod, struct drxuio_data *uio_data)
4404 /* io_pad_cfg_drive is set to power 2 (23 mA) */ 4247 /* io_pad_cfg_drive is set to power 2 (23 mA) */
4405 4248
4406 /* write to io pad configuration register - output mode */ 4249 /* write to io pad configuration register - output mode */
4407 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_SMA_RX_CFG__A, pin_cfg_value, 0); 4250 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_SMA_RX_CFG__A, pin_cfg_value, 0);
4408 if (rc != 0) { 4251 if (rc != 0) {
4409 pr_err("error %d\n", rc); 4252 pr_err("error %d\n", rc);
4410 goto rw_error; 4253 goto rw_error;
4411 } 4254 }
4412 4255
4413 /* use corresponding bit in io data output registar */ 4256 /* use corresponding bit in io data output registar */
4414 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_LO__A, &value, 0); 4257 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_LO__A, &value, 0);
4415 if (rc != 0) { 4258 if (rc != 0) {
4416 pr_err("error %d\n", rc); 4259 pr_err("error %d\n", rc);
4417 goto rw_error; 4260 goto rw_error;
@@ -4422,7 +4265,7 @@ ctrl_uio_write(struct drx_demod_instance *demod, struct drxuio_data *uio_data)
4422 value |= 0x4000; /* write one to 14th bit - 2nd UIO */ 4265 value |= 0x4000; /* write one to 14th bit - 2nd UIO */
4423 4266
4424 /* write back to io data output register */ 4267 /* write back to io data output register */
4425 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_LO__A, value, 0); 4268 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_LO__A, value, 0);
4426 if (rc != 0) { 4269 if (rc != 0) {
4427 pr_err("error %d\n", rc); 4270 pr_err("error %d\n", rc);
4428 goto rw_error; 4271 goto rw_error;
@@ -4443,14 +4286,14 @@ ctrl_uio_write(struct drx_demod_instance *demod, struct drxuio_data *uio_data)
4443 /* io_pad_cfg_drive is set to power 2 (23 mA) */ 4286 /* io_pad_cfg_drive is set to power 2 (23 mA) */
4444 4287
4445 /* write to io pad configuration register - output mode */ 4288 /* write to io pad configuration register - output mode */
4446 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_GPIO_CFG__A, pin_cfg_value, 0); 4289 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_GPIO_CFG__A, pin_cfg_value, 0);
4447 if (rc != 0) { 4290 if (rc != 0) {
4448 pr_err("error %d\n", rc); 4291 pr_err("error %d\n", rc);
4449 goto rw_error; 4292 goto rw_error;
4450 } 4293 }
4451 4294
4452 /* use corresponding bit in io data output registar */ 4295 /* use corresponding bit in io data output registar */
4453 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_HI__A, &value, 0); 4296 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_HI__A, &value, 0);
4454 if (rc != 0) { 4297 if (rc != 0) {
4455 pr_err("error %d\n", rc); 4298 pr_err("error %d\n", rc);
4456 goto rw_error; 4299 goto rw_error;
@@ -4461,7 +4304,7 @@ ctrl_uio_write(struct drx_demod_instance *demod, struct drxuio_data *uio_data)
4461 value |= 0x0004; /* write one to 2nd bit - 3rd UIO */ 4304 value |= 0x0004; /* write one to 2nd bit - 3rd UIO */
4462 4305
4463 /* write back to io data output register */ 4306 /* write back to io data output register */
4464 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_HI__A, value, 0); 4307 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_HI__A, value, 0);
4465 if (rc != 0) { 4308 if (rc != 0) {
4466 pr_err("error %d\n", rc); 4309 pr_err("error %d\n", rc);
4467 goto rw_error; 4310 goto rw_error;
@@ -4483,14 +4326,14 @@ ctrl_uio_write(struct drx_demod_instance *demod, struct drxuio_data *uio_data)
4483 /* io_pad_cfg_drive is set to power 2 (23 mA) */ 4326 /* io_pad_cfg_drive is set to power 2 (23 mA) */
4484 4327
4485 /* write to io pad configuration register - output mode */ 4328 /* write to io pad configuration register - output mode */
4486 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_IRQN_CFG__A, pin_cfg_value, 0); 4329 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_IRQN_CFG__A, pin_cfg_value, 0);
4487 if (rc != 0) { 4330 if (rc != 0) {
4488 pr_err("error %d\n", rc); 4331 pr_err("error %d\n", rc);
4489 goto rw_error; 4332 goto rw_error;
4490 } 4333 }
4491 4334
4492 /* use corresponding bit in io data output registar */ 4335 /* use corresponding bit in io data output registar */
4493 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_LO__A, &value, 0); 4336 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_LO__A, &value, 0);
4494 if (rc != 0) { 4337 if (rc != 0) {
4495 pr_err("error %d\n", rc); 4338 pr_err("error %d\n", rc);
4496 goto rw_error; 4339 goto rw_error;
@@ -4501,7 +4344,7 @@ ctrl_uio_write(struct drx_demod_instance *demod, struct drxuio_data *uio_data)
4501 value |= 0x1000; /* write one to 12th bit - 4th UIO */ 4344 value |= 0x1000; /* write one to 12th bit - 4th UIO */
4502 4345
4503 /* write back to io data output register */ 4346 /* write back to io data output register */
4504 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_LO__A, value, 0); 4347 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_UIO_OUT_LO__A, value, 0);
4505 if (rc != 0) { 4348 if (rc != 0) {
4506 pr_err("error %d\n", rc); 4349 pr_err("error %d\n", rc);
4507 goto rw_error; 4350 goto rw_error;
@@ -4513,7 +4356,7 @@ ctrl_uio_write(struct drx_demod_instance *demod, struct drxuio_data *uio_data)
4513 } /* switch ( uio_data->uio ) */ 4356 } /* switch ( uio_data->uio ) */
4514 4357
4515 /* Write magic word to disable pdr reg write */ 4358 /* Write magic word to disable pdr reg write */
4516 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0); 4359 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0);
4517 if (rc != 0) { 4360 if (rc != 0) {
4518 pr_err("error %d\n", rc); 4361 pr_err("error %d\n", rc);
4519 goto rw_error; 4362 goto rw_error;
@@ -4545,7 +4388,7 @@ static int ctrl_uio_read(struct drx_demod_instance *demod, struct drxuio_data *u
4545 ext_attr = (struct drxj_data *) demod->my_ext_attr; 4388 ext_attr = (struct drxj_data *) demod->my_ext_attr;
4546 4389
4547 /* Write magic word to enable pdr reg write */ 4390 /* Write magic word to enable pdr reg write */
4548 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0); 4391 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0);
4549 if (rc != 0) { 4392 if (rc != 0) {
4550 pr_err("error %d\n", rc); 4393 pr_err("error %d\n", rc);
4551 goto rw_error; 4394 goto rw_error;
@@ -4567,13 +4410,13 @@ static int ctrl_uio_read(struct drx_demod_instance *demod, struct drxuio_data *u
4567 /* io_pad_cfg_drive is set to power 2 (23 mA) */ 4410 /* io_pad_cfg_drive is set to power 2 (23 mA) */
4568 4411
4569 /* write to io pad configuration register - input mode */ 4412 /* write to io pad configuration register - input mode */
4570 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_SMA_TX_CFG__A, pin_cfg_value, 0); 4413 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_SMA_TX_CFG__A, pin_cfg_value, 0);
4571 if (rc != 0) { 4414 if (rc != 0) {
4572 pr_err("error %d\n", rc); 4415 pr_err("error %d\n", rc);
4573 goto rw_error; 4416 goto rw_error;
4574 } 4417 }
4575 4418
4576 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SIO_PDR_UIO_IN_LO__A, &value, 0); 4419 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SIO_PDR_UIO_IN_LO__A, &value, 0);
4577 if (rc != 0) { 4420 if (rc != 0) {
4578 pr_err("error %d\n", rc); 4421 pr_err("error %d\n", rc);
4579 goto rw_error; 4422 goto rw_error;
@@ -4600,13 +4443,13 @@ static int ctrl_uio_read(struct drx_demod_instance *demod, struct drxuio_data *u
4600 /* io_pad_cfg_drive is set to power 2 (23 mA) */ 4443 /* io_pad_cfg_drive is set to power 2 (23 mA) */
4601 4444
4602 /* write to io pad configuration register - input mode */ 4445 /* write to io pad configuration register - input mode */
4603 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_SMA_RX_CFG__A, pin_cfg_value, 0); 4446 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_SMA_RX_CFG__A, pin_cfg_value, 0);
4604 if (rc != 0) { 4447 if (rc != 0) {
4605 pr_err("error %d\n", rc); 4448 pr_err("error %d\n", rc);
4606 goto rw_error; 4449 goto rw_error;
4607 } 4450 }
4608 4451
4609 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SIO_PDR_UIO_IN_LO__A, &value, 0); 4452 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SIO_PDR_UIO_IN_LO__A, &value, 0);
4610 if (rc != 0) { 4453 if (rc != 0) {
4611 pr_err("error %d\n", rc); 4454 pr_err("error %d\n", rc);
4612 goto rw_error; 4455 goto rw_error;
@@ -4634,14 +4477,14 @@ static int ctrl_uio_read(struct drx_demod_instance *demod, struct drxuio_data *u
4634 /* io_pad_cfg_drive is set to power 2 (23 mA) */ 4477 /* io_pad_cfg_drive is set to power 2 (23 mA) */
4635 4478
4636 /* write to io pad configuration register - input mode */ 4479 /* write to io pad configuration register - input mode */
4637 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_GPIO_CFG__A, pin_cfg_value, 0); 4480 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_GPIO_CFG__A, pin_cfg_value, 0);
4638 if (rc != 0) { 4481 if (rc != 0) {
4639 pr_err("error %d\n", rc); 4482 pr_err("error %d\n", rc);
4640 goto rw_error; 4483 goto rw_error;
4641 } 4484 }
4642 4485
4643 /* read io input data registar */ 4486 /* read io input data registar */
4644 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SIO_PDR_UIO_IN_HI__A, &value, 0); 4487 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SIO_PDR_UIO_IN_HI__A, &value, 0);
4645 if (rc != 0) { 4488 if (rc != 0) {
4646 pr_err("error %d\n", rc); 4489 pr_err("error %d\n", rc);
4647 goto rw_error; 4490 goto rw_error;
@@ -4668,14 +4511,14 @@ static int ctrl_uio_read(struct drx_demod_instance *demod, struct drxuio_data *u
4668 /* io_pad_cfg_drive is set to power 2 (23 mA) */ 4511 /* io_pad_cfg_drive is set to power 2 (23 mA) */
4669 4512
4670 /* write to io pad configuration register - input mode */ 4513 /* write to io pad configuration register - input mode */
4671 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_IRQN_CFG__A, pin_cfg_value, 0); 4514 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_IRQN_CFG__A, pin_cfg_value, 0);
4672 if (rc != 0) { 4515 if (rc != 0) {
4673 pr_err("error %d\n", rc); 4516 pr_err("error %d\n", rc);
4674 goto rw_error; 4517 goto rw_error;
4675 } 4518 }
4676 4519
4677 /* read io input data registar */ 4520 /* read io input data registar */
4678 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SIO_PDR_UIO_IN_LO__A, &value, 0); 4521 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SIO_PDR_UIO_IN_LO__A, &value, 0);
4679 if (rc != 0) { 4522 if (rc != 0) {
4680 pr_err("error %d\n", rc); 4523 pr_err("error %d\n", rc);
4681 goto rw_error; 4524 goto rw_error;
@@ -4692,7 +4535,7 @@ static int ctrl_uio_read(struct drx_demod_instance *demod, struct drxuio_data *u
4692 } /* switch ( uio_data->uio ) */ 4535 } /* switch ( uio_data->uio ) */
4693 4536
4694 /* Write magic word to disable pdr reg write */ 4537 /* Write magic word to disable pdr reg write */
4695 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0); 4538 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0);
4696 if (rc != 0) { 4539 if (rc != 0) {
4697 pr_err("error %d\n", rc); 4540 pr_err("error %d\n", rc);
4698 goto rw_error; 4541 goto rw_error;
@@ -4765,25 +4608,25 @@ static int smart_ant_init(struct drx_demod_instance *demod)
4765 ext_attr = (struct drxj_data *) demod->my_ext_attr; 4608 ext_attr = (struct drxj_data *) demod->my_ext_attr;
4766 4609
4767 /* Write magic word to enable pdr reg write */ 4610 /* Write magic word to enable pdr reg write */
4768 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0); 4611 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0);
4769 if (rc != 0) { 4612 if (rc != 0) {
4770 pr_err("error %d\n", rc); 4613 pr_err("error %d\n", rc);
4771 goto rw_error; 4614 goto rw_error;
4772 } 4615 }
4773 /* init smart antenna */ 4616 /* init smart antenna */
4774 rc = DRXJ_DAP.read_reg16func(dev_addr, SIO_SA_TX_COMMAND__A, &data, 0); 4617 rc = drxj_dap_read_reg16(dev_addr, SIO_SA_TX_COMMAND__A, &data, 0);
4775 if (rc != 0) { 4618 if (rc != 0) {
4776 pr_err("error %d\n", rc); 4619 pr_err("error %d\n", rc);
4777 goto rw_error; 4620 goto rw_error;
4778 } 4621 }
4779 if (ext_attr->smart_ant_inverted) { 4622 if (ext_attr->smart_ant_inverted) {
4780 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_SA_TX_COMMAND__A, (data | SIO_SA_TX_COMMAND_TX_INVERT__M) | SIO_SA_TX_COMMAND_TX_ENABLE__M, 0); 4623 rc = drxj_dap_write_reg16(dev_addr, SIO_SA_TX_COMMAND__A, (data | SIO_SA_TX_COMMAND_TX_INVERT__M) | SIO_SA_TX_COMMAND_TX_ENABLE__M, 0);
4781 if (rc != 0) { 4624 if (rc != 0) {
4782 pr_err("error %d\n", rc); 4625 pr_err("error %d\n", rc);
4783 goto rw_error; 4626 goto rw_error;
4784 } 4627 }
4785 } else { 4628 } else {
4786 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_SA_TX_COMMAND__A, (data & (~SIO_SA_TX_COMMAND_TX_INVERT__M)) | SIO_SA_TX_COMMAND_TX_ENABLE__M, 0); 4629 rc = drxj_dap_write_reg16(dev_addr, SIO_SA_TX_COMMAND__A, (data & (~SIO_SA_TX_COMMAND_TX_INVERT__M)) | SIO_SA_TX_COMMAND_TX_ENABLE__M, 0);
4787 if (rc != 0) { 4630 if (rc != 0) {
4788 pr_err("error %d\n", rc); 4631 pr_err("error %d\n", rc);
4789 goto rw_error; 4632 goto rw_error;
@@ -4796,19 +4639,19 @@ static int smart_ant_init(struct drx_demod_instance *demod)
4796 pr_err("error %d\n", rc); 4639 pr_err("error %d\n", rc);
4797 goto rw_error; 4640 goto rw_error;
4798 } 4641 }
4799 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_SMA_TX_CFG__A, 0x13, 0); 4642 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_SMA_TX_CFG__A, 0x13, 0);
4800 if (rc != 0) { 4643 if (rc != 0) {
4801 pr_err("error %d\n", rc); 4644 pr_err("error %d\n", rc);
4802 goto rw_error; 4645 goto rw_error;
4803 } 4646 }
4804 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_PDR_SMA_TX_GPIO_FNC__A, 0x03, 0); 4647 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_PDR_SMA_TX_GPIO_FNC__A, 0x03, 0);
4805 if (rc != 0) { 4648 if (rc != 0) {
4806 pr_err("error %d\n", rc); 4649 pr_err("error %d\n", rc);
4807 goto rw_error; 4650 goto rw_error;
4808 } 4651 }
4809 4652
4810 /* Write magic word to disable pdr reg write */ 4653 /* Write magic word to disable pdr reg write */
4811 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0); 4654 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0);
4812 if (rc != 0) { 4655 if (rc != 0) {
4813 pr_err("error %d\n", rc); 4656 pr_err("error %d\n", rc);
4814 goto rw_error; 4657 goto rw_error;
@@ -4855,7 +4698,7 @@ ctrl_set_cfg_smart_ant(struct drx_demod_instance *demod, struct drxj_cfg_smart_a
4855 } 4698 }
4856 4699
4857 /* Write magic word to enable pdr reg write */ 4700 /* Write magic word to enable pdr reg write */
4858 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0); 4701 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0);
4859 if (rc != 0) { 4702 if (rc != 0) {
4860 pr_err("error %d\n", rc); 4703 pr_err("error %d\n", rc);
4861 goto rw_error; 4704 goto rw_error;
@@ -4870,7 +4713,7 @@ ctrl_set_cfg_smart_ant(struct drx_demod_instance *demod, struct drxj_cfg_smart_a
4870 */ 4713 */
4871 start_time = jiffies_to_msecs(jiffies); 4714 start_time = jiffies_to_msecs(jiffies);
4872 do { 4715 do {
4873 rc = DRXJ_DAP.read_reg16func(dev_addr, SIO_SA_TX_STATUS__A, &data, 0); 4716 rc = drxj_dap_read_reg16(dev_addr, SIO_SA_TX_STATUS__A, &data, 0);
4874 if (rc != 0) { 4717 if (rc != 0) {
4875 pr_err("error %d\n", rc); 4718 pr_err("error %d\n", rc);
4876 goto rw_error; 4719 goto rw_error;
@@ -4881,29 +4724,29 @@ ctrl_set_cfg_smart_ant(struct drx_demod_instance *demod, struct drxj_cfg_smart_a
4881 return -EIO; 4724 return -EIO;
4882 4725
4883 /* write to smart antenna configuration register */ 4726 /* write to smart antenna configuration register */
4884 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_SA_TX_DATA0__A, 0x9200 | ((smart_ant->ctrl_data & 0x0001) << 8) | ((smart_ant->ctrl_data & 0x0002) << 10) | ((smart_ant->ctrl_data & 0x0004) << 12), 0); 4727 rc = drxj_dap_write_reg16(dev_addr, SIO_SA_TX_DATA0__A, 0x9200 | ((smart_ant->ctrl_data & 0x0001) << 8) | ((smart_ant->ctrl_data & 0x0002) << 10) | ((smart_ant->ctrl_data & 0x0004) << 12), 0);
4885 if (rc != 0) { 4728 if (rc != 0) {
4886 pr_err("error %d\n", rc); 4729 pr_err("error %d\n", rc);
4887 goto rw_error; 4730 goto rw_error;
4888 } 4731 }
4889 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_SA_TX_DATA1__A, 0x4924 | ((smart_ant->ctrl_data & 0x0008) >> 2) | ((smart_ant->ctrl_data & 0x0010)) | ((smart_ant->ctrl_data & 0x0020) << 2) | ((smart_ant->ctrl_data & 0x0040) << 4) | ((smart_ant->ctrl_data & 0x0080) << 6), 0); 4732 rc = drxj_dap_write_reg16(dev_addr, SIO_SA_TX_DATA1__A, 0x4924 | ((smart_ant->ctrl_data & 0x0008) >> 2) | ((smart_ant->ctrl_data & 0x0010)) | ((smart_ant->ctrl_data & 0x0020) << 2) | ((smart_ant->ctrl_data & 0x0040) << 4) | ((smart_ant->ctrl_data & 0x0080) << 6), 0);
4890 if (rc != 0) { 4733 if (rc != 0) {
4891 pr_err("error %d\n", rc); 4734 pr_err("error %d\n", rc);
4892 goto rw_error; 4735 goto rw_error;
4893 } 4736 }
4894 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_SA_TX_DATA2__A, 0x2492 | ((smart_ant->ctrl_data & 0x0100) >> 8) | ((smart_ant->ctrl_data & 0x0200) >> 6) | ((smart_ant->ctrl_data & 0x0400) >> 4) | ((smart_ant->ctrl_data & 0x0800) >> 2) | ((smart_ant->ctrl_data & 0x1000)) | ((smart_ant->ctrl_data & 0x2000) << 2), 0); 4737 rc = drxj_dap_write_reg16(dev_addr, SIO_SA_TX_DATA2__A, 0x2492 | ((smart_ant->ctrl_data & 0x0100) >> 8) | ((smart_ant->ctrl_data & 0x0200) >> 6) | ((smart_ant->ctrl_data & 0x0400) >> 4) | ((smart_ant->ctrl_data & 0x0800) >> 2) | ((smart_ant->ctrl_data & 0x1000)) | ((smart_ant->ctrl_data & 0x2000) << 2), 0);
4895 if (rc != 0) { 4738 if (rc != 0) {
4896 pr_err("error %d\n", rc); 4739 pr_err("error %d\n", rc);
4897 goto rw_error; 4740 goto rw_error;
4898 } 4741 }
4899 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_SA_TX_DATA3__A, 0xff8d, 0); 4742 rc = drxj_dap_write_reg16(dev_addr, SIO_SA_TX_DATA3__A, 0xff8d, 0);
4900 if (rc != 0) { 4743 if (rc != 0) {
4901 pr_err("error %d\n", rc); 4744 pr_err("error %d\n", rc);
4902 goto rw_error; 4745 goto rw_error;
4903 } 4746 }
4904 4747
4905 /* trigger the sending */ 4748 /* trigger the sending */
4906 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_SA_TX_LENGTH__A, 56, 0); 4749 rc = drxj_dap_write_reg16(dev_addr, SIO_SA_TX_LENGTH__A, 56, 0);
4907 if (rc != 0) { 4750 if (rc != 0) {
4908 pr_err("error %d\n", rc); 4751 pr_err("error %d\n", rc);
4909 goto rw_error; 4752 goto rw_error;
@@ -4920,7 +4763,7 @@ ctrl_set_cfg_smart_ant(struct drx_demod_instance *demod, struct drxj_cfg_smart_a
4920 return -EINVAL; 4763 return -EINVAL;
4921 } 4764 }
4922 /* Write magic word to enable pdr reg write */ 4765 /* Write magic word to enable pdr reg write */
4923 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0); 4766 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0);
4924 if (rc != 0) { 4767 if (rc != 0) {
4925 pr_err("error %d\n", rc); 4768 pr_err("error %d\n", rc);
4926 goto rw_error; 4769 goto rw_error;
@@ -4943,7 +4786,7 @@ static int scu_command(struct i2c_device_addr *dev_addr, struct drxjscu_cmd *cmd
4943 return -EINVAL; 4786 return -EINVAL;
4944 4787
4945 /* Wait until SCU command interface is ready to receive command */ 4788 /* Wait until SCU command interface is ready to receive command */
4946 rc = DRXJ_DAP.read_reg16func(dev_addr, SCU_RAM_COMMAND__A, &cur_cmd, 0); 4789 rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_COMMAND__A, &cur_cmd, 0);
4947 if (rc != 0) { 4790 if (rc != 0) {
4948 pr_err("error %d\n", rc); 4791 pr_err("error %d\n", rc);
4949 goto rw_error; 4792 goto rw_error;
@@ -4953,31 +4796,31 @@ static int scu_command(struct i2c_device_addr *dev_addr, struct drxjscu_cmd *cmd
4953 4796
4954 switch (cmd->parameter_len) { 4797 switch (cmd->parameter_len) {
4955 case 5: 4798 case 5:
4956 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_PARAM_4__A, *(cmd->parameter + 4), 0); 4799 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_PARAM_4__A, *(cmd->parameter + 4), 0);
4957 if (rc != 0) { 4800 if (rc != 0) {
4958 pr_err("error %d\n", rc); 4801 pr_err("error %d\n", rc);
4959 goto rw_error; 4802 goto rw_error;
4960 } /* fallthrough */ 4803 } /* fallthrough */
4961 case 4: 4804 case 4:
4962 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_PARAM_3__A, *(cmd->parameter + 3), 0); 4805 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_PARAM_3__A, *(cmd->parameter + 3), 0);
4963 if (rc != 0) { 4806 if (rc != 0) {
4964 pr_err("error %d\n", rc); 4807 pr_err("error %d\n", rc);
4965 goto rw_error; 4808 goto rw_error;
4966 } /* fallthrough */ 4809 } /* fallthrough */
4967 case 3: 4810 case 3:
4968 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_PARAM_2__A, *(cmd->parameter + 2), 0); 4811 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_PARAM_2__A, *(cmd->parameter + 2), 0);
4969 if (rc != 0) { 4812 if (rc != 0) {
4970 pr_err("error %d\n", rc); 4813 pr_err("error %d\n", rc);
4971 goto rw_error; 4814 goto rw_error;
4972 } /* fallthrough */ 4815 } /* fallthrough */
4973 case 2: 4816 case 2:
4974 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_PARAM_1__A, *(cmd->parameter + 1), 0); 4817 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_PARAM_1__A, *(cmd->parameter + 1), 0);
4975 if (rc != 0) { 4818 if (rc != 0) {
4976 pr_err("error %d\n", rc); 4819 pr_err("error %d\n", rc);
4977 goto rw_error; 4820 goto rw_error;
4978 } /* fallthrough */ 4821 } /* fallthrough */
4979 case 1: 4822 case 1:
4980 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_PARAM_0__A, *(cmd->parameter + 0), 0); 4823 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_PARAM_0__A, *(cmd->parameter + 0), 0);
4981 if (rc != 0) { 4824 if (rc != 0) {
4982 pr_err("error %d\n", rc); 4825 pr_err("error %d\n", rc);
4983 goto rw_error; 4826 goto rw_error;
@@ -4989,7 +4832,7 @@ static int scu_command(struct i2c_device_addr *dev_addr, struct drxjscu_cmd *cmd
4989 /* this number of parameters is not supported */ 4832 /* this number of parameters is not supported */
4990 return -EIO; 4833 return -EIO;
4991 } 4834 }
4992 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_COMMAND__A, cmd->command, 0); 4835 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_COMMAND__A, cmd->command, 0);
4993 if (rc != 0) { 4836 if (rc != 0) {
4994 pr_err("error %d\n", rc); 4837 pr_err("error %d\n", rc);
4995 goto rw_error; 4838 goto rw_error;
@@ -4998,7 +4841,7 @@ static int scu_command(struct i2c_device_addr *dev_addr, struct drxjscu_cmd *cmd
4998 /* Wait until SCU has processed command */ 4841 /* Wait until SCU has processed command */
4999 timeout = jiffies + msecs_to_jiffies(DRXJ_MAX_WAITTIME); 4842 timeout = jiffies + msecs_to_jiffies(DRXJ_MAX_WAITTIME);
5000 while (time_is_after_jiffies(timeout)) { 4843 while (time_is_after_jiffies(timeout)) {
5001 rc = DRXJ_DAP.read_reg16func(dev_addr, SCU_RAM_COMMAND__A, &cur_cmd, 0); 4844 rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_COMMAND__A, &cur_cmd, 0);
5002 if (rc != 0) { 4845 if (rc != 0) {
5003 pr_err("error %d\n", rc); 4846 pr_err("error %d\n", rc);
5004 goto rw_error; 4847 goto rw_error;
@@ -5017,25 +4860,25 @@ static int scu_command(struct i2c_device_addr *dev_addr, struct drxjscu_cmd *cmd
5017 4860
5018 switch (cmd->result_len) { 4861 switch (cmd->result_len) {
5019 case 4: 4862 case 4:
5020 rc = DRXJ_DAP.read_reg16func(dev_addr, SCU_RAM_PARAM_3__A, cmd->result + 3, 0); 4863 rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_PARAM_3__A, cmd->result + 3, 0);
5021 if (rc != 0) { 4864 if (rc != 0) {
5022 pr_err("error %d\n", rc); 4865 pr_err("error %d\n", rc);
5023 goto rw_error; 4866 goto rw_error;
5024 } /* fallthrough */ 4867 } /* fallthrough */
5025 case 3: 4868 case 3:
5026 rc = DRXJ_DAP.read_reg16func(dev_addr, SCU_RAM_PARAM_2__A, cmd->result + 2, 0); 4869 rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_PARAM_2__A, cmd->result + 2, 0);
5027 if (rc != 0) { 4870 if (rc != 0) {
5028 pr_err("error %d\n", rc); 4871 pr_err("error %d\n", rc);
5029 goto rw_error; 4872 goto rw_error;
5030 } /* fallthrough */ 4873 } /* fallthrough */
5031 case 2: 4874 case 2:
5032 rc = DRXJ_DAP.read_reg16func(dev_addr, SCU_RAM_PARAM_1__A, cmd->result + 1, 0); 4875 rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_PARAM_1__A, cmd->result + 1, 0);
5033 if (rc != 0) { 4876 if (rc != 0) {
5034 pr_err("error %d\n", rc); 4877 pr_err("error %d\n", rc);
5035 goto rw_error; 4878 goto rw_error;
5036 } /* fallthrough */ 4879 } /* fallthrough */
5037 case 1: 4880 case 1:
5038 rc = DRXJ_DAP.read_reg16func(dev_addr, SCU_RAM_PARAM_0__A, cmd->result + 0, 0); 4881 rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_PARAM_0__A, cmd->result + 0, 0);
5039 if (rc != 0) { 4882 if (rc != 0) {
5040 pr_err("error %d\n", rc); 4883 pr_err("error %d\n", rc);
5041 goto rw_error; 4884 goto rw_error;
@@ -5211,12 +5054,12 @@ static int adc_sync_measurement(struct drx_demod_instance *demod, u16 *count)
5211 dev_addr = demod->my_i2c_dev_addr; 5054 dev_addr = demod->my_i2c_dev_addr;
5212 5055
5213 /* Start measurement */ 5056 /* Start measurement */
5214 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_COMM_EXEC__A, IQM_AF_COMM_EXEC_ACTIVE, 0); 5057 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_COMM_EXEC__A, IQM_AF_COMM_EXEC_ACTIVE, 0);
5215 if (rc != 0) { 5058 if (rc != 0) {
5216 pr_err("error %d\n", rc); 5059 pr_err("error %d\n", rc);
5217 goto rw_error; 5060 goto rw_error;
5218 } 5061 }
5219 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_START_LOCK__A, 1, 0); 5062 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_START_LOCK__A, 1, 0);
5220 if (rc != 0) { 5063 if (rc != 0) {
5221 pr_err("error %d\n", rc); 5064 pr_err("error %d\n", rc);
5222 goto rw_error; 5065 goto rw_error;
@@ -5226,21 +5069,21 @@ static int adc_sync_measurement(struct drx_demod_instance *demod, u16 *count)
5226 msleep(1); 5069 msleep(1);
5227 5070
5228 *count = 0; 5071 *count = 0;
5229 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_PHASE0__A, &data, 0); 5072 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_PHASE0__A, &data, 0);
5230 if (rc != 0) { 5073 if (rc != 0) {
5231 pr_err("error %d\n", rc); 5074 pr_err("error %d\n", rc);
5232 goto rw_error; 5075 goto rw_error;
5233 } 5076 }
5234 if (data == 127) 5077 if (data == 127)
5235 *count = *count + 1; 5078 *count = *count + 1;
5236 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_PHASE1__A, &data, 0); 5079 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_PHASE1__A, &data, 0);
5237 if (rc != 0) { 5080 if (rc != 0) {
5238 pr_err("error %d\n", rc); 5081 pr_err("error %d\n", rc);
5239 goto rw_error; 5082 goto rw_error;
5240 } 5083 }
5241 if (data == 127) 5084 if (data == 127)
5242 *count = *count + 1; 5085 *count = *count + 1;
5243 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_PHASE2__A, &data, 0); 5086 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_PHASE2__A, &data, 0);
5244 if (rc != 0) { 5087 if (rc != 0) {
5245 pr_err("error %d\n", rc); 5088 pr_err("error %d\n", rc);
5246 goto rw_error; 5089 goto rw_error;
@@ -5283,14 +5126,14 @@ static int adc_synchronization(struct drx_demod_instance *demod)
5283 /* Try sampling on a diffrent edge */ 5126 /* Try sampling on a diffrent edge */
5284 u16 clk_neg = 0; 5127 u16 clk_neg = 0;
5285 5128
5286 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_CLKNEG__A, &clk_neg, 0); 5129 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_CLKNEG__A, &clk_neg, 0);
5287 if (rc != 0) { 5130 if (rc != 0) {
5288 pr_err("error %d\n", rc); 5131 pr_err("error %d\n", rc);
5289 goto rw_error; 5132 goto rw_error;
5290 } 5133 }
5291 5134
5292 clk_neg ^= IQM_AF_CLKNEG_CLKNEGDATA__M; 5135 clk_neg ^= IQM_AF_CLKNEG_CLKNEGDATA__M;
5293 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_CLKNEG__A, clk_neg, 0); 5136 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_CLKNEG__A, clk_neg, 0);
5294 if (rc != 0) { 5137 if (rc != 0) {
5295 pr_err("error %d\n", rc); 5138 pr_err("error %d\n", rc);
5296 goto rw_error; 5139 goto rw_error;
@@ -5326,7 +5169,7 @@ static int iqm_set_af(struct drx_demod_instance *demod, bool active)
5326 u16 data = 0; 5169 u16 data = 0;
5327 5170
5328 /* Configure IQM */ 5171 /* Configure IQM */
5329 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_STDBY__A, &data, 0); 5172 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_STDBY__A, &data, 0);
5330 if (rc != 0) { 5173 if (rc != 0) {
5331 pr_err("error %d\n", rc); 5174 pr_err("error %d\n", rc);
5332 goto rw_error; 5175 goto rw_error;
@@ -5335,7 +5178,7 @@ static int iqm_set_af(struct drx_demod_instance *demod, bool active)
5335 data &= ((~IQM_AF_STDBY_STDBY_ADC_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_AMP_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_PD_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_TAGC_IF_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_TAGC_RF_A2_ACTIVE)); 5178 data &= ((~IQM_AF_STDBY_STDBY_ADC_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_AMP_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_PD_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_TAGC_IF_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_TAGC_RF_A2_ACTIVE));
5336 else 5179 else
5337 data |= (IQM_AF_STDBY_STDBY_ADC_A2_ACTIVE | IQM_AF_STDBY_STDBY_AMP_A2_ACTIVE | IQM_AF_STDBY_STDBY_PD_A2_ACTIVE | IQM_AF_STDBY_STDBY_TAGC_IF_A2_ACTIVE | IQM_AF_STDBY_STDBY_TAGC_RF_A2_ACTIVE); 5180 data |= (IQM_AF_STDBY_STDBY_ADC_A2_ACTIVE | IQM_AF_STDBY_STDBY_AMP_A2_ACTIVE | IQM_AF_STDBY_STDBY_PD_A2_ACTIVE | IQM_AF_STDBY_STDBY_TAGC_IF_A2_ACTIVE | IQM_AF_STDBY_STDBY_TAGC_RF_A2_ACTIVE);
5338 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_STDBY__A, data, 0); 5181 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_STDBY__A, data, 0);
5339 if (rc != 0) { 5182 if (rc != 0) {
5340 pr_err("error %d\n", rc); 5183 pr_err("error %d\n", rc);
5341 goto rw_error; 5184 goto rw_error;
@@ -5370,7 +5213,7 @@ ctrl_set_cfg_pdr_safe_mode(struct drx_demod_instance *demod, bool *enable)
5370 ext_attr = (struct drxj_data *) demod->my_ext_attr; 5213 ext_attr = (struct drxj_data *) demod->my_ext_attr;
5371 5214
5372 /* Write magic word to enable pdr reg write */ 5215 /* Write magic word to enable pdr reg write */
5373 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0); 5216 rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0);
5374 if (rc != 0) { 5217 if (rc != 0) {
5375 pr_err("error %d\n", rc); 5218 pr_err("error %d\n", rc);
5376 goto rw_error; 5219 goto rw_error;
@@ -5380,62 +5223,62 @@ ctrl_set_cfg_pdr_safe_mode(struct drx_demod_instance *demod, bool *enable)
5380 bool bridge_enabled = false; 5223 bool bridge_enabled = false;
5381 5224
5382 /* MPEG pins to input */ 5225 /* MPEG pins to input */
5383 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MSTRT_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5226 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MSTRT_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5384 if (rc != 0) { 5227 if (rc != 0) {
5385 pr_err("error %d\n", rc); 5228 pr_err("error %d\n", rc);
5386 goto rw_error; 5229 goto rw_error;
5387 } 5230 }
5388 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MERR_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5231 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MERR_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5389 if (rc != 0) { 5232 if (rc != 0) {
5390 pr_err("error %d\n", rc); 5233 pr_err("error %d\n", rc);
5391 goto rw_error; 5234 goto rw_error;
5392 } 5235 }
5393 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MCLK_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5236 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MCLK_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5394 if (rc != 0) { 5237 if (rc != 0) {
5395 pr_err("error %d\n", rc); 5238 pr_err("error %d\n", rc);
5396 goto rw_error; 5239 goto rw_error;
5397 } 5240 }
5398 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MVAL_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5241 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MVAL_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5399 if (rc != 0) { 5242 if (rc != 0) {
5400 pr_err("error %d\n", rc); 5243 pr_err("error %d\n", rc);
5401 goto rw_error; 5244 goto rw_error;
5402 } 5245 }
5403 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD0_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5246 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD0_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5404 if (rc != 0) { 5247 if (rc != 0) {
5405 pr_err("error %d\n", rc); 5248 pr_err("error %d\n", rc);
5406 goto rw_error; 5249 goto rw_error;
5407 } 5250 }
5408 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD1_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5251 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD1_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5409 if (rc != 0) { 5252 if (rc != 0) {
5410 pr_err("error %d\n", rc); 5253 pr_err("error %d\n", rc);
5411 goto rw_error; 5254 goto rw_error;
5412 } 5255 }
5413 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD2_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5256 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD2_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5414 if (rc != 0) { 5257 if (rc != 0) {
5415 pr_err("error %d\n", rc); 5258 pr_err("error %d\n", rc);
5416 goto rw_error; 5259 goto rw_error;
5417 } 5260 }
5418 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD3_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5261 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD3_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5419 if (rc != 0) { 5262 if (rc != 0) {
5420 pr_err("error %d\n", rc); 5263 pr_err("error %d\n", rc);
5421 goto rw_error; 5264 goto rw_error;
5422 } 5265 }
5423 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD4_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5266 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD4_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5424 if (rc != 0) { 5267 if (rc != 0) {
5425 pr_err("error %d\n", rc); 5268 pr_err("error %d\n", rc);
5426 goto rw_error; 5269 goto rw_error;
5427 } 5270 }
5428 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD5_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5271 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD5_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5429 if (rc != 0) { 5272 if (rc != 0) {
5430 pr_err("error %d\n", rc); 5273 pr_err("error %d\n", rc);
5431 goto rw_error; 5274 goto rw_error;
5432 } 5275 }
5433 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD6_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5276 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD6_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5434 if (rc != 0) { 5277 if (rc != 0) {
5435 pr_err("error %d\n", rc); 5278 pr_err("error %d\n", rc);
5436 goto rw_error; 5279 goto rw_error;
5437 } 5280 }
5438 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD7_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5281 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD7_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5439 if (rc != 0) { 5282 if (rc != 0) {
5440 pr_err("error %d\n", rc); 5283 pr_err("error %d\n", rc);
5441 goto rw_error; 5284 goto rw_error;
@@ -5448,12 +5291,12 @@ ctrl_set_cfg_pdr_safe_mode(struct drx_demod_instance *demod, bool *enable)
5448 pr_err("error %d\n", rc); 5291 pr_err("error %d\n", rc);
5449 goto rw_error; 5292 goto rw_error;
5450 } 5293 }
5451 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_I2C_SDA2_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5294 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_I2C_SDA2_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5452 if (rc != 0) { 5295 if (rc != 0) {
5453 pr_err("error %d\n", rc); 5296 pr_err("error %d\n", rc);
5454 goto rw_error; 5297 goto rw_error;
5455 } 5298 }
5456 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_I2C_SCL2_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5299 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_I2C_SCL2_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5457 if (rc != 0) { 5300 if (rc != 0) {
5458 pr_err("error %d\n", rc); 5301 pr_err("error %d\n", rc);
5459 goto rw_error; 5302 goto rw_error;
@@ -5463,42 +5306,42 @@ ctrl_set_cfg_pdr_safe_mode(struct drx_demod_instance *demod, bool *enable)
5463 PD_VSYNC Store and set to input 5306 PD_VSYNC Store and set to input
5464 PD_SMA_RX Store and set to input 5307 PD_SMA_RX Store and set to input
5465 PD_SMA_TX Store and set to input */ 5308 PD_SMA_TX Store and set to input */
5466 rc = DRXJ_DAP.read_reg16func(dev_addr, SIO_PDR_GPIO_CFG__A, &ext_attr->pdr_safe_restore_val_gpio, 0); 5309 rc = drxj_dap_read_reg16(dev_addr, SIO_PDR_GPIO_CFG__A, &ext_attr->pdr_safe_restore_val_gpio, 0);
5467 if (rc != 0) { 5310 if (rc != 0) {
5468 pr_err("error %d\n", rc); 5311 pr_err("error %d\n", rc);
5469 goto rw_error; 5312 goto rw_error;
5470 } 5313 }
5471 rc = DRXJ_DAP.read_reg16func(dev_addr, SIO_PDR_VSYNC_CFG__A, &ext_attr->pdr_safe_restore_val_v_sync, 0); 5314 rc = drxj_dap_read_reg16(dev_addr, SIO_PDR_VSYNC_CFG__A, &ext_attr->pdr_safe_restore_val_v_sync, 0);
5472 if (rc != 0) { 5315 if (rc != 0) {
5473 pr_err("error %d\n", rc); 5316 pr_err("error %d\n", rc);
5474 goto rw_error; 5317 goto rw_error;
5475 } 5318 }
5476 rc = DRXJ_DAP.read_reg16func(dev_addr, SIO_PDR_SMA_RX_CFG__A, &ext_attr->pdr_safe_restore_val_sma_rx, 0); 5319 rc = drxj_dap_read_reg16(dev_addr, SIO_PDR_SMA_RX_CFG__A, &ext_attr->pdr_safe_restore_val_sma_rx, 0);
5477 if (rc != 0) { 5320 if (rc != 0) {
5478 pr_err("error %d\n", rc); 5321 pr_err("error %d\n", rc);
5479 goto rw_error; 5322 goto rw_error;
5480 } 5323 }
5481 rc = DRXJ_DAP.read_reg16func(dev_addr, SIO_PDR_SMA_TX_CFG__A, &ext_attr->pdr_safe_restore_val_sma_tx, 0); 5324 rc = drxj_dap_read_reg16(dev_addr, SIO_PDR_SMA_TX_CFG__A, &ext_attr->pdr_safe_restore_val_sma_tx, 0);
5482 if (rc != 0) { 5325 if (rc != 0) {
5483 pr_err("error %d\n", rc); 5326 pr_err("error %d\n", rc);
5484 goto rw_error; 5327 goto rw_error;
5485 } 5328 }
5486 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_GPIO_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5329 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_GPIO_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5487 if (rc != 0) { 5330 if (rc != 0) {
5488 pr_err("error %d\n", rc); 5331 pr_err("error %d\n", rc);
5489 goto rw_error; 5332 goto rw_error;
5490 } 5333 }
5491 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_VSYNC_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5334 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_VSYNC_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5492 if (rc != 0) { 5335 if (rc != 0) {
5493 pr_err("error %d\n", rc); 5336 pr_err("error %d\n", rc);
5494 goto rw_error; 5337 goto rw_error;
5495 } 5338 }
5496 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_SMA_RX_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5339 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_SMA_RX_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5497 if (rc != 0) { 5340 if (rc != 0) {
5498 pr_err("error %d\n", rc); 5341 pr_err("error %d\n", rc);
5499 goto rw_error; 5342 goto rw_error;
5500 } 5343 }
5501 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_SMA_TX_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5344 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_SMA_TX_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5502 if (rc != 0) { 5345 if (rc != 0) {
5503 pr_err("error %d\n", rc); 5346 pr_err("error %d\n", rc);
5504 goto rw_error; 5347 goto rw_error;
@@ -5514,7 +5357,7 @@ ctrl_set_cfg_pdr_safe_mode(struct drx_demod_instance *demod, bool *enable)
5514 5357
5515 /* PD_CVBS Analog DAC output, standby mode 5358 /* PD_CVBS Analog DAC output, standby mode
5516 PD_SIF Analog DAC output, standby mode */ 5359 PD_SIF Analog DAC output, standby mode */
5517 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_STDBY__A, (ATV_TOP_STDBY_SIF_STDBY_STANDBY & (~ATV_TOP_STDBY_CVBS_STDBY_A2_ACTIVE)), 0); 5360 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_STDBY__A, (ATV_TOP_STDBY_SIF_STDBY_STANDBY & (~ATV_TOP_STDBY_CVBS_STDBY_A2_ACTIVE)), 0);
5518 if (rc != 0) { 5361 if (rc != 0) {
5519 pr_err("error %d\n", rc); 5362 pr_err("error %d\n", rc);
5520 goto rw_error; 5363 goto rw_error;
@@ -5523,17 +5366,17 @@ ctrl_set_cfg_pdr_safe_mode(struct drx_demod_instance *demod, bool *enable)
5523 /* PD_I2S_CL Input 5366 /* PD_I2S_CL Input
5524 PD_I2S_DA Input 5367 PD_I2S_DA Input
5525 PD_I2S_WS Input */ 5368 PD_I2S_WS Input */
5526 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_I2S_CL_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5369 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_I2S_CL_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5527 if (rc != 0) { 5370 if (rc != 0) {
5528 pr_err("error %d\n", rc); 5371 pr_err("error %d\n", rc);
5529 goto rw_error; 5372 goto rw_error;
5530 } 5373 }
5531 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_I2S_DA_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5374 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_I2S_DA_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5532 if (rc != 0) { 5375 if (rc != 0) {
5533 pr_err("error %d\n", rc); 5376 pr_err("error %d\n", rc);
5534 goto rw_error; 5377 goto rw_error;
5535 } 5378 }
5536 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_I2S_WS_CFG__A, DRXJ_PIN_SAFE_MODE, 0); 5379 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_I2S_WS_CFG__A, DRXJ_PIN_SAFE_MODE, 0);
5537 if (rc != 0) { 5380 if (rc != 0) {
5538 pr_err("error %d\n", rc); 5381 pr_err("error %d\n", rc);
5539 goto rw_error; 5382 goto rw_error;
@@ -5544,12 +5387,12 @@ ctrl_set_cfg_pdr_safe_mode(struct drx_demod_instance *demod, bool *enable)
5544 5387
5545 /* PD_I2C_SDA2 Port2 active 5388 /* PD_I2C_SDA2 Port2 active
5546 PD_I2C_SCL2 Port2 active */ 5389 PD_I2C_SCL2 Port2 active */
5547 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_I2C_SDA2_CFG__A, SIO_PDR_I2C_SDA2_CFG__PRE, 0); 5390 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_I2C_SDA2_CFG__A, SIO_PDR_I2C_SDA2_CFG__PRE, 0);
5548 if (rc != 0) { 5391 if (rc != 0) {
5549 pr_err("error %d\n", rc); 5392 pr_err("error %d\n", rc);
5550 goto rw_error; 5393 goto rw_error;
5551 } 5394 }
5552 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_I2C_SCL2_CFG__A, SIO_PDR_I2C_SCL2_CFG__PRE, 0); 5395 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_I2C_SCL2_CFG__A, SIO_PDR_I2C_SCL2_CFG__PRE, 0);
5553 if (rc != 0) { 5396 if (rc != 0) {
5554 pr_err("error %d\n", rc); 5397 pr_err("error %d\n", rc);
5555 goto rw_error; 5398 goto rw_error;
@@ -5559,22 +5402,22 @@ ctrl_set_cfg_pdr_safe_mode(struct drx_demod_instance *demod, bool *enable)
5559 PD_VSYNC Restore 5402 PD_VSYNC Restore
5560 PD_SMA_RX Restore 5403 PD_SMA_RX Restore
5561 PD_SMA_TX Restore */ 5404 PD_SMA_TX Restore */
5562 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_GPIO_CFG__A, ext_attr->pdr_safe_restore_val_gpio, 0); 5405 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_GPIO_CFG__A, ext_attr->pdr_safe_restore_val_gpio, 0);
5563 if (rc != 0) { 5406 if (rc != 0) {
5564 pr_err("error %d\n", rc); 5407 pr_err("error %d\n", rc);
5565 goto rw_error; 5408 goto rw_error;
5566 } 5409 }
5567 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_VSYNC_CFG__A, ext_attr->pdr_safe_restore_val_v_sync, 0); 5410 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_VSYNC_CFG__A, ext_attr->pdr_safe_restore_val_v_sync, 0);
5568 if (rc != 0) { 5411 if (rc != 0) {
5569 pr_err("error %d\n", rc); 5412 pr_err("error %d\n", rc);
5570 goto rw_error; 5413 goto rw_error;
5571 } 5414 }
5572 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_SMA_RX_CFG__A, ext_attr->pdr_safe_restore_val_sma_rx, 0); 5415 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_SMA_RX_CFG__A, ext_attr->pdr_safe_restore_val_sma_rx, 0);
5573 if (rc != 0) { 5416 if (rc != 0) {
5574 pr_err("error %d\n", rc); 5417 pr_err("error %d\n", rc);
5575 goto rw_error; 5418 goto rw_error;
5576 } 5419 }
5577 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_SMA_TX_CFG__A, ext_attr->pdr_safe_restore_val_sma_tx, 0); 5420 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_SMA_TX_CFG__A, ext_attr->pdr_safe_restore_val_sma_tx, 0);
5578 if (rc != 0) { 5421 if (rc != 0) {
5579 pr_err("error %d\n", rc); 5422 pr_err("error %d\n", rc);
5580 goto rw_error; 5423 goto rw_error;
@@ -5591,7 +5434,7 @@ ctrl_set_cfg_pdr_safe_mode(struct drx_demod_instance *demod, bool *enable)
5591 } 5434 }
5592 5435
5593 /* Write magic word to disable pdr reg write */ 5436 /* Write magic word to disable pdr reg write */
5594 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0); 5437 rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0);
5595 if (rc != 0) { 5438 if (rc != 0) {
5596 pr_err("error %d\n", rc); 5439 pr_err("error %d\n", rc);
5597 goto rw_error; 5440 goto rw_error;
@@ -5684,67 +5527,67 @@ static int init_agc(struct drx_demod_instance *demod)
5684 ki_min = 0x0117; 5527 ki_min = 0x0117;
5685 ingain_tgt_max = 16383; 5528 ingain_tgt_max = 16383;
5686 clp_ctrl_mode = 0; 5529 clp_ctrl_mode = 0;
5687 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff, 0); 5530 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff, 0);
5688 if (rc != 0) { 5531 if (rc != 0) {
5689 pr_err("error %d\n", rc); 5532 pr_err("error %d\n", rc);
5690 goto rw_error; 5533 goto rw_error;
5691 } 5534 }
5692 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI_MAXGAIN__A, 0x0, 0); 5535 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_KI_MAXGAIN__A, 0x0, 0);
5693 if (rc != 0) { 5536 if (rc != 0) {
5694 pr_err("error %d\n", rc); 5537 pr_err("error %d\n", rc);
5695 goto rw_error; 5538 goto rw_error;
5696 } 5539 }
5697 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_CLP_SUM__A, 0, 0); 5540 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_CLP_SUM__A, 0, 0);
5698 if (rc != 0) { 5541 if (rc != 0) {
5699 pr_err("error %d\n", rc); 5542 pr_err("error %d\n", rc);
5700 goto rw_error; 5543 goto rw_error;
5701 } 5544 }
5702 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_CLP_CYCCNT__A, 0, 0); 5545 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_CLP_CYCCNT__A, 0, 0);
5703 if (rc != 0) { 5546 if (rc != 0) {
5704 pr_err("error %d\n", rc); 5547 pr_err("error %d\n", rc);
5705 goto rw_error; 5548 goto rw_error;
5706 } 5549 }
5707 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_CLP_DIR_WD__A, 0, 0); 5550 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_CLP_DIR_WD__A, 0, 0);
5708 if (rc != 0) { 5551 if (rc != 0) {
5709 pr_err("error %d\n", rc); 5552 pr_err("error %d\n", rc);
5710 goto rw_error; 5553 goto rw_error;
5711 } 5554 }
5712 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_CLP_DIR_STP__A, 1, 0); 5555 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_CLP_DIR_STP__A, 1, 0);
5713 if (rc != 0) { 5556 if (rc != 0) {
5714 pr_err("error %d\n", rc); 5557 pr_err("error %d\n", rc);
5715 goto rw_error; 5558 goto rw_error;
5716 } 5559 }
5717 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_SNS_SUM__A, 0, 0); 5560 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_SNS_SUM__A, 0, 0);
5718 if (rc != 0) { 5561 if (rc != 0) {
5719 pr_err("error %d\n", rc); 5562 pr_err("error %d\n", rc);
5720 goto rw_error; 5563 goto rw_error;
5721 } 5564 }
5722 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_SNS_CYCCNT__A, 0, 0); 5565 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_SNS_CYCCNT__A, 0, 0);
5723 if (rc != 0) { 5566 if (rc != 0) {
5724 pr_err("error %d\n", rc); 5567 pr_err("error %d\n", rc);
5725 goto rw_error; 5568 goto rw_error;
5726 } 5569 }
5727 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_SNS_DIR_WD__A, 0, 0); 5570 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_SNS_DIR_WD__A, 0, 0);
5728 if (rc != 0) { 5571 if (rc != 0) {
5729 pr_err("error %d\n", rc); 5572 pr_err("error %d\n", rc);
5730 goto rw_error; 5573 goto rw_error;
5731 } 5574 }
5732 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_SNS_DIR_STP__A, 1, 0); 5575 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_SNS_DIR_STP__A, 1, 0);
5733 if (rc != 0) { 5576 if (rc != 0) {
5734 pr_err("error %d\n", rc); 5577 pr_err("error %d\n", rc);
5735 goto rw_error; 5578 goto rw_error;
5736 } 5579 }
5737 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_INGAIN__A, 1024, 0); 5580 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_INGAIN__A, 1024, 0);
5738 if (rc != 0) { 5581 if (rc != 0) {
5739 pr_err("error %d\n", rc); 5582 pr_err("error %d\n", rc);
5740 goto rw_error; 5583 goto rw_error;
5741 } 5584 }
5742 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_VSB_AGC_POW_TGT__A, 22600, 0); 5585 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_VSB_AGC_POW_TGT__A, 22600, 0);
5743 if (rc != 0) { 5586 if (rc != 0) {
5744 pr_err("error %d\n", rc); 5587 pr_err("error %d\n", rc);
5745 goto rw_error; 5588 goto rw_error;
5746 } 5589 }
5747 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_INGAIN_TGT__A, 13200, 0); 5590 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_INGAIN_TGT__A, 13200, 0);
5748 if (rc != 0) { 5591 if (rc != 0) {
5749 pr_err("error %d\n", rc); 5592 pr_err("error %d\n", rc);
5750 goto rw_error; 5593 goto rw_error;
@@ -5767,71 +5610,71 @@ static int init_agc(struct drx_demod_instance *demod)
5767 agc_ki_dgain = 0x7; 5610 agc_ki_dgain = 0x7;
5768 ki_min = 0x0117; 5611 ki_min = 0x0117;
5769 clp_ctrl_mode = 0; 5612 clp_ctrl_mode = 0;
5770 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff, 0); 5613 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff, 0);
5771 if (rc != 0) { 5614 if (rc != 0) {
5772 pr_err("error %d\n", rc); 5615 pr_err("error %d\n", rc);
5773 goto rw_error; 5616 goto rw_error;
5774 } 5617 }
5775 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI_MAXGAIN__A, 0x0, 0); 5618 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_KI_MAXGAIN__A, 0x0, 0);
5776 if (rc != 0) { 5619 if (rc != 0) {
5777 pr_err("error %d\n", rc); 5620 pr_err("error %d\n", rc);
5778 goto rw_error; 5621 goto rw_error;
5779 } 5622 }
5780 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_CLP_SUM__A, 0, 0); 5623 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_CLP_SUM__A, 0, 0);
5781 if (rc != 0) { 5624 if (rc != 0) {
5782 pr_err("error %d\n", rc); 5625 pr_err("error %d\n", rc);
5783 goto rw_error; 5626 goto rw_error;
5784 } 5627 }
5785 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_CLP_CYCCNT__A, 0, 0); 5628 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_CLP_CYCCNT__A, 0, 0);
5786 if (rc != 0) { 5629 if (rc != 0) {
5787 pr_err("error %d\n", rc); 5630 pr_err("error %d\n", rc);
5788 goto rw_error; 5631 goto rw_error;
5789 } 5632 }
5790 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_CLP_DIR_WD__A, 0, 0); 5633 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_CLP_DIR_WD__A, 0, 0);
5791 if (rc != 0) { 5634 if (rc != 0) {
5792 pr_err("error %d\n", rc); 5635 pr_err("error %d\n", rc);
5793 goto rw_error; 5636 goto rw_error;
5794 } 5637 }
5795 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_CLP_DIR_STP__A, 1, 0); 5638 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_CLP_DIR_STP__A, 1, 0);
5796 if (rc != 0) { 5639 if (rc != 0) {
5797 pr_err("error %d\n", rc); 5640 pr_err("error %d\n", rc);
5798 goto rw_error; 5641 goto rw_error;
5799 } 5642 }
5800 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_SNS_SUM__A, 0, 0); 5643 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_SNS_SUM__A, 0, 0);
5801 if (rc != 0) { 5644 if (rc != 0) {
5802 pr_err("error %d\n", rc); 5645 pr_err("error %d\n", rc);
5803 goto rw_error; 5646 goto rw_error;
5804 } 5647 }
5805 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_SNS_CYCCNT__A, 0, 0); 5648 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_SNS_CYCCNT__A, 0, 0);
5806 if (rc != 0) { 5649 if (rc != 0) {
5807 pr_err("error %d\n", rc); 5650 pr_err("error %d\n", rc);
5808 goto rw_error; 5651 goto rw_error;
5809 } 5652 }
5810 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_SNS_DIR_WD__A, 0, 0); 5653 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_SNS_DIR_WD__A, 0, 0);
5811 if (rc != 0) { 5654 if (rc != 0) {
5812 pr_err("error %d\n", rc); 5655 pr_err("error %d\n", rc);
5813 goto rw_error; 5656 goto rw_error;
5814 } 5657 }
5815 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_SNS_DIR_STP__A, 1, 0); 5658 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_SNS_DIR_STP__A, 1, 0);
5816 if (rc != 0) { 5659 if (rc != 0) {
5817 pr_err("error %d\n", rc); 5660 pr_err("error %d\n", rc);
5818 goto rw_error; 5661 goto rw_error;
5819 } 5662 }
5820 p_agc_if_settings = &(ext_attr->qam_if_agc_cfg); 5663 p_agc_if_settings = &(ext_attr->qam_if_agc_cfg);
5821 p_agc_rf_settings = &(ext_attr->qam_rf_agc_cfg); 5664 p_agc_rf_settings = &(ext_attr->qam_rf_agc_cfg);
5822 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_INGAIN_TGT__A, p_agc_if_settings->top, 0); 5665 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_INGAIN_TGT__A, p_agc_if_settings->top, 0);
5823 if (rc != 0) { 5666 if (rc != 0) {
5824 pr_err("error %d\n", rc); 5667 pr_err("error %d\n", rc);
5825 goto rw_error; 5668 goto rw_error;
5826 } 5669 }
5827 5670
5828 rc = DRXJ_DAP.read_reg16func(dev_addr, SCU_RAM_AGC_KI__A, &agc_ki, 0); 5671 rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_AGC_KI__A, &agc_ki, 0);
5829 if (rc != 0) { 5672 if (rc != 0) {
5830 pr_err("error %d\n", rc); 5673 pr_err("error %d\n", rc);
5831 goto rw_error; 5674 goto rw_error;
5832 } 5675 }
5833 agc_ki &= 0xf000; 5676 agc_ki &= 0xf000;
5834 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI__A, agc_ki, 0); 5677 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_KI__A, agc_ki, 0);
5835 if (rc != 0) { 5678 if (rc != 0) {
5836 pr_err("error %d\n", rc); 5679 pr_err("error %d\n", rc);
5837 goto rw_error; 5680 goto rw_error;
@@ -5853,7 +5696,7 @@ static int init_agc(struct drx_demod_instance *demod)
5853 clp_ctrl_mode = 1; 5696 clp_ctrl_mode = 1;
5854 p_agc_if_settings = &(ext_attr->atv_if_agc_cfg); 5697 p_agc_if_settings = &(ext_attr->atv_if_agc_cfg);
5855 p_agc_rf_settings = &(ext_attr->atv_rf_agc_cfg); 5698 p_agc_rf_settings = &(ext_attr->atv_rf_agc_cfg);
5856 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_INGAIN_TGT__A, p_agc_if_settings->top, 0); 5699 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_INGAIN_TGT__A, p_agc_if_settings->top, 0);
5857 if (rc != 0) { 5700 if (rc != 0) {
5858 pr_err("error %d\n", rc); 5701 pr_err("error %d\n", rc);
5859 goto rw_error; 5702 goto rw_error;
@@ -5876,7 +5719,7 @@ static int init_agc(struct drx_demod_instance *demod)
5876 p_agc_rf_settings = &(ext_attr->atv_rf_agc_cfg); 5719 p_agc_rf_settings = &(ext_attr->atv_rf_agc_cfg);
5877 sns_dir_to = (u16) (-9); 5720 sns_dir_to = (u16) (-9);
5878 clp_ctrl_mode = 1; 5721 clp_ctrl_mode = 1;
5879 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_INGAIN_TGT__A, p_agc_if_settings->top, 0); 5722 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_INGAIN_TGT__A, p_agc_if_settings->top, 0);
5880 if (rc != 0) { 5723 if (rc != 0) {
5881 pr_err("error %d\n", rc); 5724 pr_err("error %d\n", rc);
5882 goto rw_error; 5725 goto rw_error;
@@ -5897,7 +5740,7 @@ static int init_agc(struct drx_demod_instance *demod)
5897 clp_ctrl_mode = 1; 5740 clp_ctrl_mode = 1;
5898 p_agc_if_settings = &(ext_attr->atv_if_agc_cfg); 5741 p_agc_if_settings = &(ext_attr->atv_if_agc_cfg);
5899 p_agc_rf_settings = &(ext_attr->atv_rf_agc_cfg); 5742 p_agc_rf_settings = &(ext_attr->atv_rf_agc_cfg);
5900 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_INGAIN_TGT__A, p_agc_if_settings->top, 0); 5743 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_INGAIN_TGT__A, p_agc_if_settings->top, 0);
5901 if (rc != 0) { 5744 if (rc != 0) {
5902 pr_err("error %d\n", rc); 5745 pr_err("error %d\n", rc);
5903 goto rw_error; 5746 goto rw_error;
@@ -5909,132 +5752,132 @@ static int init_agc(struct drx_demod_instance *demod)
5909 } 5752 }
5910 5753
5911 /* for new AGC interface */ 5754 /* for new AGC interface */
5912 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_INGAIN_TGT_MIN__A, p_agc_if_settings->top, 0); 5755 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_INGAIN_TGT_MIN__A, p_agc_if_settings->top, 0);
5913 if (rc != 0) { 5756 if (rc != 0) {
5914 pr_err("error %d\n", rc); 5757 pr_err("error %d\n", rc);
5915 goto rw_error; 5758 goto rw_error;
5916 } 5759 }
5917 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_INGAIN__A, p_agc_if_settings->top, 0); 5760 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_INGAIN__A, p_agc_if_settings->top, 0);
5918 if (rc != 0) { 5761 if (rc != 0) {
5919 pr_err("error %d\n", rc); 5762 pr_err("error %d\n", rc);
5920 goto rw_error; 5763 goto rw_error;
5921 } /* Gain fed from inner to outer AGC */ 5764 } /* Gain fed from inner to outer AGC */
5922 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_INGAIN_TGT_MAX__A, ingain_tgt_max, 0); 5765 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_INGAIN_TGT_MAX__A, ingain_tgt_max, 0);
5923 if (rc != 0) { 5766 if (rc != 0) {
5924 pr_err("error %d\n", rc); 5767 pr_err("error %d\n", rc);
5925 goto rw_error; 5768 goto rw_error;
5926 } 5769 }
5927 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_IF_IACCU_HI_TGT_MIN__A, if_iaccu_hi_tgt_min, 0); 5770 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_IF_IACCU_HI_TGT_MIN__A, if_iaccu_hi_tgt_min, 0);
5928 if (rc != 0) { 5771 if (rc != 0) {
5929 pr_err("error %d\n", rc); 5772 pr_err("error %d\n", rc);
5930 goto rw_error; 5773 goto rw_error;
5931 } 5774 }
5932 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_IF_IACCU_HI__A, 0, 0); 5775 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_IF_IACCU_HI__A, 0, 0);
5933 if (rc != 0) { 5776 if (rc != 0) {
5934 pr_err("error %d\n", rc); 5777 pr_err("error %d\n", rc);
5935 goto rw_error; 5778 goto rw_error;
5936 } /* set to p_agc_settings->top before */ 5779 } /* set to p_agc_settings->top before */
5937 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_IF_IACCU_LO__A, 0, 0); 5780 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_IF_IACCU_LO__A, 0, 0);
5938 if (rc != 0) { 5781 if (rc != 0) {
5939 pr_err("error %d\n", rc); 5782 pr_err("error %d\n", rc);
5940 goto rw_error; 5783 goto rw_error;
5941 } 5784 }
5942 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_RF_IACCU_HI__A, 0, 0); 5785 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_RF_IACCU_HI__A, 0, 0);
5943 if (rc != 0) { 5786 if (rc != 0) {
5944 pr_err("error %d\n", rc); 5787 pr_err("error %d\n", rc);
5945 goto rw_error; 5788 goto rw_error;
5946 } 5789 }
5947 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_RF_IACCU_LO__A, 0, 0); 5790 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_RF_IACCU_LO__A, 0, 0);
5948 if (rc != 0) { 5791 if (rc != 0) {
5949 pr_err("error %d\n", rc); 5792 pr_err("error %d\n", rc);
5950 goto rw_error; 5793 goto rw_error;
5951 } 5794 }
5952 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_RF_MAX__A, 32767, 0); 5795 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_RF_MAX__A, 32767, 0);
5953 if (rc != 0) { 5796 if (rc != 0) {
5954 pr_err("error %d\n", rc); 5797 pr_err("error %d\n", rc);
5955 goto rw_error; 5798 goto rw_error;
5956 } 5799 }
5957 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_CLP_SUM_MAX__A, clp_sum_max, 0); 5800 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_CLP_SUM_MAX__A, clp_sum_max, 0);
5958 if (rc != 0) { 5801 if (rc != 0) {
5959 pr_err("error %d\n", rc); 5802 pr_err("error %d\n", rc);
5960 goto rw_error; 5803 goto rw_error;
5961 } 5804 }
5962 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_SNS_SUM_MAX__A, sns_sum_max, 0); 5805 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_SNS_SUM_MAX__A, sns_sum_max, 0);
5963 if (rc != 0) { 5806 if (rc != 0) {
5964 pr_err("error %d\n", rc); 5807 pr_err("error %d\n", rc);
5965 goto rw_error; 5808 goto rw_error;
5966 } 5809 }
5967 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI_INNERGAIN_MIN__A, ki_innergain_min, 0); 5810 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_KI_INNERGAIN_MIN__A, ki_innergain_min, 0);
5968 if (rc != 0) { 5811 if (rc != 0) {
5969 pr_err("error %d\n", rc); 5812 pr_err("error %d\n", rc);
5970 goto rw_error; 5813 goto rw_error;
5971 } 5814 }
5972 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_FAST_SNS_CTRL_DELAY__A, 50, 0); 5815 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_FAST_SNS_CTRL_DELAY__A, 50, 0);
5973 if (rc != 0) { 5816 if (rc != 0) {
5974 pr_err("error %d\n", rc); 5817 pr_err("error %d\n", rc);
5975 goto rw_error; 5818 goto rw_error;
5976 } 5819 }
5977 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI_CYCLEN__A, 500, 0); 5820 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_KI_CYCLEN__A, 500, 0);
5978 if (rc != 0) { 5821 if (rc != 0) {
5979 pr_err("error %d\n", rc); 5822 pr_err("error %d\n", rc);
5980 goto rw_error; 5823 goto rw_error;
5981 } 5824 }
5982 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_SNS_CYCLEN__A, 500, 0); 5825 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_SNS_CYCLEN__A, 500, 0);
5983 if (rc != 0) { 5826 if (rc != 0) {
5984 pr_err("error %d\n", rc); 5827 pr_err("error %d\n", rc);
5985 goto rw_error; 5828 goto rw_error;
5986 } 5829 }
5987 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI_MAXMINGAIN_TH__A, 20, 0); 5830 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_KI_MAXMINGAIN_TH__A, 20, 0);
5988 if (rc != 0) { 5831 if (rc != 0) {
5989 pr_err("error %d\n", rc); 5832 pr_err("error %d\n", rc);
5990 goto rw_error; 5833 goto rw_error;
5991 } 5834 }
5992 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI_MIN__A, ki_min, 0); 5835 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_KI_MIN__A, ki_min, 0);
5993 if (rc != 0) { 5836 if (rc != 0) {
5994 pr_err("error %d\n", rc); 5837 pr_err("error %d\n", rc);
5995 goto rw_error; 5838 goto rw_error;
5996 } 5839 }
5997 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI_MAX__A, ki_max, 0); 5840 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_KI_MAX__A, ki_max, 0);
5998 if (rc != 0) { 5841 if (rc != 0) {
5999 pr_err("error %d\n", rc); 5842 pr_err("error %d\n", rc);
6000 goto rw_error; 5843 goto rw_error;
6001 } 5844 }
6002 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI_RED__A, 0, 0); 5845 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_KI_RED__A, 0, 0);
6003 if (rc != 0) { 5846 if (rc != 0) {
6004 pr_err("error %d\n", rc); 5847 pr_err("error %d\n", rc);
6005 goto rw_error; 5848 goto rw_error;
6006 } 5849 }
6007 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_CLP_SUM_MIN__A, 8, 0); 5850 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_CLP_SUM_MIN__A, 8, 0);
6008 if (rc != 0) { 5851 if (rc != 0) {
6009 pr_err("error %d\n", rc); 5852 pr_err("error %d\n", rc);
6010 goto rw_error; 5853 goto rw_error;
6011 } 5854 }
6012 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_CLP_CYCLEN__A, 500, 0); 5855 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_CLP_CYCLEN__A, 500, 0);
6013 if (rc != 0) { 5856 if (rc != 0) {
6014 pr_err("error %d\n", rc); 5857 pr_err("error %d\n", rc);
6015 goto rw_error; 5858 goto rw_error;
6016 } 5859 }
6017 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_CLP_DIR_TO__A, clp_dir_to, 0); 5860 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_CLP_DIR_TO__A, clp_dir_to, 0);
6018 if (rc != 0) { 5861 if (rc != 0) {
6019 pr_err("error %d\n", rc); 5862 pr_err("error %d\n", rc);
6020 goto rw_error; 5863 goto rw_error;
6021 } 5864 }
6022 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_SNS_SUM_MIN__A, 8, 0); 5865 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_SNS_SUM_MIN__A, 8, 0);
6023 if (rc != 0) { 5866 if (rc != 0) {
6024 pr_err("error %d\n", rc); 5867 pr_err("error %d\n", rc);
6025 goto rw_error; 5868 goto rw_error;
6026 } 5869 }
6027 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_SNS_DIR_TO__A, sns_dir_to, 0); 5870 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_SNS_DIR_TO__A, sns_dir_to, 0);
6028 if (rc != 0) { 5871 if (rc != 0) {
6029 pr_err("error %d\n", rc); 5872 pr_err("error %d\n", rc);
6030 goto rw_error; 5873 goto rw_error;
6031 } 5874 }
6032 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, 50, 0); 5875 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, 50, 0);
6033 if (rc != 0) { 5876 if (rc != 0) {
6034 pr_err("error %d\n", rc); 5877 pr_err("error %d\n", rc);
6035 goto rw_error; 5878 goto rw_error;
6036 } 5879 }
6037 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_CLP_CTRL_MODE__A, clp_ctrl_mode, 0); 5880 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_CLP_CTRL_MODE__A, clp_ctrl_mode, 0);
6038 if (rc != 0) { 5881 if (rc != 0) {
6039 pr_err("error %d\n", rc); 5882 pr_err("error %d\n", rc);
6040 goto rw_error; 5883 goto rw_error;
@@ -6048,26 +5891,26 @@ static int init_agc(struct drx_demod_instance *demod)
6048 if (common_attr->tuner_if_agc_pol == true) 5891 if (common_attr->tuner_if_agc_pol == true)
6049 agc_rf = 0x87ff - agc_rf; 5892 agc_rf = 0x87ff - agc_rf;
6050 5893
6051 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_AGC_RF__A, agc_rf, 0); 5894 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_AGC_RF__A, agc_rf, 0);
6052 if (rc != 0) { 5895 if (rc != 0) {
6053 pr_err("error %d\n", rc); 5896 pr_err("error %d\n", rc);
6054 goto rw_error; 5897 goto rw_error;
6055 } 5898 }
6056 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_AGC_IF__A, agc_if, 0); 5899 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_AGC_IF__A, agc_if, 0);
6057 if (rc != 0) { 5900 if (rc != 0) {
6058 pr_err("error %d\n", rc); 5901 pr_err("error %d\n", rc);
6059 goto rw_error; 5902 goto rw_error;
6060 } 5903 }
6061 5904
6062 /* Set/restore Ki DGAIN factor */ 5905 /* Set/restore Ki DGAIN factor */
6063 rc = DRXJ_DAP.read_reg16func(dev_addr, SCU_RAM_AGC_KI__A, &data, 0); 5906 rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_AGC_KI__A, &data, 0);
6064 if (rc != 0) { 5907 if (rc != 0) {
6065 pr_err("error %d\n", rc); 5908 pr_err("error %d\n", rc);
6066 goto rw_error; 5909 goto rw_error;
6067 } 5910 }
6068 data &= ~SCU_RAM_AGC_KI_DGAIN__M; 5911 data &= ~SCU_RAM_AGC_KI_DGAIN__M;
6069 data |= (agc_ki_dgain << SCU_RAM_AGC_KI_DGAIN__B); 5912 data |= (agc_ki_dgain << SCU_RAM_AGC_KI_DGAIN__B);
6070 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI__A, data, 0); 5913 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_AGC_KI__A, data, 0);
6071 if (rc != 0) { 5914 if (rc != 0) {
6072 pr_err("error %d\n", rc); 5915 pr_err("error %d\n", rc);
6073 goto rw_error; 5916 goto rw_error;
@@ -6162,7 +6005,7 @@ set_frequency(struct drx_demod_instance *demod,
6162 6005
6163 /* Program frequency shifter with tuner offset compensation */ 6006 /* Program frequency shifter with tuner offset compensation */
6164 /* frequency_shift += tuner_freq_offset; TODO */ 6007 /* frequency_shift += tuner_freq_offset; TODO */
6165 rc = DRXJ_DAP.write_reg32func(dev_addr, IQM_FS_RATE_OFS_LO__A, iqm_fs_rate_ofs, 0); 6008 rc = drxdap_fasi_write_reg32(dev_addr, IQM_FS_RATE_OFS_LO__A, iqm_fs_rate_ofs, 0);
6166 if (rc != 0) { 6009 if (rc != 0) {
6167 pr_err("error %d\n", rc); 6010 pr_err("error %d\n", rc);
6168 goto rw_error; 6011 goto rw_error;
@@ -6202,13 +6045,13 @@ static int get_sig_strength(struct drx_demod_instance *demod, u16 *sig_strength)
6202 u16 rf_agc_max = 0; 6045 u16 rf_agc_max = 0;
6203 u16 rf_agc_min = 0; 6046 u16 rf_agc_min = 0;
6204 6047
6205 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_AGC_IF__A, &if_gain, 0); 6048 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_AGC_IF__A, &if_gain, 0);
6206 if (rc != 0) { 6049 if (rc != 0) {
6207 pr_err("error %d\n", rc); 6050 pr_err("error %d\n", rc);
6208 goto rw_error; 6051 goto rw_error;
6209 } 6052 }
6210 if_gain &= IQM_AF_AGC_IF__M; 6053 if_gain &= IQM_AF_AGC_IF__M;
6211 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_AGC_RF__A, &rf_gain, 0); 6054 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_AGC_RF__A, &rf_gain, 0);
6212 if (rc != 0) { 6055 if (rc != 0) {
6213 pr_err("error %d\n", rc); 6056 pr_err("error %d\n", rc);
6214 goto rw_error; 6057 goto rw_error;
@@ -6277,7 +6120,7 @@ static int get_acc_pkt_err(struct drx_demod_instance *demod, u16 *packet_err)
6277 ext_attr = (struct drxj_data *) demod->my_ext_attr; 6120 ext_attr = (struct drxj_data *) demod->my_ext_attr;
6278 dev_addr = demod->my_i2c_dev_addr; 6121 dev_addr = demod->my_i2c_dev_addr;
6279 6122
6280 rc = DRXJ_DAP.read_reg16func(dev_addr, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, &data, 0); 6123 rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, &data, 0);
6281 if (rc != 0) { 6124 if (rc != 0) {
6282 pr_err("error %d\n", rc); 6125 pr_err("error %d\n", rc);
6283 goto rw_error; 6126 goto rw_error;
@@ -6456,8 +6299,8 @@ set_agc_rf(struct drx_demod_instance *demod, struct drxj_cfg_agc *agc_settings,
6456 scu_rr16 = drxj_dap_scu_atomic_read_reg16; 6299 scu_rr16 = drxj_dap_scu_atomic_read_reg16;
6457 scu_wr16 = drxj_dap_scu_atomic_write_reg16; 6300 scu_wr16 = drxj_dap_scu_atomic_write_reg16;
6458 } else { 6301 } else {
6459 scu_rr16 = DRXJ_DAP.read_reg16func; 6302 scu_rr16 = drxj_dap_read_reg16;
6460 scu_wr16 = DRXJ_DAP.write_reg16func; 6303 scu_wr16 = drxj_dap_write_reg16;
6461 } 6304 }
6462 6305
6463 /* Configure AGC only if standard is currently active */ 6306 /* Configure AGC only if standard is currently active */
@@ -6472,13 +6315,13 @@ set_agc_rf(struct drx_demod_instance *demod, struct drxj_cfg_agc *agc_settings,
6472 case DRX_AGC_CTRL_AUTO: 6315 case DRX_AGC_CTRL_AUTO:
6473 6316
6474 /* Enable RF AGC DAC */ 6317 /* Enable RF AGC DAC */
6475 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_STDBY__A, &data, 0); 6318 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_STDBY__A, &data, 0);
6476 if (rc != 0) { 6319 if (rc != 0) {
6477 pr_err("error %d\n", rc); 6320 pr_err("error %d\n", rc);
6478 goto rw_error; 6321 goto rw_error;
6479 } 6322 }
6480 data |= IQM_AF_STDBY_STDBY_TAGC_RF_A2_ACTIVE; 6323 data |= IQM_AF_STDBY_STDBY_TAGC_RF_A2_ACTIVE;
6481 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_STDBY__A, data, 0); 6324 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_STDBY__A, data, 0);
6482 if (rc != 0) { 6325 if (rc != 0) {
6483 pr_err("error %d\n", rc); 6326 pr_err("error %d\n", rc);
6484 goto rw_error; 6327 goto rw_error;
@@ -6554,13 +6397,13 @@ set_agc_rf(struct drx_demod_instance *demod, struct drxj_cfg_agc *agc_settings,
6554 case DRX_AGC_CTRL_USER: 6397 case DRX_AGC_CTRL_USER:
6555 6398
6556 /* Enable RF AGC DAC */ 6399 /* Enable RF AGC DAC */
6557 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_STDBY__A, &data, 0); 6400 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_STDBY__A, &data, 0);
6558 if (rc != 0) { 6401 if (rc != 0) {
6559 pr_err("error %d\n", rc); 6402 pr_err("error %d\n", rc);
6560 goto rw_error; 6403 goto rw_error;
6561 } 6404 }
6562 data |= IQM_AF_STDBY_STDBY_TAGC_RF_A2_ACTIVE; 6405 data |= IQM_AF_STDBY_STDBY_TAGC_RF_A2_ACTIVE;
6563 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_STDBY__A, data, 0); 6406 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_STDBY__A, data, 0);
6564 if (rc != 0) { 6407 if (rc != 0) {
6565 pr_err("error %d\n", rc); 6408 pr_err("error %d\n", rc);
6566 goto rw_error; 6409 goto rw_error;
@@ -6593,13 +6436,13 @@ set_agc_rf(struct drx_demod_instance *demod, struct drxj_cfg_agc *agc_settings,
6593 case DRX_AGC_CTRL_OFF: 6436 case DRX_AGC_CTRL_OFF:
6594 6437
6595 /* Disable RF AGC DAC */ 6438 /* Disable RF AGC DAC */
6596 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_STDBY__A, &data, 0); 6439 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_STDBY__A, &data, 0);
6597 if (rc != 0) { 6440 if (rc != 0) {
6598 pr_err("error %d\n", rc); 6441 pr_err("error %d\n", rc);
6599 goto rw_error; 6442 goto rw_error;
6600 } 6443 }
6601 data &= (~IQM_AF_STDBY_STDBY_TAGC_RF_A2_ACTIVE); 6444 data &= (~IQM_AF_STDBY_STDBY_TAGC_RF_A2_ACTIVE);
6602 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_STDBY__A, data, 0); 6445 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_STDBY__A, data, 0);
6603 if (rc != 0) { 6446 if (rc != 0) {
6604 pr_err("error %d\n", rc); 6447 pr_err("error %d\n", rc);
6605 goto rw_error; 6448 goto rw_error;
@@ -6748,8 +6591,8 @@ set_agc_if(struct drx_demod_instance *demod, struct drxj_cfg_agc *agc_settings,
6748 scu_rr16 = drxj_dap_scu_atomic_read_reg16; 6591 scu_rr16 = drxj_dap_scu_atomic_read_reg16;
6749 scu_wr16 = drxj_dap_scu_atomic_write_reg16; 6592 scu_wr16 = drxj_dap_scu_atomic_write_reg16;
6750 } else { 6593 } else {
6751 scu_rr16 = DRXJ_DAP.read_reg16func; 6594 scu_rr16 = drxj_dap_read_reg16;
6752 scu_wr16 = DRXJ_DAP.write_reg16func; 6595 scu_wr16 = drxj_dap_write_reg16;
6753 } 6596 }
6754 6597
6755 /* Configure AGC only if standard is currently active */ 6598 /* Configure AGC only if standard is currently active */
@@ -6763,13 +6606,13 @@ set_agc_if(struct drx_demod_instance *demod, struct drxj_cfg_agc *agc_settings,
6763 switch (agc_settings->ctrl_mode) { 6606 switch (agc_settings->ctrl_mode) {
6764 case DRX_AGC_CTRL_AUTO: 6607 case DRX_AGC_CTRL_AUTO:
6765 /* Enable IF AGC DAC */ 6608 /* Enable IF AGC DAC */
6766 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_STDBY__A, &data, 0); 6609 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_STDBY__A, &data, 0);
6767 if (rc != 0) { 6610 if (rc != 0) {
6768 pr_err("error %d\n", rc); 6611 pr_err("error %d\n", rc);
6769 goto rw_error; 6612 goto rw_error;
6770 } 6613 }
6771 data |= IQM_AF_STDBY_STDBY_TAGC_IF_A2_ACTIVE; 6614 data |= IQM_AF_STDBY_STDBY_TAGC_IF_A2_ACTIVE;
6772 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_STDBY__A, data, 0); 6615 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_STDBY__A, data, 0);
6773 if (rc != 0) { 6616 if (rc != 0) {
6774 pr_err("error %d\n", rc); 6617 pr_err("error %d\n", rc);
6775 goto rw_error; 6618 goto rw_error;
@@ -6851,13 +6694,13 @@ set_agc_if(struct drx_demod_instance *demod, struct drxj_cfg_agc *agc_settings,
6851 case DRX_AGC_CTRL_USER: 6694 case DRX_AGC_CTRL_USER:
6852 6695
6853 /* Enable IF AGC DAC */ 6696 /* Enable IF AGC DAC */
6854 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_STDBY__A, &data, 0); 6697 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_STDBY__A, &data, 0);
6855 if (rc != 0) { 6698 if (rc != 0) {
6856 pr_err("error %d\n", rc); 6699 pr_err("error %d\n", rc);
6857 goto rw_error; 6700 goto rw_error;
6858 } 6701 }
6859 data |= IQM_AF_STDBY_STDBY_TAGC_IF_A2_ACTIVE; 6702 data |= IQM_AF_STDBY_STDBY_TAGC_IF_A2_ACTIVE;
6860 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_STDBY__A, data, 0); 6703 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_STDBY__A, data, 0);
6861 if (rc != 0) { 6704 if (rc != 0) {
6862 pr_err("error %d\n", rc); 6705 pr_err("error %d\n", rc);
6863 goto rw_error; 6706 goto rw_error;
@@ -6892,13 +6735,13 @@ set_agc_if(struct drx_demod_instance *demod, struct drxj_cfg_agc *agc_settings,
6892 case DRX_AGC_CTRL_OFF: 6735 case DRX_AGC_CTRL_OFF:
6893 6736
6894 /* Disable If AGC DAC */ 6737 /* Disable If AGC DAC */
6895 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_STDBY__A, &data, 0); 6738 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_STDBY__A, &data, 0);
6896 if (rc != 0) { 6739 if (rc != 0) {
6897 pr_err("error %d\n", rc); 6740 pr_err("error %d\n", rc);
6898 goto rw_error; 6741 goto rw_error;
6899 } 6742 }
6900 data &= (~IQM_AF_STDBY_STDBY_TAGC_IF_A2_ACTIVE); 6743 data &= (~IQM_AF_STDBY_STDBY_TAGC_IF_A2_ACTIVE);
6901 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_STDBY__A, data, 0); 6744 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_STDBY__A, data, 0);
6902 if (rc != 0) { 6745 if (rc != 0) {
6903 pr_err("error %d\n", rc); 6746 pr_err("error %d\n", rc);
6904 goto rw_error; 6747 goto rw_error;
@@ -7044,7 +6887,7 @@ static int set_iqm_af(struct drx_demod_instance *demod, bool active)
7044 dev_addr = demod->my_i2c_dev_addr; 6887 dev_addr = demod->my_i2c_dev_addr;
7045 6888
7046 /* Configure IQM */ 6889 /* Configure IQM */
7047 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_STDBY__A, &data, 0); 6890 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_STDBY__A, &data, 0);
7048 if (rc != 0) { 6891 if (rc != 0) {
7049 pr_err("error %d\n", rc); 6892 pr_err("error %d\n", rc);
7050 goto rw_error; 6893 goto rw_error;
@@ -7053,7 +6896,7 @@ static int set_iqm_af(struct drx_demod_instance *demod, bool active)
7053 data &= ((~IQM_AF_STDBY_STDBY_ADC_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_AMP_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_PD_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_TAGC_IF_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_TAGC_RF_A2_ACTIVE)); 6896 data &= ((~IQM_AF_STDBY_STDBY_ADC_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_AMP_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_PD_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_TAGC_IF_A2_ACTIVE) & (~IQM_AF_STDBY_STDBY_TAGC_RF_A2_ACTIVE));
7054 else 6897 else
7055 data |= (IQM_AF_STDBY_STDBY_ADC_A2_ACTIVE | IQM_AF_STDBY_STDBY_AMP_A2_ACTIVE | IQM_AF_STDBY_STDBY_PD_A2_ACTIVE | IQM_AF_STDBY_STDBY_TAGC_IF_A2_ACTIVE | IQM_AF_STDBY_STDBY_TAGC_RF_A2_ACTIVE); 6898 data |= (IQM_AF_STDBY_STDBY_ADC_A2_ACTIVE | IQM_AF_STDBY_STDBY_AMP_A2_ACTIVE | IQM_AF_STDBY_STDBY_PD_A2_ACTIVE | IQM_AF_STDBY_STDBY_TAGC_IF_A2_ACTIVE | IQM_AF_STDBY_STDBY_TAGC_RF_A2_ACTIVE);
7056 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_STDBY__A, data, 0); 6899 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_STDBY__A, data, 0);
7057 if (rc != 0) { 6900 if (rc != 0) {
7058 pr_err("error %d\n", rc); 6901 pr_err("error %d\n", rc);
7059 goto rw_error; 6902 goto rw_error;
@@ -7111,18 +6954,18 @@ static int power_down_vsb(struct drx_demod_instance *demod, bool primary)
7111 } 6954 }
7112 6955
7113 /* stop all comm_exec */ 6956 /* stop all comm_exec */
7114 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP, 0); 6957 rc = drxj_dap_write_reg16(dev_addr, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP, 0);
7115 if (rc != 0) { 6958 if (rc != 0) {
7116 pr_err("error %d\n", rc); 6959 pr_err("error %d\n", rc);
7117 goto rw_error; 6960 goto rw_error;
7118 } 6961 }
7119 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_COMM_EXEC__A, VSB_COMM_EXEC_STOP, 0); 6962 rc = drxj_dap_write_reg16(dev_addr, VSB_COMM_EXEC__A, VSB_COMM_EXEC_STOP, 0);
7120 if (rc != 0) { 6963 if (rc != 0) {
7121 pr_err("error %d\n", rc); 6964 pr_err("error %d\n", rc);
7122 goto rw_error; 6965 goto rw_error;
7123 } 6966 }
7124 if (primary) { 6967 if (primary) {
7125 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_COMM_EXEC__A, IQM_COMM_EXEC_STOP, 0); 6968 rc = drxj_dap_write_reg16(dev_addr, IQM_COMM_EXEC__A, IQM_COMM_EXEC_STOP, 0);
7126 if (rc != 0) { 6969 if (rc != 0) {
7127 pr_err("error %d\n", rc); 6970 pr_err("error %d\n", rc);
7128 goto rw_error; 6971 goto rw_error;
@@ -7133,27 +6976,27 @@ static int power_down_vsb(struct drx_demod_instance *demod, bool primary)
7133 goto rw_error; 6976 goto rw_error;
7134 } 6977 }
7135 } else { 6978 } else {
7136 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_FS_COMM_EXEC__A, IQM_FS_COMM_EXEC_STOP, 0); 6979 rc = drxj_dap_write_reg16(dev_addr, IQM_FS_COMM_EXEC__A, IQM_FS_COMM_EXEC_STOP, 0);
7137 if (rc != 0) { 6980 if (rc != 0) {
7138 pr_err("error %d\n", rc); 6981 pr_err("error %d\n", rc);
7139 goto rw_error; 6982 goto rw_error;
7140 } 6983 }
7141 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_FD_COMM_EXEC__A, IQM_FD_COMM_EXEC_STOP, 0); 6984 rc = drxj_dap_write_reg16(dev_addr, IQM_FD_COMM_EXEC__A, IQM_FD_COMM_EXEC_STOP, 0);
7142 if (rc != 0) { 6985 if (rc != 0) {
7143 pr_err("error %d\n", rc); 6986 pr_err("error %d\n", rc);
7144 goto rw_error; 6987 goto rw_error;
7145 } 6988 }
7146 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RC_COMM_EXEC__A, IQM_RC_COMM_EXEC_STOP, 0); 6989 rc = drxj_dap_write_reg16(dev_addr, IQM_RC_COMM_EXEC__A, IQM_RC_COMM_EXEC_STOP, 0);
7147 if (rc != 0) { 6990 if (rc != 0) {
7148 pr_err("error %d\n", rc); 6991 pr_err("error %d\n", rc);
7149 goto rw_error; 6992 goto rw_error;
7150 } 6993 }
7151 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_COMM_EXEC__A, IQM_RT_COMM_EXEC_STOP, 0); 6994 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_COMM_EXEC__A, IQM_RT_COMM_EXEC_STOP, 0);
7152 if (rc != 0) { 6995 if (rc != 0) {
7153 pr_err("error %d\n", rc); 6996 pr_err("error %d\n", rc);
7154 goto rw_error; 6997 goto rw_error;
7155 } 6998 }
7156 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_COMM_EXEC__A, IQM_CF_COMM_EXEC_STOP, 0); 6999 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_COMM_EXEC__A, IQM_CF_COMM_EXEC_STOP, 0);
7157 if (rc != 0) { 7000 if (rc != 0) {
7158 pr_err("error %d\n", rc); 7001 pr_err("error %d\n", rc);
7159 goto rw_error; 7002 goto rw_error;
@@ -7372,12 +7215,12 @@ static int set_vsb_leak_n_gain(struct drx_demod_instance *demod)
7372 }; 7215 };
7373 7216
7374 dev_addr = demod->my_i2c_dev_addr; 7217 dev_addr = demod->my_i2c_dev_addr;
7375 rc = DRXJ_DAP.write_block_func(dev_addr, VSB_SYSCTRL_RAM0_FFETRAINLKRATIO1__A, sizeof(vsb_ffe_leak_gain_ram0), ((u8 *)vsb_ffe_leak_gain_ram0), 0); 7218 rc = drxdap_fasi_write_block(dev_addr, VSB_SYSCTRL_RAM0_FFETRAINLKRATIO1__A, sizeof(vsb_ffe_leak_gain_ram0), ((u8 *)vsb_ffe_leak_gain_ram0), 0);
7376 if (rc != 0) { 7219 if (rc != 0) {
7377 pr_err("error %d\n", rc); 7220 pr_err("error %d\n", rc);
7378 goto rw_error; 7221 goto rw_error;
7379 } 7222 }
7380 rc = DRXJ_DAP.write_block_func(dev_addr, VSB_SYSCTRL_RAM1_FIRRCA1GAIN9__A, sizeof(vsb_ffe_leak_gain_ram1), ((u8 *)vsb_ffe_leak_gain_ram1), 0); 7223 rc = drxdap_fasi_write_block(dev_addr, VSB_SYSCTRL_RAM1_FIRRCA1GAIN9__A, sizeof(vsb_ffe_leak_gain_ram1), ((u8 *)vsb_ffe_leak_gain_ram1), 0);
7381 if (rc != 0) { 7224 if (rc != 0) {
7382 pr_err("error %d\n", rc); 7225 pr_err("error %d\n", rc);
7383 goto rw_error; 7226 goto rw_error;
@@ -7440,37 +7283,37 @@ static int set_vsb(struct drx_demod_instance *demod)
7440 ext_attr = (struct drxj_data *) demod->my_ext_attr; 7283 ext_attr = (struct drxj_data *) demod->my_ext_attr;
7441 7284
7442 /* stop all comm_exec */ 7285 /* stop all comm_exec */
7443 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP, 0); 7286 rc = drxj_dap_write_reg16(dev_addr, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP, 0);
7444 if (rc != 0) { 7287 if (rc != 0) {
7445 pr_err("error %d\n", rc); 7288 pr_err("error %d\n", rc);
7446 goto rw_error; 7289 goto rw_error;
7447 } 7290 }
7448 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_COMM_EXEC__A, VSB_COMM_EXEC_STOP, 0); 7291 rc = drxj_dap_write_reg16(dev_addr, VSB_COMM_EXEC__A, VSB_COMM_EXEC_STOP, 0);
7449 if (rc != 0) { 7292 if (rc != 0) {
7450 pr_err("error %d\n", rc); 7293 pr_err("error %d\n", rc);
7451 goto rw_error; 7294 goto rw_error;
7452 } 7295 }
7453 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_FS_COMM_EXEC__A, IQM_FS_COMM_EXEC_STOP, 0); 7296 rc = drxj_dap_write_reg16(dev_addr, IQM_FS_COMM_EXEC__A, IQM_FS_COMM_EXEC_STOP, 0);
7454 if (rc != 0) { 7297 if (rc != 0) {
7455 pr_err("error %d\n", rc); 7298 pr_err("error %d\n", rc);
7456 goto rw_error; 7299 goto rw_error;
7457 } 7300 }
7458 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_FD_COMM_EXEC__A, IQM_FD_COMM_EXEC_STOP, 0); 7301 rc = drxj_dap_write_reg16(dev_addr, IQM_FD_COMM_EXEC__A, IQM_FD_COMM_EXEC_STOP, 0);
7459 if (rc != 0) { 7302 if (rc != 0) {
7460 pr_err("error %d\n", rc); 7303 pr_err("error %d\n", rc);
7461 goto rw_error; 7304 goto rw_error;
7462 } 7305 }
7463 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RC_COMM_EXEC__A, IQM_RC_COMM_EXEC_STOP, 0); 7306 rc = drxj_dap_write_reg16(dev_addr, IQM_RC_COMM_EXEC__A, IQM_RC_COMM_EXEC_STOP, 0);
7464 if (rc != 0) { 7307 if (rc != 0) {
7465 pr_err("error %d\n", rc); 7308 pr_err("error %d\n", rc);
7466 goto rw_error; 7309 goto rw_error;
7467 } 7310 }
7468 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_COMM_EXEC__A, IQM_RT_COMM_EXEC_STOP, 0); 7311 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_COMM_EXEC__A, IQM_RT_COMM_EXEC_STOP, 0);
7469 if (rc != 0) { 7312 if (rc != 0) {
7470 pr_err("error %d\n", rc); 7313 pr_err("error %d\n", rc);
7471 goto rw_error; 7314 goto rw_error;
7472 } 7315 }
7473 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_COMM_EXEC__A, IQM_CF_COMM_EXEC_STOP, 0); 7316 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_COMM_EXEC__A, IQM_CF_COMM_EXEC_STOP, 0);
7474 if (rc != 0) { 7317 if (rc != 0) {
7475 pr_err("error %d\n", rc); 7318 pr_err("error %d\n", rc);
7476 goto rw_error; 7319 goto rw_error;
@@ -7489,141 +7332,141 @@ static int set_vsb(struct drx_demod_instance *demod)
7489 goto rw_error; 7332 goto rw_error;
7490 } 7333 }
7491 7334
7492 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_DCF_BYPASS__A, 1, 0); 7335 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_DCF_BYPASS__A, 1, 0);
7493 if (rc != 0) { 7336 if (rc != 0) {
7494 pr_err("error %d\n", rc); 7337 pr_err("error %d\n", rc);
7495 goto rw_error; 7338 goto rw_error;
7496 } 7339 }
7497 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_FS_ADJ_SEL__A, IQM_FS_ADJ_SEL_B_VSB, 0); 7340 rc = drxj_dap_write_reg16(dev_addr, IQM_FS_ADJ_SEL__A, IQM_FS_ADJ_SEL_B_VSB, 0);
7498 if (rc != 0) { 7341 if (rc != 0) {
7499 pr_err("error %d\n", rc); 7342 pr_err("error %d\n", rc);
7500 goto rw_error; 7343 goto rw_error;
7501 } 7344 }
7502 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RC_ADJ_SEL__A, IQM_RC_ADJ_SEL_B_VSB, 0); 7345 rc = drxj_dap_write_reg16(dev_addr, IQM_RC_ADJ_SEL__A, IQM_RC_ADJ_SEL_B_VSB, 0);
7503 if (rc != 0) { 7346 if (rc != 0) {
7504 pr_err("error %d\n", rc); 7347 pr_err("error %d\n", rc);
7505 goto rw_error; 7348 goto rw_error;
7506 } 7349 }
7507 ext_attr->iqm_rc_rate_ofs = 0x00AD0D79; 7350 ext_attr->iqm_rc_rate_ofs = 0x00AD0D79;
7508 rc = DRXJ_DAP.write_reg32func(dev_addr, IQM_RC_RATE_OFS_LO__A, ext_attr->iqm_rc_rate_ofs, 0); 7351 rc = drxdap_fasi_write_reg32(dev_addr, IQM_RC_RATE_OFS_LO__A, ext_attr->iqm_rc_rate_ofs, 0);
7509 if (rc != 0) { 7352 if (rc != 0) {
7510 pr_err("error %d\n", rc); 7353 pr_err("error %d\n", rc);
7511 goto rw_error; 7354 goto rw_error;
7512 } 7355 }
7513 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_CFAGC_GAINSHIFT__A, 4, 0); 7356 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_CFAGC_GAINSHIFT__A, 4, 0);
7514 if (rc != 0) { 7357 if (rc != 0) {
7515 pr_err("error %d\n", rc); 7358 pr_err("error %d\n", rc);
7516 goto rw_error; 7359 goto rw_error;
7517 } 7360 }
7518 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_CYGN1TRK__A, 1, 0); 7361 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_CYGN1TRK__A, 1, 0);
7519 if (rc != 0) { 7362 if (rc != 0) {
7520 pr_err("error %d\n", rc); 7363 pr_err("error %d\n", rc);
7521 goto rw_error; 7364 goto rw_error;
7522 } 7365 }
7523 7366
7524 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RC_CROUT_ENA__A, 1, 0); 7367 rc = drxj_dap_write_reg16(dev_addr, IQM_RC_CROUT_ENA__A, 1, 0);
7525 if (rc != 0) { 7368 if (rc != 0) {
7526 pr_err("error %d\n", rc); 7369 pr_err("error %d\n", rc);
7527 goto rw_error; 7370 goto rw_error;
7528 } 7371 }
7529 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RC_STRETCH__A, 28, 0); 7372 rc = drxj_dap_write_reg16(dev_addr, IQM_RC_STRETCH__A, 28, 0);
7530 if (rc != 0) { 7373 if (rc != 0) {
7531 pr_err("error %d\n", rc); 7374 pr_err("error %d\n", rc);
7532 goto rw_error; 7375 goto rw_error;
7533 } 7376 }
7534 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_ACTIVE__A, 0, 0); 7377 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_ACTIVE__A, 0, 0);
7535 if (rc != 0) { 7378 if (rc != 0) {
7536 pr_err("error %d\n", rc); 7379 pr_err("error %d\n", rc);
7537 goto rw_error; 7380 goto rw_error;
7538 } 7381 }
7539 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_SYMMETRIC__A, 0, 0); 7382 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_SYMMETRIC__A, 0, 0);
7540 if (rc != 0) { 7383 if (rc != 0) {
7541 pr_err("error %d\n", rc); 7384 pr_err("error %d\n", rc);
7542 goto rw_error; 7385 goto rw_error;
7543 } 7386 }
7544 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_MIDTAP__A, 3, 0); 7387 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_MIDTAP__A, 3, 0);
7545 if (rc != 0) { 7388 if (rc != 0) {
7546 pr_err("error %d\n", rc); 7389 pr_err("error %d\n", rc);
7547 goto rw_error; 7390 goto rw_error;
7548 } 7391 }
7549 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_OUT_ENA__A, IQM_CF_OUT_ENA_VSB__M, 0); 7392 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_OUT_ENA__A, IQM_CF_OUT_ENA_VSB__M, 0);
7550 if (rc != 0) { 7393 if (rc != 0) {
7551 pr_err("error %d\n", rc); 7394 pr_err("error %d\n", rc);
7552 goto rw_error; 7395 goto rw_error;
7553 } 7396 }
7554 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_SCALE__A, 1393, 0); 7397 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_SCALE__A, 1393, 0);
7555 if (rc != 0) { 7398 if (rc != 0) {
7556 pr_err("error %d\n", rc); 7399 pr_err("error %d\n", rc);
7557 goto rw_error; 7400 goto rw_error;
7558 } 7401 }
7559 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_SCALE_SH__A, 0, 0); 7402 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_SCALE_SH__A, 0, 0);
7560 if (rc != 0) { 7403 if (rc != 0) {
7561 pr_err("error %d\n", rc); 7404 pr_err("error %d\n", rc);
7562 goto rw_error; 7405 goto rw_error;
7563 } 7406 }
7564 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_POW_MEAS_LEN__A, 1, 0); 7407 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_POW_MEAS_LEN__A, 1, 0);
7565 if (rc != 0) { 7408 if (rc != 0) {
7566 pr_err("error %d\n", rc); 7409 pr_err("error %d\n", rc);
7567 goto rw_error; 7410 goto rw_error;
7568 } 7411 }
7569 7412
7570 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_RE0__A, sizeof(vsb_taps_re), ((u8 *)vsb_taps_re), 0); 7413 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_RE0__A, sizeof(vsb_taps_re), ((u8 *)vsb_taps_re), 0);
7571 if (rc != 0) { 7414 if (rc != 0) {
7572 pr_err("error %d\n", rc); 7415 pr_err("error %d\n", rc);
7573 goto rw_error; 7416 goto rw_error;
7574 } 7417 }
7575 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_IM0__A, sizeof(vsb_taps_re), ((u8 *)vsb_taps_re), 0); 7418 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_IM0__A, sizeof(vsb_taps_re), ((u8 *)vsb_taps_re), 0);
7576 if (rc != 0) { 7419 if (rc != 0) {
7577 pr_err("error %d\n", rc); 7420 pr_err("error %d\n", rc);
7578 goto rw_error; 7421 goto rw_error;
7579 } 7422 }
7580 7423
7581 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_BNTHRESH__A, 330, 0); 7424 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_BNTHRESH__A, 330, 0);
7582 if (rc != 0) { 7425 if (rc != 0) {
7583 pr_err("error %d\n", rc); 7426 pr_err("error %d\n", rc);
7584 goto rw_error; 7427 goto rw_error;
7585 } /* set higher threshold */ 7428 } /* set higher threshold */
7586 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_CLPLASTNUM__A, 90, 0); 7429 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_CLPLASTNUM__A, 90, 0);
7587 if (rc != 0) { 7430 if (rc != 0) {
7588 pr_err("error %d\n", rc); 7431 pr_err("error %d\n", rc);
7589 goto rw_error; 7432 goto rw_error;
7590 } /* burst detection on */ 7433 } /* burst detection on */
7591 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_SNRTH_RCA1__A, 0x0042, 0); 7434 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_SNRTH_RCA1__A, 0x0042, 0);
7592 if (rc != 0) { 7435 if (rc != 0) {
7593 pr_err("error %d\n", rc); 7436 pr_err("error %d\n", rc);
7594 goto rw_error; 7437 goto rw_error;
7595 } /* drop thresholds by 1 dB */ 7438 } /* drop thresholds by 1 dB */
7596 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_SNRTH_RCA2__A, 0x0053, 0); 7439 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_SNRTH_RCA2__A, 0x0053, 0);
7597 if (rc != 0) { 7440 if (rc != 0) {
7598 pr_err("error %d\n", rc); 7441 pr_err("error %d\n", rc);
7599 goto rw_error; 7442 goto rw_error;
7600 } /* drop thresholds by 2 dB */ 7443 } /* drop thresholds by 2 dB */
7601 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_EQCTRL__A, 0x1, 0); 7444 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_EQCTRL__A, 0x1, 0);
7602 if (rc != 0) { 7445 if (rc != 0) {
7603 pr_err("error %d\n", rc); 7446 pr_err("error %d\n", rc);
7604 goto rw_error; 7447 goto rw_error;
7605 } /* cma on */ 7448 } /* cma on */
7606 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_GPIO__A, 0, 0); 7449 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_GPIO__A, 0, 0);
7607 if (rc != 0) { 7450 if (rc != 0) {
7608 pr_err("error %d\n", rc); 7451 pr_err("error %d\n", rc);
7609 goto rw_error; 7452 goto rw_error;
7610 } /* GPIO */ 7453 } /* GPIO */
7611 7454
7612 /* Initialize the FEC Subsystem */ 7455 /* Initialize the FEC Subsystem */
7613 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_TOP_ANNEX__A, FEC_TOP_ANNEX_D, 0); 7456 rc = drxj_dap_write_reg16(dev_addr, FEC_TOP_ANNEX__A, FEC_TOP_ANNEX_D, 0);
7614 if (rc != 0) { 7457 if (rc != 0) {
7615 pr_err("error %d\n", rc); 7458 pr_err("error %d\n", rc);
7616 goto rw_error; 7459 goto rw_error;
7617 } 7460 }
7618 { 7461 {
7619 u16 fec_oc_snc_mode = 0; 7462 u16 fec_oc_snc_mode = 0;
7620 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_SNC_MODE__A, &fec_oc_snc_mode, 0); 7463 rc = drxj_dap_read_reg16(dev_addr, FEC_OC_SNC_MODE__A, &fec_oc_snc_mode, 0);
7621 if (rc != 0) { 7464 if (rc != 0) {
7622 pr_err("error %d\n", rc); 7465 pr_err("error %d\n", rc);
7623 goto rw_error; 7466 goto rw_error;
7624 } 7467 }
7625 /* output data even when not locked */ 7468 /* output data even when not locked */
7626 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_SNC_MODE__A, fec_oc_snc_mode | FEC_OC_SNC_MODE_UNLOCK_ENABLE__M, 0); 7469 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_SNC_MODE__A, fec_oc_snc_mode | FEC_OC_SNC_MODE_UNLOCK_ENABLE__M, 0);
7627 if (rc != 0) { 7470 if (rc != 0) {
7628 pr_err("error %d\n", rc); 7471 pr_err("error %d\n", rc);
7629 goto rw_error; 7472 goto rw_error;
@@ -7631,22 +7474,22 @@ static int set_vsb(struct drx_demod_instance *demod)
7631 } 7474 }
7632 7475
7633 /* set clip */ 7476 /* set clip */
7634 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_CLP_LEN__A, 0, 0); 7477 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_CLP_LEN__A, 0, 0);
7635 if (rc != 0) { 7478 if (rc != 0) {
7636 pr_err("error %d\n", rc); 7479 pr_err("error %d\n", rc);
7637 goto rw_error; 7480 goto rw_error;
7638 } 7481 }
7639 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_CLP_TH__A, 470, 0); 7482 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_CLP_TH__A, 470, 0);
7640 if (rc != 0) { 7483 if (rc != 0) {
7641 pr_err("error %d\n", rc); 7484 pr_err("error %d\n", rc);
7642 goto rw_error; 7485 goto rw_error;
7643 } 7486 }
7644 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_SNS_LEN__A, 0, 0); 7487 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_SNS_LEN__A, 0, 0);
7645 if (rc != 0) { 7488 if (rc != 0) {
7646 pr_err("error %d\n", rc); 7489 pr_err("error %d\n", rc);
7647 goto rw_error; 7490 goto rw_error;
7648 } 7491 }
7649 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_SNRTH_PT__A, 0xD4, 0); 7492 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_SNRTH_PT__A, 0xD4, 0);
7650 if (rc != 0) { 7493 if (rc != 0) {
7651 pr_err("error %d\n", rc); 7494 pr_err("error %d\n", rc);
7652 goto rw_error; 7495 goto rw_error;
@@ -7654,75 +7497,75 @@ static int set_vsb(struct drx_demod_instance *demod)
7654 /* no transparent, no A&C framing; parity is set in mpegoutput */ 7497 /* no transparent, no A&C framing; parity is set in mpegoutput */
7655 { 7498 {
7656 u16 fec_oc_reg_mode = 0; 7499 u16 fec_oc_reg_mode = 0;
7657 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_MODE__A, &fec_oc_reg_mode, 0); 7500 rc = drxj_dap_read_reg16(dev_addr, FEC_OC_MODE__A, &fec_oc_reg_mode, 0);
7658 if (rc != 0) { 7501 if (rc != 0) {
7659 pr_err("error %d\n", rc); 7502 pr_err("error %d\n", rc);
7660 goto rw_error; 7503 goto rw_error;
7661 } 7504 }
7662 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_MODE__A, fec_oc_reg_mode & (~(FEC_OC_MODE_TRANSPARENT__M | FEC_OC_MODE_CLEAR__M | FEC_OC_MODE_RETAIN_FRAMING__M)), 0); 7505 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_MODE__A, fec_oc_reg_mode & (~(FEC_OC_MODE_TRANSPARENT__M | FEC_OC_MODE_CLEAR__M | FEC_OC_MODE_RETAIN_FRAMING__M)), 0);
7663 if (rc != 0) { 7506 if (rc != 0) {
7664 pr_err("error %d\n", rc); 7507 pr_err("error %d\n", rc);
7665 goto rw_error; 7508 goto rw_error;
7666 } 7509 }
7667 } 7510 }
7668 7511
7669 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_DI_TIMEOUT_LO__A, 0, 0); 7512 rc = drxj_dap_write_reg16(dev_addr, FEC_DI_TIMEOUT_LO__A, 0, 0);
7670 if (rc != 0) { 7513 if (rc != 0) {
7671 pr_err("error %d\n", rc); 7514 pr_err("error %d\n", rc);
7672 goto rw_error; 7515 goto rw_error;
7673 } /* timeout counter for restarting */ 7516 } /* timeout counter for restarting */
7674 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_DI_TIMEOUT_HI__A, 3, 0); 7517 rc = drxj_dap_write_reg16(dev_addr, FEC_DI_TIMEOUT_HI__A, 3, 0);
7675 if (rc != 0) { 7518 if (rc != 0) {
7676 pr_err("error %d\n", rc); 7519 pr_err("error %d\n", rc);
7677 goto rw_error; 7520 goto rw_error;
7678 } 7521 }
7679 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_RS_MODE__A, 0, 0); 7522 rc = drxj_dap_write_reg16(dev_addr, FEC_RS_MODE__A, 0, 0);
7680 if (rc != 0) { 7523 if (rc != 0) {
7681 pr_err("error %d\n", rc); 7524 pr_err("error %d\n", rc);
7682 goto rw_error; 7525 goto rw_error;
7683 } /* bypass disabled */ 7526 } /* bypass disabled */
7684 /* initialize RS packet error measurement parameters */ 7527 /* initialize RS packet error measurement parameters */
7685 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_RS_MEASUREMENT_PERIOD__A, FEC_RS_MEASUREMENT_PERIOD, 0); 7528 rc = drxj_dap_write_reg16(dev_addr, FEC_RS_MEASUREMENT_PERIOD__A, FEC_RS_MEASUREMENT_PERIOD, 0);
7686 if (rc != 0) { 7529 if (rc != 0) {
7687 pr_err("error %d\n", rc); 7530 pr_err("error %d\n", rc);
7688 goto rw_error; 7531 goto rw_error;
7689 } 7532 }
7690 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_RS_MEASUREMENT_PRESCALE__A, FEC_RS_MEASUREMENT_PRESCALE, 0); 7533 rc = drxj_dap_write_reg16(dev_addr, FEC_RS_MEASUREMENT_PRESCALE__A, FEC_RS_MEASUREMENT_PRESCALE, 0);
7691 if (rc != 0) { 7534 if (rc != 0) {
7692 pr_err("error %d\n", rc); 7535 pr_err("error %d\n", rc);
7693 goto rw_error; 7536 goto rw_error;
7694 } 7537 }
7695 7538
7696 /* init measurement period of MER/SER */ 7539 /* init measurement period of MER/SER */
7697 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_MEASUREMENT_PERIOD__A, VSB_TOP_MEASUREMENT_PERIOD, 0); 7540 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_MEASUREMENT_PERIOD__A, VSB_TOP_MEASUREMENT_PERIOD, 0);
7698 if (rc != 0) { 7541 if (rc != 0) {
7699 pr_err("error %d\n", rc); 7542 pr_err("error %d\n", rc);
7700 goto rw_error; 7543 goto rw_error;
7701 } 7544 }
7702 rc = DRXJ_DAP.write_reg32func(dev_addr, SCU_RAM_FEC_ACCUM_CW_CORRECTED_LO__A, 0, 0); 7545 rc = drxdap_fasi_write_reg32(dev_addr, SCU_RAM_FEC_ACCUM_CW_CORRECTED_LO__A, 0, 0);
7703 if (rc != 0) { 7546 if (rc != 0) {
7704 pr_err("error %d\n", rc); 7547 pr_err("error %d\n", rc);
7705 goto rw_error; 7548 goto rw_error;
7706 } 7549 }
7707 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_FEC_MEAS_COUNT__A, 0, 0); 7550 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_FEC_MEAS_COUNT__A, 0, 0);
7708 if (rc != 0) { 7551 if (rc != 0) {
7709 pr_err("error %d\n", rc); 7552 pr_err("error %d\n", rc);
7710 goto rw_error; 7553 goto rw_error;
7711 } 7554 }
7712 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0, 0); 7555 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0, 0);
7713 if (rc != 0) { 7556 if (rc != 0) {
7714 pr_err("error %d\n", rc); 7557 pr_err("error %d\n", rc);
7715 goto rw_error; 7558 goto rw_error;
7716 } 7559 }
7717 7560
7718 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_CKGN1TRK__A, 128, 0); 7561 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_CKGN1TRK__A, 128, 0);
7719 if (rc != 0) { 7562 if (rc != 0) {
7720 pr_err("error %d\n", rc); 7563 pr_err("error %d\n", rc);
7721 goto rw_error; 7564 goto rw_error;
7722 } 7565 }
7723 /* B-Input to ADC, PGA+filter in standby */ 7566 /* B-Input to ADC, PGA+filter in standby */
7724 if (!ext_attr->has_lna) { 7567 if (!ext_attr->has_lna) {
7725 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_AMUX__A, 0x02, 0); 7568 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_AMUX__A, 0x02, 0);
7726 if (rc != 0) { 7569 if (rc != 0) {
7727 pr_err("error %d\n", rc); 7570 pr_err("error %d\n", rc);
7728 goto rw_error; 7571 goto rw_error;
@@ -7826,42 +7669,42 @@ static int set_vsb(struct drx_demod_instance *demod)
7826 goto rw_error; 7669 goto rw_error;
7827 } 7670 }
7828 7671
7829 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_BEAGC_GAINSHIFT__A, 0x0004, 0); 7672 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_BEAGC_GAINSHIFT__A, 0x0004, 0);
7830 if (rc != 0) { 7673 if (rc != 0) {
7831 pr_err("error %d\n", rc); 7674 pr_err("error %d\n", rc);
7832 goto rw_error; 7675 goto rw_error;
7833 } 7676 }
7834 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_SNRTH_PT__A, 0x00D2, 0); 7677 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_SNRTH_PT__A, 0x00D2, 0);
7835 if (rc != 0) { 7678 if (rc != 0) {
7836 pr_err("error %d\n", rc); 7679 pr_err("error %d\n", rc);
7837 goto rw_error; 7680 goto rw_error;
7838 } 7681 }
7839 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_SYSSMTRNCTRL__A, VSB_TOP_SYSSMTRNCTRL__PRE | VSB_TOP_SYSSMTRNCTRL_NCOTIMEOUTCNTEN__M, 0); 7682 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_SYSSMTRNCTRL__A, VSB_TOP_SYSSMTRNCTRL__PRE | VSB_TOP_SYSSMTRNCTRL_NCOTIMEOUTCNTEN__M, 0);
7840 if (rc != 0) { 7683 if (rc != 0) {
7841 pr_err("error %d\n", rc); 7684 pr_err("error %d\n", rc);
7842 goto rw_error; 7685 goto rw_error;
7843 } 7686 }
7844 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_BEDETCTRL__A, 0x142, 0); 7687 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_BEDETCTRL__A, 0x142, 0);
7845 if (rc != 0) { 7688 if (rc != 0) {
7846 pr_err("error %d\n", rc); 7689 pr_err("error %d\n", rc);
7847 goto rw_error; 7690 goto rw_error;
7848 } 7691 }
7849 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_LBAGCREFLVL__A, 640, 0); 7692 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_LBAGCREFLVL__A, 640, 0);
7850 if (rc != 0) { 7693 if (rc != 0) {
7851 pr_err("error %d\n", rc); 7694 pr_err("error %d\n", rc);
7852 goto rw_error; 7695 goto rw_error;
7853 } 7696 }
7854 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_CYGN1ACQ__A, 4, 0); 7697 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_CYGN1ACQ__A, 4, 0);
7855 if (rc != 0) { 7698 if (rc != 0) {
7856 pr_err("error %d\n", rc); 7699 pr_err("error %d\n", rc);
7857 goto rw_error; 7700 goto rw_error;
7858 } 7701 }
7859 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_CYGN1TRK__A, 2, 0); 7702 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_CYGN1TRK__A, 2, 0);
7860 if (rc != 0) { 7703 if (rc != 0) {
7861 pr_err("error %d\n", rc); 7704 pr_err("error %d\n", rc);
7862 goto rw_error; 7705 goto rw_error;
7863 } 7706 }
7864 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_CYGN2TRK__A, 3, 0); 7707 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_CYGN2TRK__A, 3, 0);
7865 if (rc != 0) { 7708 if (rc != 0) {
7866 pr_err("error %d\n", rc); 7709 pr_err("error %d\n", rc);
7867 goto rw_error; 7710 goto rw_error;
@@ -7880,17 +7723,17 @@ static int set_vsb(struct drx_demod_instance *demod)
7880 goto rw_error; 7723 goto rw_error;
7881 } 7724 }
7882 7725
7883 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_COMM_EXEC__A, IQM_COMM_EXEC_ACTIVE, 0); 7726 rc = drxj_dap_write_reg16(dev_addr, IQM_COMM_EXEC__A, IQM_COMM_EXEC_ACTIVE, 0);
7884 if (rc != 0) { 7727 if (rc != 0) {
7885 pr_err("error %d\n", rc); 7728 pr_err("error %d\n", rc);
7886 goto rw_error; 7729 goto rw_error;
7887 } 7730 }
7888 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_COMM_EXEC__A, VSB_COMM_EXEC_ACTIVE, 0); 7731 rc = drxj_dap_write_reg16(dev_addr, VSB_COMM_EXEC__A, VSB_COMM_EXEC_ACTIVE, 0);
7889 if (rc != 0) { 7732 if (rc != 0) {
7890 pr_err("error %d\n", rc); 7733 pr_err("error %d\n", rc);
7891 goto rw_error; 7734 goto rw_error;
7892 } 7735 }
7893 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE, 0); 7736 rc = drxj_dap_write_reg16(dev_addr, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE, 0);
7894 if (rc != 0) { 7737 if (rc != 0) {
7895 pr_err("error %d\n", rc); 7738 pr_err("error %d\n", rc);
7896 goto rw_error; 7739 goto rw_error;
@@ -7915,7 +7758,7 @@ static int get_vsb_post_rs_pck_err(struct i2c_device_addr *dev_addr, u16 *pck_er
7915 u16 packet_errors_mant = 0; 7758 u16 packet_errors_mant = 0;
7916 u16 packet_errors_exp = 0; 7759 u16 packet_errors_exp = 0;
7917 7760
7918 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_RS_NR_FAILURES__A, &data, 0); 7761 rc = drxj_dap_read_reg16(dev_addr, FEC_RS_NR_FAILURES__A, &data, 0);
7919 if (rc != 0) { 7762 if (rc != 0) {
7920 pr_err("error %d\n", rc); 7763 pr_err("error %d\n", rc);
7921 goto rw_error; 7764 goto rw_error;
@@ -7954,7 +7797,7 @@ static int get_vs_bpost_viterbi_ber(struct i2c_device_addr *dev_addr, u32 *ber)
7954 u16 bit_errors_mant = 0; 7797 u16 bit_errors_mant = 0;
7955 u16 bit_errors_exp = 0; 7798 u16 bit_errors_exp = 0;
7956 7799
7957 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_RS_NR_BIT_ERRORS__A, &data, 0); 7800 rc = drxj_dap_read_reg16(dev_addr, FEC_RS_NR_BIT_ERRORS__A, &data, 0);
7958 if (rc != 0) { 7801 if (rc != 0) {
7959 pr_err("error %d\n", rc); 7802 pr_err("error %d\n", rc);
7960 goto rw_error; 7803 goto rw_error;
@@ -7996,7 +7839,7 @@ static int get_vs_bpre_viterbi_ber(struct i2c_device_addr *dev_addr, u32 *ber)
7996 u16 data = 0; 7839 u16 data = 0;
7997 int rc; 7840 int rc;
7998 7841
7999 rc = DRXJ_DAP.read_reg16func(dev_addr, VSB_TOP_NR_SYM_ERRS__A, &data, 0); 7842 rc = drxj_dap_read_reg16(dev_addr, VSB_TOP_NR_SYM_ERRS__A, &data, 0);
8000 if (rc != 0) { 7843 if (rc != 0) {
8001 pr_err("error %d\n", rc); 7844 pr_err("error %d\n", rc);
8002 goto rw_error; 7845 goto rw_error;
@@ -8025,7 +7868,7 @@ static int get_vsb_symb_err(struct i2c_device_addr *dev_addr, u32 *ser)
8025 u16 symb_errors_mant = 0; 7868 u16 symb_errors_mant = 0;
8026 u16 symb_errors_exp = 0; 7869 u16 symb_errors_exp = 0;
8027 7870
8028 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_RS_NR_SYMBOL_ERRORS__A, &data, 0); 7871 rc = drxj_dap_read_reg16(dev_addr, FEC_RS_NR_SYMBOL_ERRORS__A, &data, 0);
8029 if (rc != 0) { 7872 if (rc != 0) {
8030 pr_err("error %d\n", rc); 7873 pr_err("error %d\n", rc);
8031 goto rw_error; 7874 goto rw_error;
@@ -8060,7 +7903,7 @@ static int get_vsbmer(struct i2c_device_addr *dev_addr, u16 *mer)
8060 int rc; 7903 int rc;
8061 u16 data_hi = 0; 7904 u16 data_hi = 0;
8062 7905
8063 rc = DRXJ_DAP.read_reg16func(dev_addr, VSB_TOP_ERR_ENERGY_H__A, &data_hi, 0); 7906 rc = drxj_dap_read_reg16(dev_addr, VSB_TOP_ERR_ENERGY_H__A, &data_hi, 0);
8064 if (rc != 0) { 7907 if (rc != 0) {
8065 pr_err("error %d\n", rc); 7908 pr_err("error %d\n", rc);
8066 goto rw_error; 7909 goto rw_error;
@@ -8102,7 +7945,7 @@ ctrl_get_vsb_constel(struct drx_demod_instance *demod, struct drx_complex *compl
8102 /* Needs to be checked when external interface PG is updated */ 7945 /* Needs to be checked when external interface PG is updated */
8103 7946
8104 /* Configure MB (Monitor bus) */ 7947 /* Configure MB (Monitor bus) */
8105 rc = DRXJ_DAP.read_reg16func(dev_addr, VSB_TOP_COMM_MB__A, &vsb_top_comm_mb_init, 0); 7948 rc = drxj_dap_read_reg16(dev_addr, VSB_TOP_COMM_MB__A, &vsb_top_comm_mb_init, 0);
8106 if (rc != 0) { 7949 if (rc != 0) {
8107 pr_err("error %d\n", rc); 7950 pr_err("error %d\n", rc);
8108 goto rw_error; 7951 goto rw_error;
@@ -8111,28 +7954,28 @@ ctrl_get_vsb_constel(struct drx_demod_instance *demod, struct drx_complex *compl
8111 vsb_top_comm_mb = (vsb_top_comm_mb_init | 7954 vsb_top_comm_mb = (vsb_top_comm_mb_init |
8112 VSB_TOP_COMM_MB_OBS_OBS_ON | 7955 VSB_TOP_COMM_MB_OBS_OBS_ON |
8113 VSB_TOP_COMM_MB_MUX_OBS_VSB_TCMEQ_2); 7956 VSB_TOP_COMM_MB_MUX_OBS_VSB_TCMEQ_2);
8114 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_COMM_MB__A, vsb_top_comm_mb, 0); 7957 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_COMM_MB__A, vsb_top_comm_mb, 0);
8115 if (rc != 0) { 7958 if (rc != 0) {
8116 pr_err("error %d\n", rc); 7959 pr_err("error %d\n", rc);
8117 goto rw_error; 7960 goto rw_error;
8118 } 7961 }
8119 7962
8120 /* Enable MB grabber in the FEC OC */ 7963 /* Enable MB grabber in the FEC OC */
8121 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_OCR_MODE__A, FEC_OC_OCR_MODE_GRAB_ENABLE__M, 0); 7964 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_OCR_MODE__A, FEC_OC_OCR_MODE_GRAB_ENABLE__M, 0);
8122 if (rc != 0) { 7965 if (rc != 0) {
8123 pr_err("error %d\n", rc); 7966 pr_err("error %d\n", rc);
8124 goto rw_error; 7967 goto rw_error;
8125 } 7968 }
8126 7969
8127 /* Disable MB grabber in the FEC OC */ 7970 /* Disable MB grabber in the FEC OC */
8128 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_OCR_MODE__A, 0x0, 0); 7971 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_OCR_MODE__A, 0x0, 0);
8129 if (rc != 0) { 7972 if (rc != 0) {
8130 pr_err("error %d\n", rc); 7973 pr_err("error %d\n", rc);
8131 goto rw_error; 7974 goto rw_error;
8132 } 7975 }
8133 7976
8134 /* read data */ 7977 /* read data */
8135 rc = DRXJ_DAP.read_reg32func(dev_addr, FEC_OC_OCR_GRAB_RD1__A, &data, 0); 7978 rc = drxdap_fasi_read_reg32(dev_addr, FEC_OC_OCR_GRAB_RD1__A, &data, 0);
8136 if (rc != 0) { 7979 if (rc != 0) {
8137 pr_err("error %d\n", rc); 7980 pr_err("error %d\n", rc);
8138 goto rw_error; 7981 goto rw_error;
@@ -8144,7 +7987,7 @@ ctrl_get_vsb_constel(struct drx_demod_instance *demod, struct drx_complex *compl
8144 complex_nr->im = 0; 7987 complex_nr->im = 0;
8145 7988
8146 /* Restore MB (Monitor bus) */ 7989 /* Restore MB (Monitor bus) */
8147 rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_COMM_MB__A, vsb_top_comm_mb_init, 0); 7990 rc = drxj_dap_write_reg16(dev_addr, VSB_TOP_COMM_MB__A, vsb_top_comm_mb_init, 0);
8148 if (rc != 0) { 7991 if (rc != 0) {
8149 pr_err("error %d\n", rc); 7992 pr_err("error %d\n", rc);
8150 goto rw_error; 7993 goto rw_error;
@@ -8191,12 +8034,12 @@ static int power_down_qam(struct drx_demod_instance *demod, bool primary)
8191 resets IQM, QAM and FEC HW blocks 8034 resets IQM, QAM and FEC HW blocks
8192 */ 8035 */
8193 /* stop all comm_exec */ 8036 /* stop all comm_exec */
8194 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP, 0); 8037 rc = drxj_dap_write_reg16(dev_addr, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP, 0);
8195 if (rc != 0) { 8038 if (rc != 0) {
8196 pr_err("error %d\n", rc); 8039 pr_err("error %d\n", rc);
8197 goto rw_error; 8040 goto rw_error;
8198 } 8041 }
8199 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP, 0); 8042 rc = drxj_dap_write_reg16(dev_addr, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP, 0);
8200 if (rc != 0) { 8043 if (rc != 0) {
8201 pr_err("error %d\n", rc); 8044 pr_err("error %d\n", rc);
8202 goto rw_error; 8045 goto rw_error;
@@ -8215,7 +8058,7 @@ static int power_down_qam(struct drx_demod_instance *demod, bool primary)
8215 } 8058 }
8216 8059
8217 if (primary) { 8060 if (primary) {
8218 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_COMM_EXEC__A, IQM_COMM_EXEC_STOP, 0); 8061 rc = drxj_dap_write_reg16(dev_addr, IQM_COMM_EXEC__A, IQM_COMM_EXEC_STOP, 0);
8219 if (rc != 0) { 8062 if (rc != 0) {
8220 pr_err("error %d\n", rc); 8063 pr_err("error %d\n", rc);
8221 goto rw_error; 8064 goto rw_error;
@@ -8226,27 +8069,27 @@ static int power_down_qam(struct drx_demod_instance *demod, bool primary)
8226 goto rw_error; 8069 goto rw_error;
8227 } 8070 }
8228 } else { 8071 } else {
8229 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_FS_COMM_EXEC__A, IQM_FS_COMM_EXEC_STOP, 0); 8072 rc = drxj_dap_write_reg16(dev_addr, IQM_FS_COMM_EXEC__A, IQM_FS_COMM_EXEC_STOP, 0);
8230 if (rc != 0) { 8073 if (rc != 0) {
8231 pr_err("error %d\n", rc); 8074 pr_err("error %d\n", rc);
8232 goto rw_error; 8075 goto rw_error;
8233 } 8076 }
8234 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_FD_COMM_EXEC__A, IQM_FD_COMM_EXEC_STOP, 0); 8077 rc = drxj_dap_write_reg16(dev_addr, IQM_FD_COMM_EXEC__A, IQM_FD_COMM_EXEC_STOP, 0);
8235 if (rc != 0) { 8078 if (rc != 0) {
8236 pr_err("error %d\n", rc); 8079 pr_err("error %d\n", rc);
8237 goto rw_error; 8080 goto rw_error;
8238 } 8081 }
8239 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RC_COMM_EXEC__A, IQM_RC_COMM_EXEC_STOP, 0); 8082 rc = drxj_dap_write_reg16(dev_addr, IQM_RC_COMM_EXEC__A, IQM_RC_COMM_EXEC_STOP, 0);
8240 if (rc != 0) { 8083 if (rc != 0) {
8241 pr_err("error %d\n", rc); 8084 pr_err("error %d\n", rc);
8242 goto rw_error; 8085 goto rw_error;
8243 } 8086 }
8244 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_COMM_EXEC__A, IQM_RT_COMM_EXEC_STOP, 0); 8087 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_COMM_EXEC__A, IQM_RT_COMM_EXEC_STOP, 0);
8245 if (rc != 0) { 8088 if (rc != 0) {
8246 pr_err("error %d\n", rc); 8089 pr_err("error %d\n", rc);
8247 goto rw_error; 8090 goto rw_error;
8248 } 8091 }
8249 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_COMM_EXEC__A, IQM_CF_COMM_EXEC_STOP, 0); 8092 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_COMM_EXEC__A, IQM_CF_COMM_EXEC_STOP, 0);
8250 if (rc != 0) { 8093 if (rc != 0) {
8251 pr_err("error %d\n", rc); 8094 pr_err("error %d\n", rc);
8252 goto rw_error; 8095 goto rw_error;
@@ -8384,34 +8227,34 @@ set_qam_measurement(struct drx_demod_instance *demod,
8384 return -EINVAL; 8227 return -EINVAL;
8385 } 8228 }
8386 8229
8387 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_SNC_FAIL_PERIOD__A, (u16)fec_oc_snc_fail_period, 0); 8230 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_SNC_FAIL_PERIOD__A, (u16)fec_oc_snc_fail_period, 0);
8388 if (rc != 0) { 8231 if (rc != 0) {
8389 pr_err("error %d\n", rc); 8232 pr_err("error %d\n", rc);
8390 goto rw_error; 8233 goto rw_error;
8391 } 8234 }
8392 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_RS_MEASUREMENT_PERIOD__A, (u16)fec_rs_period, 0); 8235 rc = drxj_dap_write_reg16(dev_addr, FEC_RS_MEASUREMENT_PERIOD__A, (u16)fec_rs_period, 0);
8393 if (rc != 0) { 8236 if (rc != 0) {
8394 pr_err("error %d\n", rc); 8237 pr_err("error %d\n", rc);
8395 goto rw_error; 8238 goto rw_error;
8396 } 8239 }
8397 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_RS_MEASUREMENT_PRESCALE__A, fec_rs_prescale, 0); 8240 rc = drxj_dap_write_reg16(dev_addr, FEC_RS_MEASUREMENT_PRESCALE__A, fec_rs_prescale, 0);
8398 if (rc != 0) { 8241 if (rc != 0) {
8399 pr_err("error %d\n", rc); 8242 pr_err("error %d\n", rc);
8400 goto rw_error; 8243 goto rw_error;
8401 } 8244 }
8402 ext_attr->fec_rs_period = (u16) fec_rs_period; 8245 ext_attr->fec_rs_period = (u16) fec_rs_period;
8403 ext_attr->fec_rs_prescale = fec_rs_prescale; 8246 ext_attr->fec_rs_prescale = fec_rs_prescale;
8404 rc = DRXJ_DAP.write_reg32func(dev_addr, SCU_RAM_FEC_ACCUM_CW_CORRECTED_LO__A, 0, 0); 8247 rc = drxdap_fasi_write_reg32(dev_addr, SCU_RAM_FEC_ACCUM_CW_CORRECTED_LO__A, 0, 0);
8405 if (rc != 0) { 8248 if (rc != 0) {
8406 pr_err("error %d\n", rc); 8249 pr_err("error %d\n", rc);
8407 goto rw_error; 8250 goto rw_error;
8408 } 8251 }
8409 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_FEC_MEAS_COUNT__A, 0, 0); 8252 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_FEC_MEAS_COUNT__A, 0, 0);
8410 if (rc != 0) { 8253 if (rc != 0) {
8411 pr_err("error %d\n", rc); 8254 pr_err("error %d\n", rc);
8412 goto rw_error; 8255 goto rw_error;
8413 } 8256 }
8414 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0, 0); 8257 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0, 0);
8415 if (rc != 0) { 8258 if (rc != 0) {
8416 pr_err("error %d\n", rc); 8259 pr_err("error %d\n", rc);
8417 goto rw_error; 8260 goto rw_error;
@@ -8458,12 +8301,12 @@ set_qam_measurement(struct drx_demod_instance *demod,
8458 /* a(16 bit) * b(16 bit) = 32 bit result => mult32 not needed */ 8301 /* a(16 bit) * b(16 bit) = 32 bit result => mult32 not needed */
8459 qam_vd_bit_cnt *= qam_vd_period; 8302 qam_vd_bit_cnt *= qam_vd_period;
8460 8303
8461 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_VD_MEASUREMENT_PERIOD__A, (u16)qam_vd_period, 0); 8304 rc = drxj_dap_write_reg16(dev_addr, QAM_VD_MEASUREMENT_PERIOD__A, (u16)qam_vd_period, 0);
8462 if (rc != 0) { 8305 if (rc != 0) {
8463 pr_err("error %d\n", rc); 8306 pr_err("error %d\n", rc);
8464 goto rw_error; 8307 goto rw_error;
8465 } 8308 }
8466 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_VD_MEASUREMENT_PRESCALE__A, qam_vd_prescale, 0); 8309 rc = drxj_dap_write_reg16(dev_addr, QAM_VD_MEASUREMENT_PRESCALE__A, qam_vd_prescale, 0);
8467 if (rc != 0) { 8310 if (rc != 0) {
8468 pr_err("error %d\n", rc); 8311 pr_err("error %d\n", rc);
8469 goto rw_error; 8312 goto rw_error;
@@ -8506,202 +8349,202 @@ static int set_qam16(struct drx_demod_instance *demod)
8506 DRXJ_16TO8(13517), /* RAD5 */ 8349 DRXJ_16TO8(13517), /* RAD5 */
8507 }; 8350 };
8508 8351
8509 rc = DRXJ_DAP.write_block_func(dev_addr, QAM_DQ_QUAL_FUN0__A, sizeof(qam_dq_qual_fun), ((u8 *)qam_dq_qual_fun), 0); 8352 rc = drxdap_fasi_write_block(dev_addr, QAM_DQ_QUAL_FUN0__A, sizeof(qam_dq_qual_fun), ((u8 *)qam_dq_qual_fun), 0);
8510 if (rc != 0) { 8353 if (rc != 0) {
8511 pr_err("error %d\n", rc); 8354 pr_err("error %d\n", rc);
8512 goto rw_error; 8355 goto rw_error;
8513 } 8356 }
8514 rc = DRXJ_DAP.write_block_func(dev_addr, SCU_RAM_QAM_EQ_CMA_RAD0__A, sizeof(qam_eq_cma_rad), ((u8 *)qam_eq_cma_rad), 0); 8357 rc = drxdap_fasi_write_block(dev_addr, SCU_RAM_QAM_EQ_CMA_RAD0__A, sizeof(qam_eq_cma_rad), ((u8 *)qam_eq_cma_rad), 0);
8515 if (rc != 0) { 8358 if (rc != 0) {
8516 pr_err("error %d\n", rc); 8359 pr_err("error %d\n", rc);
8517 goto rw_error; 8360 goto rw_error;
8518 } 8361 }
8519 8362
8520 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RTH__A, 140, 0); 8363 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RTH__A, 140, 0);
8521 if (rc != 0) { 8364 if (rc != 0) {
8522 pr_err("error %d\n", rc); 8365 pr_err("error %d\n", rc);
8523 goto rw_error; 8366 goto rw_error;
8524 } 8367 }
8525 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_FTH__A, 50, 0); 8368 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_FTH__A, 50, 0);
8526 if (rc != 0) { 8369 if (rc != 0) {
8527 pr_err("error %d\n", rc); 8370 pr_err("error %d\n", rc);
8528 goto rw_error; 8371 goto rw_error;
8529 } 8372 }
8530 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_PTH__A, 120, 0); 8373 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_PTH__A, 120, 0);
8531 if (rc != 0) { 8374 if (rc != 0) {
8532 pr_err("error %d\n", rc); 8375 pr_err("error %d\n", rc);
8533 goto rw_error; 8376 goto rw_error;
8534 } 8377 }
8535 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_QTH__A, 230, 0); 8378 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_QTH__A, 230, 0);
8536 if (rc != 0) { 8379 if (rc != 0) {
8537 pr_err("error %d\n", rc); 8380 pr_err("error %d\n", rc);
8538 goto rw_error; 8381 goto rw_error;
8539 } 8382 }
8540 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_CTH__A, 95, 0); 8383 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_CTH__A, 95, 0);
8541 if (rc != 0) { 8384 if (rc != 0) {
8542 pr_err("error %d\n", rc); 8385 pr_err("error %d\n", rc);
8543 goto rw_error; 8386 goto rw_error;
8544 } 8387 }
8545 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_MTH__A, 105, 0); 8388 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_MTH__A, 105, 0);
8546 if (rc != 0) { 8389 if (rc != 0) {
8547 pr_err("error %d\n", rc); 8390 pr_err("error %d\n", rc);
8548 goto rw_error; 8391 goto rw_error;
8549 } 8392 }
8550 8393
8551 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RATE_LIM__A, 40, 0); 8394 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RATE_LIM__A, 40, 0);
8552 if (rc != 0) { 8395 if (rc != 0) {
8553 pr_err("error %d\n", rc); 8396 pr_err("error %d\n", rc);
8554 goto rw_error; 8397 goto rw_error;
8555 } 8398 }
8556 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_FREQ_LIM__A, 56, 0); 8399 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_FREQ_LIM__A, 56, 0);
8557 if (rc != 0) { 8400 if (rc != 0) {
8558 pr_err("error %d\n", rc); 8401 pr_err("error %d\n", rc);
8559 goto rw_error; 8402 goto rw_error;
8560 } 8403 }
8561 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_COUNT_LIM__A, 3, 0); 8404 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_COUNT_LIM__A, 3, 0);
8562 if (rc != 0) { 8405 if (rc != 0) {
8563 pr_err("error %d\n", rc); 8406 pr_err("error %d\n", rc);
8564 goto rw_error; 8407 goto rw_error;
8565 } 8408 }
8566 8409
8567 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, 16, 0); 8410 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, 16, 0);
8568 if (rc != 0) { 8411 if (rc != 0) {
8569 pr_err("error %d\n", rc); 8412 pr_err("error %d\n", rc);
8570 goto rw_error; 8413 goto rw_error;
8571 } 8414 }
8572 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, 220, 0); 8415 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, 220, 0);
8573 if (rc != 0) { 8416 if (rc != 0) {
8574 pr_err("error %d\n", rc); 8417 pr_err("error %d\n", rc);
8575 goto rw_error; 8418 goto rw_error;
8576 } 8419 }
8577 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, 25, 0); 8420 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, 25, 0);
8578 if (rc != 0) { 8421 if (rc != 0) {
8579 pr_err("error %d\n", rc); 8422 pr_err("error %d\n", rc);
8580 goto rw_error; 8423 goto rw_error;
8581 } 8424 }
8582 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, 6, 0); 8425 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, 6, 0);
8583 if (rc != 0) { 8426 if (rc != 0) {
8584 pr_err("error %d\n", rc); 8427 pr_err("error %d\n", rc);
8585 goto rw_error; 8428 goto rw_error;
8586 } 8429 }
8587 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16)(-24), 0); 8430 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16)(-24), 0);
8588 if (rc != 0) { 8431 if (rc != 0) {
8589 pr_err("error %d\n", rc); 8432 pr_err("error %d\n", rc);
8590 goto rw_error; 8433 goto rw_error;
8591 } 8434 }
8592 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16)(-65), 0); 8435 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16)(-65), 0);
8593 if (rc != 0) { 8436 if (rc != 0) {
8594 pr_err("error %d\n", rc); 8437 pr_err("error %d\n", rc);
8595 goto rw_error; 8438 goto rw_error;
8596 } 8439 }
8597 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16)(-127), 0); 8440 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16)(-127), 0);
8598 if (rc != 0) { 8441 if (rc != 0) {
8599 pr_err("error %d\n", rc); 8442 pr_err("error %d\n", rc);
8600 goto rw_error; 8443 goto rw_error;
8601 } 8444 }
8602 8445
8603 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CA_FINE__A, 15, 0); 8446 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CA_FINE__A, 15, 0);
8604 if (rc != 0) { 8447 if (rc != 0) {
8605 pr_err("error %d\n", rc); 8448 pr_err("error %d\n", rc);
8606 goto rw_error; 8449 goto rw_error;
8607 } 8450 }
8608 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CA_COARSE__A, 40, 0); 8451 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CA_COARSE__A, 40, 0);
8609 if (rc != 0) { 8452 if (rc != 0) {
8610 pr_err("error %d\n", rc); 8453 pr_err("error %d\n", rc);
8611 goto rw_error; 8454 goto rw_error;
8612 } 8455 }
8613 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_FINE__A, 2, 0); 8456 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_FINE__A, 2, 0);
8614 if (rc != 0) { 8457 if (rc != 0) {
8615 pr_err("error %d\n", rc); 8458 pr_err("error %d\n", rc);
8616 goto rw_error; 8459 goto rw_error;
8617 } 8460 }
8618 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20, 0); 8461 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20, 0);
8619 if (rc != 0) { 8462 if (rc != 0) {
8620 pr_err("error %d\n", rc); 8463 pr_err("error %d\n", rc);
8621 goto rw_error; 8464 goto rw_error;
8622 } 8465 }
8623 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_COARSE__A, 255, 0); 8466 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_COARSE__A, 255, 0);
8624 if (rc != 0) { 8467 if (rc != 0) {
8625 pr_err("error %d\n", rc); 8468 pr_err("error %d\n", rc);
8626 goto rw_error; 8469 goto rw_error;
8627 } 8470 }
8628 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_FINE__A, 2, 0); 8471 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_FINE__A, 2, 0);
8629 if (rc != 0) { 8472 if (rc != 0) {
8630 pr_err("error %d\n", rc); 8473 pr_err("error %d\n", rc);
8631 goto rw_error; 8474 goto rw_error;
8632 } 8475 }
8633 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_MEDIUM__A, 10, 0); 8476 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_MEDIUM__A, 10, 0);
8634 if (rc != 0) { 8477 if (rc != 0) {
8635 pr_err("error %d\n", rc); 8478 pr_err("error %d\n", rc);
8636 goto rw_error; 8479 goto rw_error;
8637 } 8480 }
8638 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_COARSE__A, 50, 0); 8481 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_COARSE__A, 50, 0);
8639 if (rc != 0) { 8482 if (rc != 0) {
8640 pr_err("error %d\n", rc); 8483 pr_err("error %d\n", rc);
8641 goto rw_error; 8484 goto rw_error;
8642 } 8485 }
8643 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_FINE__A, 12, 0); 8486 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_FINE__A, 12, 0);
8644 if (rc != 0) { 8487 if (rc != 0) {
8645 pr_err("error %d\n", rc); 8488 pr_err("error %d\n", rc);
8646 goto rw_error; 8489 goto rw_error;
8647 } 8490 }
8648 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24, 0); 8491 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24, 0);
8649 if (rc != 0) { 8492 if (rc != 0) {
8650 pr_err("error %d\n", rc); 8493 pr_err("error %d\n", rc);
8651 goto rw_error; 8494 goto rw_error;
8652 } 8495 }
8653 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_COARSE__A, 24, 0); 8496 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_COARSE__A, 24, 0);
8654 if (rc != 0) { 8497 if (rc != 0) {
8655 pr_err("error %d\n", rc); 8498 pr_err("error %d\n", rc);
8656 goto rw_error; 8499 goto rw_error;
8657 } 8500 }
8658 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_FINE__A, 12, 0); 8501 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_FINE__A, 12, 0);
8659 if (rc != 0) { 8502 if (rc != 0) {
8660 pr_err("error %d\n", rc); 8503 pr_err("error %d\n", rc);
8661 goto rw_error; 8504 goto rw_error;
8662 } 8505 }
8663 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16, 0); 8506 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16, 0);
8664 if (rc != 0) { 8507 if (rc != 0) {
8665 pr_err("error %d\n", rc); 8508 pr_err("error %d\n", rc);
8666 goto rw_error; 8509 goto rw_error;
8667 } 8510 }
8668 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_COARSE__A, 16, 0); 8511 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_COARSE__A, 16, 0);
8669 if (rc != 0) { 8512 if (rc != 0) {
8670 pr_err("error %d\n", rc); 8513 pr_err("error %d\n", rc);
8671 goto rw_error; 8514 goto rw_error;
8672 } 8515 }
8673 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_FINE__A, 16, 0); 8516 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_FINE__A, 16, 0);
8674 if (rc != 0) { 8517 if (rc != 0) {
8675 pr_err("error %d\n", rc); 8518 pr_err("error %d\n", rc);
8676 goto rw_error; 8519 goto rw_error;
8677 } 8520 }
8678 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_MEDIUM__A, 32, 0); 8521 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_MEDIUM__A, 32, 0);
8679 if (rc != 0) { 8522 if (rc != 0) {
8680 pr_err("error %d\n", rc); 8523 pr_err("error %d\n", rc);
8681 goto rw_error; 8524 goto rw_error;
8682 } 8525 }
8683 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_COARSE__A, 240, 0); 8526 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_COARSE__A, 240, 0);
8684 if (rc != 0) { 8527 if (rc != 0) {
8685 pr_err("error %d\n", rc); 8528 pr_err("error %d\n", rc);
8686 goto rw_error; 8529 goto rw_error;
8687 } 8530 }
8688 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_FINE__A, 5, 0); 8531 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_FINE__A, 5, 0);
8689 if (rc != 0) { 8532 if (rc != 0) {
8690 pr_err("error %d\n", rc); 8533 pr_err("error %d\n", rc);
8691 goto rw_error; 8534 goto rw_error;
8692 } 8535 }
8693 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 15, 0); 8536 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 15, 0);
8694 if (rc != 0) { 8537 if (rc != 0) {
8695 pr_err("error %d\n", rc); 8538 pr_err("error %d\n", rc);
8696 goto rw_error; 8539 goto rw_error;
8697 } 8540 }
8698 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_COARSE__A, 32, 0); 8541 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_COARSE__A, 32, 0);
8699 if (rc != 0) { 8542 if (rc != 0) {
8700 pr_err("error %d\n", rc); 8543 pr_err("error %d\n", rc);
8701 goto rw_error; 8544 goto rw_error;
8702 } 8545 }
8703 8546
8704 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_SL_SIG_POWER__A, 40960, 0); 8547 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_SL_SIG_POWER__A, 40960, 0);
8705 if (rc != 0) { 8548 if (rc != 0) {
8706 pr_err("error %d\n", rc); 8549 pr_err("error %d\n", rc);
8707 goto rw_error; 8550 goto rw_error;
@@ -8741,202 +8584,202 @@ static int set_qam32(struct drx_demod_instance *demod)
8741 DRXJ_16TO8(6707), /* RAD5 */ 8584 DRXJ_16TO8(6707), /* RAD5 */
8742 }; 8585 };
8743 8586
8744 rc = DRXJ_DAP.write_block_func(dev_addr, QAM_DQ_QUAL_FUN0__A, sizeof(qam_dq_qual_fun), ((u8 *)qam_dq_qual_fun), 0); 8587 rc = drxdap_fasi_write_block(dev_addr, QAM_DQ_QUAL_FUN0__A, sizeof(qam_dq_qual_fun), ((u8 *)qam_dq_qual_fun), 0);
8745 if (rc != 0) { 8588 if (rc != 0) {
8746 pr_err("error %d\n", rc); 8589 pr_err("error %d\n", rc);
8747 goto rw_error; 8590 goto rw_error;
8748 } 8591 }
8749 rc = DRXJ_DAP.write_block_func(dev_addr, SCU_RAM_QAM_EQ_CMA_RAD0__A, sizeof(qam_eq_cma_rad), ((u8 *)qam_eq_cma_rad), 0); 8592 rc = drxdap_fasi_write_block(dev_addr, SCU_RAM_QAM_EQ_CMA_RAD0__A, sizeof(qam_eq_cma_rad), ((u8 *)qam_eq_cma_rad), 0);
8750 if (rc != 0) { 8593 if (rc != 0) {
8751 pr_err("error %d\n", rc); 8594 pr_err("error %d\n", rc);
8752 goto rw_error; 8595 goto rw_error;
8753 } 8596 }
8754 8597
8755 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RTH__A, 90, 0); 8598 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RTH__A, 90, 0);
8756 if (rc != 0) { 8599 if (rc != 0) {
8757 pr_err("error %d\n", rc); 8600 pr_err("error %d\n", rc);
8758 goto rw_error; 8601 goto rw_error;
8759 } 8602 }
8760 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_FTH__A, 50, 0); 8603 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_FTH__A, 50, 0);
8761 if (rc != 0) { 8604 if (rc != 0) {
8762 pr_err("error %d\n", rc); 8605 pr_err("error %d\n", rc);
8763 goto rw_error; 8606 goto rw_error;
8764 } 8607 }
8765 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_PTH__A, 100, 0); 8608 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_PTH__A, 100, 0);
8766 if (rc != 0) { 8609 if (rc != 0) {
8767 pr_err("error %d\n", rc); 8610 pr_err("error %d\n", rc);
8768 goto rw_error; 8611 goto rw_error;
8769 } 8612 }
8770 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_QTH__A, 170, 0); 8613 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_QTH__A, 170, 0);
8771 if (rc != 0) { 8614 if (rc != 0) {
8772 pr_err("error %d\n", rc); 8615 pr_err("error %d\n", rc);
8773 goto rw_error; 8616 goto rw_error;
8774 } 8617 }
8775 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_CTH__A, 80, 0); 8618 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_CTH__A, 80, 0);
8776 if (rc != 0) { 8619 if (rc != 0) {
8777 pr_err("error %d\n", rc); 8620 pr_err("error %d\n", rc);
8778 goto rw_error; 8621 goto rw_error;
8779 } 8622 }
8780 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_MTH__A, 100, 0); 8623 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_MTH__A, 100, 0);
8781 if (rc != 0) { 8624 if (rc != 0) {
8782 pr_err("error %d\n", rc); 8625 pr_err("error %d\n", rc);
8783 goto rw_error; 8626 goto rw_error;
8784 } 8627 }
8785 8628
8786 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RATE_LIM__A, 40, 0); 8629 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RATE_LIM__A, 40, 0);
8787 if (rc != 0) { 8630 if (rc != 0) {
8788 pr_err("error %d\n", rc); 8631 pr_err("error %d\n", rc);
8789 goto rw_error; 8632 goto rw_error;
8790 } 8633 }
8791 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_FREQ_LIM__A, 56, 0); 8634 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_FREQ_LIM__A, 56, 0);
8792 if (rc != 0) { 8635 if (rc != 0) {
8793 pr_err("error %d\n", rc); 8636 pr_err("error %d\n", rc);
8794 goto rw_error; 8637 goto rw_error;
8795 } 8638 }
8796 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_COUNT_LIM__A, 3, 0); 8639 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_COUNT_LIM__A, 3, 0);
8797 if (rc != 0) { 8640 if (rc != 0) {
8798 pr_err("error %d\n", rc); 8641 pr_err("error %d\n", rc);
8799 goto rw_error; 8642 goto rw_error;
8800 } 8643 }
8801 8644
8802 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, 12, 0); 8645 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, 12, 0);
8803 if (rc != 0) { 8646 if (rc != 0) {
8804 pr_err("error %d\n", rc); 8647 pr_err("error %d\n", rc);
8805 goto rw_error; 8648 goto rw_error;
8806 } 8649 }
8807 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, 140, 0); 8650 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, 140, 0);
8808 if (rc != 0) { 8651 if (rc != 0) {
8809 pr_err("error %d\n", rc); 8652 pr_err("error %d\n", rc);
8810 goto rw_error; 8653 goto rw_error;
8811 } 8654 }
8812 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16)(-8), 0); 8655 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16)(-8), 0);
8813 if (rc != 0) { 8656 if (rc != 0) {
8814 pr_err("error %d\n", rc); 8657 pr_err("error %d\n", rc);
8815 goto rw_error; 8658 goto rw_error;
8816 } 8659 }
8817 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16)(-16), 0); 8660 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16)(-16), 0);
8818 if (rc != 0) { 8661 if (rc != 0) {
8819 pr_err("error %d\n", rc); 8662 pr_err("error %d\n", rc);
8820 goto rw_error; 8663 goto rw_error;
8821 } 8664 }
8822 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16)(-26), 0); 8665 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16)(-26), 0);
8823 if (rc != 0) { 8666 if (rc != 0) {
8824 pr_err("error %d\n", rc); 8667 pr_err("error %d\n", rc);
8825 goto rw_error; 8668 goto rw_error;
8826 } 8669 }
8827 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16)(-56), 0); 8670 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16)(-56), 0);
8828 if (rc != 0) { 8671 if (rc != 0) {
8829 pr_err("error %d\n", rc); 8672 pr_err("error %d\n", rc);
8830 goto rw_error; 8673 goto rw_error;
8831 } 8674 }
8832 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16)(-86), 0); 8675 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16)(-86), 0);
8833 if (rc != 0) { 8676 if (rc != 0) {
8834 pr_err("error %d\n", rc); 8677 pr_err("error %d\n", rc);
8835 goto rw_error; 8678 goto rw_error;
8836 } 8679 }
8837 8680
8838 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CA_FINE__A, 15, 0); 8681 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CA_FINE__A, 15, 0);
8839 if (rc != 0) { 8682 if (rc != 0) {
8840 pr_err("error %d\n", rc); 8683 pr_err("error %d\n", rc);
8841 goto rw_error; 8684 goto rw_error;
8842 } 8685 }
8843 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CA_COARSE__A, 40, 0); 8686 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CA_COARSE__A, 40, 0);
8844 if (rc != 0) { 8687 if (rc != 0) {
8845 pr_err("error %d\n", rc); 8688 pr_err("error %d\n", rc);
8846 goto rw_error; 8689 goto rw_error;
8847 } 8690 }
8848 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_FINE__A, 2, 0); 8691 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_FINE__A, 2, 0);
8849 if (rc != 0) { 8692 if (rc != 0) {
8850 pr_err("error %d\n", rc); 8693 pr_err("error %d\n", rc);
8851 goto rw_error; 8694 goto rw_error;
8852 } 8695 }
8853 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20, 0); 8696 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20, 0);
8854 if (rc != 0) { 8697 if (rc != 0) {
8855 pr_err("error %d\n", rc); 8698 pr_err("error %d\n", rc);
8856 goto rw_error; 8699 goto rw_error;
8857 } 8700 }
8858 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_COARSE__A, 255, 0); 8701 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_COARSE__A, 255, 0);
8859 if (rc != 0) { 8702 if (rc != 0) {
8860 pr_err("error %d\n", rc); 8703 pr_err("error %d\n", rc);
8861 goto rw_error; 8704 goto rw_error;
8862 } 8705 }
8863 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_FINE__A, 2, 0); 8706 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_FINE__A, 2, 0);
8864 if (rc != 0) { 8707 if (rc != 0) {
8865 pr_err("error %d\n", rc); 8708 pr_err("error %d\n", rc);
8866 goto rw_error; 8709 goto rw_error;
8867 } 8710 }
8868 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_MEDIUM__A, 10, 0); 8711 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_MEDIUM__A, 10, 0);
8869 if (rc != 0) { 8712 if (rc != 0) {
8870 pr_err("error %d\n", rc); 8713 pr_err("error %d\n", rc);
8871 goto rw_error; 8714 goto rw_error;
8872 } 8715 }
8873 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_COARSE__A, 50, 0); 8716 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_COARSE__A, 50, 0);
8874 if (rc != 0) { 8717 if (rc != 0) {
8875 pr_err("error %d\n", rc); 8718 pr_err("error %d\n", rc);
8876 goto rw_error; 8719 goto rw_error;
8877 } 8720 }
8878 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_FINE__A, 12, 0); 8721 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_FINE__A, 12, 0);
8879 if (rc != 0) { 8722 if (rc != 0) {
8880 pr_err("error %d\n", rc); 8723 pr_err("error %d\n", rc);
8881 goto rw_error; 8724 goto rw_error;
8882 } 8725 }
8883 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24, 0); 8726 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24, 0);
8884 if (rc != 0) { 8727 if (rc != 0) {
8885 pr_err("error %d\n", rc); 8728 pr_err("error %d\n", rc);
8886 goto rw_error; 8729 goto rw_error;
8887 } 8730 }
8888 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_COARSE__A, 24, 0); 8731 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_COARSE__A, 24, 0);
8889 if (rc != 0) { 8732 if (rc != 0) {
8890 pr_err("error %d\n", rc); 8733 pr_err("error %d\n", rc);
8891 goto rw_error; 8734 goto rw_error;
8892 } 8735 }
8893 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_FINE__A, 12, 0); 8736 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_FINE__A, 12, 0);
8894 if (rc != 0) { 8737 if (rc != 0) {
8895 pr_err("error %d\n", rc); 8738 pr_err("error %d\n", rc);
8896 goto rw_error; 8739 goto rw_error;
8897 } 8740 }
8898 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16, 0); 8741 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16, 0);
8899 if (rc != 0) { 8742 if (rc != 0) {
8900 pr_err("error %d\n", rc); 8743 pr_err("error %d\n", rc);
8901 goto rw_error; 8744 goto rw_error;
8902 } 8745 }
8903 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_COARSE__A, 16, 0); 8746 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_COARSE__A, 16, 0);
8904 if (rc != 0) { 8747 if (rc != 0) {
8905 pr_err("error %d\n", rc); 8748 pr_err("error %d\n", rc);
8906 goto rw_error; 8749 goto rw_error;
8907 } 8750 }
8908 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_FINE__A, 16, 0); 8751 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_FINE__A, 16, 0);
8909 if (rc != 0) { 8752 if (rc != 0) {
8910 pr_err("error %d\n", rc); 8753 pr_err("error %d\n", rc);
8911 goto rw_error; 8754 goto rw_error;
8912 } 8755 }
8913 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_MEDIUM__A, 32, 0); 8756 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_MEDIUM__A, 32, 0);
8914 if (rc != 0) { 8757 if (rc != 0) {
8915 pr_err("error %d\n", rc); 8758 pr_err("error %d\n", rc);
8916 goto rw_error; 8759 goto rw_error;
8917 } 8760 }
8918 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_COARSE__A, 176, 0); 8761 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_COARSE__A, 176, 0);
8919 if (rc != 0) { 8762 if (rc != 0) {
8920 pr_err("error %d\n", rc); 8763 pr_err("error %d\n", rc);
8921 goto rw_error; 8764 goto rw_error;
8922 } 8765 }
8923 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_FINE__A, 5, 0); 8766 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_FINE__A, 5, 0);
8924 if (rc != 0) { 8767 if (rc != 0) {
8925 pr_err("error %d\n", rc); 8768 pr_err("error %d\n", rc);
8926 goto rw_error; 8769 goto rw_error;
8927 } 8770 }
8928 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 15, 0); 8771 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 15, 0);
8929 if (rc != 0) { 8772 if (rc != 0) {
8930 pr_err("error %d\n", rc); 8773 pr_err("error %d\n", rc);
8931 goto rw_error; 8774 goto rw_error;
8932 } 8775 }
8933 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_COARSE__A, 8, 0); 8776 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_COARSE__A, 8, 0);
8934 if (rc != 0) { 8777 if (rc != 0) {
8935 pr_err("error %d\n", rc); 8778 pr_err("error %d\n", rc);
8936 goto rw_error; 8779 goto rw_error;
8937 } 8780 }
8938 8781
8939 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_SL_SIG_POWER__A, 20480, 0); 8782 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_SL_SIG_POWER__A, 20480, 0);
8940 if (rc != 0) { 8783 if (rc != 0) {
8941 pr_err("error %d\n", rc); 8784 pr_err("error %d\n", rc);
8942 goto rw_error; 8785 goto rw_error;
@@ -8976,202 +8819,202 @@ static int set_qam64(struct drx_demod_instance *demod)
8976 DRXJ_16TO8(15609), /* RAD5 */ 8819 DRXJ_16TO8(15609), /* RAD5 */
8977 }; 8820 };
8978 8821
8979 rc = DRXJ_DAP.write_block_func(dev_addr, QAM_DQ_QUAL_FUN0__A, sizeof(qam_dq_qual_fun), ((u8 *)qam_dq_qual_fun), 0); 8822 rc = drxdap_fasi_write_block(dev_addr, QAM_DQ_QUAL_FUN0__A, sizeof(qam_dq_qual_fun), ((u8 *)qam_dq_qual_fun), 0);
8980 if (rc != 0) { 8823 if (rc != 0) {
8981 pr_err("error %d\n", rc); 8824 pr_err("error %d\n", rc);
8982 goto rw_error; 8825 goto rw_error;
8983 } 8826 }
8984 rc = DRXJ_DAP.write_block_func(dev_addr, SCU_RAM_QAM_EQ_CMA_RAD0__A, sizeof(qam_eq_cma_rad), ((u8 *)qam_eq_cma_rad), 0); 8827 rc = drxdap_fasi_write_block(dev_addr, SCU_RAM_QAM_EQ_CMA_RAD0__A, sizeof(qam_eq_cma_rad), ((u8 *)qam_eq_cma_rad), 0);
8985 if (rc != 0) { 8828 if (rc != 0) {
8986 pr_err("error %d\n", rc); 8829 pr_err("error %d\n", rc);
8987 goto rw_error; 8830 goto rw_error;
8988 } 8831 }
8989 8832
8990 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RTH__A, 105, 0); 8833 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RTH__A, 105, 0);
8991 if (rc != 0) { 8834 if (rc != 0) {
8992 pr_err("error %d\n", rc); 8835 pr_err("error %d\n", rc);
8993 goto rw_error; 8836 goto rw_error;
8994 } 8837 }
8995 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_FTH__A, 60, 0); 8838 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_FTH__A, 60, 0);
8996 if (rc != 0) { 8839 if (rc != 0) {
8997 pr_err("error %d\n", rc); 8840 pr_err("error %d\n", rc);
8998 goto rw_error; 8841 goto rw_error;
8999 } 8842 }
9000 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_PTH__A, 100, 0); 8843 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_PTH__A, 100, 0);
9001 if (rc != 0) { 8844 if (rc != 0) {
9002 pr_err("error %d\n", rc); 8845 pr_err("error %d\n", rc);
9003 goto rw_error; 8846 goto rw_error;
9004 } 8847 }
9005 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_QTH__A, 195, 0); 8848 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_QTH__A, 195, 0);
9006 if (rc != 0) { 8849 if (rc != 0) {
9007 pr_err("error %d\n", rc); 8850 pr_err("error %d\n", rc);
9008 goto rw_error; 8851 goto rw_error;
9009 } 8852 }
9010 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_CTH__A, 80, 0); 8853 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_CTH__A, 80, 0);
9011 if (rc != 0) { 8854 if (rc != 0) {
9012 pr_err("error %d\n", rc); 8855 pr_err("error %d\n", rc);
9013 goto rw_error; 8856 goto rw_error;
9014 } 8857 }
9015 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_MTH__A, 84, 0); 8858 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_MTH__A, 84, 0);
9016 if (rc != 0) { 8859 if (rc != 0) {
9017 pr_err("error %d\n", rc); 8860 pr_err("error %d\n", rc);
9018 goto rw_error; 8861 goto rw_error;
9019 } 8862 }
9020 8863
9021 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RATE_LIM__A, 40, 0); 8864 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RATE_LIM__A, 40, 0);
9022 if (rc != 0) { 8865 if (rc != 0) {
9023 pr_err("error %d\n", rc); 8866 pr_err("error %d\n", rc);
9024 goto rw_error; 8867 goto rw_error;
9025 } 8868 }
9026 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_FREQ_LIM__A, 32, 0); 8869 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_FREQ_LIM__A, 32, 0);
9027 if (rc != 0) { 8870 if (rc != 0) {
9028 pr_err("error %d\n", rc); 8871 pr_err("error %d\n", rc);
9029 goto rw_error; 8872 goto rw_error;
9030 } 8873 }
9031 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_COUNT_LIM__A, 3, 0); 8874 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_COUNT_LIM__A, 3, 0);
9032 if (rc != 0) { 8875 if (rc != 0) {
9033 pr_err("error %d\n", rc); 8876 pr_err("error %d\n", rc);
9034 goto rw_error; 8877 goto rw_error;
9035 } 8878 }
9036 8879
9037 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, 12, 0); 8880 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, 12, 0);
9038 if (rc != 0) { 8881 if (rc != 0) {
9039 pr_err("error %d\n", rc); 8882 pr_err("error %d\n", rc);
9040 goto rw_error; 8883 goto rw_error;
9041 } 8884 }
9042 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, 141, 0); 8885 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, 141, 0);
9043 if (rc != 0) { 8886 if (rc != 0) {
9044 pr_err("error %d\n", rc); 8887 pr_err("error %d\n", rc);
9045 goto rw_error; 8888 goto rw_error;
9046 } 8889 }
9047 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, 7, 0); 8890 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, 7, 0);
9048 if (rc != 0) { 8891 if (rc != 0) {
9049 pr_err("error %d\n", rc); 8892 pr_err("error %d\n", rc);
9050 goto rw_error; 8893 goto rw_error;
9051 } 8894 }
9052 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, 0, 0); 8895 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, 0, 0);
9053 if (rc != 0) { 8896 if (rc != 0) {
9054 pr_err("error %d\n", rc); 8897 pr_err("error %d\n", rc);
9055 goto rw_error; 8898 goto rw_error;
9056 } 8899 }
9057 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16)(-15), 0); 8900 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16)(-15), 0);
9058 if (rc != 0) { 8901 if (rc != 0) {
9059 pr_err("error %d\n", rc); 8902 pr_err("error %d\n", rc);
9060 goto rw_error; 8903 goto rw_error;
9061 } 8904 }
9062 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16)(-45), 0); 8905 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16)(-45), 0);
9063 if (rc != 0) { 8906 if (rc != 0) {
9064 pr_err("error %d\n", rc); 8907 pr_err("error %d\n", rc);
9065 goto rw_error; 8908 goto rw_error;
9066 } 8909 }
9067 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16)(-80), 0); 8910 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16)(-80), 0);
9068 if (rc != 0) { 8911 if (rc != 0) {
9069 pr_err("error %d\n", rc); 8912 pr_err("error %d\n", rc);
9070 goto rw_error; 8913 goto rw_error;
9071 } 8914 }
9072 8915
9073 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CA_FINE__A, 15, 0); 8916 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CA_FINE__A, 15, 0);
9074 if (rc != 0) { 8917 if (rc != 0) {
9075 pr_err("error %d\n", rc); 8918 pr_err("error %d\n", rc);
9076 goto rw_error; 8919 goto rw_error;
9077 } 8920 }
9078 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CA_COARSE__A, 40, 0); 8921 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CA_COARSE__A, 40, 0);
9079 if (rc != 0) { 8922 if (rc != 0) {
9080 pr_err("error %d\n", rc); 8923 pr_err("error %d\n", rc);
9081 goto rw_error; 8924 goto rw_error;
9082 } 8925 }
9083 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_FINE__A, 2, 0); 8926 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_FINE__A, 2, 0);
9084 if (rc != 0) { 8927 if (rc != 0) {
9085 pr_err("error %d\n", rc); 8928 pr_err("error %d\n", rc);
9086 goto rw_error; 8929 goto rw_error;
9087 } 8930 }
9088 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_MEDIUM__A, 30, 0); 8931 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_MEDIUM__A, 30, 0);
9089 if (rc != 0) { 8932 if (rc != 0) {
9090 pr_err("error %d\n", rc); 8933 pr_err("error %d\n", rc);
9091 goto rw_error; 8934 goto rw_error;
9092 } 8935 }
9093 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_COARSE__A, 255, 0); 8936 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_COARSE__A, 255, 0);
9094 if (rc != 0) { 8937 if (rc != 0) {
9095 pr_err("error %d\n", rc); 8938 pr_err("error %d\n", rc);
9096 goto rw_error; 8939 goto rw_error;
9097 } 8940 }
9098 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_FINE__A, 2, 0); 8941 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_FINE__A, 2, 0);
9099 if (rc != 0) { 8942 if (rc != 0) {
9100 pr_err("error %d\n", rc); 8943 pr_err("error %d\n", rc);
9101 goto rw_error; 8944 goto rw_error;
9102 } 8945 }
9103 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_MEDIUM__A, 15, 0); 8946 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_MEDIUM__A, 15, 0);
9104 if (rc != 0) { 8947 if (rc != 0) {
9105 pr_err("error %d\n", rc); 8948 pr_err("error %d\n", rc);
9106 goto rw_error; 8949 goto rw_error;
9107 } 8950 }
9108 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_COARSE__A, 80, 0); 8951 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_COARSE__A, 80, 0);
9109 if (rc != 0) { 8952 if (rc != 0) {
9110 pr_err("error %d\n", rc); 8953 pr_err("error %d\n", rc);
9111 goto rw_error; 8954 goto rw_error;
9112 } 8955 }
9113 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_FINE__A, 12, 0); 8956 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_FINE__A, 12, 0);
9114 if (rc != 0) { 8957 if (rc != 0) {
9115 pr_err("error %d\n", rc); 8958 pr_err("error %d\n", rc);
9116 goto rw_error; 8959 goto rw_error;
9117 } 8960 }
9118 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24, 0); 8961 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24, 0);
9119 if (rc != 0) { 8962 if (rc != 0) {
9120 pr_err("error %d\n", rc); 8963 pr_err("error %d\n", rc);
9121 goto rw_error; 8964 goto rw_error;
9122 } 8965 }
9123 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_COARSE__A, 24, 0); 8966 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_COARSE__A, 24, 0);
9124 if (rc != 0) { 8967 if (rc != 0) {
9125 pr_err("error %d\n", rc); 8968 pr_err("error %d\n", rc);
9126 goto rw_error; 8969 goto rw_error;
9127 } 8970 }
9128 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_FINE__A, 12, 0); 8971 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_FINE__A, 12, 0);
9129 if (rc != 0) { 8972 if (rc != 0) {
9130 pr_err("error %d\n", rc); 8973 pr_err("error %d\n", rc);
9131 goto rw_error; 8974 goto rw_error;
9132 } 8975 }
9133 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16, 0); 8976 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16, 0);
9134 if (rc != 0) { 8977 if (rc != 0) {
9135 pr_err("error %d\n", rc); 8978 pr_err("error %d\n", rc);
9136 goto rw_error; 8979 goto rw_error;
9137 } 8980 }
9138 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_COARSE__A, 16, 0); 8981 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_COARSE__A, 16, 0);
9139 if (rc != 0) { 8982 if (rc != 0) {
9140 pr_err("error %d\n", rc); 8983 pr_err("error %d\n", rc);
9141 goto rw_error; 8984 goto rw_error;
9142 } 8985 }
9143 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_FINE__A, 16, 0); 8986 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_FINE__A, 16, 0);
9144 if (rc != 0) { 8987 if (rc != 0) {
9145 pr_err("error %d\n", rc); 8988 pr_err("error %d\n", rc);
9146 goto rw_error; 8989 goto rw_error;
9147 } 8990 }
9148 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_MEDIUM__A, 48, 0); 8991 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_MEDIUM__A, 48, 0);
9149 if (rc != 0) { 8992 if (rc != 0) {
9150 pr_err("error %d\n", rc); 8993 pr_err("error %d\n", rc);
9151 goto rw_error; 8994 goto rw_error;
9152 } 8995 }
9153 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_COARSE__A, 160, 0); 8996 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_COARSE__A, 160, 0);
9154 if (rc != 0) { 8997 if (rc != 0) {
9155 pr_err("error %d\n", rc); 8998 pr_err("error %d\n", rc);
9156 goto rw_error; 8999 goto rw_error;
9157 } 9000 }
9158 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_FINE__A, 5, 0); 9001 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_FINE__A, 5, 0);
9159 if (rc != 0) { 9002 if (rc != 0) {
9160 pr_err("error %d\n", rc); 9003 pr_err("error %d\n", rc);
9161 goto rw_error; 9004 goto rw_error;
9162 } 9005 }
9163 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 15, 0); 9006 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 15, 0);
9164 if (rc != 0) { 9007 if (rc != 0) {
9165 pr_err("error %d\n", rc); 9008 pr_err("error %d\n", rc);
9166 goto rw_error; 9009 goto rw_error;
9167 } 9010 }
9168 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_COARSE__A, 32, 0); 9011 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_COARSE__A, 32, 0);
9169 if (rc != 0) { 9012 if (rc != 0) {
9170 pr_err("error %d\n", rc); 9013 pr_err("error %d\n", rc);
9171 goto rw_error; 9014 goto rw_error;
9172 } 9015 }
9173 9016
9174 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_SL_SIG_POWER__A, 43008, 0); 9017 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_SL_SIG_POWER__A, 43008, 0);
9175 if (rc != 0) { 9018 if (rc != 0) {
9176 pr_err("error %d\n", rc); 9019 pr_err("error %d\n", rc);
9177 goto rw_error; 9020 goto rw_error;
@@ -9211,202 +9054,202 @@ static int set_qam128(struct drx_demod_instance *demod)
9211 DRXJ_16TO8(7238), /* RAD5 */ 9054 DRXJ_16TO8(7238), /* RAD5 */
9212 }; 9055 };
9213 9056
9214 rc = DRXJ_DAP.write_block_func(dev_addr, QAM_DQ_QUAL_FUN0__A, sizeof(qam_dq_qual_fun), ((u8 *)qam_dq_qual_fun), 0); 9057 rc = drxdap_fasi_write_block(dev_addr, QAM_DQ_QUAL_FUN0__A, sizeof(qam_dq_qual_fun), ((u8 *)qam_dq_qual_fun), 0);
9215 if (rc != 0) { 9058 if (rc != 0) {
9216 pr_err("error %d\n", rc); 9059 pr_err("error %d\n", rc);
9217 goto rw_error; 9060 goto rw_error;
9218 } 9061 }
9219 rc = DRXJ_DAP.write_block_func(dev_addr, SCU_RAM_QAM_EQ_CMA_RAD0__A, sizeof(qam_eq_cma_rad), ((u8 *)qam_eq_cma_rad), 0); 9062 rc = drxdap_fasi_write_block(dev_addr, SCU_RAM_QAM_EQ_CMA_RAD0__A, sizeof(qam_eq_cma_rad), ((u8 *)qam_eq_cma_rad), 0);
9220 if (rc != 0) { 9063 if (rc != 0) {
9221 pr_err("error %d\n", rc); 9064 pr_err("error %d\n", rc);
9222 goto rw_error; 9065 goto rw_error;
9223 } 9066 }
9224 9067
9225 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RTH__A, 50, 0); 9068 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RTH__A, 50, 0);
9226 if (rc != 0) { 9069 if (rc != 0) {
9227 pr_err("error %d\n", rc); 9070 pr_err("error %d\n", rc);
9228 goto rw_error; 9071 goto rw_error;
9229 } 9072 }
9230 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_FTH__A, 60, 0); 9073 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_FTH__A, 60, 0);
9231 if (rc != 0) { 9074 if (rc != 0) {
9232 pr_err("error %d\n", rc); 9075 pr_err("error %d\n", rc);
9233 goto rw_error; 9076 goto rw_error;
9234 } 9077 }
9235 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_PTH__A, 100, 0); 9078 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_PTH__A, 100, 0);
9236 if (rc != 0) { 9079 if (rc != 0) {
9237 pr_err("error %d\n", rc); 9080 pr_err("error %d\n", rc);
9238 goto rw_error; 9081 goto rw_error;
9239 } 9082 }
9240 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_QTH__A, 140, 0); 9083 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_QTH__A, 140, 0);
9241 if (rc != 0) { 9084 if (rc != 0) {
9242 pr_err("error %d\n", rc); 9085 pr_err("error %d\n", rc);
9243 goto rw_error; 9086 goto rw_error;
9244 } 9087 }
9245 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_CTH__A, 80, 0); 9088 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_CTH__A, 80, 0);
9246 if (rc != 0) { 9089 if (rc != 0) {
9247 pr_err("error %d\n", rc); 9090 pr_err("error %d\n", rc);
9248 goto rw_error; 9091 goto rw_error;
9249 } 9092 }
9250 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_MTH__A, 100, 0); 9093 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_MTH__A, 100, 0);
9251 if (rc != 0) { 9094 if (rc != 0) {
9252 pr_err("error %d\n", rc); 9095 pr_err("error %d\n", rc);
9253 goto rw_error; 9096 goto rw_error;
9254 } 9097 }
9255 9098
9256 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RATE_LIM__A, 40, 0); 9099 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RATE_LIM__A, 40, 0);
9257 if (rc != 0) { 9100 if (rc != 0) {
9258 pr_err("error %d\n", rc); 9101 pr_err("error %d\n", rc);
9259 goto rw_error; 9102 goto rw_error;
9260 } 9103 }
9261 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_FREQ_LIM__A, 32, 0); 9104 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_FREQ_LIM__A, 32, 0);
9262 if (rc != 0) { 9105 if (rc != 0) {
9263 pr_err("error %d\n", rc); 9106 pr_err("error %d\n", rc);
9264 goto rw_error; 9107 goto rw_error;
9265 } 9108 }
9266 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_COUNT_LIM__A, 3, 0); 9109 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_COUNT_LIM__A, 3, 0);
9267 if (rc != 0) { 9110 if (rc != 0) {
9268 pr_err("error %d\n", rc); 9111 pr_err("error %d\n", rc);
9269 goto rw_error; 9112 goto rw_error;
9270 } 9113 }
9271 9114
9272 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, 8, 0); 9115 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, 8, 0);
9273 if (rc != 0) { 9116 if (rc != 0) {
9274 pr_err("error %d\n", rc); 9117 pr_err("error %d\n", rc);
9275 goto rw_error; 9118 goto rw_error;
9276 } 9119 }
9277 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, 65, 0); 9120 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, 65, 0);
9278 if (rc != 0) { 9121 if (rc != 0) {
9279 pr_err("error %d\n", rc); 9122 pr_err("error %d\n", rc);
9280 goto rw_error; 9123 goto rw_error;
9281 } 9124 }
9282 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, 5, 0); 9125 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, 5, 0);
9283 if (rc != 0) { 9126 if (rc != 0) {
9284 pr_err("error %d\n", rc); 9127 pr_err("error %d\n", rc);
9285 goto rw_error; 9128 goto rw_error;
9286 } 9129 }
9287 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, 3, 0); 9130 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, 3, 0);
9288 if (rc != 0) { 9131 if (rc != 0) {
9289 pr_err("error %d\n", rc); 9132 pr_err("error %d\n", rc);
9290 goto rw_error; 9133 goto rw_error;
9291 } 9134 }
9292 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16)(-1), 0); 9135 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16)(-1), 0);
9293 if (rc != 0) { 9136 if (rc != 0) {
9294 pr_err("error %d\n", rc); 9137 pr_err("error %d\n", rc);
9295 goto rw_error; 9138 goto rw_error;
9296 } 9139 }
9297 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, 12, 0); 9140 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, 12, 0);
9298 if (rc != 0) { 9141 if (rc != 0) {
9299 pr_err("error %d\n", rc); 9142 pr_err("error %d\n", rc);
9300 goto rw_error; 9143 goto rw_error;
9301 } 9144 }
9302 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16)(-23), 0); 9145 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16)(-23), 0);
9303 if (rc != 0) { 9146 if (rc != 0) {
9304 pr_err("error %d\n", rc); 9147 pr_err("error %d\n", rc);
9305 goto rw_error; 9148 goto rw_error;
9306 } 9149 }
9307 9150
9308 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CA_FINE__A, 15, 0); 9151 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CA_FINE__A, 15, 0);
9309 if (rc != 0) { 9152 if (rc != 0) {
9310 pr_err("error %d\n", rc); 9153 pr_err("error %d\n", rc);
9311 goto rw_error; 9154 goto rw_error;
9312 } 9155 }
9313 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CA_COARSE__A, 40, 0); 9156 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CA_COARSE__A, 40, 0);
9314 if (rc != 0) { 9157 if (rc != 0) {
9315 pr_err("error %d\n", rc); 9158 pr_err("error %d\n", rc);
9316 goto rw_error; 9159 goto rw_error;
9317 } 9160 }
9318 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_FINE__A, 2, 0); 9161 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_FINE__A, 2, 0);
9319 if (rc != 0) { 9162 if (rc != 0) {
9320 pr_err("error %d\n", rc); 9163 pr_err("error %d\n", rc);
9321 goto rw_error; 9164 goto rw_error;
9322 } 9165 }
9323 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_MEDIUM__A, 40, 0); 9166 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_MEDIUM__A, 40, 0);
9324 if (rc != 0) { 9167 if (rc != 0) {
9325 pr_err("error %d\n", rc); 9168 pr_err("error %d\n", rc);
9326 goto rw_error; 9169 goto rw_error;
9327 } 9170 }
9328 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_COARSE__A, 255, 0); 9171 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_COARSE__A, 255, 0);
9329 if (rc != 0) { 9172 if (rc != 0) {
9330 pr_err("error %d\n", rc); 9173 pr_err("error %d\n", rc);
9331 goto rw_error; 9174 goto rw_error;
9332 } 9175 }
9333 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_FINE__A, 2, 0); 9176 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_FINE__A, 2, 0);
9334 if (rc != 0) { 9177 if (rc != 0) {
9335 pr_err("error %d\n", rc); 9178 pr_err("error %d\n", rc);
9336 goto rw_error; 9179 goto rw_error;
9337 } 9180 }
9338 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20, 0); 9181 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20, 0);
9339 if (rc != 0) { 9182 if (rc != 0) {
9340 pr_err("error %d\n", rc); 9183 pr_err("error %d\n", rc);
9341 goto rw_error; 9184 goto rw_error;
9342 } 9185 }
9343 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_COARSE__A, 80, 0); 9186 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_COARSE__A, 80, 0);
9344 if (rc != 0) { 9187 if (rc != 0) {
9345 pr_err("error %d\n", rc); 9188 pr_err("error %d\n", rc);
9346 goto rw_error; 9189 goto rw_error;
9347 } 9190 }
9348 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_FINE__A, 12, 0); 9191 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_FINE__A, 12, 0);
9349 if (rc != 0) { 9192 if (rc != 0) {
9350 pr_err("error %d\n", rc); 9193 pr_err("error %d\n", rc);
9351 goto rw_error; 9194 goto rw_error;
9352 } 9195 }
9353 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24, 0); 9196 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24, 0);
9354 if (rc != 0) { 9197 if (rc != 0) {
9355 pr_err("error %d\n", rc); 9198 pr_err("error %d\n", rc);
9356 goto rw_error; 9199 goto rw_error;
9357 } 9200 }
9358 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_COARSE__A, 24, 0); 9201 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_COARSE__A, 24, 0);
9359 if (rc != 0) { 9202 if (rc != 0) {
9360 pr_err("error %d\n", rc); 9203 pr_err("error %d\n", rc);
9361 goto rw_error; 9204 goto rw_error;
9362 } 9205 }
9363 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_FINE__A, 12, 0); 9206 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_FINE__A, 12, 0);
9364 if (rc != 0) { 9207 if (rc != 0) {
9365 pr_err("error %d\n", rc); 9208 pr_err("error %d\n", rc);
9366 goto rw_error; 9209 goto rw_error;
9367 } 9210 }
9368 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16, 0); 9211 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16, 0);
9369 if (rc != 0) { 9212 if (rc != 0) {
9370 pr_err("error %d\n", rc); 9213 pr_err("error %d\n", rc);
9371 goto rw_error; 9214 goto rw_error;
9372 } 9215 }
9373 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_COARSE__A, 16, 0); 9216 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_COARSE__A, 16, 0);
9374 if (rc != 0) { 9217 if (rc != 0) {
9375 pr_err("error %d\n", rc); 9218 pr_err("error %d\n", rc);
9376 goto rw_error; 9219 goto rw_error;
9377 } 9220 }
9378 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_FINE__A, 16, 0); 9221 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_FINE__A, 16, 0);
9379 if (rc != 0) { 9222 if (rc != 0) {
9380 pr_err("error %d\n", rc); 9223 pr_err("error %d\n", rc);
9381 goto rw_error; 9224 goto rw_error;
9382 } 9225 }
9383 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_MEDIUM__A, 32, 0); 9226 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_MEDIUM__A, 32, 0);
9384 if (rc != 0) { 9227 if (rc != 0) {
9385 pr_err("error %d\n", rc); 9228 pr_err("error %d\n", rc);
9386 goto rw_error; 9229 goto rw_error;
9387 } 9230 }
9388 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_COARSE__A, 144, 0); 9231 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_COARSE__A, 144, 0);
9389 if (rc != 0) { 9232 if (rc != 0) {
9390 pr_err("error %d\n", rc); 9233 pr_err("error %d\n", rc);
9391 goto rw_error; 9234 goto rw_error;
9392 } 9235 }
9393 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_FINE__A, 5, 0); 9236 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_FINE__A, 5, 0);
9394 if (rc != 0) { 9237 if (rc != 0) {
9395 pr_err("error %d\n", rc); 9238 pr_err("error %d\n", rc);
9396 goto rw_error; 9239 goto rw_error;
9397 } 9240 }
9398 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 15, 0); 9241 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 15, 0);
9399 if (rc != 0) { 9242 if (rc != 0) {
9400 pr_err("error %d\n", rc); 9243 pr_err("error %d\n", rc);
9401 goto rw_error; 9244 goto rw_error;
9402 } 9245 }
9403 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_COARSE__A, 16, 0); 9246 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_COARSE__A, 16, 0);
9404 if (rc != 0) { 9247 if (rc != 0) {
9405 pr_err("error %d\n", rc); 9248 pr_err("error %d\n", rc);
9406 goto rw_error; 9249 goto rw_error;
9407 } 9250 }
9408 9251
9409 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_SL_SIG_POWER__A, 20992, 0); 9252 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_SL_SIG_POWER__A, 20992, 0);
9410 if (rc != 0) { 9253 if (rc != 0) {
9411 pr_err("error %d\n", rc); 9254 pr_err("error %d\n", rc);
9412 goto rw_error; 9255 goto rw_error;
@@ -9446,202 +9289,202 @@ static int set_qam256(struct drx_demod_instance *demod)
9446 DRXJ_16TO8(15356), /* RAD5 */ 9289 DRXJ_16TO8(15356), /* RAD5 */
9447 }; 9290 };
9448 9291
9449 rc = DRXJ_DAP.write_block_func(dev_addr, QAM_DQ_QUAL_FUN0__A, sizeof(qam_dq_qual_fun), ((u8 *)qam_dq_qual_fun), 0); 9292 rc = drxdap_fasi_write_block(dev_addr, QAM_DQ_QUAL_FUN0__A, sizeof(qam_dq_qual_fun), ((u8 *)qam_dq_qual_fun), 0);
9450 if (rc != 0) { 9293 if (rc != 0) {
9451 pr_err("error %d\n", rc); 9294 pr_err("error %d\n", rc);
9452 goto rw_error; 9295 goto rw_error;
9453 } 9296 }
9454 rc = DRXJ_DAP.write_block_func(dev_addr, SCU_RAM_QAM_EQ_CMA_RAD0__A, sizeof(qam_eq_cma_rad), ((u8 *)qam_eq_cma_rad), 0); 9297 rc = drxdap_fasi_write_block(dev_addr, SCU_RAM_QAM_EQ_CMA_RAD0__A, sizeof(qam_eq_cma_rad), ((u8 *)qam_eq_cma_rad), 0);
9455 if (rc != 0) { 9298 if (rc != 0) {
9456 pr_err("error %d\n", rc); 9299 pr_err("error %d\n", rc);
9457 goto rw_error; 9300 goto rw_error;
9458 } 9301 }
9459 9302
9460 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RTH__A, 50, 0); 9303 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RTH__A, 50, 0);
9461 if (rc != 0) { 9304 if (rc != 0) {
9462 pr_err("error %d\n", rc); 9305 pr_err("error %d\n", rc);
9463 goto rw_error; 9306 goto rw_error;
9464 } 9307 }
9465 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_FTH__A, 60, 0); 9308 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_FTH__A, 60, 0);
9466 if (rc != 0) { 9309 if (rc != 0) {
9467 pr_err("error %d\n", rc); 9310 pr_err("error %d\n", rc);
9468 goto rw_error; 9311 goto rw_error;
9469 } 9312 }
9470 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_PTH__A, 100, 0); 9313 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_PTH__A, 100, 0);
9471 if (rc != 0) { 9314 if (rc != 0) {
9472 pr_err("error %d\n", rc); 9315 pr_err("error %d\n", rc);
9473 goto rw_error; 9316 goto rw_error;
9474 } 9317 }
9475 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_QTH__A, 150, 0); 9318 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_QTH__A, 150, 0);
9476 if (rc != 0) { 9319 if (rc != 0) {
9477 pr_err("error %d\n", rc); 9320 pr_err("error %d\n", rc);
9478 goto rw_error; 9321 goto rw_error;
9479 } 9322 }
9480 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_CTH__A, 80, 0); 9323 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_CTH__A, 80, 0);
9481 if (rc != 0) { 9324 if (rc != 0) {
9482 pr_err("error %d\n", rc); 9325 pr_err("error %d\n", rc);
9483 goto rw_error; 9326 goto rw_error;
9484 } 9327 }
9485 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_MTH__A, 110, 0); 9328 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_MTH__A, 110, 0);
9486 if (rc != 0) { 9329 if (rc != 0) {
9487 pr_err("error %d\n", rc); 9330 pr_err("error %d\n", rc);
9488 goto rw_error; 9331 goto rw_error;
9489 } 9332 }
9490 9333
9491 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RATE_LIM__A, 40, 0); 9334 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RATE_LIM__A, 40, 0);
9492 if (rc != 0) { 9335 if (rc != 0) {
9493 pr_err("error %d\n", rc); 9336 pr_err("error %d\n", rc);
9494 goto rw_error; 9337 goto rw_error;
9495 } 9338 }
9496 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_FREQ_LIM__A, 16, 0); 9339 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_FREQ_LIM__A, 16, 0);
9497 if (rc != 0) { 9340 if (rc != 0) {
9498 pr_err("error %d\n", rc); 9341 pr_err("error %d\n", rc);
9499 goto rw_error; 9342 goto rw_error;
9500 } 9343 }
9501 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_COUNT_LIM__A, 3, 0); 9344 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_COUNT_LIM__A, 3, 0);
9502 if (rc != 0) { 9345 if (rc != 0) {
9503 pr_err("error %d\n", rc); 9346 pr_err("error %d\n", rc);
9504 goto rw_error; 9347 goto rw_error;
9505 } 9348 }
9506 9349
9507 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, 8, 0); 9350 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, 8, 0);
9508 if (rc != 0) { 9351 if (rc != 0) {
9509 pr_err("error %d\n", rc); 9352 pr_err("error %d\n", rc);
9510 goto rw_error; 9353 goto rw_error;
9511 } 9354 }
9512 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, 74, 0); 9355 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, 74, 0);
9513 if (rc != 0) { 9356 if (rc != 0) {
9514 pr_err("error %d\n", rc); 9357 pr_err("error %d\n", rc);
9515 goto rw_error; 9358 goto rw_error;
9516 } 9359 }
9517 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, 18, 0); 9360 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, 18, 0);
9518 if (rc != 0) { 9361 if (rc != 0) {
9519 pr_err("error %d\n", rc); 9362 pr_err("error %d\n", rc);
9520 goto rw_error; 9363 goto rw_error;
9521 } 9364 }
9522 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, 13, 0); 9365 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, 13, 0);
9523 if (rc != 0) { 9366 if (rc != 0) {
9524 pr_err("error %d\n", rc); 9367 pr_err("error %d\n", rc);
9525 goto rw_error; 9368 goto rw_error;
9526 } 9369 }
9527 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, 7, 0); 9370 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, 7, 0);
9528 if (rc != 0) { 9371 if (rc != 0) {
9529 pr_err("error %d\n", rc); 9372 pr_err("error %d\n", rc);
9530 goto rw_error; 9373 goto rw_error;
9531 } 9374 }
9532 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, 0, 0); 9375 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, 0, 0);
9533 if (rc != 0) { 9376 if (rc != 0) {
9534 pr_err("error %d\n", rc); 9377 pr_err("error %d\n", rc);
9535 goto rw_error; 9378 goto rw_error;
9536 } 9379 }
9537 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16)(-8), 0); 9380 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16)(-8), 0);
9538 if (rc != 0) { 9381 if (rc != 0) {
9539 pr_err("error %d\n", rc); 9382 pr_err("error %d\n", rc);
9540 goto rw_error; 9383 goto rw_error;
9541 } 9384 }
9542 9385
9543 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CA_FINE__A, 15, 0); 9386 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CA_FINE__A, 15, 0);
9544 if (rc != 0) { 9387 if (rc != 0) {
9545 pr_err("error %d\n", rc); 9388 pr_err("error %d\n", rc);
9546 goto rw_error; 9389 goto rw_error;
9547 } 9390 }
9548 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CA_COARSE__A, 40, 0); 9391 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CA_COARSE__A, 40, 0);
9549 if (rc != 0) { 9392 if (rc != 0) {
9550 pr_err("error %d\n", rc); 9393 pr_err("error %d\n", rc);
9551 goto rw_error; 9394 goto rw_error;
9552 } 9395 }
9553 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_FINE__A, 2, 0); 9396 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_FINE__A, 2, 0);
9554 if (rc != 0) { 9397 if (rc != 0) {
9555 pr_err("error %d\n", rc); 9398 pr_err("error %d\n", rc);
9556 goto rw_error; 9399 goto rw_error;
9557 } 9400 }
9558 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_MEDIUM__A, 50, 0); 9401 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_MEDIUM__A, 50, 0);
9559 if (rc != 0) { 9402 if (rc != 0) {
9560 pr_err("error %d\n", rc); 9403 pr_err("error %d\n", rc);
9561 goto rw_error; 9404 goto rw_error;
9562 } 9405 }
9563 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CP_COARSE__A, 255, 0); 9406 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CP_COARSE__A, 255, 0);
9564 if (rc != 0) { 9407 if (rc != 0) {
9565 pr_err("error %d\n", rc); 9408 pr_err("error %d\n", rc);
9566 goto rw_error; 9409 goto rw_error;
9567 } 9410 }
9568 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_FINE__A, 2, 0); 9411 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_FINE__A, 2, 0);
9569 if (rc != 0) { 9412 if (rc != 0) {
9570 pr_err("error %d\n", rc); 9413 pr_err("error %d\n", rc);
9571 goto rw_error; 9414 goto rw_error;
9572 } 9415 }
9573 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_MEDIUM__A, 25, 0); 9416 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_MEDIUM__A, 25, 0);
9574 if (rc != 0) { 9417 if (rc != 0) {
9575 pr_err("error %d\n", rc); 9418 pr_err("error %d\n", rc);
9576 goto rw_error; 9419 goto rw_error;
9577 } 9420 }
9578 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CI_COARSE__A, 80, 0); 9421 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CI_COARSE__A, 80, 0);
9579 if (rc != 0) { 9422 if (rc != 0) {
9580 pr_err("error %d\n", rc); 9423 pr_err("error %d\n", rc);
9581 goto rw_error; 9424 goto rw_error;
9582 } 9425 }
9583 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_FINE__A, 12, 0); 9426 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_FINE__A, 12, 0);
9584 if (rc != 0) { 9427 if (rc != 0) {
9585 pr_err("error %d\n", rc); 9428 pr_err("error %d\n", rc);
9586 goto rw_error; 9429 goto rw_error;
9587 } 9430 }
9588 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24, 0); 9431 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24, 0);
9589 if (rc != 0) { 9432 if (rc != 0) {
9590 pr_err("error %d\n", rc); 9433 pr_err("error %d\n", rc);
9591 goto rw_error; 9434 goto rw_error;
9592 } 9435 }
9593 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EP_COARSE__A, 24, 0); 9436 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EP_COARSE__A, 24, 0);
9594 if (rc != 0) { 9437 if (rc != 0) {
9595 pr_err("error %d\n", rc); 9438 pr_err("error %d\n", rc);
9596 goto rw_error; 9439 goto rw_error;
9597 } 9440 }
9598 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_FINE__A, 12, 0); 9441 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_FINE__A, 12, 0);
9599 if (rc != 0) { 9442 if (rc != 0) {
9600 pr_err("error %d\n", rc); 9443 pr_err("error %d\n", rc);
9601 goto rw_error; 9444 goto rw_error;
9602 } 9445 }
9603 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16, 0); 9446 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16, 0);
9604 if (rc != 0) { 9447 if (rc != 0) {
9605 pr_err("error %d\n", rc); 9448 pr_err("error %d\n", rc);
9606 goto rw_error; 9449 goto rw_error;
9607 } 9450 }
9608 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_EI_COARSE__A, 16, 0); 9451 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_EI_COARSE__A, 16, 0);
9609 if (rc != 0) { 9452 if (rc != 0) {
9610 pr_err("error %d\n", rc); 9453 pr_err("error %d\n", rc);
9611 goto rw_error; 9454 goto rw_error;
9612 } 9455 }
9613 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_FINE__A, 16, 0); 9456 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_FINE__A, 16, 0);
9614 if (rc != 0) { 9457 if (rc != 0) {
9615 pr_err("error %d\n", rc); 9458 pr_err("error %d\n", rc);
9616 goto rw_error; 9459 goto rw_error;
9617 } 9460 }
9618 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_MEDIUM__A, 48, 0); 9461 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_MEDIUM__A, 48, 0);
9619 if (rc != 0) { 9462 if (rc != 0) {
9620 pr_err("error %d\n", rc); 9463 pr_err("error %d\n", rc);
9621 goto rw_error; 9464 goto rw_error;
9622 } 9465 }
9623 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF_COARSE__A, 80, 0); 9466 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF_COARSE__A, 80, 0);
9624 if (rc != 0) { 9467 if (rc != 0) {
9625 pr_err("error %d\n", rc); 9468 pr_err("error %d\n", rc);
9626 goto rw_error; 9469 goto rw_error;
9627 } 9470 }
9628 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_FINE__A, 5, 0); 9471 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_FINE__A, 5, 0);
9629 if (rc != 0) { 9472 if (rc != 0) {
9630 pr_err("error %d\n", rc); 9473 pr_err("error %d\n", rc);
9631 goto rw_error; 9474 goto rw_error;
9632 } 9475 }
9633 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 15, 0); 9476 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 15, 0);
9634 if (rc != 0) { 9477 if (rc != 0) {
9635 pr_err("error %d\n", rc); 9478 pr_err("error %d\n", rc);
9636 goto rw_error; 9479 goto rw_error;
9637 } 9480 }
9638 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_LC_CF1_COARSE__A, 16, 0); 9481 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_LC_CF1_COARSE__A, 16, 0);
9639 if (rc != 0) { 9482 if (rc != 0) {
9640 pr_err("error %d\n", rc); 9483 pr_err("error %d\n", rc);
9641 goto rw_error; 9484 goto rw_error;
9642 } 9485 }
9643 9486
9644 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_SL_SIG_POWER__A, 43520, 0); 9487 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_SL_SIG_POWER__A, 43520, 0);
9645 if (rc != 0) { 9488 if (rc != 0) {
9646 pr_err("error %d\n", rc); 9489 pr_err("error %d\n", rc);
9647 goto rw_error; 9490 goto rw_error;
@@ -9875,37 +9718,37 @@ set_qam(struct drx_demod_instance *demod,
9875 resets SCU variables 9718 resets SCU variables
9876 */ 9719 */
9877 /* stop all comm_exec */ 9720 /* stop all comm_exec */
9878 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP, 0); 9721 rc = drxj_dap_write_reg16(dev_addr, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP, 0);
9879 if (rc != 0) { 9722 if (rc != 0) {
9880 pr_err("error %d\n", rc); 9723 pr_err("error %d\n", rc);
9881 goto rw_error; 9724 goto rw_error;
9882 } 9725 }
9883 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP, 0); 9726 rc = drxj_dap_write_reg16(dev_addr, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP, 0);
9884 if (rc != 0) { 9727 if (rc != 0) {
9885 pr_err("error %d\n", rc); 9728 pr_err("error %d\n", rc);
9886 goto rw_error; 9729 goto rw_error;
9887 } 9730 }
9888 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_FS_COMM_EXEC__A, IQM_FS_COMM_EXEC_STOP, 0); 9731 rc = drxj_dap_write_reg16(dev_addr, IQM_FS_COMM_EXEC__A, IQM_FS_COMM_EXEC_STOP, 0);
9889 if (rc != 0) { 9732 if (rc != 0) {
9890 pr_err("error %d\n", rc); 9733 pr_err("error %d\n", rc);
9891 goto rw_error; 9734 goto rw_error;
9892 } 9735 }
9893 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_FD_COMM_EXEC__A, IQM_FD_COMM_EXEC_STOP, 0); 9736 rc = drxj_dap_write_reg16(dev_addr, IQM_FD_COMM_EXEC__A, IQM_FD_COMM_EXEC_STOP, 0);
9894 if (rc != 0) { 9737 if (rc != 0) {
9895 pr_err("error %d\n", rc); 9738 pr_err("error %d\n", rc);
9896 goto rw_error; 9739 goto rw_error;
9897 } 9740 }
9898 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RC_COMM_EXEC__A, IQM_RC_COMM_EXEC_STOP, 0); 9741 rc = drxj_dap_write_reg16(dev_addr, IQM_RC_COMM_EXEC__A, IQM_RC_COMM_EXEC_STOP, 0);
9899 if (rc != 0) { 9742 if (rc != 0) {
9900 pr_err("error %d\n", rc); 9743 pr_err("error %d\n", rc);
9901 goto rw_error; 9744 goto rw_error;
9902 } 9745 }
9903 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_COMM_EXEC__A, IQM_RT_COMM_EXEC_STOP, 0); 9746 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_COMM_EXEC__A, IQM_RT_COMM_EXEC_STOP, 0);
9904 if (rc != 0) { 9747 if (rc != 0) {
9905 pr_err("error %d\n", rc); 9748 pr_err("error %d\n", rc);
9906 goto rw_error; 9749 goto rw_error;
9907 } 9750 }
9908 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_COMM_EXEC__A, IQM_CF_COMM_EXEC_STOP, 0); 9751 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_COMM_EXEC__A, IQM_CF_COMM_EXEC_STOP, 0);
9909 if (rc != 0) { 9752 if (rc != 0) {
9910 pr_err("error %d\n", rc); 9753 pr_err("error %d\n", rc);
9911 goto rw_error; 9754 goto rw_error;
@@ -9954,7 +9797,7 @@ set_qam(struct drx_demod_instance *demod,
9954 goto rw_error; 9797 goto rw_error;
9955 } 9798 }
9956 /* set symbol rate */ 9799 /* set symbol rate */
9957 rc = DRXJ_DAP.write_reg32func(dev_addr, IQM_RC_RATE_OFS_LO__A, iqm_rc_rate, 0); 9800 rc = drxdap_fasi_write_reg32(dev_addr, IQM_RC_RATE_OFS_LO__A, iqm_rc_rate, 0);
9958 if (rc != 0) { 9801 if (rc != 0) {
9959 pr_err("error %d\n", rc); 9802 pr_err("error %d\n", rc);
9960 goto rw_error; 9803 goto rw_error;
@@ -9980,12 +9823,12 @@ set_qam(struct drx_demod_instance *demod,
9980 9823
9981 if ((op & QAM_SET_OP_ALL) || (op & QAM_SET_OP_CONSTELLATION)) { 9824 if ((op & QAM_SET_OP_ALL) || (op & QAM_SET_OP_CONSTELLATION)) {
9982 9825
9983 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_SYMBOL_FREQ__A, lc_symbol_freq, 0); 9826 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_SYMBOL_FREQ__A, lc_symbol_freq, 0);
9984 if (rc != 0) { 9827 if (rc != 0) {
9985 pr_err("error %d\n", rc); 9828 pr_err("error %d\n", rc);
9986 goto rw_error; 9829 goto rw_error;
9987 } 9830 }
9988 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RC_STRETCH__A, iqm_rc_stretch, 0); 9831 rc = drxj_dap_write_reg16(dev_addr, IQM_RC_STRETCH__A, iqm_rc_stretch, 0);
9989 if (rc != 0) { 9832 if (rc != 0) {
9990 pr_err("error %d\n", rc); 9833 pr_err("error %d\n", rc);
9991 goto rw_error; 9834 goto rw_error;
@@ -9994,98 +9837,98 @@ set_qam(struct drx_demod_instance *demod,
9994 9837
9995 if (op & QAM_SET_OP_ALL) { 9838 if (op & QAM_SET_OP_ALL) {
9996 if (!ext_attr->has_lna) { 9839 if (!ext_attr->has_lna) {
9997 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_AMUX__A, 0x02, 0); 9840 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_AMUX__A, 0x02, 0);
9998 if (rc != 0) { 9841 if (rc != 0) {
9999 pr_err("error %d\n", rc); 9842 pr_err("error %d\n", rc);
10000 goto rw_error; 9843 goto rw_error;
10001 } 9844 }
10002 } 9845 }
10003 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_SYMMETRIC__A, 0, 0); 9846 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_SYMMETRIC__A, 0, 0);
10004 if (rc != 0) { 9847 if (rc != 0) {
10005 pr_err("error %d\n", rc); 9848 pr_err("error %d\n", rc);
10006 goto rw_error; 9849 goto rw_error;
10007 } 9850 }
10008 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_MIDTAP__A, 3, 0); 9851 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_MIDTAP__A, 3, 0);
10009 if (rc != 0) { 9852 if (rc != 0) {
10010 pr_err("error %d\n", rc); 9853 pr_err("error %d\n", rc);
10011 goto rw_error; 9854 goto rw_error;
10012 } 9855 }
10013 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_OUT_ENA__A, IQM_CF_OUT_ENA_QAM__M, 0); 9856 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_OUT_ENA__A, IQM_CF_OUT_ENA_QAM__M, 0);
10014 if (rc != 0) { 9857 if (rc != 0) {
10015 pr_err("error %d\n", rc); 9858 pr_err("error %d\n", rc);
10016 goto rw_error; 9859 goto rw_error;
10017 } 9860 }
10018 9861
10019 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_WR_RSV_0__A, 0x5f, 0); 9862 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_WR_RSV_0__A, 0x5f, 0);
10020 if (rc != 0) { 9863 if (rc != 0) {
10021 pr_err("error %d\n", rc); 9864 pr_err("error %d\n", rc);
10022 goto rw_error; 9865 goto rw_error;
10023 } /* scu temporary shut down agc */ 9866 } /* scu temporary shut down agc */
10024 9867
10025 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_SYNC_SEL__A, 3, 0); 9868 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_SYNC_SEL__A, 3, 0);
10026 if (rc != 0) { 9869 if (rc != 0) {
10027 pr_err("error %d\n", rc); 9870 pr_err("error %d\n", rc);
10028 goto rw_error; 9871 goto rw_error;
10029 } 9872 }
10030 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_CLP_LEN__A, 0, 0); 9873 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_CLP_LEN__A, 0, 0);
10031 if (rc != 0) { 9874 if (rc != 0) {
10032 pr_err("error %d\n", rc); 9875 pr_err("error %d\n", rc);
10033 goto rw_error; 9876 goto rw_error;
10034 } 9877 }
10035 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_CLP_TH__A, 448, 0); 9878 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_CLP_TH__A, 448, 0);
10036 if (rc != 0) { 9879 if (rc != 0) {
10037 pr_err("error %d\n", rc); 9880 pr_err("error %d\n", rc);
10038 goto rw_error; 9881 goto rw_error;
10039 } 9882 }
10040 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_SNS_LEN__A, 0, 0); 9883 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_SNS_LEN__A, 0, 0);
10041 if (rc != 0) { 9884 if (rc != 0) {
10042 pr_err("error %d\n", rc); 9885 pr_err("error %d\n", rc);
10043 goto rw_error; 9886 goto rw_error;
10044 } 9887 }
10045 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_PDREF__A, 4, 0); 9888 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_PDREF__A, 4, 0);
10046 if (rc != 0) { 9889 if (rc != 0) {
10047 pr_err("error %d\n", rc); 9890 pr_err("error %d\n", rc);
10048 goto rw_error; 9891 goto rw_error;
10049 } 9892 }
10050 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_STDBY__A, 0x10, 0); 9893 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_STDBY__A, 0x10, 0);
10051 if (rc != 0) { 9894 if (rc != 0) {
10052 pr_err("error %d\n", rc); 9895 pr_err("error %d\n", rc);
10053 goto rw_error; 9896 goto rw_error;
10054 } 9897 }
10055 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_PGA_GAIN__A, 11, 0); 9898 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_PGA_GAIN__A, 11, 0);
10056 if (rc != 0) { 9899 if (rc != 0) {
10057 pr_err("error %d\n", rc); 9900 pr_err("error %d\n", rc);
10058 goto rw_error; 9901 goto rw_error;
10059 } 9902 }
10060 9903
10061 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_POW_MEAS_LEN__A, 1, 0); 9904 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_POW_MEAS_LEN__A, 1, 0);
10062 if (rc != 0) { 9905 if (rc != 0) {
10063 pr_err("error %d\n", rc); 9906 pr_err("error %d\n", rc);
10064 goto rw_error; 9907 goto rw_error;
10065 } 9908 }
10066 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_SCALE_SH__A, IQM_CF_SCALE_SH__PRE, 0); 9909 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_SCALE_SH__A, IQM_CF_SCALE_SH__PRE, 0);
10067 if (rc != 0) { 9910 if (rc != 0) {
10068 pr_err("error %d\n", rc); 9911 pr_err("error %d\n", rc);
10069 goto rw_error; 9912 goto rw_error;
10070 } /*! reset default val ! */ 9913 } /*! reset default val ! */
10071 9914
10072 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_SY_TIMEOUT__A, QAM_SY_TIMEOUT__PRE, 0); 9915 rc = drxj_dap_write_reg16(dev_addr, QAM_SY_TIMEOUT__A, QAM_SY_TIMEOUT__PRE, 0);
10073 if (rc != 0) { 9916 if (rc != 0) {
10074 pr_err("error %d\n", rc); 9917 pr_err("error %d\n", rc);
10075 goto rw_error; 9918 goto rw_error;
10076 } /*! reset default val ! */ 9919 } /*! reset default val ! */
10077 if (ext_attr->standard == DRX_STANDARD_ITU_B) { 9920 if (ext_attr->standard == DRX_STANDARD_ITU_B) {
10078 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_SY_SYNC_LWM__A, QAM_SY_SYNC_LWM__PRE, 0); 9921 rc = drxj_dap_write_reg16(dev_addr, QAM_SY_SYNC_LWM__A, QAM_SY_SYNC_LWM__PRE, 0);
10079 if (rc != 0) { 9922 if (rc != 0) {
10080 pr_err("error %d\n", rc); 9923 pr_err("error %d\n", rc);
10081 goto rw_error; 9924 goto rw_error;
10082 } /*! reset default val ! */ 9925 } /*! reset default val ! */
10083 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_SY_SYNC_AWM__A, QAM_SY_SYNC_AWM__PRE, 0); 9926 rc = drxj_dap_write_reg16(dev_addr, QAM_SY_SYNC_AWM__A, QAM_SY_SYNC_AWM__PRE, 0);
10084 if (rc != 0) { 9927 if (rc != 0) {
10085 pr_err("error %d\n", rc); 9928 pr_err("error %d\n", rc);
10086 goto rw_error; 9929 goto rw_error;
10087 } /*! reset default val ! */ 9930 } /*! reset default val ! */
10088 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_SY_SYNC_HWM__A, QAM_SY_SYNC_HWM__PRE, 0); 9931 rc = drxj_dap_write_reg16(dev_addr, QAM_SY_SYNC_HWM__A, QAM_SY_SYNC_HWM__PRE, 0);
10089 if (rc != 0) { 9932 if (rc != 0) {
10090 pr_err("error %d\n", rc); 9933 pr_err("error %d\n", rc);
10091 goto rw_error; 9934 goto rw_error;
@@ -10095,17 +9938,17 @@ set_qam(struct drx_demod_instance *demod,
10095 case DRX_CONSTELLATION_QAM16: 9938 case DRX_CONSTELLATION_QAM16:
10096 case DRX_CONSTELLATION_QAM64: 9939 case DRX_CONSTELLATION_QAM64:
10097 case DRX_CONSTELLATION_QAM256: 9940 case DRX_CONSTELLATION_QAM256:
10098 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_SY_SYNC_LWM__A, 0x03, 0); 9941 rc = drxj_dap_write_reg16(dev_addr, QAM_SY_SYNC_LWM__A, 0x03, 0);
10099 if (rc != 0) { 9942 if (rc != 0) {
10100 pr_err("error %d\n", rc); 9943 pr_err("error %d\n", rc);
10101 goto rw_error; 9944 goto rw_error;
10102 } 9945 }
10103 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_SY_SYNC_AWM__A, 0x04, 0); 9946 rc = drxj_dap_write_reg16(dev_addr, QAM_SY_SYNC_AWM__A, 0x04, 0);
10104 if (rc != 0) { 9947 if (rc != 0) {
10105 pr_err("error %d\n", rc); 9948 pr_err("error %d\n", rc);
10106 goto rw_error; 9949 goto rw_error;
10107 } 9950 }
10108 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_SY_SYNC_HWM__A, QAM_SY_SYNC_HWM__PRE, 0); 9951 rc = drxj_dap_write_reg16(dev_addr, QAM_SY_SYNC_HWM__A, QAM_SY_SYNC_HWM__PRE, 0);
10109 if (rc != 0) { 9952 if (rc != 0) {
10110 pr_err("error %d\n", rc); 9953 pr_err("error %d\n", rc);
10111 goto rw_error; 9954 goto rw_error;
@@ -10113,17 +9956,17 @@ set_qam(struct drx_demod_instance *demod,
10113 break; 9956 break;
10114 case DRX_CONSTELLATION_QAM32: 9957 case DRX_CONSTELLATION_QAM32:
10115 case DRX_CONSTELLATION_QAM128: 9958 case DRX_CONSTELLATION_QAM128:
10116 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_SY_SYNC_LWM__A, 0x03, 0); 9959 rc = drxj_dap_write_reg16(dev_addr, QAM_SY_SYNC_LWM__A, 0x03, 0);
10117 if (rc != 0) { 9960 if (rc != 0) {
10118 pr_err("error %d\n", rc); 9961 pr_err("error %d\n", rc);
10119 goto rw_error; 9962 goto rw_error;
10120 } 9963 }
10121 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_SY_SYNC_AWM__A, 0x05, 0); 9964 rc = drxj_dap_write_reg16(dev_addr, QAM_SY_SYNC_AWM__A, 0x05, 0);
10122 if (rc != 0) { 9965 if (rc != 0) {
10123 pr_err("error %d\n", rc); 9966 pr_err("error %d\n", rc);
10124 goto rw_error; 9967 goto rw_error;
10125 } 9968 }
10126 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_SY_SYNC_HWM__A, 0x06, 0); 9969 rc = drxj_dap_write_reg16(dev_addr, QAM_SY_SYNC_HWM__A, 0x06, 0);
10127 if (rc != 0) { 9970 if (rc != 0) {
10128 pr_err("error %d\n", rc); 9971 pr_err("error %d\n", rc);
10129 goto rw_error; 9972 goto rw_error;
@@ -10134,128 +9977,128 @@ set_qam(struct drx_demod_instance *demod,
10134 } /* switch */ 9977 } /* switch */
10135 } 9978 }
10136 9979
10137 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_MODE__A, QAM_LC_MODE__PRE, 0); 9980 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_MODE__A, QAM_LC_MODE__PRE, 0);
10138 if (rc != 0) { 9981 if (rc != 0) {
10139 pr_err("error %d\n", rc); 9982 pr_err("error %d\n", rc);
10140 goto rw_error; 9983 goto rw_error;
10141 } /*! reset default val ! */ 9984 } /*! reset default val ! */
10142 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_RATE_LIMIT__A, 3, 0); 9985 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_RATE_LIMIT__A, 3, 0);
10143 if (rc != 0) { 9986 if (rc != 0) {
10144 pr_err("error %d\n", rc); 9987 pr_err("error %d\n", rc);
10145 goto rw_error; 9988 goto rw_error;
10146 } 9989 }
10147 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_LPF_FACTORP__A, 4, 0); 9990 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_LPF_FACTORP__A, 4, 0);
10148 if (rc != 0) { 9991 if (rc != 0) {
10149 pr_err("error %d\n", rc); 9992 pr_err("error %d\n", rc);
10150 goto rw_error; 9993 goto rw_error;
10151 } 9994 }
10152 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_LPF_FACTORI__A, 4, 0); 9995 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_LPF_FACTORI__A, 4, 0);
10153 if (rc != 0) { 9996 if (rc != 0) {
10154 pr_err("error %d\n", rc); 9997 pr_err("error %d\n", rc);
10155 goto rw_error; 9998 goto rw_error;
10156 } 9999 }
10157 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_MODE__A, 7, 0); 10000 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_MODE__A, 7, 0);
10158 if (rc != 0) { 10001 if (rc != 0) {
10159 pr_err("error %d\n", rc); 10002 pr_err("error %d\n", rc);
10160 goto rw_error; 10003 goto rw_error;
10161 } 10004 }
10162 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB0__A, 1, 0); 10005 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB0__A, 1, 0);
10163 if (rc != 0) { 10006 if (rc != 0) {
10164 pr_err("error %d\n", rc); 10007 pr_err("error %d\n", rc);
10165 goto rw_error; 10008 goto rw_error;
10166 } 10009 }
10167 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB1__A, 1, 0); 10010 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB1__A, 1, 0);
10168 if (rc != 0) { 10011 if (rc != 0) {
10169 pr_err("error %d\n", rc); 10012 pr_err("error %d\n", rc);
10170 goto rw_error; 10013 goto rw_error;
10171 } 10014 }
10172 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB2__A, 1, 0); 10015 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB2__A, 1, 0);
10173 if (rc != 0) { 10016 if (rc != 0) {
10174 pr_err("error %d\n", rc); 10017 pr_err("error %d\n", rc);
10175 goto rw_error; 10018 goto rw_error;
10176 } 10019 }
10177 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB3__A, 1, 0); 10020 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB3__A, 1, 0);
10178 if (rc != 0) { 10021 if (rc != 0) {
10179 pr_err("error %d\n", rc); 10022 pr_err("error %d\n", rc);
10180 goto rw_error; 10023 goto rw_error;
10181 } 10024 }
10182 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB4__A, 2, 0); 10025 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB4__A, 2, 0);
10183 if (rc != 0) { 10026 if (rc != 0) {
10184 pr_err("error %d\n", rc); 10027 pr_err("error %d\n", rc);
10185 goto rw_error; 10028 goto rw_error;
10186 } 10029 }
10187 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB5__A, 2, 0); 10030 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB5__A, 2, 0);
10188 if (rc != 0) { 10031 if (rc != 0) {
10189 pr_err("error %d\n", rc); 10032 pr_err("error %d\n", rc);
10190 goto rw_error; 10033 goto rw_error;
10191 } 10034 }
10192 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB6__A, 2, 0); 10035 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB6__A, 2, 0);
10193 if (rc != 0) { 10036 if (rc != 0) {
10194 pr_err("error %d\n", rc); 10037 pr_err("error %d\n", rc);
10195 goto rw_error; 10038 goto rw_error;
10196 } 10039 }
10197 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB8__A, 2, 0); 10040 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB8__A, 2, 0);
10198 if (rc != 0) { 10041 if (rc != 0) {
10199 pr_err("error %d\n", rc); 10042 pr_err("error %d\n", rc);
10200 goto rw_error; 10043 goto rw_error;
10201 } 10044 }
10202 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB9__A, 2, 0); 10045 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB9__A, 2, 0);
10203 if (rc != 0) { 10046 if (rc != 0) {
10204 pr_err("error %d\n", rc); 10047 pr_err("error %d\n", rc);
10205 goto rw_error; 10048 goto rw_error;
10206 } 10049 }
10207 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB10__A, 2, 0); 10050 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB10__A, 2, 0);
10208 if (rc != 0) { 10051 if (rc != 0) {
10209 pr_err("error %d\n", rc); 10052 pr_err("error %d\n", rc);
10210 goto rw_error; 10053 goto rw_error;
10211 } 10054 }
10212 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB12__A, 2, 0); 10055 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB12__A, 2, 0);
10213 if (rc != 0) { 10056 if (rc != 0) {
10214 pr_err("error %d\n", rc); 10057 pr_err("error %d\n", rc);
10215 goto rw_error; 10058 goto rw_error;
10216 } 10059 }
10217 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB15__A, 3, 0); 10060 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB15__A, 3, 0);
10218 if (rc != 0) { 10061 if (rc != 0) {
10219 pr_err("error %d\n", rc); 10062 pr_err("error %d\n", rc);
10220 goto rw_error; 10063 goto rw_error;
10221 } 10064 }
10222 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB16__A, 3, 0); 10065 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB16__A, 3, 0);
10223 if (rc != 0) { 10066 if (rc != 0) {
10224 pr_err("error %d\n", rc); 10067 pr_err("error %d\n", rc);
10225 goto rw_error; 10068 goto rw_error;
10226 } 10069 }
10227 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB20__A, 4, 0); 10070 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB20__A, 4, 0);
10228 if (rc != 0) { 10071 if (rc != 0) {
10229 pr_err("error %d\n", rc); 10072 pr_err("error %d\n", rc);
10230 goto rw_error; 10073 goto rw_error;
10231 } 10074 }
10232 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_QUAL_TAB25__A, 4, 0); 10075 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_QUAL_TAB25__A, 4, 0);
10233 if (rc != 0) { 10076 if (rc != 0) {
10234 pr_err("error %d\n", rc); 10077 pr_err("error %d\n", rc);
10235 goto rw_error; 10078 goto rw_error;
10236 } 10079 }
10237 10080
10238 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_FS_ADJ_SEL__A, 1, 0); 10081 rc = drxj_dap_write_reg16(dev_addr, IQM_FS_ADJ_SEL__A, 1, 0);
10239 if (rc != 0) { 10082 if (rc != 0) {
10240 pr_err("error %d\n", rc); 10083 pr_err("error %d\n", rc);
10241 goto rw_error; 10084 goto rw_error;
10242 } 10085 }
10243 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RC_ADJ_SEL__A, 1, 0); 10086 rc = drxj_dap_write_reg16(dev_addr, IQM_RC_ADJ_SEL__A, 1, 0);
10244 if (rc != 0) { 10087 if (rc != 0) {
10245 pr_err("error %d\n", rc); 10088 pr_err("error %d\n", rc);
10246 goto rw_error; 10089 goto rw_error;
10247 } 10090 }
10248 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_ADJ_SEL__A, 1, 0); 10091 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_ADJ_SEL__A, 1, 0);
10249 if (rc != 0) { 10092 if (rc != 0) {
10250 pr_err("error %d\n", rc); 10093 pr_err("error %d\n", rc);
10251 goto rw_error; 10094 goto rw_error;
10252 } 10095 }
10253 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_POW_MEAS_LEN__A, 0, 0); 10096 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_POW_MEAS_LEN__A, 0, 0);
10254 if (rc != 0) { 10097 if (rc != 0) {
10255 pr_err("error %d\n", rc); 10098 pr_err("error %d\n", rc);
10256 goto rw_error; 10099 goto rw_error;
10257 } 10100 }
10258 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_GPIO__A, 0, 0); 10101 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_GPIO__A, 0, 0);
10259 if (rc != 0) { 10102 if (rc != 0) {
10260 pr_err("error %d\n", rc); 10103 pr_err("error %d\n", rc);
10261 goto rw_error; 10104 goto rw_error;
@@ -10311,12 +10154,12 @@ set_qam(struct drx_demod_instance *demod,
10311 10154
10312 if ((op & QAM_SET_OP_ALL) || (op & QAM_SET_OP_CONSTELLATION)) { 10155 if ((op & QAM_SET_OP_ALL) || (op & QAM_SET_OP_CONSTELLATION)) {
10313 if (ext_attr->standard == DRX_STANDARD_ITU_A) { 10156 if (ext_attr->standard == DRX_STANDARD_ITU_A) {
10314 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_RE0__A, sizeof(qam_a_taps), ((u8 *)qam_a_taps), 0); 10157 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_RE0__A, sizeof(qam_a_taps), ((u8 *)qam_a_taps), 0);
10315 if (rc != 0) { 10158 if (rc != 0) {
10316 pr_err("error %d\n", rc); 10159 pr_err("error %d\n", rc);
10317 goto rw_error; 10160 goto rw_error;
10318 } 10161 }
10319 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_IM0__A, sizeof(qam_a_taps), ((u8 *)qam_a_taps), 0); 10162 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_IM0__A, sizeof(qam_a_taps), ((u8 *)qam_a_taps), 0);
10320 if (rc != 0) { 10163 if (rc != 0) {
10321 pr_err("error %d\n", rc); 10164 pr_err("error %d\n", rc);
10322 goto rw_error; 10165 goto rw_error;
@@ -10324,24 +10167,24 @@ set_qam(struct drx_demod_instance *demod,
10324 } else if (ext_attr->standard == DRX_STANDARD_ITU_B) { 10167 } else if (ext_attr->standard == DRX_STANDARD_ITU_B) {
10325 switch (channel->constellation) { 10168 switch (channel->constellation) {
10326 case DRX_CONSTELLATION_QAM64: 10169 case DRX_CONSTELLATION_QAM64:
10327 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_RE0__A, sizeof(qam_b64_taps), ((u8 *)qam_b64_taps), 0); 10170 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_RE0__A, sizeof(qam_b64_taps), ((u8 *)qam_b64_taps), 0);
10328 if (rc != 0) { 10171 if (rc != 0) {
10329 pr_err("error %d\n", rc); 10172 pr_err("error %d\n", rc);
10330 goto rw_error; 10173 goto rw_error;
10331 } 10174 }
10332 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_IM0__A, sizeof(qam_b64_taps), ((u8 *)qam_b64_taps), 0); 10175 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_IM0__A, sizeof(qam_b64_taps), ((u8 *)qam_b64_taps), 0);
10333 if (rc != 0) { 10176 if (rc != 0) {
10334 pr_err("error %d\n", rc); 10177 pr_err("error %d\n", rc);
10335 goto rw_error; 10178 goto rw_error;
10336 } 10179 }
10337 break; 10180 break;
10338 case DRX_CONSTELLATION_QAM256: 10181 case DRX_CONSTELLATION_QAM256:
10339 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_RE0__A, sizeof(qam_b256_taps), ((u8 *)qam_b256_taps), 0); 10182 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_RE0__A, sizeof(qam_b256_taps), ((u8 *)qam_b256_taps), 0);
10340 if (rc != 0) { 10183 if (rc != 0) {
10341 pr_err("error %d\n", rc); 10184 pr_err("error %d\n", rc);
10342 goto rw_error; 10185 goto rw_error;
10343 } 10186 }
10344 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_IM0__A, sizeof(qam_b256_taps), ((u8 *)qam_b256_taps), 0); 10187 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_IM0__A, sizeof(qam_b256_taps), ((u8 *)qam_b256_taps), 0);
10345 if (rc != 0) { 10188 if (rc != 0) {
10346 pr_err("error %d\n", rc); 10189 pr_err("error %d\n", rc);
10347 goto rw_error; 10190 goto rw_error;
@@ -10351,12 +10194,12 @@ set_qam(struct drx_demod_instance *demod,
10351 return -EIO; 10194 return -EIO;
10352 } 10195 }
10353 } else if (ext_attr->standard == DRX_STANDARD_ITU_C) { 10196 } else if (ext_attr->standard == DRX_STANDARD_ITU_C) {
10354 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_RE0__A, sizeof(qam_c_taps), ((u8 *)qam_c_taps), 0); 10197 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_RE0__A, sizeof(qam_c_taps), ((u8 *)qam_c_taps), 0);
10355 if (rc != 0) { 10198 if (rc != 0) {
10356 pr_err("error %d\n", rc); 10199 pr_err("error %d\n", rc);
10357 goto rw_error; 10200 goto rw_error;
10358 } 10201 }
10359 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_IM0__A, sizeof(qam_c_taps), ((u8 *)qam_c_taps), 0); 10202 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_IM0__A, sizeof(qam_c_taps), ((u8 *)qam_c_taps), 0);
10360 if (rc != 0) { 10203 if (rc != 0) {
10361 pr_err("error %d\n", rc); 10204 pr_err("error %d\n", rc);
10362 goto rw_error; 10205 goto rw_error;
@@ -10406,7 +10249,7 @@ set_qam(struct drx_demod_instance *demod,
10406 } 10249 }
10407 10250
10408 if ((op & QAM_SET_OP_ALL)) { 10251 if ((op & QAM_SET_OP_ALL)) {
10409 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_SCALE_SH__A, 0, 0); 10252 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_SCALE_SH__A, 0, 0);
10410 if (rc != 0) { 10253 if (rc != 0) {
10411 pr_err("error %d\n", rc); 10254 pr_err("error %d\n", rc);
10412 goto rw_error; 10255 goto rw_error;
@@ -10470,17 +10313,17 @@ set_qam(struct drx_demod_instance *demod,
10470 } 10313 }
10471 } 10314 }
10472 10315
10473 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_COMM_EXEC__A, IQM_COMM_EXEC_ACTIVE, 0); 10316 rc = drxj_dap_write_reg16(dev_addr, IQM_COMM_EXEC__A, IQM_COMM_EXEC_ACTIVE, 0);
10474 if (rc != 0) { 10317 if (rc != 0) {
10475 pr_err("error %d\n", rc); 10318 pr_err("error %d\n", rc);
10476 goto rw_error; 10319 goto rw_error;
10477 } 10320 }
10478 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_COMM_EXEC__A, QAM_COMM_EXEC_ACTIVE, 0); 10321 rc = drxj_dap_write_reg16(dev_addr, QAM_COMM_EXEC__A, QAM_COMM_EXEC_ACTIVE, 0);
10479 if (rc != 0) { 10322 if (rc != 0) {
10480 pr_err("error %d\n", rc); 10323 pr_err("error %d\n", rc);
10481 goto rw_error; 10324 goto rw_error;
10482 } 10325 }
10483 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE, 0); 10326 rc = drxj_dap_write_reg16(dev_addr, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE, 0);
10484 if (rc != 0) { 10327 if (rc != 0) {
10485 pr_err("error %d\n", rc); 10328 pr_err("error %d\n", rc);
10486 goto rw_error; 10329 goto rw_error;
@@ -10512,24 +10355,24 @@ static int qam_flip_spec(struct drx_demod_instance *demod, struct drx_channel *c
10512 ext_attr = (struct drxj_data *) demod->my_ext_attr; 10355 ext_attr = (struct drxj_data *) demod->my_ext_attr;
10513 10356
10514 /* Silence the controlling of lc, equ, and the acquisition state machine */ 10357 /* Silence the controlling of lc, equ, and the acquisition state machine */
10515 rc = DRXJ_DAP.read_reg16func(dev_addr, SCU_RAM_QAM_CTL_ENA__A, &qam_ctl_ena, 0); 10358 rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_QAM_CTL_ENA__A, &qam_ctl_ena, 0);
10516 if (rc != 0) { 10359 if (rc != 0) {
10517 pr_err("error %d\n", rc); 10360 pr_err("error %d\n", rc);
10518 goto rw_error; 10361 goto rw_error;
10519 } 10362 }
10520 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_CTL_ENA__A, qam_ctl_ena & ~(SCU_RAM_QAM_CTL_ENA_ACQ__M | SCU_RAM_QAM_CTL_ENA_EQU__M | SCU_RAM_QAM_CTL_ENA_LC__M), 0); 10363 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_CTL_ENA__A, qam_ctl_ena & ~(SCU_RAM_QAM_CTL_ENA_ACQ__M | SCU_RAM_QAM_CTL_ENA_EQU__M | SCU_RAM_QAM_CTL_ENA_LC__M), 0);
10521 if (rc != 0) { 10364 if (rc != 0) {
10522 pr_err("error %d\n", rc); 10365 pr_err("error %d\n", rc);
10523 goto rw_error; 10366 goto rw_error;
10524 } 10367 }
10525 10368
10526 /* freeze the frequency control loop */ 10369 /* freeze the frequency control loop */
10527 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_CF__A, 0, 0); 10370 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_CF__A, 0, 0);
10528 if (rc != 0) { 10371 if (rc != 0) {
10529 pr_err("error %d\n", rc); 10372 pr_err("error %d\n", rc);
10530 goto rw_error; 10373 goto rw_error;
10531 } 10374 }
10532 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_CF1__A, 0, 0); 10375 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_CF1__A, 0, 0);
10533 if (rc != 0) { 10376 if (rc != 0) {
10534 pr_err("error %d\n", rc); 10377 pr_err("error %d\n", rc);
10535 goto rw_error; 10378 goto rw_error;
@@ -10550,42 +10393,42 @@ static int qam_flip_spec(struct drx_demod_instance *demod, struct drx_channel *c
10550 iqm_fs_rate_ofs -= 2 * ofsofs; 10393 iqm_fs_rate_ofs -= 2 * ofsofs;
10551 10394
10552 /* freeze dq/fq updating */ 10395 /* freeze dq/fq updating */
10553 rc = DRXJ_DAP.read_reg16func(dev_addr, QAM_DQ_MODE__A, &data, 0); 10396 rc = drxj_dap_read_reg16(dev_addr, QAM_DQ_MODE__A, &data, 0);
10554 if (rc != 0) { 10397 if (rc != 0) {
10555 pr_err("error %d\n", rc); 10398 pr_err("error %d\n", rc);
10556 goto rw_error; 10399 goto rw_error;
10557 } 10400 }
10558 data = (data & 0xfff9); 10401 data = (data & 0xfff9);
10559 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_DQ_MODE__A, data, 0); 10402 rc = drxj_dap_write_reg16(dev_addr, QAM_DQ_MODE__A, data, 0);
10560 if (rc != 0) { 10403 if (rc != 0) {
10561 pr_err("error %d\n", rc); 10404 pr_err("error %d\n", rc);
10562 goto rw_error; 10405 goto rw_error;
10563 } 10406 }
10564 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_FQ_MODE__A, data, 0); 10407 rc = drxj_dap_write_reg16(dev_addr, QAM_FQ_MODE__A, data, 0);
10565 if (rc != 0) { 10408 if (rc != 0) {
10566 pr_err("error %d\n", rc); 10409 pr_err("error %d\n", rc);
10567 goto rw_error; 10410 goto rw_error;
10568 } 10411 }
10569 10412
10570 /* lc_cp / _ci / _ca */ 10413 /* lc_cp / _ci / _ca */
10571 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_CI__A, 0, 0); 10414 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_CI__A, 0, 0);
10572 if (rc != 0) { 10415 if (rc != 0) {
10573 pr_err("error %d\n", rc); 10416 pr_err("error %d\n", rc);
10574 goto rw_error; 10417 goto rw_error;
10575 } 10418 }
10576 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_LC_EP__A, 0, 0); 10419 rc = drxj_dap_write_reg16(dev_addr, QAM_LC_EP__A, 0, 0);
10577 if (rc != 0) { 10420 if (rc != 0) {
10578 pr_err("error %d\n", rc); 10421 pr_err("error %d\n", rc);
10579 goto rw_error; 10422 goto rw_error;
10580 } 10423 }
10581 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_FQ_LA_FACTOR__A, 0, 0); 10424 rc = drxj_dap_write_reg16(dev_addr, QAM_FQ_LA_FACTOR__A, 0, 0);
10582 if (rc != 0) { 10425 if (rc != 0) {
10583 pr_err("error %d\n", rc); 10426 pr_err("error %d\n", rc);
10584 goto rw_error; 10427 goto rw_error;
10585 } 10428 }
10586 10429
10587 /* flip the spec */ 10430 /* flip the spec */
10588 rc = DRXJ_DAP.write_reg32func(dev_addr, IQM_FS_RATE_OFS_LO__A, iqm_fs_rate_ofs, 0); 10431 rc = drxdap_fasi_write_reg32(dev_addr, IQM_FS_RATE_OFS_LO__A, iqm_fs_rate_ofs, 0);
10589 if (rc != 0) { 10432 if (rc != 0) {
10590 pr_err("error %d\n", rc); 10433 pr_err("error %d\n", rc);
10591 goto rw_error; 10434 goto rw_error;
@@ -10594,31 +10437,31 @@ static int qam_flip_spec(struct drx_demod_instance *demod, struct drx_channel *c
10594 ext_attr->pos_image = (ext_attr->pos_image) ? false : true; 10437 ext_attr->pos_image = (ext_attr->pos_image) ? false : true;
10595 10438
10596 /* freeze dq/fq updating */ 10439 /* freeze dq/fq updating */
10597 rc = DRXJ_DAP.read_reg16func(dev_addr, QAM_DQ_MODE__A, &data, 0); 10440 rc = drxj_dap_read_reg16(dev_addr, QAM_DQ_MODE__A, &data, 0);
10598 if (rc != 0) { 10441 if (rc != 0) {
10599 pr_err("error %d\n", rc); 10442 pr_err("error %d\n", rc);
10600 goto rw_error; 10443 goto rw_error;
10601 } 10444 }
10602 equ_mode = data; 10445 equ_mode = data;
10603 data = (data & 0xfff9); 10446 data = (data & 0xfff9);
10604 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_DQ_MODE__A, data, 0); 10447 rc = drxj_dap_write_reg16(dev_addr, QAM_DQ_MODE__A, data, 0);
10605 if (rc != 0) { 10448 if (rc != 0) {
10606 pr_err("error %d\n", rc); 10449 pr_err("error %d\n", rc);
10607 goto rw_error; 10450 goto rw_error;
10608 } 10451 }
10609 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_FQ_MODE__A, data, 0); 10452 rc = drxj_dap_write_reg16(dev_addr, QAM_FQ_MODE__A, data, 0);
10610 if (rc != 0) { 10453 if (rc != 0) {
10611 pr_err("error %d\n", rc); 10454 pr_err("error %d\n", rc);
10612 goto rw_error; 10455 goto rw_error;
10613 } 10456 }
10614 10457
10615 for (i = 0; i < 28; i++) { 10458 for (i = 0; i < 28; i++) {
10616 rc = DRXJ_DAP.read_reg16func(dev_addr, QAM_DQ_TAP_IM_EL0__A + (2 * i), &data, 0); 10459 rc = drxj_dap_read_reg16(dev_addr, QAM_DQ_TAP_IM_EL0__A + (2 * i), &data, 0);
10617 if (rc != 0) { 10460 if (rc != 0) {
10618 pr_err("error %d\n", rc); 10461 pr_err("error %d\n", rc);
10619 goto rw_error; 10462 goto rw_error;
10620 } 10463 }
10621 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_DQ_TAP_IM_EL0__A + (2 * i), -data, 0); 10464 rc = drxj_dap_write_reg16(dev_addr, QAM_DQ_TAP_IM_EL0__A + (2 * i), -data, 0);
10622 if (rc != 0) { 10465 if (rc != 0) {
10623 pr_err("error %d\n", rc); 10466 pr_err("error %d\n", rc);
10624 goto rw_error; 10467 goto rw_error;
@@ -10626,12 +10469,12 @@ static int qam_flip_spec(struct drx_demod_instance *demod, struct drx_channel *c
10626 } 10469 }
10627 10470
10628 for (i = 0; i < 24; i++) { 10471 for (i = 0; i < 24; i++) {
10629 rc = DRXJ_DAP.read_reg16func(dev_addr, QAM_FQ_TAP_IM_EL0__A + (2 * i), &data, 0); 10472 rc = drxj_dap_read_reg16(dev_addr, QAM_FQ_TAP_IM_EL0__A + (2 * i), &data, 0);
10630 if (rc != 0) { 10473 if (rc != 0) {
10631 pr_err("error %d\n", rc); 10474 pr_err("error %d\n", rc);
10632 goto rw_error; 10475 goto rw_error;
10633 } 10476 }
10634 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_FQ_TAP_IM_EL0__A + (2 * i), -data, 0); 10477 rc = drxj_dap_write_reg16(dev_addr, QAM_FQ_TAP_IM_EL0__A + (2 * i), -data, 0);
10635 if (rc != 0) { 10478 if (rc != 0) {
10636 pr_err("error %d\n", rc); 10479 pr_err("error %d\n", rc);
10637 goto rw_error; 10480 goto rw_error;
@@ -10639,18 +10482,18 @@ static int qam_flip_spec(struct drx_demod_instance *demod, struct drx_channel *c
10639 } 10482 }
10640 10483
10641 data = equ_mode; 10484 data = equ_mode;
10642 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_DQ_MODE__A, data, 0); 10485 rc = drxj_dap_write_reg16(dev_addr, QAM_DQ_MODE__A, data, 0);
10643 if (rc != 0) { 10486 if (rc != 0) {
10644 pr_err("error %d\n", rc); 10487 pr_err("error %d\n", rc);
10645 goto rw_error; 10488 goto rw_error;
10646 } 10489 }
10647 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_FQ_MODE__A, data, 0); 10490 rc = drxj_dap_write_reg16(dev_addr, QAM_FQ_MODE__A, data, 0);
10648 if (rc != 0) { 10491 if (rc != 0) {
10649 pr_err("error %d\n", rc); 10492 pr_err("error %d\n", rc);
10650 goto rw_error; 10493 goto rw_error;
10651 } 10494 }
10652 10495
10653 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_FSM_STATE_TGT__A, 4, 0); 10496 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_FSM_STATE_TGT__A, 4, 0);
10654 if (rc != 0) { 10497 if (rc != 0) {
10655 pr_err("error %d\n", rc); 10498 pr_err("error %d\n", rc);
10656 goto rw_error; 10499 goto rw_error;
@@ -10658,13 +10501,13 @@ static int qam_flip_spec(struct drx_demod_instance *demod, struct drx_channel *c
10658 10501
10659 i = 0; 10502 i = 0;
10660 while ((fsm_state != 4) && (i++ < 100)) { 10503 while ((fsm_state != 4) && (i++ < 100)) {
10661 rc = DRXJ_DAP.read_reg16func(dev_addr, SCU_RAM_QAM_FSM_STATE__A, &fsm_state, 0); 10504 rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_QAM_FSM_STATE__A, &fsm_state, 0);
10662 if (rc != 0) { 10505 if (rc != 0) {
10663 pr_err("error %d\n", rc); 10506 pr_err("error %d\n", rc);
10664 goto rw_error; 10507 goto rw_error;
10665 } 10508 }
10666 } 10509 }
10667 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_QAM_CTL_ENA__A, (qam_ctl_ena | 0x0016), 0); 10510 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_QAM_CTL_ENA__A, (qam_ctl_ena | 0x0016), 0);
10668 if (rc != 0) { 10511 if (rc != 0) {
10669 pr_err("error %d\n", rc); 10512 pr_err("error %d\n", rc);
10670 goto rw_error; 10513 goto rw_error;
@@ -10735,12 +10578,12 @@ qam64auto(struct drx_demod_instance *demod,
10735 if ((*lock_status == DRXJ_DEMOD_LOCK) && /* still demod_lock in 150ms */ 10578 if ((*lock_status == DRXJ_DEMOD_LOCK) && /* still demod_lock in 150ms */
10736 ((jiffies_to_msecs(jiffies) - d_locked_time) > 10579 ((jiffies_to_msecs(jiffies) - d_locked_time) >
10737 DRXJ_QAM_FEC_LOCK_WAITTIME)) { 10580 DRXJ_QAM_FEC_LOCK_WAITTIME)) {
10738 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, QAM_SY_TIMEOUT__A, &data, 0); 10581 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, QAM_SY_TIMEOUT__A, &data, 0);
10739 if (rc != 0) { 10582 if (rc != 0) {
10740 pr_err("error %d\n", rc); 10583 pr_err("error %d\n", rc);
10741 goto rw_error; 10584 goto rw_error;
10742 } 10585 }
10743 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, QAM_SY_TIMEOUT__A, data | 0x1, 0); 10586 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, QAM_SY_TIMEOUT__A, data | 0x1, 0);
10744 if (rc != 0) { 10587 if (rc != 0) {
10745 pr_err("error %d\n", rc); 10588 pr_err("error %d\n", rc);
10746 goto rw_error; 10589 goto rw_error;
@@ -10753,12 +10596,12 @@ qam64auto(struct drx_demod_instance *demod,
10753 if (*lock_status == DRXJ_DEMOD_LOCK) { 10596 if (*lock_status == DRXJ_DEMOD_LOCK) {
10754 if (channel->mirror == DRX_MIRROR_AUTO) { 10597 if (channel->mirror == DRX_MIRROR_AUTO) {
10755 /* flip sync pattern back */ 10598 /* flip sync pattern back */
10756 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, QAM_SY_TIMEOUT__A, &data, 0); 10599 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, QAM_SY_TIMEOUT__A, &data, 0);
10757 if (rc != 0) { 10600 if (rc != 0) {
10758 pr_err("error %d\n", rc); 10601 pr_err("error %d\n", rc);
10759 goto rw_error; 10602 goto rw_error;
10760 } 10603 }
10761 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, QAM_SY_TIMEOUT__A, data & 0xFFFE, 0); 10604 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, QAM_SY_TIMEOUT__A, data & 0xFFFE, 0);
10762 if (rc != 0) { 10605 if (rc != 0) {
10763 pr_err("error %d\n", rc); 10606 pr_err("error %d\n", rc);
10764 goto rw_error; 10607 goto rw_error;
@@ -10793,12 +10636,12 @@ qam64auto(struct drx_demod_instance *demod,
10793 goto rw_error; 10636 goto rw_error;
10794 } 10637 }
10795 if (sig_quality.MER > 208) { 10638 if (sig_quality.MER > 208) {
10796 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, QAM_SY_TIMEOUT__A, &data, 0); 10639 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, QAM_SY_TIMEOUT__A, &data, 0);
10797 if (rc != 0) { 10640 if (rc != 0) {
10798 pr_err("error %d\n", rc); 10641 pr_err("error %d\n", rc);
10799 goto rw_error; 10642 goto rw_error;
10800 } 10643 }
10801 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, QAM_SY_TIMEOUT__A, data | 0x1, 0); 10644 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr, QAM_SY_TIMEOUT__A, data | 0x1, 0);
10802 if (rc != 0) { 10645 if (rc != 0) {
10803 pr_err("error %d\n", rc); 10646 pr_err("error %d\n", rc);
10804 goto rw_error; 10647 goto rw_error;
@@ -11002,21 +10845,21 @@ set_qam_channel(struct drx_demod_instance *demod,
11002 else 10845 else
11003 ext_attr->mirror = channel->mirror; 10846 ext_attr->mirror = channel->mirror;
11004 10847
11005 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, 10848 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr,
11006 SCU_RAM_QAM_CTL_ENA__A, 10849 SCU_RAM_QAM_CTL_ENA__A,
11007 &qam_ctl_ena, 0); 10850 &qam_ctl_ena, 0);
11008 if (rc != 0) { 10851 if (rc != 0) {
11009 pr_err("error %d\n", rc); 10852 pr_err("error %d\n", rc);
11010 goto rw_error; 10853 goto rw_error;
11011 } 10854 }
11012 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, 10855 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr,
11013 SCU_RAM_QAM_CTL_ENA__A, 10856 SCU_RAM_QAM_CTL_ENA__A,
11014 qam_ctl_ena & ~SCU_RAM_QAM_CTL_ENA_ACQ__M, 0); 10857 qam_ctl_ena & ~SCU_RAM_QAM_CTL_ENA_ACQ__M, 0);
11015 if (rc != 0) { 10858 if (rc != 0) {
11016 pr_err("error %d\n", rc); 10859 pr_err("error %d\n", rc);
11017 goto rw_error; 10860 goto rw_error;
11018 } 10861 }
11019 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, 10862 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr,
11020 SCU_RAM_QAM_FSM_STATE_TGT__A, 10863 SCU_RAM_QAM_FSM_STATE_TGT__A,
11021 0x2, 0); 10864 0x2, 0);
11022 if (rc != 0) { 10865 if (rc != 0) {
@@ -11030,7 +10873,7 @@ set_qam_channel(struct drx_demod_instance *demod,
11030 pr_err("error %d\n", rc); 10873 pr_err("error %d\n", rc);
11031 goto rw_error; 10874 goto rw_error;
11032 } 10875 }
11033 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, 10876 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr,
11034 SCU_RAM_QAM_CTL_ENA__A, 10877 SCU_RAM_QAM_CTL_ENA__A,
11035 qam_ctl_ena, 0); 10878 qam_ctl_ena, 0);
11036 if (rc != 0) { 10879 if (rc != 0) {
@@ -11057,21 +10900,21 @@ set_qam_channel(struct drx_demod_instance *demod,
11057 ext_attr->mirror = DRX_MIRROR_NO; 10900 ext_attr->mirror = DRX_MIRROR_NO;
11058 else 10901 else
11059 ext_attr->mirror = channel->mirror; 10902 ext_attr->mirror = channel->mirror;
11060 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, 10903 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr,
11061 SCU_RAM_QAM_CTL_ENA__A, 10904 SCU_RAM_QAM_CTL_ENA__A,
11062 &qam_ctl_ena, 0); 10905 &qam_ctl_ena, 0);
11063 if (rc != 0) { 10906 if (rc != 0) {
11064 pr_err("error %d\n", rc); 10907 pr_err("error %d\n", rc);
11065 goto rw_error; 10908 goto rw_error;
11066 } 10909 }
11067 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, 10910 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr,
11068 SCU_RAM_QAM_CTL_ENA__A, 10911 SCU_RAM_QAM_CTL_ENA__A,
11069 qam_ctl_ena & ~SCU_RAM_QAM_CTL_ENA_ACQ__M, 0); 10912 qam_ctl_ena & ~SCU_RAM_QAM_CTL_ENA_ACQ__M, 0);
11070 if (rc != 0) { 10913 if (rc != 0) {
11071 pr_err("error %d\n", rc); 10914 pr_err("error %d\n", rc);
11072 goto rw_error; 10915 goto rw_error;
11073 } 10916 }
11074 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, 10917 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr,
11075 SCU_RAM_QAM_FSM_STATE_TGT__A, 10918 SCU_RAM_QAM_FSM_STATE_TGT__A,
11076 0x2, 0); 10919 0x2, 0);
11077 if (rc != 0) { 10920 if (rc != 0) {
@@ -11085,7 +10928,7 @@ set_qam_channel(struct drx_demod_instance *demod,
11085 pr_err("error %d\n", rc); 10928 pr_err("error %d\n", rc);
11086 goto rw_error; 10929 goto rw_error;
11087 } 10930 }
11088 rc = DRXJ_DAP.write_reg16func(demod->my_i2c_dev_addr, 10931 rc = drxj_dap_write_reg16(demod->my_i2c_dev_addr,
11089 SCU_RAM_QAM_CTL_ENA__A, 10932 SCU_RAM_QAM_CTL_ENA__A,
11090 qam_ctl_ena, 0); 10933 qam_ctl_ena, 0);
11091 if (rc != 0) { 10934 if (rc != 0) {
@@ -11140,31 +10983,31 @@ get_qamrs_err_count(struct i2c_device_addr *dev_addr, struct drxjrs_errors *rs_e
11140 /* all reported errors are received in the */ 10983 /* all reported errors are received in the */
11141 /* most recently finished measurment period */ 10984 /* most recently finished measurment period */
11142 /* no of pre RS bit errors */ 10985 /* no of pre RS bit errors */
11143 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_RS_NR_BIT_ERRORS__A, &nr_bit_errors, 0); 10986 rc = drxj_dap_read_reg16(dev_addr, FEC_RS_NR_BIT_ERRORS__A, &nr_bit_errors, 0);
11144 if (rc != 0) { 10987 if (rc != 0) {
11145 pr_err("error %d\n", rc); 10988 pr_err("error %d\n", rc);
11146 goto rw_error; 10989 goto rw_error;
11147 } 10990 }
11148 /* no of symbol errors */ 10991 /* no of symbol errors */
11149 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_RS_NR_SYMBOL_ERRORS__A, &nr_symbol_errors, 0); 10992 rc = drxj_dap_read_reg16(dev_addr, FEC_RS_NR_SYMBOL_ERRORS__A, &nr_symbol_errors, 0);
11150 if (rc != 0) { 10993 if (rc != 0) {
11151 pr_err("error %d\n", rc); 10994 pr_err("error %d\n", rc);
11152 goto rw_error; 10995 goto rw_error;
11153 } 10996 }
11154 /* no of packet errors */ 10997 /* no of packet errors */
11155 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_RS_NR_PACKET_ERRORS__A, &nr_packet_errors, 0); 10998 rc = drxj_dap_read_reg16(dev_addr, FEC_RS_NR_PACKET_ERRORS__A, &nr_packet_errors, 0);
11156 if (rc != 0) { 10999 if (rc != 0) {
11157 pr_err("error %d\n", rc); 11000 pr_err("error %d\n", rc);
11158 goto rw_error; 11001 goto rw_error;
11159 } 11002 }
11160 /* no of failures to decode */ 11003 /* no of failures to decode */
11161 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_RS_NR_FAILURES__A, &nr_failures, 0); 11004 rc = drxj_dap_read_reg16(dev_addr, FEC_RS_NR_FAILURES__A, &nr_failures, 0);
11162 if (rc != 0) { 11005 if (rc != 0) {
11163 pr_err("error %d\n", rc); 11006 pr_err("error %d\n", rc);
11164 goto rw_error; 11007 goto rw_error;
11165 } 11008 }
11166 /* no of post RS bit erros */ 11009 /* no of post RS bit erros */
11167 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_SNC_FAIL_COUNT__A, &nr_snc_par_fail_count, 0); 11010 rc = drxj_dap_read_reg16(dev_addr, FEC_OC_SNC_FAIL_COUNT__A, &nr_snc_par_fail_count, 0);
11168 if (rc != 0) { 11011 if (rc != 0) {
11169 pr_err("error %d\n", rc); 11012 pr_err("error %d\n", rc);
11170 goto rw_error; 11013 goto rw_error;
@@ -11245,13 +11088,13 @@ ctrl_get_qam_sig_quality(struct drx_demod_instance *demod, struct drx_sig_qualit
11245 goto rw_error; 11088 goto rw_error;
11246 } 11089 }
11247 /* get the register value needed for MER */ 11090 /* get the register value needed for MER */
11248 rc = DRXJ_DAP.read_reg16func(dev_addr, QAM_SL_ERR_POWER__A, &qam_sl_err_power, 0); 11091 rc = drxj_dap_read_reg16(dev_addr, QAM_SL_ERR_POWER__A, &qam_sl_err_power, 0);
11249 if (rc != 0) { 11092 if (rc != 0) {
11250 pr_err("error %d\n", rc); 11093 pr_err("error %d\n", rc);
11251 goto rw_error; 11094 goto rw_error;
11252 } 11095 }
11253 /* get the register value needed for post RS BER */ 11096 /* get the register value needed for post RS BER */
11254 rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_SNC_FAIL_PERIOD__A, &fec_oc_period, 0); 11097 rc = drxj_dap_read_reg16(dev_addr, FEC_OC_SNC_FAIL_PERIOD__A, &fec_oc_period, 0);
11255 if (rc != 0) { 11098 if (rc != 0) {
11256 pr_err("error %d\n", rc); 11099 pr_err("error %d\n", rc);
11257 goto rw_error; 11100 goto rw_error;
@@ -11304,7 +11147,7 @@ ctrl_get_qam_sig_quality(struct drx_demod_instance *demod, struct drx_sig_qualit
11304 11147
11305 /* get the register value */ 11148 /* get the register value */
11306 /* no of quadrature symbol errors */ 11149 /* no of quadrature symbol errors */
11307 rc = DRXJ_DAP.read_reg16func(dev_addr, QAM_VD_NR_QSYM_ERRORS__A, &qsym_err_vd, 0); 11150 rc = drxj_dap_read_reg16(dev_addr, QAM_VD_NR_QSYM_ERRORS__A, &qsym_err_vd, 0);
11308 if (rc != 0) { 11151 if (rc != 0) {
11309 pr_err("error %d\n", rc); 11152 pr_err("error %d\n", rc);
11310 goto rw_error; 11153 goto rw_error;
@@ -11419,7 +11262,7 @@ ctrl_get_qam_constel(struct drx_demod_instance *demod, struct drx_complex *compl
11419 /* Needs to be checked when external interface PG is updated */ 11262 /* Needs to be checked when external interface PG is updated */
11420 11263
11421 /* Configure MB (Monitor bus) */ 11264 /* Configure MB (Monitor bus) */
11422 rc = DRXJ_DAP.read_reg16func(dev_addr, QAM_SL_COMM_MB__A, &qam_sl_comm_mb_init, 0); 11265 rc = drxj_dap_read_reg16(dev_addr, QAM_SL_COMM_MB__A, &qam_sl_comm_mb_init, 0);
11423 if (rc != 0) { 11266 if (rc != 0) {
11424 pr_err("error %d\n", rc); 11267 pr_err("error %d\n", rc);
11425 goto rw_error; 11268 goto rw_error;
@@ -11429,7 +11272,7 @@ ctrl_get_qam_constel(struct drx_demod_instance *demod, struct drx_complex *compl
11429 QAM_SL_COMM_MB_MUX_OBS__M)); 11272 QAM_SL_COMM_MB_MUX_OBS__M));
11430 qam_sl_comm_mb |= (QAM_SL_COMM_MB_OBS_ON + 11273 qam_sl_comm_mb |= (QAM_SL_COMM_MB_OBS_ON +
11431 QAM_SL_COMM_MB_MUX_OBS_CONST_CORR); 11274 QAM_SL_COMM_MB_MUX_OBS_CONST_CORR);
11432 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_SL_COMM_MB__A, qam_sl_comm_mb, 0); 11275 rc = drxj_dap_write_reg16(dev_addr, QAM_SL_COMM_MB__A, qam_sl_comm_mb, 0);
11433 if (rc != 0) { 11276 if (rc != 0) {
11434 pr_err("error %d\n", rc); 11277 pr_err("error %d\n", rc);
11435 goto rw_error; 11278 goto rw_error;
@@ -11448,21 +11291,21 @@ ctrl_get_qam_constel(struct drx_demod_instance *demod, struct drx_complex *compl
11448 /* grabber mode: continuous */ 11291 /* grabber mode: continuous */
11449 (FEC_OC_OCR_MODE_GRAB_COUNTED__M & 11292 (FEC_OC_OCR_MODE_GRAB_COUNTED__M &
11450 (0x0 << FEC_OC_OCR_MODE_GRAB_COUNTED__B))); 11293 (0x0 << FEC_OC_OCR_MODE_GRAB_COUNTED__B)));
11451 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_OCR_MODE__A, fec_oc_ocr_mode, 0); 11294 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_OCR_MODE__A, fec_oc_ocr_mode, 0);
11452 if (rc != 0) { 11295 if (rc != 0) {
11453 pr_err("error %d\n", rc); 11296 pr_err("error %d\n", rc);
11454 goto rw_error; 11297 goto rw_error;
11455 } 11298 }
11456 11299
11457 /* Disable MB grabber in the FEC OC */ 11300 /* Disable MB grabber in the FEC OC */
11458 rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_OCR_MODE__A, 0x00, 0); 11301 rc = drxj_dap_write_reg16(dev_addr, FEC_OC_OCR_MODE__A, 0x00, 0);
11459 if (rc != 0) { 11302 if (rc != 0) {
11460 pr_err("error %d\n", rc); 11303 pr_err("error %d\n", rc);
11461 goto rw_error; 11304 goto rw_error;
11462 } 11305 }
11463 11306
11464 /* read data */ 11307 /* read data */
11465 rc = DRXJ_DAP.read_reg32func(dev_addr, FEC_OC_OCR_GRAB_RD0__A, &data, 0); 11308 rc = drxdap_fasi_read_reg32(dev_addr, FEC_OC_OCR_GRAB_RD0__A, &data, 0);
11466 if (rc != 0) { 11309 if (rc != 0) {
11467 pr_err("error %d\n", rc); 11310 pr_err("error %d\n", rc);
11468 goto rw_error; 11311 goto rw_error;
@@ -11482,7 +11325,7 @@ ctrl_get_qam_constel(struct drx_demod_instance *demod, struct drx_complex *compl
11482 complex_nr->im = ((s16) im); 11325 complex_nr->im = ((s16) im);
11483 11326
11484 /* Restore MB (Monitor bus) */ 11327 /* Restore MB (Monitor bus) */
11485 rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_SL_COMM_MB__A, qam_sl_comm_mb_init, 0); 11328 rc = drxj_dap_write_reg16(dev_addr, QAM_SL_COMM_MB__A, qam_sl_comm_mb_init, 0);
11486 if (rc != 0) { 11329 if (rc != 0) {
11487 pr_err("error %d\n", rc); 11330 pr_err("error %d\n", rc);
11488 goto rw_error; 11331 goto rw_error;
@@ -11631,22 +11474,22 @@ atv_update_config(struct drx_demod_instance *demod, bool force_update)
11631 pr_err("error %d\n", rc); 11474 pr_err("error %d\n", rc);
11632 goto rw_error; 11475 goto rw_error;
11633 } 11476 }
11634 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_EQU0__A, ext_attr->atv_top_equ0[index], 0); 11477 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_EQU0__A, ext_attr->atv_top_equ0[index], 0);
11635 if (rc != 0) { 11478 if (rc != 0) {
11636 pr_err("error %d\n", rc); 11479 pr_err("error %d\n", rc);
11637 goto rw_error; 11480 goto rw_error;
11638 } 11481 }
11639 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_EQU1__A, ext_attr->atv_top_equ1[index], 0); 11482 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_EQU1__A, ext_attr->atv_top_equ1[index], 0);
11640 if (rc != 0) { 11483 if (rc != 0) {
11641 pr_err("error %d\n", rc); 11484 pr_err("error %d\n", rc);
11642 goto rw_error; 11485 goto rw_error;
11643 } 11486 }
11644 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_EQU2__A, ext_attr->atv_top_equ2[index], 0); 11487 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_EQU2__A, ext_attr->atv_top_equ2[index], 0);
11645 if (rc != 0) { 11488 if (rc != 0) {
11646 pr_err("error %d\n", rc); 11489 pr_err("error %d\n", rc);
11647 goto rw_error; 11490 goto rw_error;
11648 } 11491 }
11649 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_EQU3__A, ext_attr->atv_top_equ3[index], 0); 11492 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_EQU3__A, ext_attr->atv_top_equ3[index], 0);
11650 if (rc != 0) { 11493 if (rc != 0) {
11651 pr_err("error %d\n", rc); 11494 pr_err("error %d\n", rc);
11652 goto rw_error; 11495 goto rw_error;
@@ -11657,7 +11500,7 @@ atv_update_config(struct drx_demod_instance *demod, bool force_update)
11657 if (force_update) { 11500 if (force_update) {
11658 u16 data = 0; 11501 u16 data = 0;
11659 11502
11660 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_RT_ROT_BP__A, &data, 0); 11503 rc = drxj_dap_read_reg16(dev_addr, IQM_RT_ROT_BP__A, &data, 0);
11661 if (rc != 0) { 11504 if (rc != 0) {
11662 pr_err("error %d\n", rc); 11505 pr_err("error %d\n", rc);
11663 goto rw_error; 11506 goto rw_error;
@@ -11667,7 +11510,7 @@ atv_update_config(struct drx_demod_instance *demod, bool force_update)
11667 data |= IQM_RT_ROT_BP_ROT_OFF_OFF; 11510 data |= IQM_RT_ROT_BP_ROT_OFF_OFF;
11668 else 11511 else
11669 data |= IQM_RT_ROT_BP_ROT_OFF_ACTIVE; 11512 data |= IQM_RT_ROT_BP_ROT_OFF_ACTIVE;
11670 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_ROT_BP__A, data, 0); 11513 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_ROT_BP__A, data, 0);
11671 if (rc != 0) { 11514 if (rc != 0) {
11672 pr_err("error %d\n", rc); 11515 pr_err("error %d\n", rc);
11673 goto rw_error; 11516 goto rw_error;
@@ -11677,7 +11520,7 @@ atv_update_config(struct drx_demod_instance *demod, bool force_update)
11677 /* peak filter setting */ 11520 /* peak filter setting */
11678 if (force_update || 11521 if (force_update ||
11679 ((ext_attr->atv_cfg_changed_flags & DRXJ_ATV_CHANGED_PEAK_FLT) != 0)) { 11522 ((ext_attr->atv_cfg_changed_flags & DRXJ_ATV_CHANGED_PEAK_FLT) != 0)) {
11680 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_VID_PEAK__A, ext_attr->atv_top_vid_peak, 0); 11523 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_VID_PEAK__A, ext_attr->atv_top_vid_peak, 0);
11681 if (rc != 0) { 11524 if (rc != 0) {
11682 pr_err("error %d\n", rc); 11525 pr_err("error %d\n", rc);
11683 goto rw_error; 11526 goto rw_error;
@@ -11687,7 +11530,7 @@ atv_update_config(struct drx_demod_instance *demod, bool force_update)
11687 /* noise filter setting */ 11530 /* noise filter setting */
11688 if (force_update || 11531 if (force_update ||
11689 ((ext_attr->atv_cfg_changed_flags & DRXJ_ATV_CHANGED_NOISE_FLT) != 0)) { 11532 ((ext_attr->atv_cfg_changed_flags & DRXJ_ATV_CHANGED_NOISE_FLT) != 0)) {
11690 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_NOISE_TH__A, ext_attr->atv_top_noise_th, 0); 11533 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_NOISE_TH__A, ext_attr->atv_top_noise_th, 0);
11691 if (rc != 0) { 11534 if (rc != 0) {
11692 pr_err("error %d\n", rc); 11535 pr_err("error %d\n", rc);
11693 goto rw_error; 11536 goto rw_error;
@@ -11716,7 +11559,7 @@ atv_update_config(struct drx_demod_instance *demod, bool force_update)
11716 return -EIO; 11559 return -EIO;
11717 break; 11560 break;
11718 } 11561 }
11719 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_AF_SIF_ATT__A, attenuation, 0); 11562 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_AF_SIF_ATT__A, attenuation, 0);
11720 if (rc != 0) { 11563 if (rc != 0) {
11721 pr_err("error %d\n", rc); 11564 pr_err("error %d\n", rc);
11722 goto rw_error; 11565 goto rw_error;
@@ -11728,7 +11571,7 @@ atv_update_config(struct drx_demod_instance *demod, bool force_update)
11728 ((ext_attr->atv_cfg_changed_flags & DRXJ_ATV_CHANGED_OUTPUT) != 0)) { 11571 ((ext_attr->atv_cfg_changed_flags & DRXJ_ATV_CHANGED_OUTPUT) != 0)) {
11729 u16 data = 0; 11572 u16 data = 0;
11730 11573
11731 rc = DRXJ_DAP.read_reg16func(dev_addr, ATV_TOP_STDBY__A, &data, 0); 11574 rc = drxj_dap_read_reg16(dev_addr, ATV_TOP_STDBY__A, &data, 0);
11732 if (rc != 0) { 11575 if (rc != 0) {
11733 pr_err("error %d\n", rc); 11576 pr_err("error %d\n", rc);
11734 goto rw_error; 11577 goto rw_error;
@@ -11742,7 +11585,7 @@ atv_update_config(struct drx_demod_instance *demod, bool force_update)
11742 data &= (~ATV_TOP_STDBY_SIF_STDBY_STANDBY); 11585 data &= (~ATV_TOP_STDBY_SIF_STDBY_STANDBY);
11743 else 11586 else
11744 data |= ATV_TOP_STDBY_SIF_STDBY_STANDBY; 11587 data |= ATV_TOP_STDBY_SIF_STDBY_STANDBY;
11745 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_STDBY__A, data, 0); 11588 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_STDBY__A, data, 0);
11746 if (rc != 0) { 11589 if (rc != 0) {
11747 pr_err("error %d\n", rc); 11590 pr_err("error %d\n", rc);
11748 goto rw_error; 11591 goto rw_error;
@@ -12016,7 +11859,7 @@ ctrl_get_cfg_atv_output(struct drx_demod_instance *demod, struct drxj_cfg_atv_ou
12016 if (output_cfg == NULL) 11859 if (output_cfg == NULL)
12017 return -EINVAL; 11860 return -EINVAL;
12018 11861
12019 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, ATV_TOP_STDBY__A, &data, 0); 11862 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, ATV_TOP_STDBY__A, &data, 0);
12020 if (rc != 0) { 11863 if (rc != 0) {
12021 pr_err("error %d\n", rc); 11864 pr_err("error %d\n", rc);
12022 goto rw_error; 11865 goto rw_error;
@@ -12030,7 +11873,7 @@ ctrl_get_cfg_atv_output(struct drx_demod_instance *demod, struct drxj_cfg_atv_ou
12030 output_cfg->enable_sif_output = false; 11873 output_cfg->enable_sif_output = false;
12031 } else { 11874 } else {
12032 output_cfg->enable_sif_output = true; 11875 output_cfg->enable_sif_output = true;
12033 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, ATV_TOP_AF_SIF_ATT__A, &data, 0); 11876 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, ATV_TOP_AF_SIF_ATT__A, &data, 0);
12034 if (rc != 0) { 11877 if (rc != 0) {
12035 pr_err("error %d\n", rc); 11878 pr_err("error %d\n", rc);
12036 goto rw_error; 11879 goto rw_error;
@@ -12073,7 +11916,7 @@ ctrl_get_cfg_atv_agc_status(struct drx_demod_instance *demod,
12073 11916
12074 IQM_AF_AGC_RF__A * 27 is 20 bits worst case. 11917 IQM_AF_AGC_RF__A * 27 is 20 bits worst case.
12075 */ 11918 */
12076 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_AGC_RF__A, &data, 0); 11919 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_AGC_RF__A, &data, 0);
12077 if (rc != 0) { 11920 if (rc != 0) {
12078 pr_err("error %d\n", rc); 11921 pr_err("error %d\n", rc);
12079 goto rw_error; 11922 goto rw_error;
@@ -12090,7 +11933,7 @@ ctrl_get_cfg_atv_agc_status(struct drx_demod_instance *demod,
12090 11933
12091 IQM_AF_AGC_IF__A * 27 is 20 bits worst case. 11934 IQM_AF_AGC_IF__A * 27 is 20 bits worst case.
12092 */ 11935 */
12093 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_AGC_IF__A, &data, 0); 11936 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_AGC_IF__A, &data, 0);
12094 if (rc != 0) { 11937 if (rc != 0) {
12095 pr_err("error %d\n", rc); 11938 pr_err("error %d\n", rc);
12096 goto rw_error; 11939 goto rw_error;
@@ -12177,7 +12020,7 @@ static int power_up_atv(struct drx_demod_instance *demod, enum drx_standard stan
12177 int rc; 12020 int rc;
12178 12021
12179 /* ATV NTSC */ 12022 /* ATV NTSC */
12180 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_COMM_EXEC__A, ATV_COMM_EXEC_ACTIVE, 0); 12023 rc = drxj_dap_write_reg16(dev_addr, ATV_COMM_EXEC__A, ATV_COMM_EXEC_ACTIVE, 0);
12181 if (rc != 0) { 12024 if (rc != 0) {
12182 pr_err("error %d\n", rc); 12025 pr_err("error %d\n", rc);
12183 goto rw_error; 12026 goto rw_error;
@@ -12194,7 +12037,7 @@ static int power_up_atv(struct drx_demod_instance *demod, enum drx_standard stan
12194 goto rw_error; 12037 goto rw_error;
12195 } 12038 }
12196 12039
12197 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_COMM_EXEC__A, IQM_COMM_EXEC_ACTIVE, 0); 12040 rc = drxj_dap_write_reg16(dev_addr, IQM_COMM_EXEC__A, IQM_COMM_EXEC_ACTIVE, 0);
12198 if (rc != 0) { 12041 if (rc != 0) {
12199 pr_err("error %d\n", rc); 12042 pr_err("error %d\n", rc);
12200 goto rw_error; 12043 goto rw_error;
@@ -12249,19 +12092,19 @@ power_down_atv(struct drx_demod_instance *demod, enum drx_standard standard, boo
12249 goto rw_error; 12092 goto rw_error;
12250 } 12093 }
12251 /* Disable ATV outputs (ATV reset enables CVBS, undo this) */ 12094 /* Disable ATV outputs (ATV reset enables CVBS, undo this) */
12252 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_STDBY__A, (ATV_TOP_STDBY_SIF_STDBY_STANDBY & (~ATV_TOP_STDBY_CVBS_STDBY_A2_ACTIVE)), 0); 12095 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_STDBY__A, (ATV_TOP_STDBY_SIF_STDBY_STANDBY & (~ATV_TOP_STDBY_CVBS_STDBY_A2_ACTIVE)), 0);
12253 if (rc != 0) { 12096 if (rc != 0) {
12254 pr_err("error %d\n", rc); 12097 pr_err("error %d\n", rc);
12255 goto rw_error; 12098 goto rw_error;
12256 } 12099 }
12257 12100
12258 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_COMM_EXEC__A, ATV_COMM_EXEC_STOP, 0); 12101 rc = drxj_dap_write_reg16(dev_addr, ATV_COMM_EXEC__A, ATV_COMM_EXEC_STOP, 0);
12259 if (rc != 0) { 12102 if (rc != 0) {
12260 pr_err("error %d\n", rc); 12103 pr_err("error %d\n", rc);
12261 goto rw_error; 12104 goto rw_error;
12262 } 12105 }
12263 if (primary) { 12106 if (primary) {
12264 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_COMM_EXEC__A, IQM_COMM_EXEC_STOP, 0); 12107 rc = drxj_dap_write_reg16(dev_addr, IQM_COMM_EXEC__A, IQM_COMM_EXEC_STOP, 0);
12265 if (rc != 0) { 12108 if (rc != 0) {
12266 pr_err("error %d\n", rc); 12109 pr_err("error %d\n", rc);
12267 goto rw_error; 12110 goto rw_error;
@@ -12272,27 +12115,27 @@ power_down_atv(struct drx_demod_instance *demod, enum drx_standard standard, boo
12272 goto rw_error; 12115 goto rw_error;
12273 } 12116 }
12274 } else { 12117 } else {
12275 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_FS_COMM_EXEC__A, IQM_FS_COMM_EXEC_STOP, 0); 12118 rc = drxj_dap_write_reg16(dev_addr, IQM_FS_COMM_EXEC__A, IQM_FS_COMM_EXEC_STOP, 0);
12276 if (rc != 0) { 12119 if (rc != 0) {
12277 pr_err("error %d\n", rc); 12120 pr_err("error %d\n", rc);
12278 goto rw_error; 12121 goto rw_error;
12279 } 12122 }
12280 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_FD_COMM_EXEC__A, IQM_FD_COMM_EXEC_STOP, 0); 12123 rc = drxj_dap_write_reg16(dev_addr, IQM_FD_COMM_EXEC__A, IQM_FD_COMM_EXEC_STOP, 0);
12281 if (rc != 0) { 12124 if (rc != 0) {
12282 pr_err("error %d\n", rc); 12125 pr_err("error %d\n", rc);
12283 goto rw_error; 12126 goto rw_error;
12284 } 12127 }
12285 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RC_COMM_EXEC__A, IQM_RC_COMM_EXEC_STOP, 0); 12128 rc = drxj_dap_write_reg16(dev_addr, IQM_RC_COMM_EXEC__A, IQM_RC_COMM_EXEC_STOP, 0);
12286 if (rc != 0) { 12129 if (rc != 0) {
12287 pr_err("error %d\n", rc); 12130 pr_err("error %d\n", rc);
12288 goto rw_error; 12131 goto rw_error;
12289 } 12132 }
12290 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_COMM_EXEC__A, IQM_RT_COMM_EXEC_STOP, 0); 12133 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_COMM_EXEC__A, IQM_RT_COMM_EXEC_STOP, 0);
12291 if (rc != 0) { 12134 if (rc != 0) {
12292 pr_err("error %d\n", rc); 12135 pr_err("error %d\n", rc);
12293 goto rw_error; 12136 goto rw_error;
12294 } 12137 }
12295 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_COMM_EXEC__A, IQM_CF_COMM_EXEC_STOP, 0); 12138 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_COMM_EXEC__A, IQM_CF_COMM_EXEC_STOP, 0);
12296 if (rc != 0) { 12139 if (rc != 0) {
12297 pr_err("error %d\n", rc); 12140 pr_err("error %d\n", rc);
12298 goto rw_error; 12141 goto rw_error;
@@ -12598,32 +12441,32 @@ trouble ?
12598 ext_attr = (struct drxj_data *) demod->my_ext_attr; 12441 ext_attr = (struct drxj_data *) demod->my_ext_attr;
12599 dev_addr = demod->my_i2c_dev_addr; 12442 dev_addr = demod->my_i2c_dev_addr;
12600 12443
12601 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_COMM_EXEC__A, ATV_COMM_EXEC_STOP, 0); 12444 rc = drxj_dap_write_reg16(dev_addr, ATV_COMM_EXEC__A, ATV_COMM_EXEC_STOP, 0);
12602 if (rc != 0) { 12445 if (rc != 0) {
12603 pr_err("error %d\n", rc); 12446 pr_err("error %d\n", rc);
12604 goto rw_error; 12447 goto rw_error;
12605 } 12448 }
12606 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_FS_COMM_EXEC__A, IQM_FS_COMM_EXEC_STOP, 0); 12449 rc = drxj_dap_write_reg16(dev_addr, IQM_FS_COMM_EXEC__A, IQM_FS_COMM_EXEC_STOP, 0);
12607 if (rc != 0) { 12450 if (rc != 0) {
12608 pr_err("error %d\n", rc); 12451 pr_err("error %d\n", rc);
12609 goto rw_error; 12452 goto rw_error;
12610 } 12453 }
12611 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_FD_COMM_EXEC__A, IQM_FD_COMM_EXEC_STOP, 0); 12454 rc = drxj_dap_write_reg16(dev_addr, IQM_FD_COMM_EXEC__A, IQM_FD_COMM_EXEC_STOP, 0);
12612 if (rc != 0) { 12455 if (rc != 0) {
12613 pr_err("error %d\n", rc); 12456 pr_err("error %d\n", rc);
12614 goto rw_error; 12457 goto rw_error;
12615 } 12458 }
12616 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RC_COMM_EXEC__A, IQM_RC_COMM_EXEC_STOP, 0); 12459 rc = drxj_dap_write_reg16(dev_addr, IQM_RC_COMM_EXEC__A, IQM_RC_COMM_EXEC_STOP, 0);
12617 if (rc != 0) { 12460 if (rc != 0) {
12618 pr_err("error %d\n", rc); 12461 pr_err("error %d\n", rc);
12619 goto rw_error; 12462 goto rw_error;
12620 } 12463 }
12621 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_COMM_EXEC__A, IQM_RT_COMM_EXEC_STOP, 0); 12464 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_COMM_EXEC__A, IQM_RT_COMM_EXEC_STOP, 0);
12622 if (rc != 0) { 12465 if (rc != 0) {
12623 pr_err("error %d\n", rc); 12466 pr_err("error %d\n", rc);
12624 goto rw_error; 12467 goto rw_error;
12625 } 12468 }
12626 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_COMM_EXEC__A, IQM_CF_COMM_EXEC_STOP, 0); 12469 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_COMM_EXEC__A, IQM_CF_COMM_EXEC_STOP, 0);
12627 if (rc != 0) { 12470 if (rc != 0) {
12628 pr_err("error %d\n", rc); 12471 pr_err("error %d\n", rc);
12629 goto rw_error; 12472 goto rw_error;
@@ -12641,7 +12484,7 @@ trouble ?
12641 goto rw_error; 12484 goto rw_error;
12642 } 12485 }
12643 12486
12644 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_MOD_CONTROL__A, ATV_TOP_MOD_CONTROL__PRE, 0); 12487 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_MOD_CONTROL__A, ATV_TOP_MOD_CONTROL__PRE, 0);
12645 if (rc != 0) { 12488 if (rc != 0) {
12646 pr_err("error %d\n", rc); 12489 pr_err("error %d\n", rc);
12647 goto rw_error; 12490 goto rw_error;
@@ -12653,69 +12496,69 @@ trouble ?
12653 /* NTSC */ 12496 /* NTSC */
12654 cmd_param = SCU_RAM_ATV_STANDARD_STANDARD_MN; 12497 cmd_param = SCU_RAM_ATV_STANDARD_STANDARD_MN;
12655 12498
12656 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_LO_INCR__A, IQM_RT_LO_INCR_MN, 0); 12499 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_LO_INCR__A, IQM_RT_LO_INCR_MN, 0);
12657 if (rc != 0) { 12500 if (rc != 0) {
12658 pr_err("error %d\n", rc); 12501 pr_err("error %d\n", rc);
12659 goto rw_error; 12502 goto rw_error;
12660 } 12503 }
12661 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_MIDTAP__A, IQM_CF_MIDTAP_RE__M, 0); 12504 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_MIDTAP__A, IQM_CF_MIDTAP_RE__M, 0);
12662 if (rc != 0) { 12505 if (rc != 0) {
12663 pr_err("error %d\n", rc); 12506 pr_err("error %d\n", rc);
12664 goto rw_error; 12507 goto rw_error;
12665 } 12508 }
12666 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_RE0__A, sizeof(ntsc_taps_re), ((u8 *)ntsc_taps_re), 0); 12509 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_RE0__A, sizeof(ntsc_taps_re), ((u8 *)ntsc_taps_re), 0);
12667 if (rc != 0) { 12510 if (rc != 0) {
12668 pr_err("error %d\n", rc); 12511 pr_err("error %d\n", rc);
12669 goto rw_error; 12512 goto rw_error;
12670 } 12513 }
12671 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_IM0__A, sizeof(ntsc_taps_im), ((u8 *)ntsc_taps_im), 0); 12514 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_IM0__A, sizeof(ntsc_taps_im), ((u8 *)ntsc_taps_im), 0);
12672 if (rc != 0) { 12515 if (rc != 0) {
12673 pr_err("error %d\n", rc); 12516 pr_err("error %d\n", rc);
12674 goto rw_error; 12517 goto rw_error;
12675 } 12518 }
12676 12519
12677 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_AMP_TH__A, ATV_TOP_CR_AMP_TH_MN, 0); 12520 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_AMP_TH__A, ATV_TOP_CR_AMP_TH_MN, 0);
12678 if (rc != 0) { 12521 if (rc != 0) {
12679 pr_err("error %d\n", rc); 12522 pr_err("error %d\n", rc);
12680 goto rw_error; 12523 goto rw_error;
12681 } 12524 }
12682 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_CONT__A, (ATV_TOP_CR_CONT_CR_P_MN | ATV_TOP_CR_CONT_CR_D_MN | ATV_TOP_CR_CONT_CR_I_MN), 0); 12525 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_CONT__A, (ATV_TOP_CR_CONT_CR_P_MN | ATV_TOP_CR_CONT_CR_D_MN | ATV_TOP_CR_CONT_CR_I_MN), 0);
12683 if (rc != 0) { 12526 if (rc != 0) {
12684 pr_err("error %d\n", rc); 12527 pr_err("error %d\n", rc);
12685 goto rw_error; 12528 goto rw_error;
12686 } 12529 }
12687 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_OVM_TH__A, ATV_TOP_CR_OVM_TH_MN, 0); 12530 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_OVM_TH__A, ATV_TOP_CR_OVM_TH_MN, 0);
12688 if (rc != 0) { 12531 if (rc != 0) {
12689 pr_err("error %d\n", rc); 12532 pr_err("error %d\n", rc);
12690 goto rw_error; 12533 goto rw_error;
12691 } 12534 }
12692 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_STD__A, (ATV_TOP_STD_MODE_MN | ATV_TOP_STD_VID_POL_MN), 0); 12535 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_STD__A, (ATV_TOP_STD_MODE_MN | ATV_TOP_STD_VID_POL_MN), 0);
12693 if (rc != 0) { 12536 if (rc != 0) {
12694 pr_err("error %d\n", rc); 12537 pr_err("error %d\n", rc);
12695 goto rw_error; 12538 goto rw_error;
12696 } 12539 }
12697 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_VID_AMP__A, ATV_TOP_VID_AMP_MN, 0); 12540 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_VID_AMP__A, ATV_TOP_VID_AMP_MN, 0);
12698 if (rc != 0) { 12541 if (rc != 0) {
12699 pr_err("error %d\n", rc); 12542 pr_err("error %d\n", rc);
12700 goto rw_error; 12543 goto rw_error;
12701 } 12544 }
12702 12545
12703 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AGC_MODE__A, (SCU_RAM_ATV_AGC_MODE_SIF_STD_SIF_AGC_FM | SCU_RAM_ATV_AGC_MODE_FAST_VAGC_EN_FAGC_ENABLE), 0); 12546 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AGC_MODE__A, (SCU_RAM_ATV_AGC_MODE_SIF_STD_SIF_AGC_FM | SCU_RAM_ATV_AGC_MODE_FAST_VAGC_EN_FAGC_ENABLE), 0);
12704 if (rc != 0) { 12547 if (rc != 0) {
12705 pr_err("error %d\n", rc); 12548 pr_err("error %d\n", rc);
12706 goto rw_error; 12549 goto rw_error;
12707 } 12550 }
12708 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_VID_GAIN_HI__A, 0x1000, 0); 12551 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_VID_GAIN_HI__A, 0x1000, 0);
12709 if (rc != 0) { 12552 if (rc != 0) {
12710 pr_err("error %d\n", rc); 12553 pr_err("error %d\n", rc);
12711 goto rw_error; 12554 goto rw_error;
12712 } 12555 }
12713 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_VID_GAIN_LO__A, 0x0000, 0); 12556 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_VID_GAIN_LO__A, 0x0000, 0);
12714 if (rc != 0) { 12557 if (rc != 0) {
12715 pr_err("error %d\n", rc); 12558 pr_err("error %d\n", rc);
12716 goto rw_error; 12559 goto rw_error;
12717 } 12560 }
12718 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AMS_MAX_REF__A, SCU_RAM_ATV_AMS_MAX_REF_AMS_MAX_REF_BG_MN, 0); 12561 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AMS_MAX_REF__A, SCU_RAM_ATV_AMS_MAX_REF_AMS_MAX_REF_BG_MN, 0);
12719 if (rc != 0) { 12562 if (rc != 0) {
12720 pr_err("error %d\n", rc); 12563 pr_err("error %d\n", rc);
12721 goto rw_error; 12564 goto rw_error;
@@ -12727,48 +12570,48 @@ trouble ?
12727 /* FM */ 12570 /* FM */
12728 cmd_param = SCU_RAM_ATV_STANDARD_STANDARD_FM; 12571 cmd_param = SCU_RAM_ATV_STANDARD_STANDARD_FM;
12729 12572
12730 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_LO_INCR__A, 2994, 0); 12573 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_LO_INCR__A, 2994, 0);
12731 if (rc != 0) { 12574 if (rc != 0) {
12732 pr_err("error %d\n", rc); 12575 pr_err("error %d\n", rc);
12733 goto rw_error; 12576 goto rw_error;
12734 } 12577 }
12735 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_MIDTAP__A, 0, 0); 12578 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_MIDTAP__A, 0, 0);
12736 if (rc != 0) { 12579 if (rc != 0) {
12737 pr_err("error %d\n", rc); 12580 pr_err("error %d\n", rc);
12738 goto rw_error; 12581 goto rw_error;
12739 } 12582 }
12740 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_RE0__A, sizeof(fm_taps_re), ((u8 *)fm_taps_re), 0); 12583 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_RE0__A, sizeof(fm_taps_re), ((u8 *)fm_taps_re), 0);
12741 if (rc != 0) { 12584 if (rc != 0) {
12742 pr_err("error %d\n", rc); 12585 pr_err("error %d\n", rc);
12743 goto rw_error; 12586 goto rw_error;
12744 } 12587 }
12745 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_IM0__A, sizeof(fm_taps_im), ((u8 *)fm_taps_im), 0); 12588 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_IM0__A, sizeof(fm_taps_im), ((u8 *)fm_taps_im), 0);
12746 if (rc != 0) { 12589 if (rc != 0) {
12747 pr_err("error %d\n", rc); 12590 pr_err("error %d\n", rc);
12748 goto rw_error; 12591 goto rw_error;
12749 } 12592 }
12750 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_STD__A, (ATV_TOP_STD_MODE_FM | ATV_TOP_STD_VID_POL_FM), 0); 12593 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_STD__A, (ATV_TOP_STD_MODE_FM | ATV_TOP_STD_VID_POL_FM), 0);
12751 if (rc != 0) { 12594 if (rc != 0) {
12752 pr_err("error %d\n", rc); 12595 pr_err("error %d\n", rc);
12753 goto rw_error; 12596 goto rw_error;
12754 } 12597 }
12755 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_MOD_CONTROL__A, 0, 0); 12598 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_MOD_CONTROL__A, 0, 0);
12756 if (rc != 0) { 12599 if (rc != 0) {
12757 pr_err("error %d\n", rc); 12600 pr_err("error %d\n", rc);
12758 goto rw_error; 12601 goto rw_error;
12759 } 12602 }
12760 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_CONT__A, 0, 0); 12603 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_CONT__A, 0, 0);
12761 if (rc != 0) { 12604 if (rc != 0) {
12762 pr_err("error %d\n", rc); 12605 pr_err("error %d\n", rc);
12763 goto rw_error; 12606 goto rw_error;
12764 } 12607 }
12765 12608
12766 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AGC_MODE__A, (SCU_RAM_ATV_AGC_MODE_VAGC_VEL_AGC_SLOW | SCU_RAM_ATV_AGC_MODE_SIF_STD_SIF_AGC_FM), 0); 12609 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AGC_MODE__A, (SCU_RAM_ATV_AGC_MODE_VAGC_VEL_AGC_SLOW | SCU_RAM_ATV_AGC_MODE_SIF_STD_SIF_AGC_FM), 0);
12767 if (rc != 0) { 12610 if (rc != 0) {
12768 pr_err("error %d\n", rc); 12611 pr_err("error %d\n", rc);
12769 goto rw_error; 12612 goto rw_error;
12770 } 12613 }
12771 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_ROT_BP__A, IQM_RT_ROT_BP_ROT_OFF_OFF, 0); 12614 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_ROT_BP__A, IQM_RT_ROT_BP_ROT_OFF_OFF, 0);
12772 if (rc != 0) { 12615 if (rc != 0) {
12773 pr_err("error %d\n", rc); 12616 pr_err("error %d\n", rc);
12774 goto rw_error; 12617 goto rw_error;
@@ -12780,67 +12623,67 @@ trouble ?
12780 /* PAL/SECAM B/G */ 12623 /* PAL/SECAM B/G */
12781 cmd_param = SCU_RAM_ATV_STANDARD_STANDARD_B; 12624 cmd_param = SCU_RAM_ATV_STANDARD_STANDARD_B;
12782 12625
12783 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_LO_INCR__A, 1820, 0); 12626 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_LO_INCR__A, 1820, 0);
12784 if (rc != 0) { 12627 if (rc != 0) {
12785 pr_err("error %d\n", rc); 12628 pr_err("error %d\n", rc);
12786 goto rw_error; 12629 goto rw_error;
12787 } /* TODO check with IS */ 12630 } /* TODO check with IS */
12788 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_MIDTAP__A, IQM_CF_MIDTAP_RE__M, 0); 12631 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_MIDTAP__A, IQM_CF_MIDTAP_RE__M, 0);
12789 if (rc != 0) { 12632 if (rc != 0) {
12790 pr_err("error %d\n", rc); 12633 pr_err("error %d\n", rc);
12791 goto rw_error; 12634 goto rw_error;
12792 } 12635 }
12793 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_RE0__A, sizeof(bg_taps_re), ((u8 *)bg_taps_re), 0); 12636 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_RE0__A, sizeof(bg_taps_re), ((u8 *)bg_taps_re), 0);
12794 if (rc != 0) { 12637 if (rc != 0) {
12795 pr_err("error %d\n", rc); 12638 pr_err("error %d\n", rc);
12796 goto rw_error; 12639 goto rw_error;
12797 } 12640 }
12798 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_IM0__A, sizeof(bg_taps_im), ((u8 *)bg_taps_im), 0); 12641 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_IM0__A, sizeof(bg_taps_im), ((u8 *)bg_taps_im), 0);
12799 if (rc != 0) { 12642 if (rc != 0) {
12800 pr_err("error %d\n", rc); 12643 pr_err("error %d\n", rc);
12801 goto rw_error; 12644 goto rw_error;
12802 } 12645 }
12803 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_VID_AMP__A, ATV_TOP_VID_AMP_BG, 0); 12646 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_VID_AMP__A, ATV_TOP_VID_AMP_BG, 0);
12804 if (rc != 0) { 12647 if (rc != 0) {
12805 pr_err("error %d\n", rc); 12648 pr_err("error %d\n", rc);
12806 goto rw_error; 12649 goto rw_error;
12807 } 12650 }
12808 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_AMP_TH__A, ATV_TOP_CR_AMP_TH_BG, 0); 12651 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_AMP_TH__A, ATV_TOP_CR_AMP_TH_BG, 0);
12809 if (rc != 0) { 12652 if (rc != 0) {
12810 pr_err("error %d\n", rc); 12653 pr_err("error %d\n", rc);
12811 goto rw_error; 12654 goto rw_error;
12812 } 12655 }
12813 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_CONT__A, (ATV_TOP_CR_CONT_CR_P_BG | ATV_TOP_CR_CONT_CR_D_BG | ATV_TOP_CR_CONT_CR_I_BG), 0); 12656 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_CONT__A, (ATV_TOP_CR_CONT_CR_P_BG | ATV_TOP_CR_CONT_CR_D_BG | ATV_TOP_CR_CONT_CR_I_BG), 0);
12814 if (rc != 0) { 12657 if (rc != 0) {
12815 pr_err("error %d\n", rc); 12658 pr_err("error %d\n", rc);
12816 goto rw_error; 12659 goto rw_error;
12817 } 12660 }
12818 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_OVM_TH__A, ATV_TOP_CR_OVM_TH_BG, 0); 12661 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_OVM_TH__A, ATV_TOP_CR_OVM_TH_BG, 0);
12819 if (rc != 0) { 12662 if (rc != 0) {
12820 pr_err("error %d\n", rc); 12663 pr_err("error %d\n", rc);
12821 goto rw_error; 12664 goto rw_error;
12822 } 12665 }
12823 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_STD__A, (ATV_TOP_STD_MODE_BG | ATV_TOP_STD_VID_POL_BG), 0); 12666 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_STD__A, (ATV_TOP_STD_MODE_BG | ATV_TOP_STD_VID_POL_BG), 0);
12824 if (rc != 0) { 12667 if (rc != 0) {
12825 pr_err("error %d\n", rc); 12668 pr_err("error %d\n", rc);
12826 goto rw_error; 12669 goto rw_error;
12827 } 12670 }
12828 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AGC_MODE__A, (SCU_RAM_ATV_AGC_MODE_SIF_STD_SIF_AGC_FM | SCU_RAM_ATV_AGC_MODE_FAST_VAGC_EN_FAGC_ENABLE), 0); 12671 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AGC_MODE__A, (SCU_RAM_ATV_AGC_MODE_SIF_STD_SIF_AGC_FM | SCU_RAM_ATV_AGC_MODE_FAST_VAGC_EN_FAGC_ENABLE), 0);
12829 if (rc != 0) { 12672 if (rc != 0) {
12830 pr_err("error %d\n", rc); 12673 pr_err("error %d\n", rc);
12831 goto rw_error; 12674 goto rw_error;
12832 } 12675 }
12833 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_VID_GAIN_HI__A, 0x1000, 0); 12676 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_VID_GAIN_HI__A, 0x1000, 0);
12834 if (rc != 0) { 12677 if (rc != 0) {
12835 pr_err("error %d\n", rc); 12678 pr_err("error %d\n", rc);
12836 goto rw_error; 12679 goto rw_error;
12837 } 12680 }
12838 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_VID_GAIN_LO__A, 0x0000, 0); 12681 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_VID_GAIN_LO__A, 0x0000, 0);
12839 if (rc != 0) { 12682 if (rc != 0) {
12840 pr_err("error %d\n", rc); 12683 pr_err("error %d\n", rc);
12841 goto rw_error; 12684 goto rw_error;
12842 } 12685 }
12843 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AMS_MAX_REF__A, SCU_RAM_ATV_AMS_MAX_REF_AMS_MAX_REF_BG_MN, 0); 12686 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AMS_MAX_REF__A, SCU_RAM_ATV_AMS_MAX_REF_AMS_MAX_REF_BG_MN, 0);
12844 if (rc != 0) { 12687 if (rc != 0) {
12845 pr_err("error %d\n", rc); 12688 pr_err("error %d\n", rc);
12846 goto rw_error; 12689 goto rw_error;
@@ -12853,67 +12696,67 @@ trouble ?
12853 /* PAL/SECAM D/K */ 12696 /* PAL/SECAM D/K */
12854 cmd_param = SCU_RAM_ATV_STANDARD_STANDARD_DK; 12697 cmd_param = SCU_RAM_ATV_STANDARD_STANDARD_DK;
12855 12698
12856 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_LO_INCR__A, 2225, 0); 12699 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_LO_INCR__A, 2225, 0);
12857 if (rc != 0) { 12700 if (rc != 0) {
12858 pr_err("error %d\n", rc); 12701 pr_err("error %d\n", rc);
12859 goto rw_error; 12702 goto rw_error;
12860 } /* TODO check with IS */ 12703 } /* TODO check with IS */
12861 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_MIDTAP__A, IQM_CF_MIDTAP_RE__M, 0); 12704 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_MIDTAP__A, IQM_CF_MIDTAP_RE__M, 0);
12862 if (rc != 0) { 12705 if (rc != 0) {
12863 pr_err("error %d\n", rc); 12706 pr_err("error %d\n", rc);
12864 goto rw_error; 12707 goto rw_error;
12865 } 12708 }
12866 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_RE0__A, sizeof(dk_i_l_lp_taps_re), ((u8 *)dk_i_l_lp_taps_re), 0); 12709 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_RE0__A, sizeof(dk_i_l_lp_taps_re), ((u8 *)dk_i_l_lp_taps_re), 0);
12867 if (rc != 0) { 12710 if (rc != 0) {
12868 pr_err("error %d\n", rc); 12711 pr_err("error %d\n", rc);
12869 goto rw_error; 12712 goto rw_error;
12870 } 12713 }
12871 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_IM0__A, sizeof(dk_i_l_lp_taps_im), ((u8 *)dk_i_l_lp_taps_im), 0); 12714 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_IM0__A, sizeof(dk_i_l_lp_taps_im), ((u8 *)dk_i_l_lp_taps_im), 0);
12872 if (rc != 0) { 12715 if (rc != 0) {
12873 pr_err("error %d\n", rc); 12716 pr_err("error %d\n", rc);
12874 goto rw_error; 12717 goto rw_error;
12875 } 12718 }
12876 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_AMP_TH__A, ATV_TOP_CR_AMP_TH_DK, 0); 12719 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_AMP_TH__A, ATV_TOP_CR_AMP_TH_DK, 0);
12877 if (rc != 0) { 12720 if (rc != 0) {
12878 pr_err("error %d\n", rc); 12721 pr_err("error %d\n", rc);
12879 goto rw_error; 12722 goto rw_error;
12880 } 12723 }
12881 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_VID_AMP__A, ATV_TOP_VID_AMP_DK, 0); 12724 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_VID_AMP__A, ATV_TOP_VID_AMP_DK, 0);
12882 if (rc != 0) { 12725 if (rc != 0) {
12883 pr_err("error %d\n", rc); 12726 pr_err("error %d\n", rc);
12884 goto rw_error; 12727 goto rw_error;
12885 } 12728 }
12886 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_CONT__A, (ATV_TOP_CR_CONT_CR_P_DK | ATV_TOP_CR_CONT_CR_D_DK | ATV_TOP_CR_CONT_CR_I_DK), 0); 12729 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_CONT__A, (ATV_TOP_CR_CONT_CR_P_DK | ATV_TOP_CR_CONT_CR_D_DK | ATV_TOP_CR_CONT_CR_I_DK), 0);
12887 if (rc != 0) { 12730 if (rc != 0) {
12888 pr_err("error %d\n", rc); 12731 pr_err("error %d\n", rc);
12889 goto rw_error; 12732 goto rw_error;
12890 } 12733 }
12891 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_OVM_TH__A, ATV_TOP_CR_OVM_TH_DK, 0); 12734 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_OVM_TH__A, ATV_TOP_CR_OVM_TH_DK, 0);
12892 if (rc != 0) { 12735 if (rc != 0) {
12893 pr_err("error %d\n", rc); 12736 pr_err("error %d\n", rc);
12894 goto rw_error; 12737 goto rw_error;
12895 } 12738 }
12896 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_STD__A, (ATV_TOP_STD_MODE_DK | ATV_TOP_STD_VID_POL_DK), 0); 12739 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_STD__A, (ATV_TOP_STD_MODE_DK | ATV_TOP_STD_VID_POL_DK), 0);
12897 if (rc != 0) { 12740 if (rc != 0) {
12898 pr_err("error %d\n", rc); 12741 pr_err("error %d\n", rc);
12899 goto rw_error; 12742 goto rw_error;
12900 } 12743 }
12901 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AGC_MODE__A, (SCU_RAM_ATV_AGC_MODE_SIF_STD_SIF_AGC_FM | SCU_RAM_ATV_AGC_MODE_FAST_VAGC_EN_FAGC_ENABLE), 0); 12744 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AGC_MODE__A, (SCU_RAM_ATV_AGC_MODE_SIF_STD_SIF_AGC_FM | SCU_RAM_ATV_AGC_MODE_FAST_VAGC_EN_FAGC_ENABLE), 0);
12902 if (rc != 0) { 12745 if (rc != 0) {
12903 pr_err("error %d\n", rc); 12746 pr_err("error %d\n", rc);
12904 goto rw_error; 12747 goto rw_error;
12905 } 12748 }
12906 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_VID_GAIN_HI__A, 0x1000, 0); 12749 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_VID_GAIN_HI__A, 0x1000, 0);
12907 if (rc != 0) { 12750 if (rc != 0) {
12908 pr_err("error %d\n", rc); 12751 pr_err("error %d\n", rc);
12909 goto rw_error; 12752 goto rw_error;
12910 } 12753 }
12911 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_VID_GAIN_LO__A, 0x0000, 0); 12754 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_VID_GAIN_LO__A, 0x0000, 0);
12912 if (rc != 0) { 12755 if (rc != 0) {
12913 pr_err("error %d\n", rc); 12756 pr_err("error %d\n", rc);
12914 goto rw_error; 12757 goto rw_error;
12915 } 12758 }
12916 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AMS_MAX_REF__A, SCU_RAM_ATV_AMS_MAX_REF_AMS_MAX_REF_DK, 0); 12759 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AMS_MAX_REF__A, SCU_RAM_ATV_AMS_MAX_REF_AMS_MAX_REF_DK, 0);
12917 if (rc != 0) { 12760 if (rc != 0) {
12918 pr_err("error %d\n", rc); 12761 pr_err("error %d\n", rc);
12919 goto rw_error; 12762 goto rw_error;
@@ -12926,67 +12769,67 @@ trouble ?
12926 /* PAL/SECAM I */ 12769 /* PAL/SECAM I */
12927 cmd_param = SCU_RAM_ATV_STANDARD_STANDARD_I; 12770 cmd_param = SCU_RAM_ATV_STANDARD_STANDARD_I;
12928 12771
12929 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_LO_INCR__A, 2225, 0); 12772 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_LO_INCR__A, 2225, 0);
12930 if (rc != 0) { 12773 if (rc != 0) {
12931 pr_err("error %d\n", rc); 12774 pr_err("error %d\n", rc);
12932 goto rw_error; 12775 goto rw_error;
12933 } /* TODO check with IS */ 12776 } /* TODO check with IS */
12934 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_MIDTAP__A, IQM_CF_MIDTAP_RE__M, 0); 12777 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_MIDTAP__A, IQM_CF_MIDTAP_RE__M, 0);
12935 if (rc != 0) { 12778 if (rc != 0) {
12936 pr_err("error %d\n", rc); 12779 pr_err("error %d\n", rc);
12937 goto rw_error; 12780 goto rw_error;
12938 } 12781 }
12939 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_RE0__A, sizeof(dk_i_l_lp_taps_re), ((u8 *)dk_i_l_lp_taps_re), 0); 12782 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_RE0__A, sizeof(dk_i_l_lp_taps_re), ((u8 *)dk_i_l_lp_taps_re), 0);
12940 if (rc != 0) { 12783 if (rc != 0) {
12941 pr_err("error %d\n", rc); 12784 pr_err("error %d\n", rc);
12942 goto rw_error; 12785 goto rw_error;
12943 } 12786 }
12944 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_IM0__A, sizeof(dk_i_l_lp_taps_im), ((u8 *)dk_i_l_lp_taps_im), 0); 12787 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_IM0__A, sizeof(dk_i_l_lp_taps_im), ((u8 *)dk_i_l_lp_taps_im), 0);
12945 if (rc != 0) { 12788 if (rc != 0) {
12946 pr_err("error %d\n", rc); 12789 pr_err("error %d\n", rc);
12947 goto rw_error; 12790 goto rw_error;
12948 } 12791 }
12949 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_AMP_TH__A, ATV_TOP_CR_AMP_TH_I, 0); 12792 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_AMP_TH__A, ATV_TOP_CR_AMP_TH_I, 0);
12950 if (rc != 0) { 12793 if (rc != 0) {
12951 pr_err("error %d\n", rc); 12794 pr_err("error %d\n", rc);
12952 goto rw_error; 12795 goto rw_error;
12953 } 12796 }
12954 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_VID_AMP__A, ATV_TOP_VID_AMP_I, 0); 12797 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_VID_AMP__A, ATV_TOP_VID_AMP_I, 0);
12955 if (rc != 0) { 12798 if (rc != 0) {
12956 pr_err("error %d\n", rc); 12799 pr_err("error %d\n", rc);
12957 goto rw_error; 12800 goto rw_error;
12958 } 12801 }
12959 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_CONT__A, (ATV_TOP_CR_CONT_CR_P_I | ATV_TOP_CR_CONT_CR_D_I | ATV_TOP_CR_CONT_CR_I_I), 0); 12802 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_CONT__A, (ATV_TOP_CR_CONT_CR_P_I | ATV_TOP_CR_CONT_CR_D_I | ATV_TOP_CR_CONT_CR_I_I), 0);
12960 if (rc != 0) { 12803 if (rc != 0) {
12961 pr_err("error %d\n", rc); 12804 pr_err("error %d\n", rc);
12962 goto rw_error; 12805 goto rw_error;
12963 } 12806 }
12964 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_OVM_TH__A, ATV_TOP_CR_OVM_TH_I, 0); 12807 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_OVM_TH__A, ATV_TOP_CR_OVM_TH_I, 0);
12965 if (rc != 0) { 12808 if (rc != 0) {
12966 pr_err("error %d\n", rc); 12809 pr_err("error %d\n", rc);
12967 goto rw_error; 12810 goto rw_error;
12968 } 12811 }
12969 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_STD__A, (ATV_TOP_STD_MODE_I | ATV_TOP_STD_VID_POL_I), 0); 12812 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_STD__A, (ATV_TOP_STD_MODE_I | ATV_TOP_STD_VID_POL_I), 0);
12970 if (rc != 0) { 12813 if (rc != 0) {
12971 pr_err("error %d\n", rc); 12814 pr_err("error %d\n", rc);
12972 goto rw_error; 12815 goto rw_error;
12973 } 12816 }
12974 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AGC_MODE__A, (SCU_RAM_ATV_AGC_MODE_SIF_STD_SIF_AGC_FM | SCU_RAM_ATV_AGC_MODE_FAST_VAGC_EN_FAGC_ENABLE), 0); 12817 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AGC_MODE__A, (SCU_RAM_ATV_AGC_MODE_SIF_STD_SIF_AGC_FM | SCU_RAM_ATV_AGC_MODE_FAST_VAGC_EN_FAGC_ENABLE), 0);
12975 if (rc != 0) { 12818 if (rc != 0) {
12976 pr_err("error %d\n", rc); 12819 pr_err("error %d\n", rc);
12977 goto rw_error; 12820 goto rw_error;
12978 } 12821 }
12979 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_VID_GAIN_HI__A, 0x1000, 0); 12822 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_VID_GAIN_HI__A, 0x1000, 0);
12980 if (rc != 0) { 12823 if (rc != 0) {
12981 pr_err("error %d\n", rc); 12824 pr_err("error %d\n", rc);
12982 goto rw_error; 12825 goto rw_error;
12983 } 12826 }
12984 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_VID_GAIN_LO__A, 0x0000, 0); 12827 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_VID_GAIN_LO__A, 0x0000, 0);
12985 if (rc != 0) { 12828 if (rc != 0) {
12986 pr_err("error %d\n", rc); 12829 pr_err("error %d\n", rc);
12987 goto rw_error; 12830 goto rw_error;
12988 } 12831 }
12989 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AMS_MAX_REF__A, SCU_RAM_ATV_AMS_MAX_REF_AMS_MAX_REF_I, 0); 12832 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AMS_MAX_REF__A, SCU_RAM_ATV_AMS_MAX_REF_AMS_MAX_REF_I, 0);
12990 if (rc != 0) { 12833 if (rc != 0) {
12991 pr_err("error %d\n", rc); 12834 pr_err("error %d\n", rc);
12992 goto rw_error; 12835 goto rw_error;
@@ -12999,67 +12842,67 @@ trouble ?
12999 /* PAL/SECAM L with negative modulation */ 12842 /* PAL/SECAM L with negative modulation */
13000 cmd_param = SCU_RAM_ATV_STANDARD_STANDARD_L; 12843 cmd_param = SCU_RAM_ATV_STANDARD_STANDARD_L;
13001 12844
13002 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_LO_INCR__A, 2225, 0); 12845 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_LO_INCR__A, 2225, 0);
13003 if (rc != 0) { 12846 if (rc != 0) {
13004 pr_err("error %d\n", rc); 12847 pr_err("error %d\n", rc);
13005 goto rw_error; 12848 goto rw_error;
13006 } /* TODO check with IS */ 12849 } /* TODO check with IS */
13007 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_VID_AMP__A, ATV_TOP_VID_AMP_L, 0); 12850 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_VID_AMP__A, ATV_TOP_VID_AMP_L, 0);
13008 if (rc != 0) { 12851 if (rc != 0) {
13009 pr_err("error %d\n", rc); 12852 pr_err("error %d\n", rc);
13010 goto rw_error; 12853 goto rw_error;
13011 } 12854 }
13012 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_MIDTAP__A, IQM_CF_MIDTAP_RE__M, 0); 12855 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_MIDTAP__A, IQM_CF_MIDTAP_RE__M, 0);
13013 if (rc != 0) { 12856 if (rc != 0) {
13014 pr_err("error %d\n", rc); 12857 pr_err("error %d\n", rc);
13015 goto rw_error; 12858 goto rw_error;
13016 } 12859 }
13017 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_RE0__A, sizeof(dk_i_l_lp_taps_re), ((u8 *)dk_i_l_lp_taps_re), 0); 12860 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_RE0__A, sizeof(dk_i_l_lp_taps_re), ((u8 *)dk_i_l_lp_taps_re), 0);
13018 if (rc != 0) { 12861 if (rc != 0) {
13019 pr_err("error %d\n", rc); 12862 pr_err("error %d\n", rc);
13020 goto rw_error; 12863 goto rw_error;
13021 } 12864 }
13022 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_IM0__A, sizeof(dk_i_l_lp_taps_im), ((u8 *)dk_i_l_lp_taps_im), 0); 12865 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_IM0__A, sizeof(dk_i_l_lp_taps_im), ((u8 *)dk_i_l_lp_taps_im), 0);
13023 if (rc != 0) { 12866 if (rc != 0) {
13024 pr_err("error %d\n", rc); 12867 pr_err("error %d\n", rc);
13025 goto rw_error; 12868 goto rw_error;
13026 } 12869 }
13027 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_AMP_TH__A, 0x2, 0); 12870 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_AMP_TH__A, 0x2, 0);
13028 if (rc != 0) { 12871 if (rc != 0) {
13029 pr_err("error %d\n", rc); 12872 pr_err("error %d\n", rc);
13030 goto rw_error; 12873 goto rw_error;
13031 } /* TODO check with IS */ 12874 } /* TODO check with IS */
13032 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_CONT__A, (ATV_TOP_CR_CONT_CR_P_L | ATV_TOP_CR_CONT_CR_D_L | ATV_TOP_CR_CONT_CR_I_L), 0); 12875 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_CONT__A, (ATV_TOP_CR_CONT_CR_P_L | ATV_TOP_CR_CONT_CR_D_L | ATV_TOP_CR_CONT_CR_I_L), 0);
13033 if (rc != 0) { 12876 if (rc != 0) {
13034 pr_err("error %d\n", rc); 12877 pr_err("error %d\n", rc);
13035 goto rw_error; 12878 goto rw_error;
13036 } 12879 }
13037 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_OVM_TH__A, ATV_TOP_CR_OVM_TH_L, 0); 12880 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_OVM_TH__A, ATV_TOP_CR_OVM_TH_L, 0);
13038 if (rc != 0) { 12881 if (rc != 0) {
13039 pr_err("error %d\n", rc); 12882 pr_err("error %d\n", rc);
13040 goto rw_error; 12883 goto rw_error;
13041 } 12884 }
13042 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_STD__A, (ATV_TOP_STD_MODE_L | ATV_TOP_STD_VID_POL_L), 0); 12885 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_STD__A, (ATV_TOP_STD_MODE_L | ATV_TOP_STD_VID_POL_L), 0);
13043 if (rc != 0) { 12886 if (rc != 0) {
13044 pr_err("error %d\n", rc); 12887 pr_err("error %d\n", rc);
13045 goto rw_error; 12888 goto rw_error;
13046 } 12889 }
13047 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AGC_MODE__A, (SCU_RAM_ATV_AGC_MODE_SIF_STD_SIF_AGC_AM | SCU_RAM_ATV_AGC_MODE_BP_EN_BPC_ENABLE | SCU_RAM_ATV_AGC_MODE_VAGC_VEL_AGC_SLOW), 0); 12890 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AGC_MODE__A, (SCU_RAM_ATV_AGC_MODE_SIF_STD_SIF_AGC_AM | SCU_RAM_ATV_AGC_MODE_BP_EN_BPC_ENABLE | SCU_RAM_ATV_AGC_MODE_VAGC_VEL_AGC_SLOW), 0);
13048 if (rc != 0) { 12891 if (rc != 0) {
13049 pr_err("error %d\n", rc); 12892 pr_err("error %d\n", rc);
13050 goto rw_error; 12893 goto rw_error;
13051 } 12894 }
13052 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_VID_GAIN_HI__A, 0x1000, 0); 12895 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_VID_GAIN_HI__A, 0x1000, 0);
13053 if (rc != 0) { 12896 if (rc != 0) {
13054 pr_err("error %d\n", rc); 12897 pr_err("error %d\n", rc);
13055 goto rw_error; 12898 goto rw_error;
13056 } 12899 }
13057 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_VID_GAIN_LO__A, 0x0000, 0); 12900 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_VID_GAIN_LO__A, 0x0000, 0);
13058 if (rc != 0) { 12901 if (rc != 0) {
13059 pr_err("error %d\n", rc); 12902 pr_err("error %d\n", rc);
13060 goto rw_error; 12903 goto rw_error;
13061 } 12904 }
13062 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AMS_MAX_REF__A, SCU_RAM_ATV_AMS_MAX_REF_AMS_MAX_REF_LLP, 0); 12905 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AMS_MAX_REF__A, SCU_RAM_ATV_AMS_MAX_REF_AMS_MAX_REF_LLP, 0);
13063 if (rc != 0) { 12906 if (rc != 0) {
13064 pr_err("error %d\n", rc); 12907 pr_err("error %d\n", rc);
13065 goto rw_error; 12908 goto rw_error;
@@ -13073,67 +12916,67 @@ trouble ?
13073 /* PAL/SECAM L with positive modulation */ 12916 /* PAL/SECAM L with positive modulation */
13074 cmd_param = SCU_RAM_ATV_STANDARD_STANDARD_LP; 12917 cmd_param = SCU_RAM_ATV_STANDARD_STANDARD_LP;
13075 12918
13076 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_VID_AMP__A, ATV_TOP_VID_AMP_LP, 0); 12919 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_VID_AMP__A, ATV_TOP_VID_AMP_LP, 0);
13077 if (rc != 0) { 12920 if (rc != 0) {
13078 pr_err("error %d\n", rc); 12921 pr_err("error %d\n", rc);
13079 goto rw_error; 12922 goto rw_error;
13080 } 12923 }
13081 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_LO_INCR__A, 2225, 0); 12924 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_LO_INCR__A, 2225, 0);
13082 if (rc != 0) { 12925 if (rc != 0) {
13083 pr_err("error %d\n", rc); 12926 pr_err("error %d\n", rc);
13084 goto rw_error; 12927 goto rw_error;
13085 } /* TODO check with IS */ 12928 } /* TODO check with IS */
13086 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_MIDTAP__A, IQM_CF_MIDTAP_RE__M, 0); 12929 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_MIDTAP__A, IQM_CF_MIDTAP_RE__M, 0);
13087 if (rc != 0) { 12930 if (rc != 0) {
13088 pr_err("error %d\n", rc); 12931 pr_err("error %d\n", rc);
13089 goto rw_error; 12932 goto rw_error;
13090 } 12933 }
13091 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_RE0__A, sizeof(dk_i_l_lp_taps_re), ((u8 *)dk_i_l_lp_taps_re), 0); 12934 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_RE0__A, sizeof(dk_i_l_lp_taps_re), ((u8 *)dk_i_l_lp_taps_re), 0);
13092 if (rc != 0) { 12935 if (rc != 0) {
13093 pr_err("error %d\n", rc); 12936 pr_err("error %d\n", rc);
13094 goto rw_error; 12937 goto rw_error;
13095 } 12938 }
13096 rc = DRXJ_DAP.write_block_func(dev_addr, IQM_CF_TAP_IM0__A, sizeof(dk_i_l_lp_taps_im), ((u8 *)dk_i_l_lp_taps_im), 0); 12939 rc = drxdap_fasi_write_block(dev_addr, IQM_CF_TAP_IM0__A, sizeof(dk_i_l_lp_taps_im), ((u8 *)dk_i_l_lp_taps_im), 0);
13097 if (rc != 0) { 12940 if (rc != 0) {
13098 pr_err("error %d\n", rc); 12941 pr_err("error %d\n", rc);
13099 goto rw_error; 12942 goto rw_error;
13100 } 12943 }
13101 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_AMP_TH__A, 0x2, 0); 12944 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_AMP_TH__A, 0x2, 0);
13102 if (rc != 0) { 12945 if (rc != 0) {
13103 pr_err("error %d\n", rc); 12946 pr_err("error %d\n", rc);
13104 goto rw_error; 12947 goto rw_error;
13105 } /* TODO check with IS */ 12948 } /* TODO check with IS */
13106 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_CONT__A, (ATV_TOP_CR_CONT_CR_P_LP | ATV_TOP_CR_CONT_CR_D_LP | ATV_TOP_CR_CONT_CR_I_LP), 0); 12949 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_CONT__A, (ATV_TOP_CR_CONT_CR_P_LP | ATV_TOP_CR_CONT_CR_D_LP | ATV_TOP_CR_CONT_CR_I_LP), 0);
13107 if (rc != 0) { 12950 if (rc != 0) {
13108 pr_err("error %d\n", rc); 12951 pr_err("error %d\n", rc);
13109 goto rw_error; 12952 goto rw_error;
13110 } 12953 }
13111 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_OVM_TH__A, ATV_TOP_CR_OVM_TH_LP, 0); 12954 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_OVM_TH__A, ATV_TOP_CR_OVM_TH_LP, 0);
13112 if (rc != 0) { 12955 if (rc != 0) {
13113 pr_err("error %d\n", rc); 12956 pr_err("error %d\n", rc);
13114 goto rw_error; 12957 goto rw_error;
13115 } 12958 }
13116 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_STD__A, (ATV_TOP_STD_MODE_LP | ATV_TOP_STD_VID_POL_LP), 0); 12959 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_STD__A, (ATV_TOP_STD_MODE_LP | ATV_TOP_STD_VID_POL_LP), 0);
13117 if (rc != 0) { 12960 if (rc != 0) {
13118 pr_err("error %d\n", rc); 12961 pr_err("error %d\n", rc);
13119 goto rw_error; 12962 goto rw_error;
13120 } 12963 }
13121 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AGC_MODE__A, (SCU_RAM_ATV_AGC_MODE_SIF_STD_SIF_AGC_AM | SCU_RAM_ATV_AGC_MODE_BP_EN_BPC_ENABLE | SCU_RAM_ATV_AGC_MODE_VAGC_VEL_AGC_SLOW), 0); 12964 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AGC_MODE__A, (SCU_RAM_ATV_AGC_MODE_SIF_STD_SIF_AGC_AM | SCU_RAM_ATV_AGC_MODE_BP_EN_BPC_ENABLE | SCU_RAM_ATV_AGC_MODE_VAGC_VEL_AGC_SLOW), 0);
13122 if (rc != 0) { 12965 if (rc != 0) {
13123 pr_err("error %d\n", rc); 12966 pr_err("error %d\n", rc);
13124 goto rw_error; 12967 goto rw_error;
13125 } 12968 }
13126 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_VID_GAIN_HI__A, 0x1000, 0); 12969 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_VID_GAIN_HI__A, 0x1000, 0);
13127 if (rc != 0) { 12970 if (rc != 0) {
13128 pr_err("error %d\n", rc); 12971 pr_err("error %d\n", rc);
13129 goto rw_error; 12972 goto rw_error;
13130 } 12973 }
13131 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_VID_GAIN_LO__A, 0x0000, 0); 12974 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_VID_GAIN_LO__A, 0x0000, 0);
13132 if (rc != 0) { 12975 if (rc != 0) {
13133 pr_err("error %d\n", rc); 12976 pr_err("error %d\n", rc);
13134 goto rw_error; 12977 goto rw_error;
13135 } 12978 }
13136 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AMS_MAX_REF__A, SCU_RAM_ATV_AMS_MAX_REF_AMS_MAX_REF_LLP, 0); 12979 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AMS_MAX_REF__A, SCU_RAM_ATV_AMS_MAX_REF_AMS_MAX_REF_LLP, 0);
13137 if (rc != 0) { 12980 if (rc != 0) {
13138 pr_err("error %d\n", rc); 12981 pr_err("error %d\n", rc);
13139 goto rw_error; 12982 goto rw_error;
@@ -13149,29 +12992,29 @@ trouble ?
13149 12992
13150 /* Common initializations FM & NTSC & B/G & D/K & I & L & LP */ 12993 /* Common initializations FM & NTSC & B/G & D/K & I & L & LP */
13151 if (!ext_attr->has_lna) { 12994 if (!ext_attr->has_lna) {
13152 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_AMUX__A, 0x01, 0); 12995 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_AMUX__A, 0x01, 0);
13153 if (rc != 0) { 12996 if (rc != 0) {
13154 pr_err("error %d\n", rc); 12997 pr_err("error %d\n", rc);
13155 goto rw_error; 12998 goto rw_error;
13156 } 12999 }
13157 } 13000 }
13158 13001
13159 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_STANDARD__A, 0x002, 0); 13002 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_STANDARD__A, 0x002, 0);
13160 if (rc != 0) { 13003 if (rc != 0) {
13161 pr_err("error %d\n", rc); 13004 pr_err("error %d\n", rc);
13162 goto rw_error; 13005 goto rw_error;
13163 } 13006 }
13164 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_CLP_LEN__A, IQM_AF_CLP_LEN_ATV, 0); 13007 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_CLP_LEN__A, IQM_AF_CLP_LEN_ATV, 0);
13165 if (rc != 0) { 13008 if (rc != 0) {
13166 pr_err("error %d\n", rc); 13009 pr_err("error %d\n", rc);
13167 goto rw_error; 13010 goto rw_error;
13168 } 13011 }
13169 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_CLP_TH__A, IQM_AF_CLP_TH_ATV, 0); 13012 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_CLP_TH__A, IQM_AF_CLP_TH_ATV, 0);
13170 if (rc != 0) { 13013 if (rc != 0) {
13171 pr_err("error %d\n", rc); 13014 pr_err("error %d\n", rc);
13172 goto rw_error; 13015 goto rw_error;
13173 } 13016 }
13174 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_SNS_LEN__A, IQM_AF_SNS_LEN_ATV, 0); 13017 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_SNS_LEN__A, IQM_AF_SNS_LEN_ATV, 0);
13175 if (rc != 0) { 13018 if (rc != 0) {
13176 pr_err("error %d\n", rc); 13019 pr_err("error %d\n", rc);
13177 goto rw_error; 13020 goto rw_error;
@@ -13181,134 +13024,134 @@ trouble ?
13181 pr_err("error %d\n", rc); 13024 pr_err("error %d\n", rc);
13182 goto rw_error; 13025 goto rw_error;
13183 } 13026 }
13184 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_AGC_IF__A, 10248, 0); 13027 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_AGC_IF__A, 10248, 0);
13185 if (rc != 0) { 13028 if (rc != 0) {
13186 pr_err("error %d\n", rc); 13029 pr_err("error %d\n", rc);
13187 goto rw_error; 13030 goto rw_error;
13188 } 13031 }
13189 13032
13190 ext_attr->iqm_rc_rate_ofs = 0x00200000L; 13033 ext_attr->iqm_rc_rate_ofs = 0x00200000L;
13191 rc = DRXJ_DAP.write_reg32func(dev_addr, IQM_RC_RATE_OFS_LO__A, ext_attr->iqm_rc_rate_ofs, 0); 13034 rc = drxdap_fasi_write_reg32(dev_addr, IQM_RC_RATE_OFS_LO__A, ext_attr->iqm_rc_rate_ofs, 0);
13192 if (rc != 0) { 13035 if (rc != 0) {
13193 pr_err("error %d\n", rc); 13036 pr_err("error %d\n", rc);
13194 goto rw_error; 13037 goto rw_error;
13195 } 13038 }
13196 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RC_ADJ_SEL__A, IQM_RC_ADJ_SEL_B_OFF, 0); 13039 rc = drxj_dap_write_reg16(dev_addr, IQM_RC_ADJ_SEL__A, IQM_RC_ADJ_SEL_B_OFF, 0);
13197 if (rc != 0) { 13040 if (rc != 0) {
13198 pr_err("error %d\n", rc); 13041 pr_err("error %d\n", rc);
13199 goto rw_error; 13042 goto rw_error;
13200 } 13043 }
13201 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RC_STRETCH__A, IQM_RC_STRETCH_ATV, 0); 13044 rc = drxj_dap_write_reg16(dev_addr, IQM_RC_STRETCH__A, IQM_RC_STRETCH_ATV, 0);
13202 if (rc != 0) { 13045 if (rc != 0) {
13203 pr_err("error %d\n", rc); 13046 pr_err("error %d\n", rc);
13204 goto rw_error; 13047 goto rw_error;
13205 } 13048 }
13206 13049
13207 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_ACTIVE__A, IQM_RT_ACTIVE_ACTIVE_RT_ATV_FCR_ON | IQM_RT_ACTIVE_ACTIVE_CR_ATV_CR_ON, 0); 13050 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_ACTIVE__A, IQM_RT_ACTIVE_ACTIVE_RT_ATV_FCR_ON | IQM_RT_ACTIVE_ACTIVE_CR_ATV_CR_ON, 0);
13208 if (rc != 0) { 13051 if (rc != 0) {
13209 pr_err("error %d\n", rc); 13052 pr_err("error %d\n", rc);
13210 goto rw_error; 13053 goto rw_error;
13211 } 13054 }
13212 13055
13213 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_OUT_ENA__A, IQM_CF_OUT_ENA_ATV__M, 0); 13056 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_OUT_ENA__A, IQM_CF_OUT_ENA_ATV__M, 0);
13214 if (rc != 0) { 13057 if (rc != 0) {
13215 pr_err("error %d\n", rc); 13058 pr_err("error %d\n", rc);
13216 goto rw_error; 13059 goto rw_error;
13217 } 13060 }
13218 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_CF_SYMMETRIC__A, IQM_CF_SYMMETRIC_IM__M, 0); 13061 rc = drxj_dap_write_reg16(dev_addr, IQM_CF_SYMMETRIC__A, IQM_CF_SYMMETRIC_IM__M, 0);
13219 if (rc != 0) { 13062 if (rc != 0) {
13220 pr_err("error %d\n", rc); 13063 pr_err("error %d\n", rc);
13221 goto rw_error; 13064 goto rw_error;
13222 } 13065 }
13223 /* default: SIF in standby */ 13066 /* default: SIF in standby */
13224 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_SYNC_SLICE__A, ATV_TOP_SYNC_SLICE_MN, 0); 13067 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_SYNC_SLICE__A, ATV_TOP_SYNC_SLICE_MN, 0);
13225 if (rc != 0) { 13068 if (rc != 0) {
13226 pr_err("error %d\n", rc); 13069 pr_err("error %d\n", rc);
13227 goto rw_error; 13070 goto rw_error;
13228 } 13071 }
13229 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_MOD_ACCU__A, ATV_TOP_MOD_ACCU__PRE, 0); 13072 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_MOD_ACCU__A, ATV_TOP_MOD_ACCU__PRE, 0);
13230 if (rc != 0) { 13073 if (rc != 0) {
13231 pr_err("error %d\n", rc); 13074 pr_err("error %d\n", rc);
13232 goto rw_error; 13075 goto rw_error;
13233 } 13076 }
13234 13077
13235 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_SIF_GAIN__A, 0x080, 0); 13078 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_SIF_GAIN__A, 0x080, 0);
13236 if (rc != 0) { 13079 if (rc != 0) {
13237 pr_err("error %d\n", rc); 13080 pr_err("error %d\n", rc);
13238 goto rw_error; 13081 goto rw_error;
13239 } 13082 }
13240 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_FAGC_TH_RED__A, 10, 0); 13083 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_FAGC_TH_RED__A, 10, 0);
13241 if (rc != 0) { 13084 if (rc != 0) {
13242 pr_err("error %d\n", rc); 13085 pr_err("error %d\n", rc);
13243 goto rw_error; 13086 goto rw_error;
13244 } 13087 }
13245 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AAGC_CNT__A, 7, 0); 13088 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AAGC_CNT__A, 7, 0);
13246 if (rc != 0) { 13089 if (rc != 0) {
13247 pr_err("error %d\n", rc); 13090 pr_err("error %d\n", rc);
13248 goto rw_error; 13091 goto rw_error;
13249 } 13092 }
13250 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_NAGC_KI_MIN__A, 0x0225, 0); 13093 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_NAGC_KI_MIN__A, 0x0225, 0);
13251 if (rc != 0) { 13094 if (rc != 0) {
13252 pr_err("error %d\n", rc); 13095 pr_err("error %d\n", rc);
13253 goto rw_error; 13096 goto rw_error;
13254 } 13097 }
13255 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_NAGC_KI_MAX__A, 0x0547, 0); 13098 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_NAGC_KI_MAX__A, 0x0547, 0);
13256 if (rc != 0) { 13099 if (rc != 0) {
13257 pr_err("error %d\n", rc); 13100 pr_err("error %d\n", rc);
13258 goto rw_error; 13101 goto rw_error;
13259 } 13102 }
13260 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_KI_CHANGE_TH__A, 20, 0); 13103 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_KI_CHANGE_TH__A, 20, 0);
13261 if (rc != 0) { 13104 if (rc != 0) {
13262 pr_err("error %d\n", rc); 13105 pr_err("error %d\n", rc);
13263 goto rw_error; 13106 goto rw_error;
13264 } 13107 }
13265 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_LOCK__A, 0, 0); 13108 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_LOCK__A, 0, 0);
13266 if (rc != 0) { 13109 if (rc != 0) {
13267 pr_err("error %d\n", rc); 13110 pr_err("error %d\n", rc);
13268 goto rw_error; 13111 goto rw_error;
13269 } 13112 }
13270 13113
13271 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_RT_DELAY__A, IQM_RT_DELAY__PRE, 0); 13114 rc = drxj_dap_write_reg16(dev_addr, IQM_RT_DELAY__A, IQM_RT_DELAY__PRE, 0);
13272 if (rc != 0) { 13115 if (rc != 0) {
13273 pr_err("error %d\n", rc); 13116 pr_err("error %d\n", rc);
13274 goto rw_error; 13117 goto rw_error;
13275 } 13118 }
13276 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_BPC_KI_MIN__A, 531, 0); 13119 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_BPC_KI_MIN__A, 531, 0);
13277 if (rc != 0) { 13120 if (rc != 0) {
13278 pr_err("error %d\n", rc); 13121 pr_err("error %d\n", rc);
13279 goto rw_error; 13122 goto rw_error;
13280 } 13123 }
13281 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_PAGC_KI_MIN__A, 1061, 0); 13124 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_PAGC_KI_MIN__A, 1061, 0);
13282 if (rc != 0) { 13125 if (rc != 0) {
13283 pr_err("error %d\n", rc); 13126 pr_err("error %d\n", rc);
13284 goto rw_error; 13127 goto rw_error;
13285 } 13128 }
13286 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_BP_REF_MIN__A, 100, 0); 13129 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_BP_REF_MIN__A, 100, 0);
13287 if (rc != 0) { 13130 if (rc != 0) {
13288 pr_err("error %d\n", rc); 13131 pr_err("error %d\n", rc);
13289 goto rw_error; 13132 goto rw_error;
13290 } 13133 }
13291 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_BP_REF_MAX__A, 260, 0); 13134 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_BP_REF_MAX__A, 260, 0);
13292 if (rc != 0) { 13135 if (rc != 0) {
13293 pr_err("error %d\n", rc); 13136 pr_err("error %d\n", rc);
13294 goto rw_error; 13137 goto rw_error;
13295 } 13138 }
13296 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_BP_LVL__A, 0, 0); 13139 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_BP_LVL__A, 0, 0);
13297 if (rc != 0) { 13140 if (rc != 0) {
13298 pr_err("error %d\n", rc); 13141 pr_err("error %d\n", rc);
13299 goto rw_error; 13142 goto rw_error;
13300 } 13143 }
13301 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AMS_MAX__A, 0, 0); 13144 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AMS_MAX__A, 0, 0);
13302 if (rc != 0) { 13145 if (rc != 0) {
13303 pr_err("error %d\n", rc); 13146 pr_err("error %d\n", rc);
13304 goto rw_error; 13147 goto rw_error;
13305 } 13148 }
13306 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_AMS_MIN__A, 2047, 0); 13149 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_AMS_MIN__A, 2047, 0);
13307 if (rc != 0) { 13150 if (rc != 0) {
13308 pr_err("error %d\n", rc); 13151 pr_err("error %d\n", rc);
13309 goto rw_error; 13152 goto rw_error;
13310 } 13153 }
13311 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_GPIO__A, 0, 0); 13154 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_GPIO__A, 0, 0);
13312 if (rc != 0) { 13155 if (rc != 0) {
13313 pr_err("error %d\n", rc); 13156 pr_err("error %d\n", rc);
13314 goto rw_error; 13157 goto rw_error;
@@ -13358,18 +13201,18 @@ trouble ?
13358 13201
13359 /* turn the analog work around on/off (must after set_env b/c it is set in mc) */ 13202 /* turn the analog work around on/off (must after set_env b/c it is set in mc) */
13360 if (ext_attr->mfx == 0x03) { 13203 if (ext_attr->mfx == 0x03) {
13361 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_ENABLE_IIR_WA__A, 0, 0); 13204 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_ENABLE_IIR_WA__A, 0, 0);
13362 if (rc != 0) { 13205 if (rc != 0) {
13363 pr_err("error %d\n", rc); 13206 pr_err("error %d\n", rc);
13364 goto rw_error; 13207 goto rw_error;
13365 } 13208 }
13366 } else { 13209 } else {
13367 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_ENABLE_IIR_WA__A, 1, 0); 13210 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_ENABLE_IIR_WA__A, 1, 0);
13368 if (rc != 0) { 13211 if (rc != 0) {
13369 pr_err("error %d\n", rc); 13212 pr_err("error %d\n", rc);
13370 goto rw_error; 13213 goto rw_error;
13371 } 13214 }
13372 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ATV_IIR_CRIT__A, 225, 0); 13215 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ATV_IIR_CRIT__A, 225, 0);
13373 if (rc != 0) { 13216 if (rc != 0) {
13374 pr_err("error %d\n", rc); 13217 pr_err("error %d\n", rc);
13375 goto rw_error; 13218 goto rw_error;
@@ -13428,7 +13271,7 @@ set_atv_channel(struct drx_demod_instance *demod,
13428 pr_err("error %d\n", rc); 13271 pr_err("error %d\n", rc);
13429 goto rw_error; 13272 goto rw_error;
13430 } 13273 }
13431 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_CR_FREQ__A, ATV_TOP_CR_FREQ__PRE, 0); 13274 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_CR_FREQ__A, ATV_TOP_CR_FREQ__PRE, 0);
13432 if (rc != 0) { 13275 if (rc != 0) {
13433 pr_err("error %d\n", rc); 13276 pr_err("error %d\n", rc);
13434 goto rw_error; 13277 goto rw_error;
@@ -13493,7 +13336,7 @@ get_atv_channel(struct drx_demod_instance *demod,
13493 u16 measured_offset = 0; 13336 u16 measured_offset = 0;
13494 13337
13495 /* get measured frequency offset */ 13338 /* get measured frequency offset */
13496 rc = DRXJ_DAP.read_reg16func(dev_addr, ATV_TOP_CR_FREQ__A, &measured_offset, 0); 13339 rc = drxj_dap_read_reg16(dev_addr, ATV_TOP_CR_FREQ__A, &measured_offset, 0);
13497 if (rc != 0) { 13340 if (rc != 0) {
13498 pr_err("error %d\n", rc); 13341 pr_err("error %d\n", rc);
13499 goto rw_error; 13342 goto rw_error;
@@ -13510,7 +13353,7 @@ get_atv_channel(struct drx_demod_instance *demod,
13510 u16 measured_offset = 0; 13353 u16 measured_offset = 0;
13511 13354
13512 /* get measured frequency offset */ 13355 /* get measured frequency offset */
13513 rc = DRXJ_DAP.read_reg16func(dev_addr, ATV_TOP_CR_FREQ__A, &measured_offset, 0); 13356 rc = drxj_dap_read_reg16(dev_addr, ATV_TOP_CR_FREQ__A, &measured_offset, 0);
13514 if (rc != 0) { 13357 if (rc != 0) {
13515 pr_err("error %d\n", rc); 13358 pr_err("error %d\n", rc);
13516 goto rw_error; 13359 goto rw_error;
@@ -13620,12 +13463,12 @@ get_atv_sig_strength(struct drx_demod_instance *demod, u16 *sig_strength)
13620 return -EIO; 13463 return -EIO;
13621 break; 13464 break;
13622 } 13465 }
13623 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_AGC_RF__A, &rf_curr_gain, 0); 13466 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_AGC_RF__A, &rf_curr_gain, 0);
13624 if (rc != 0) { 13467 if (rc != 0) {
13625 pr_err("error %d\n", rc); 13468 pr_err("error %d\n", rc);
13626 goto rw_error; 13469 goto rw_error;
13627 } 13470 }
13628 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_AF_AGC_IF__A, &if_curr_gain, 0); 13471 rc = drxj_dap_read_reg16(dev_addr, IQM_AF_AGC_IF__A, &if_curr_gain, 0);
13629 if (rc != 0) { 13472 if (rc != 0) {
13630 pr_err("error %d\n", rc); 13473 pr_err("error %d\n", rc);
13631 goto rw_error; 13474 goto rw_error;
@@ -13753,18 +13596,18 @@ static int power_up_aud(struct drx_demod_instance *demod, bool set_standard)
13753 13596
13754 dev_addr = demod->my_i2c_dev_addr; 13597 dev_addr = demod->my_i2c_dev_addr;
13755 13598
13756 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_TOP_COMM_EXEC__A, AUD_TOP_COMM_EXEC_ACTIVE, 0); 13599 rc = drxj_dap_write_reg16(dev_addr, AUD_TOP_COMM_EXEC__A, AUD_TOP_COMM_EXEC_ACTIVE, 0);
13757 if (rc != 0) { 13600 if (rc != 0) {
13758 pr_err("error %d\n", rc); 13601 pr_err("error %d\n", rc);
13759 goto rw_error; 13602 goto rw_error;
13760 } 13603 }
13761 /* setup TR interface: R/W mode, fifosize=8 */ 13604 /* setup TR interface: R/W mode, fifosize=8 */
13762 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_TOP_TR_MDE__A, 8, 0); 13605 rc = drxj_dap_write_reg16(dev_addr, AUD_TOP_TR_MDE__A, 8, 0);
13763 if (rc != 0) { 13606 if (rc != 0) {
13764 pr_err("error %d\n", rc); 13607 pr_err("error %d\n", rc);
13765 goto rw_error; 13608 goto rw_error;
13766 } 13609 }
13767 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_COMM_EXEC__A, AUD_COMM_EXEC_ACTIVE, 0); 13610 rc = drxj_dap_write_reg16(dev_addr, AUD_COMM_EXEC__A, AUD_COMM_EXEC_ACTIVE, 0);
13768 if (rc != 0) { 13611 if (rc != 0) {
13769 pr_err("error %d\n", rc); 13612 pr_err("error %d\n", rc);
13770 goto rw_error; 13613 goto rw_error;
@@ -13801,7 +13644,7 @@ static int power_down_aud(struct drx_demod_instance *demod)
13801 dev_addr = (struct i2c_device_addr *)demod->my_i2c_dev_addr; 13644 dev_addr = (struct i2c_device_addr *)demod->my_i2c_dev_addr;
13802 ext_attr = (struct drxj_data *) demod->my_ext_attr; 13645 ext_attr = (struct drxj_data *) demod->my_ext_attr;
13803 13646
13804 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_COMM_EXEC__A, AUD_COMM_EXEC_STOP, 0); 13647 rc = drxj_dap_write_reg16(dev_addr, AUD_COMM_EXEC__A, AUD_COMM_EXEC_STOP, 0);
13805 if (rc != 0) { 13648 if (rc != 0) {
13806 pr_err("error %d\n", rc); 13649 pr_err("error %d\n", rc);
13807 goto rw_error; 13650 goto rw_error;
@@ -13850,12 +13693,12 @@ static int aud_get_modus(struct drx_demod_instance *demod, u16 *modus)
13850 } 13693 }
13851 13694
13852 /* Modus register is combined in to RAM location */ 13695 /* Modus register is combined in to RAM location */
13853 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_MODUS_HI__A, &r_modus_hi, 0); 13696 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RAM_MODUS_HI__A, &r_modus_hi, 0);
13854 if (rc != 0) { 13697 if (rc != 0) {
13855 pr_err("error %d\n", rc); 13698 pr_err("error %d\n", rc);
13856 goto rw_error; 13699 goto rw_error;
13857 } 13700 }
13858 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_MODUS_LO__A, &r_modus_lo, 0); 13701 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RAM_MODUS_LO__A, &r_modus_lo, 0);
13859 if (rc != 0) { 13702 if (rc != 0) {
13860 pr_err("error %d\n", rc); 13703 pr_err("error %d\n", rc);
13861 goto rw_error; 13704 goto rw_error;
@@ -13909,7 +13752,7 @@ aud_ctrl_get_cfg_rds(struct drx_demod_instance *demod, struct drx_cfg_aud_rds *s
13909 13752
13910 status->valid = false; 13753 status->valid = false;
13911 13754
13912 rc = DRXJ_DAP.read_reg16func(addr, AUD_DEM_RD_RDS_ARRAY_CNT__A, &r_rds_array_cnt_init, 0); 13755 rc = drxj_dap_read_reg16(addr, AUD_DEM_RD_RDS_ARRAY_CNT__A, &r_rds_array_cnt_init, 0);
13913 if (rc != 0) { 13756 if (rc != 0) {
13914 pr_err("error %d\n", rc); 13757 pr_err("error %d\n", rc);
13915 goto rw_error; 13758 goto rw_error;
@@ -13933,7 +13776,7 @@ aud_ctrl_get_cfg_rds(struct drx_demod_instance *demod, struct drx_cfg_aud_rds *s
13933 /* new data */ 13776 /* new data */
13934 /* read the data */ 13777 /* read the data */
13935 for (rds_data_cnt = 0; rds_data_cnt < AUD_RDS_ARRAY_SIZE; rds_data_cnt++) { 13778 for (rds_data_cnt = 0; rds_data_cnt < AUD_RDS_ARRAY_SIZE; rds_data_cnt++) {
13936 rc = DRXJ_DAP.read_reg16func(addr, AUD_DEM_RD_RDS_DATA__A, &r_rds_data, 0); 13779 rc = drxj_dap_read_reg16(addr, AUD_DEM_RD_RDS_DATA__A, &r_rds_data, 0);
13937 if (rc != 0) { 13780 if (rc != 0) {
13938 pr_err("error %d\n", rc); 13781 pr_err("error %d\n", rc);
13939 goto rw_error; 13782 goto rw_error;
@@ -13941,7 +13784,7 @@ aud_ctrl_get_cfg_rds(struct drx_demod_instance *demod, struct drx_cfg_aud_rds *s
13941 status->data[rds_data_cnt] = r_rds_data; 13784 status->data[rds_data_cnt] = r_rds_data;
13942 } 13785 }
13943 13786
13944 rc = DRXJ_DAP.read_reg16func(addr, AUD_DEM_RD_RDS_ARRAY_CNT__A, &r_rds_array_cnt_check, 0); 13787 rc = drxj_dap_read_reg16(addr, AUD_DEM_RD_RDS_ARRAY_CNT__A, &r_rds_array_cnt_check, 0);
13945 if (rc != 0) { 13788 if (rc != 0) {
13946 pr_err("error %d\n", rc); 13789 pr_err("error %d\n", rc);
13947 goto rw_error; 13790 goto rw_error;
@@ -13997,7 +13840,7 @@ aud_ctrl_get_carrier_detect_status(struct drx_demod_instance *demod, struct drx_
13997 status->stereo = false; 13840 status->stereo = false;
13998 13841
13999 /* read stereo sound mode indication */ 13842 /* read stereo sound mode indication */
14000 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RD_STATUS__A, &r_data, 0); 13843 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RD_STATUS__A, &r_data, 0);
14001 if (rc != 0) { 13844 if (rc != 0) {
14002 pr_err("error %d\n", rc); 13845 pr_err("error %d\n", rc);
14003 goto rw_error; 13846 goto rw_error;
@@ -14072,7 +13915,7 @@ aud_ctrl_get_status(struct drx_demod_instance *demod, struct drx_aud_status *sta
14072 status->rds = ext_attr->aud_data.rds_data_present; 13915 status->rds = ext_attr->aud_data.rds_data_present;
14073 13916
14074 /* fm_ident */ 13917 /* fm_ident */
14075 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_RD_FM_IDENT_VALUE__A, &r_data, 0); 13918 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_RD_FM_IDENT_VALUE__A, &r_data, 0);
14076 if (rc != 0) { 13919 if (rc != 0) {
14077 pr_err("error %d\n", rc); 13920 pr_err("error %d\n", rc);
14078 goto rw_error; 13921 goto rw_error;
@@ -14122,7 +13965,7 @@ aud_ctrl_get_cfg_volume(struct drx_demod_instance *demod, struct drx_cfg_aud_vol
14122 13965
14123 /* volume */ 13966 /* volume */
14124 volume->mute = ext_attr->aud_data.volume.mute; 13967 volume->mute = ext_attr->aud_data.volume.mute;
14125 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_WR_VOLUME__A, &r_volume, 0); 13968 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_WR_VOLUME__A, &r_volume, 0);
14126 if (rc != 0) { 13969 if (rc != 0) {
14127 pr_err("error %d\n", rc); 13970 pr_err("error %d\n", rc);
14128 goto rw_error; 13971 goto rw_error;
@@ -14142,7 +13985,7 @@ aud_ctrl_get_cfg_volume(struct drx_demod_instance *demod, struct drx_cfg_aud_vol
14142 } 13985 }
14143 13986
14144 /* automatic volume control */ 13987 /* automatic volume control */
14145 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_WR_AVC__A, &r_avc, 0); 13988 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_WR_AVC__A, &r_avc, 0);
14146 if (rc != 0) { 13989 if (rc != 0) {
14147 pr_err("error %d\n", rc); 13990 pr_err("error %d\n", rc);
14148 goto rw_error; 13991 goto rw_error;
@@ -14213,7 +14056,7 @@ aud_ctrl_get_cfg_volume(struct drx_demod_instance *demod, struct drx_cfg_aud_vol
14213 14056
14214 /* QP vaues */ 14057 /* QP vaues */
14215 /* left carrier */ 14058 /* left carrier */
14216 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_RD_QPEAK_L__A, &r_strength_left, 0); 14059 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_RD_QPEAK_L__A, &r_strength_left, 0);
14217 if (rc != 0) { 14060 if (rc != 0) {
14218 pr_err("error %d\n", rc); 14061 pr_err("error %d\n", rc);
14219 goto rw_error; 14062 goto rw_error;
@@ -14222,7 +14065,7 @@ aud_ctrl_get_cfg_volume(struct drx_demod_instance *demod, struct drx_cfg_aud_vol
14222 AUD_CARRIER_STRENGTH_QP_0DB_LOG10T100) / 5; 14065 AUD_CARRIER_STRENGTH_QP_0DB_LOG10T100) / 5;
14223 14066
14224 /* right carrier */ 14067 /* right carrier */
14225 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_RD_QPEAK_R__A, &r_strength_right, 0); 14068 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_RD_QPEAK_R__A, &r_strength_right, 0);
14226 if (rc != 0) { 14069 if (rc != 0) {
14227 pr_err("error %d\n", rc); 14070 pr_err("error %d\n", rc);
14228 goto rw_error; 14071 goto rw_error;
@@ -14274,7 +14117,7 @@ aud_ctrl_set_cfg_volume(struct drx_demod_instance *demod, struct drx_cfg_aud_vol
14274 (volume->volume > AUD_VOLUME_DB_MAX)) 14117 (volume->volume > AUD_VOLUME_DB_MAX))
14275 return -EINVAL; 14118 return -EINVAL;
14276 14119
14277 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_WR_VOLUME__A, &w_volume, 0); 14120 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_WR_VOLUME__A, &w_volume, 0);
14278 if (rc != 0) { 14121 if (rc != 0) {
14279 pr_err("error %d\n", rc); 14122 pr_err("error %d\n", rc);
14280 goto rw_error; 14123 goto rw_error;
@@ -14287,14 +14130,14 @@ aud_ctrl_set_cfg_volume(struct drx_demod_instance *demod, struct drx_cfg_aud_vol
14287 else 14130 else
14288 w_volume |= (u16)((volume->volume + AUD_VOLUME_ZERO_DB) << AUD_DSP_WR_VOLUME_VOL_MAIN__B); 14131 w_volume |= (u16)((volume->volume + AUD_VOLUME_ZERO_DB) << AUD_DSP_WR_VOLUME_VOL_MAIN__B);
14289 14132
14290 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DSP_WR_VOLUME__A, w_volume, 0); 14133 rc = drxj_dap_write_reg16(dev_addr, AUD_DSP_WR_VOLUME__A, w_volume, 0);
14291 if (rc != 0) { 14134 if (rc != 0) {
14292 pr_err("error %d\n", rc); 14135 pr_err("error %d\n", rc);
14293 goto rw_error; 14136 goto rw_error;
14294 } 14137 }
14295 14138
14296 /* automatic volume control */ 14139 /* automatic volume control */
14297 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_WR_AVC__A, &w_avc, 0); 14140 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_WR_AVC__A, &w_avc, 0);
14298 if (rc != 0) { 14141 if (rc != 0) {
14299 pr_err("error %d\n", rc); 14142 pr_err("error %d\n", rc);
14300 goto rw_error; 14143 goto rw_error;
@@ -14368,7 +14211,7 @@ aud_ctrl_set_cfg_volume(struct drx_demod_instance *demod, struct drx_cfg_aud_vol
14368 w_avc &= (u16) ~AUD_DSP_WR_AVC_AVC_REF_LEV__M; 14211 w_avc &= (u16) ~AUD_DSP_WR_AVC_AVC_REF_LEV__M;
14369 w_avc |= (u16) (volume->avc_ref_level << AUD_DSP_WR_AVC_AVC_REF_LEV__B); 14212 w_avc |= (u16) (volume->avc_ref_level << AUD_DSP_WR_AVC_AVC_REF_LEV__B);
14370 14213
14371 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DSP_WR_AVC__A, w_avc, 0); 14214 rc = drxj_dap_write_reg16(dev_addr, AUD_DSP_WR_AVC__A, w_avc, 0);
14372 if (rc != 0) { 14215 if (rc != 0) {
14373 pr_err("error %d\n", rc); 14216 pr_err("error %d\n", rc);
14374 goto rw_error; 14217 goto rw_error;
@@ -14414,12 +14257,12 @@ aud_ctrl_get_cfg_output_i2s(struct drx_demod_instance *demod, struct drx_cfg_i2s
14414 ext_attr->aud_data.audio_is_active = true; 14257 ext_attr->aud_data.audio_is_active = true;
14415 } 14258 }
14416 14259
14417 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_I2S_CONFIG2__A, &w_i2s_config, 0); 14260 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RAM_I2S_CONFIG2__A, &w_i2s_config, 0);
14418 if (rc != 0) { 14261 if (rc != 0) {
14419 pr_err("error %d\n", rc); 14262 pr_err("error %d\n", rc);
14420 goto rw_error; 14263 goto rw_error;
14421 } 14264 }
14422 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_WR_I2S_OUT_FS__A, &r_i2s_freq, 0); 14265 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_WR_I2S_OUT_FS__A, &r_i2s_freq, 0);
14423 if (rc != 0) { 14266 if (rc != 0) {
14424 pr_err("error %d\n", rc); 14267 pr_err("error %d\n", rc);
14425 goto rw_error; 14268 goto rw_error;
@@ -14527,7 +14370,7 @@ aud_ctrl_set_cfg_output_i2s(struct drx_demod_instance *demod, struct drx_cfg_i2s
14527 ext_attr->aud_data.audio_is_active = true; 14370 ext_attr->aud_data.audio_is_active = true;
14528 } 14371 }
14529 14372
14530 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_I2S_CONFIG2__A, &w_i2s_config, 0); 14373 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RAM_I2S_CONFIG2__A, &w_i2s_config, 0);
14531 if (rc != 0) { 14374 if (rc != 0) {
14532 pr_err("error %d\n", rc); 14375 pr_err("error %d\n", rc);
14533 goto rw_error; 14376 goto rw_error;
@@ -14614,19 +14457,19 @@ aud_ctrl_set_cfg_output_i2s(struct drx_demod_instance *demod, struct drx_cfg_i2s
14614 if (output->word_length == DRX_I2S_WORDLENGTH_16) 14457 if (output->word_length == DRX_I2S_WORDLENGTH_16)
14615 w_i2s_freq *= 2; 14458 w_i2s_freq *= 2;
14616 14459
14617 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_I2S_CONFIG2__A, w_i2s_config, 0); 14460 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_I2S_CONFIG2__A, w_i2s_config, 0);
14618 if (rc != 0) { 14461 if (rc != 0) {
14619 pr_err("error %d\n", rc); 14462 pr_err("error %d\n", rc);
14620 goto rw_error; 14463 goto rw_error;
14621 } 14464 }
14622 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DSP_WR_I2S_OUT_FS__A, (u16)w_i2s_freq, 0); 14465 rc = drxj_dap_write_reg16(dev_addr, AUD_DSP_WR_I2S_OUT_FS__A, (u16)w_i2s_freq, 0);
14623 if (rc != 0) { 14466 if (rc != 0) {
14624 pr_err("error %d\n", rc); 14467 pr_err("error %d\n", rc);
14625 goto rw_error; 14468 goto rw_error;
14626 } 14469 }
14627 14470
14628 /* configure I2S output pads for master or slave mode */ 14471 /* configure I2S output pads for master or slave mode */
14629 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0); 14472 rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0);
14630 if (rc != 0) { 14473 if (rc != 0) {
14631 pr_err("error %d\n", rc); 14474 pr_err("error %d\n", rc);
14632 goto rw_error; 14475 goto rw_error;
@@ -14648,23 +14491,23 @@ aud_ctrl_set_cfg_output_i2s(struct drx_demod_instance *demod, struct drx_cfg_i2s
14648 SIO_PDR_I2S_WS_CFG_DRIVE__SLAVE; 14491 SIO_PDR_I2S_WS_CFG_DRIVE__SLAVE;
14649 } 14492 }
14650 14493
14651 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_I2S_DA_CFG__A, w_i2s_pads_data_da, 0); 14494 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_I2S_DA_CFG__A, w_i2s_pads_data_da, 0);
14652 if (rc != 0) { 14495 if (rc != 0) {
14653 pr_err("error %d\n", rc); 14496 pr_err("error %d\n", rc);
14654 goto rw_error; 14497 goto rw_error;
14655 } 14498 }
14656 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_I2S_CL_CFG__A, w_i2s_pads_data_cl, 0); 14499 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_I2S_CL_CFG__A, w_i2s_pads_data_cl, 0);
14657 if (rc != 0) { 14500 if (rc != 0) {
14658 pr_err("error %d\n", rc); 14501 pr_err("error %d\n", rc);
14659 goto rw_error; 14502 goto rw_error;
14660 } 14503 }
14661 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_I2S_WS_CFG__A, w_i2s_pads_data_ws, 0); 14504 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_I2S_WS_CFG__A, w_i2s_pads_data_ws, 0);
14662 if (rc != 0) { 14505 if (rc != 0) {
14663 pr_err("error %d\n", rc); 14506 pr_err("error %d\n", rc);
14664 goto rw_error; 14507 goto rw_error;
14665 } 14508 }
14666 14509
14667 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY__PRE, 0); 14510 rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY__PRE, 0);
14668 if (rc != 0) { 14511 if (rc != 0) {
14669 pr_err("error %d\n", rc); 14512 pr_err("error %d\n", rc);
14670 goto rw_error; 14513 goto rw_error;
@@ -14804,7 +14647,7 @@ aud_ctr_setl_cfg_auto_sound(struct drx_demod_instance *demod,
14804 } 14647 }
14805 14648
14806 if (w_modus != r_modus) { 14649 if (w_modus != r_modus) {
14807 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_MODUS__A, w_modus, 0); 14650 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_MODUS__A, w_modus, 0);
14808 if (rc != 0) { 14651 if (rc != 0) {
14809 pr_err("error %d\n", rc); 14652 pr_err("error %d\n", rc);
14810 goto rw_error; 14653 goto rw_error;
@@ -14852,17 +14695,17 @@ aud_ctrl_get_cfg_ass_thres(struct drx_demod_instance *demod, struct drx_cfg_aud_
14852 ext_attr->aud_data.audio_is_active = true; 14695 ext_attr->aud_data.audio_is_active = true;
14853 } 14696 }
14854 14697
14855 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_A2_THRSHLD__A, &thres_a2, 0); 14698 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RAM_A2_THRSHLD__A, &thres_a2, 0);
14856 if (rc != 0) { 14699 if (rc != 0) {
14857 pr_err("error %d\n", rc); 14700 pr_err("error %d\n", rc);
14858 goto rw_error; 14701 goto rw_error;
14859 } 14702 }
14860 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_BTSC_THRSHLD__A, &thres_btsc, 0); 14703 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RAM_BTSC_THRSHLD__A, &thres_btsc, 0);
14861 if (rc != 0) { 14704 if (rc != 0) {
14862 pr_err("error %d\n", rc); 14705 pr_err("error %d\n", rc);
14863 goto rw_error; 14706 goto rw_error;
14864 } 14707 }
14865 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_NICAM_THRSHLD__A, &thres_nicam, 0); 14708 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RAM_NICAM_THRSHLD__A, &thres_nicam, 0);
14866 if (rc != 0) { 14709 if (rc != 0) {
14867 pr_err("error %d\n", rc); 14710 pr_err("error %d\n", rc);
14868 goto rw_error; 14711 goto rw_error;
@@ -14907,17 +14750,17 @@ aud_ctrl_set_cfg_ass_thres(struct drx_demod_instance *demod, struct drx_cfg_aud_
14907 ext_attr->aud_data.audio_is_active = true; 14750 ext_attr->aud_data.audio_is_active = true;
14908 } 14751 }
14909 14752
14910 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_A2_THRSHLD__A, thres->a2, 0); 14753 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_A2_THRSHLD__A, thres->a2, 0);
14911 if (rc != 0) { 14754 if (rc != 0) {
14912 pr_err("error %d\n", rc); 14755 pr_err("error %d\n", rc);
14913 goto rw_error; 14756 goto rw_error;
14914 } 14757 }
14915 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_BTSC_THRSHLD__A, thres->btsc, 0); 14758 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_BTSC_THRSHLD__A, thres->btsc, 0);
14916 if (rc != 0) { 14759 if (rc != 0) {
14917 pr_err("error %d\n", rc); 14760 pr_err("error %d\n", rc);
14918 goto rw_error; 14761 goto rw_error;
14919 } 14762 }
14920 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_NICAM_THRSHLD__A, thres->nicam, 0); 14763 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_NICAM_THRSHLD__A, thres->nicam, 0);
14921 if (rc != 0) { 14764 if (rc != 0) {
14922 pr_err("error %d\n", rc); 14765 pr_err("error %d\n", rc);
14923 goto rw_error; 14766 goto rw_error;
@@ -15009,22 +14852,22 @@ aud_ctrl_get_cfg_carrier(struct drx_demod_instance *demod, struct drx_cfg_aud_ca
15009 } 14852 }
15010 14853
15011 /* frequency adjustment for primary & secondary audio channel */ 14854 /* frequency adjustment for primary & secondary audio channel */
15012 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_DCO_A_HI__A, &dco_a_hi, 0); 14855 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RAM_DCO_A_HI__A, &dco_a_hi, 0);
15013 if (rc != 0) { 14856 if (rc != 0) {
15014 pr_err("error %d\n", rc); 14857 pr_err("error %d\n", rc);
15015 goto rw_error; 14858 goto rw_error;
15016 } 14859 }
15017 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_DCO_A_LO__A, &dco_a_lo, 0); 14860 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RAM_DCO_A_LO__A, &dco_a_lo, 0);
15018 if (rc != 0) { 14861 if (rc != 0) {
15019 pr_err("error %d\n", rc); 14862 pr_err("error %d\n", rc);
15020 goto rw_error; 14863 goto rw_error;
15021 } 14864 }
15022 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_DCO_B_HI__A, &dco_b_hi, 0); 14865 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RAM_DCO_B_HI__A, &dco_b_hi, 0);
15023 if (rc != 0) { 14866 if (rc != 0) {
15024 pr_err("error %d\n", rc); 14867 pr_err("error %d\n", rc);
15025 goto rw_error; 14868 goto rw_error;
15026 } 14869 }
15027 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_DCO_B_LO__A, &dco_b_lo, 0); 14870 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RAM_DCO_B_LO__A, &dco_b_lo, 0);
15028 if (rc != 0) { 14871 if (rc != 0) {
15029 pr_err("error %d\n", rc); 14872 pr_err("error %d\n", rc);
15030 goto rw_error; 14873 goto rw_error;
@@ -15039,12 +14882,12 @@ aud_ctrl_get_cfg_carrier(struct drx_demod_instance *demod, struct drx_cfg_aud_ca
15039 14882
15040 /* DC level of the incoming FM signal on the primary 14883 /* DC level of the incoming FM signal on the primary
15041 & seconday sound channel */ 14884 & seconday sound channel */
15042 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_RD_FM_DC_LEVEL_A__A, &dc_lvl_a, 0); 14885 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_RD_FM_DC_LEVEL_A__A, &dc_lvl_a, 0);
15043 if (rc != 0) { 14886 if (rc != 0) {
15044 pr_err("error %d\n", rc); 14887 pr_err("error %d\n", rc);
15045 goto rw_error; 14888 goto rw_error;
15046 } 14889 }
15047 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_RD_FM_DC_LEVEL_B__A, &dc_lvl_b, 0); 14890 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_RD_FM_DC_LEVEL_B__A, &dc_lvl_b, 0);
15048 if (rc != 0) { 14891 if (rc != 0) {
15049 pr_err("error %d\n", rc); 14892 pr_err("error %d\n", rc);
15050 goto rw_error; 14893 goto rw_error;
@@ -15055,12 +14898,12 @@ aud_ctrl_get_cfg_carrier(struct drx_demod_instance *demod, struct drx_cfg_aud_ca
15055 carriers->b.shift = (DRX_U16TODRXFREQ(dc_lvl_b) / 322L); 14898 carriers->b.shift = (DRX_U16TODRXFREQ(dc_lvl_b) / 322L);
15056 14899
15057 /* Carrier detetcion threshold for primary & secondary channel */ 14900 /* Carrier detetcion threshold for primary & secondary channel */
15058 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_CM_A_THRSHLD__A, &cm_thes_a, 0); 14901 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RAM_CM_A_THRSHLD__A, &cm_thes_a, 0);
15059 if (rc != 0) { 14902 if (rc != 0) {
15060 pr_err("error %d\n", rc); 14903 pr_err("error %d\n", rc);
15061 goto rw_error; 14904 goto rw_error;
15062 } 14905 }
15063 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_CM_B_THRSHLD__A, &cm_thes_b, 0); 14906 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RAM_CM_B_THRSHLD__A, &cm_thes_b, 0);
15064 if (rc != 0) { 14907 if (rc != 0) {
15065 pr_err("error %d\n", rc); 14908 pr_err("error %d\n", rc);
15066 goto rw_error; 14909 goto rw_error;
@@ -15149,7 +14992,7 @@ aud_ctrl_set_cfg_carrier(struct drx_demod_instance *demod, struct drx_cfg_aud_ca
15149 14992
15150 /* now update the modus register */ 14993 /* now update the modus register */
15151 if (w_modus != r_modus) { 14994 if (w_modus != r_modus) {
15152 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_MODUS__A, w_modus, 0); 14995 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_MODUS__A, w_modus, 0);
15153 if (rc != 0) { 14996 if (rc != 0) {
15154 pr_err("error %d\n", rc); 14997 pr_err("error %d\n", rc);
15155 goto rw_error; 14998 goto rw_error;
@@ -15165,34 +15008,34 @@ aud_ctrl_set_cfg_carrier(struct drx_demod_instance *demod, struct drx_cfg_aud_ca
15165 dco_b_hi = (u16) ((valB >> 12) & 0xFFF); 15008 dco_b_hi = (u16) ((valB >> 12) & 0xFFF);
15166 dco_b_lo = (u16) (valB & 0xFFF); 15009 dco_b_lo = (u16) (valB & 0xFFF);
15167 15010
15168 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_DCO_A_HI__A, dco_a_hi, 0); 15011 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_DCO_A_HI__A, dco_a_hi, 0);
15169 if (rc != 0) { 15012 if (rc != 0) {
15170 pr_err("error %d\n", rc); 15013 pr_err("error %d\n", rc);
15171 goto rw_error; 15014 goto rw_error;
15172 } 15015 }
15173 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_DCO_A_LO__A, dco_a_lo, 0); 15016 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_DCO_A_LO__A, dco_a_lo, 0);
15174 if (rc != 0) { 15017 if (rc != 0) {
15175 pr_err("error %d\n", rc); 15018 pr_err("error %d\n", rc);
15176 goto rw_error; 15019 goto rw_error;
15177 } 15020 }
15178 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_DCO_B_HI__A, dco_b_hi, 0); 15021 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_DCO_B_HI__A, dco_b_hi, 0);
15179 if (rc != 0) { 15022 if (rc != 0) {
15180 pr_err("error %d\n", rc); 15023 pr_err("error %d\n", rc);
15181 goto rw_error; 15024 goto rw_error;
15182 } 15025 }
15183 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_DCO_B_LO__A, dco_b_lo, 0); 15026 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_DCO_B_LO__A, dco_b_lo, 0);
15184 if (rc != 0) { 15027 if (rc != 0) {
15185 pr_err("error %d\n", rc); 15028 pr_err("error %d\n", rc);
15186 goto rw_error; 15029 goto rw_error;
15187 } 15030 }
15188 15031
15189 /* Carrier detetcion threshold for primary & secondary channel */ 15032 /* Carrier detetcion threshold for primary & secondary channel */
15190 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_CM_A_THRSHLD__A, carriers->a.thres, 0); 15033 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_CM_A_THRSHLD__A, carriers->a.thres, 0);
15191 if (rc != 0) { 15034 if (rc != 0) {
15192 pr_err("error %d\n", rc); 15035 pr_err("error %d\n", rc);
15193 goto rw_error; 15036 goto rw_error;
15194 } 15037 }
15195 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_CM_B_THRSHLD__A, carriers->b.thres, 0); 15038 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_CM_B_THRSHLD__A, carriers->b.thres, 0);
15196 if (rc != 0) { 15039 if (rc != 0) {
15197 pr_err("error %d\n", rc); 15040 pr_err("error %d\n", rc);
15198 goto rw_error; 15041 goto rw_error;
@@ -15240,7 +15083,7 @@ aud_ctrl_get_cfg_mixer(struct drx_demod_instance *demod, struct drx_cfg_aud_mixe
15240 } 15083 }
15241 15084
15242 /* Source Selctor */ 15085 /* Source Selctor */
15243 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_WR_SRC_I2S_MATR__A, &src_i2s_matr, 0); 15086 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_WR_SRC_I2S_MATR__A, &src_i2s_matr, 0);
15244 if (rc != 0) { 15087 if (rc != 0) {
15245 pr_err("error %d\n", rc); 15088 pr_err("error %d\n", rc);
15246 goto rw_error; 15089 goto rw_error;
@@ -15282,7 +15125,7 @@ aud_ctrl_get_cfg_mixer(struct drx_demod_instance *demod, struct drx_cfg_aud_mixe
15282 } 15125 }
15283 15126
15284 /* FM Matrix */ 15127 /* FM Matrix */
15285 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_WR_FM_MATRIX__A, &fm_matr, 0); 15128 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_WR_FM_MATRIX__A, &fm_matr, 0);
15286 if (rc != 0) { 15129 if (rc != 0) {
15287 pr_err("error %d\n", rc); 15130 pr_err("error %d\n", rc);
15288 goto rw_error; 15131 goto rw_error;
@@ -15346,7 +15189,7 @@ aud_ctrl_set_cfg_mixer(struct drx_demod_instance *demod, struct drx_cfg_aud_mixe
15346 } 15189 }
15347 15190
15348 /* Source Selctor */ 15191 /* Source Selctor */
15349 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_WR_SRC_I2S_MATR__A, &src_i2s_matr, 0); 15192 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_WR_SRC_I2S_MATR__A, &src_i2s_matr, 0);
15350 if (rc != 0) { 15193 if (rc != 0) {
15351 pr_err("error %d\n", rc); 15194 pr_err("error %d\n", rc);
15352 goto rw_error; 15195 goto rw_error;
@@ -15389,14 +15232,14 @@ aud_ctrl_set_cfg_mixer(struct drx_demod_instance *demod, struct drx_cfg_aud_mixe
15389 return -EINVAL; 15232 return -EINVAL;
15390 } 15233 }
15391 /* write the result */ 15234 /* write the result */
15392 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DSP_WR_SRC_I2S_MATR__A, src_i2s_matr, 0); 15235 rc = drxj_dap_write_reg16(dev_addr, AUD_DSP_WR_SRC_I2S_MATR__A, src_i2s_matr, 0);
15393 if (rc != 0) { 15236 if (rc != 0) {
15394 pr_err("error %d\n", rc); 15237 pr_err("error %d\n", rc);
15395 goto rw_error; 15238 goto rw_error;
15396 } 15239 }
15397 15240
15398 /* FM Matrix */ 15241 /* FM Matrix */
15399 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_WR_FM_MATRIX__A, &fm_matr, 0); 15242 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_WR_FM_MATRIX__A, &fm_matr, 0);
15400 if (rc != 0) { 15243 if (rc != 0) {
15401 pr_err("error %d\n", rc); 15244 pr_err("error %d\n", rc);
15402 goto rw_error; 15245 goto rw_error;
@@ -15424,7 +15267,7 @@ aud_ctrl_set_cfg_mixer(struct drx_demod_instance *demod, struct drx_cfg_aud_mixe
15424 15267
15425 /* Only write if ASS is off */ 15268 /* Only write if ASS is off */
15426 if (ext_attr->aud_data.auto_sound == DRX_AUD_AUTO_SOUND_OFF) { 15269 if (ext_attr->aud_data.auto_sound == DRX_AUD_AUTO_SOUND_OFF) {
15427 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_FM_MATRIX__A, fm_matr, 0); 15270 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_FM_MATRIX__A, fm_matr, 0);
15428 if (rc != 0) { 15271 if (rc != 0) {
15429 pr_err("error %d\n", rc); 15272 pr_err("error %d\n", rc);
15430 goto rw_error; 15273 goto rw_error;
@@ -15472,7 +15315,7 @@ aud_ctrl_set_cfg_av_sync(struct drx_demod_instance *demod, enum drx_cfg_aud_av_s
15472 } 15315 }
15473 15316
15474 /* audio/video synchronisation */ 15317 /* audio/video synchronisation */
15475 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_WR_AV_SYNC__A, &w_aud_vid_sync, 0); 15318 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_WR_AV_SYNC__A, &w_aud_vid_sync, 0);
15476 if (rc != 0) { 15319 if (rc != 0) {
15477 pr_err("error %d\n", rc); 15320 pr_err("error %d\n", rc);
15478 goto rw_error; 15321 goto rw_error;
@@ -15504,7 +15347,7 @@ aud_ctrl_set_cfg_av_sync(struct drx_demod_instance *demod, enum drx_cfg_aud_av_s
15504 return -EINVAL; 15347 return -EINVAL;
15505 } 15348 }
15506 15349
15507 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DSP_WR_AV_SYNC__A, w_aud_vid_sync, 0); 15350 rc = drxj_dap_write_reg16(dev_addr, AUD_DSP_WR_AV_SYNC__A, w_aud_vid_sync, 0);
15508 if (rc != 0) { 15351 if (rc != 0) {
15509 pr_err("error %d\n", rc); 15352 pr_err("error %d\n", rc);
15510 goto rw_error; 15353 goto rw_error;
@@ -15547,7 +15390,7 @@ aud_ctrl_get_cfg_av_sync(struct drx_demod_instance *demod, enum drx_cfg_aud_av_s
15547 } 15390 }
15548 15391
15549 /* audio/video synchronisation */ 15392 /* audio/video synchronisation */
15550 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_WR_AV_SYNC__A, &w_aud_vid_sync, 0); 15393 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_WR_AV_SYNC__A, &w_aud_vid_sync, 0);
15551 if (rc != 0) { 15394 if (rc != 0) {
15552 pr_err("error %d\n", rc); 15395 pr_err("error %d\n", rc);
15553 goto rw_error; 15396 goto rw_error;
@@ -15661,7 +15504,7 @@ aud_ctrl_set_cfg_dev(struct drx_demod_instance *demod, enum drx_cfg_aud_deviatio
15661 15504
15662 /* now update the modus register */ 15505 /* now update the modus register */
15663 if (w_modus != r_modus) { 15506 if (w_modus != r_modus) {
15664 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_MODUS__A, w_modus, 0); 15507 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_MODUS__A, w_modus, 0);
15665 if (rc != 0) { 15508 if (rc != 0) {
15666 pr_err("error %d\n", rc); 15509 pr_err("error %d\n", rc);
15667 goto rw_error; 15510 goto rw_error;
@@ -15708,12 +15551,12 @@ aud_ctrl_get_cfg_prescale(struct drx_demod_instance *demod, struct drx_cfg_aud_p
15708 } 15551 }
15709 15552
15710 /* read register data */ 15553 /* read register data */
15711 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_WR_NICAM_PRESC__A, &r_nicam_prescaler, 0); 15554 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_WR_NICAM_PRESC__A, &r_nicam_prescaler, 0);
15712 if (rc != 0) { 15555 if (rc != 0) {
15713 pr_err("error %d\n", rc); 15556 pr_err("error %d\n", rc);
15714 goto rw_error; 15557 goto rw_error;
15715 } 15558 }
15716 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DSP_WR_FM_PRESC__A, &r_max_fm_deviation, 0); 15559 rc = drxj_dap_read_reg16(dev_addr, AUD_DSP_WR_FM_PRESC__A, &r_max_fm_deviation, 0);
15717 if (rc != 0) { 15560 if (rc != 0) {
15718 pr_err("error %d\n", rc); 15561 pr_err("error %d\n", rc);
15719 goto rw_error; 15562 goto rw_error;
@@ -15825,12 +15668,12 @@ aud_ctrl_set_cfg_prescale(struct drx_demod_instance *demod, struct drx_cfg_aud_p
15825 } 15668 }
15826 /* end of setting NICAM Prescaler */ 15669 /* end of setting NICAM Prescaler */
15827 15670
15828 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DSP_WR_NICAM_PRESC__A, nicam_prescaler, 0); 15671 rc = drxj_dap_write_reg16(dev_addr, AUD_DSP_WR_NICAM_PRESC__A, nicam_prescaler, 0);
15829 if (rc != 0) { 15672 if (rc != 0) {
15830 pr_err("error %d\n", rc); 15673 pr_err("error %d\n", rc);
15831 goto rw_error; 15674 goto rw_error;
15832 } 15675 }
15833 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DSP_WR_FM_PRESC__A, w_max_fm_deviation, 0); 15676 rc = drxj_dap_write_reg16(dev_addr, AUD_DSP_WR_FM_PRESC__A, w_max_fm_deviation, 0);
15834 if (rc != 0) { 15677 if (rc != 0) {
15835 pr_err("error %d\n", rc); 15678 pr_err("error %d\n", rc);
15836 goto rw_error; 15679 goto rw_error;
@@ -15892,7 +15735,7 @@ static int aud_ctrl_beep(struct drx_demod_instance *demod, struct drx_aud_beep *
15892 if (beep->mute == true) 15735 if (beep->mute == true)
15893 the_beep = 0; 15736 the_beep = 0;
15894 15737
15895 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DSP_WR_BEEPER__A, the_beep, 0); 15738 rc = drxj_dap_write_reg16(dev_addr, AUD_DSP_WR_BEEPER__A, the_beep, 0);
15896 if (rc != 0) { 15739 if (rc != 0) {
15897 pr_err("error %d\n", rc); 15740 pr_err("error %d\n", rc);
15898 goto rw_error; 15741 goto rw_error;
@@ -16084,14 +15927,14 @@ aud_ctrl_set_standard(struct drx_demod_instance *demod, enum drx_aud_standard *s
16084 w_modus |= (AUD_DEM_WR_MODUS_MOD_BTSC_BTSC_SAP); 15927 w_modus |= (AUD_DEM_WR_MODUS_MOD_BTSC_BTSC_SAP);
16085 15928
16086 if (w_modus != r_modus) { 15929 if (w_modus != r_modus) {
16087 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_MODUS__A, w_modus, 0); 15930 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_MODUS__A, w_modus, 0);
16088 if (rc != 0) { 15931 if (rc != 0) {
16089 pr_err("error %d\n", rc); 15932 pr_err("error %d\n", rc);
16090 goto rw_error; 15933 goto rw_error;
16091 } 15934 }
16092 } 15935 }
16093 15936
16094 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DEM_WR_STANDARD_SEL__A, w_standard, 0); 15937 rc = drxj_dap_write_reg16(dev_addr, AUD_DEM_WR_STANDARD_SEL__A, w_standard, 0);
16095 if (rc != 0) { 15938 if (rc != 0) {
16096 pr_err("error %d\n", rc); 15939 pr_err("error %d\n", rc);
16097 goto rw_error; 15940 goto rw_error;
@@ -16106,7 +15949,7 @@ aud_ctrl_set_standard(struct drx_demod_instance *demod, enum drx_aud_standard *s
16106 if (ext_attr->aud_data.volume.mute == false) { 15949 if (ext_attr->aud_data.volume.mute == false) {
16107 w_volume |= (u16) ((volume_buffer + AUD_VOLUME_ZERO_DB) << 15950 w_volume |= (u16) ((volume_buffer + AUD_VOLUME_ZERO_DB) <<
16108 AUD_DSP_WR_VOLUME_VOL_MAIN__B); 15951 AUD_DSP_WR_VOLUME_VOL_MAIN__B);
16109 rc = DRXJ_DAP.write_reg16func(dev_addr, AUD_DSP_WR_VOLUME__A, w_volume, 0); 15952 rc = drxj_dap_write_reg16(dev_addr, AUD_DSP_WR_VOLUME__A, w_volume, 0);
16110 if (rc != 0) { 15953 if (rc != 0) {
16111 pr_err("error %d\n", rc); 15954 pr_err("error %d\n", rc);
16112 goto rw_error; 15955 goto rw_error;
@@ -16154,7 +15997,7 @@ aud_ctrl_get_standard(struct drx_demod_instance *demod, enum drx_aud_standard *s
16154 15997
16155 *standard = DRX_AUD_STANDARD_UNKNOWN; 15998 *standard = DRX_AUD_STANDARD_UNKNOWN;
16156 15999
16157 rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RD_STANDARD_RES__A, &r_data, 0); 16000 rc = drxj_dap_read_reg16(dev_addr, AUD_DEM_RD_STANDARD_RES__A, &r_data, 0);
16158 if (rc != 0) { 16001 if (rc != 0) {
16159 pr_err("error %d\n", rc); 16002 pr_err("error %d\n", rc);
16160 goto rw_error; 16003 goto rw_error;
@@ -16426,7 +16269,7 @@ get_oob_symbol_rate_offset(struct i2c_device_addr *dev_addr, s32 *symbol_rate_of
16426 return -EIO; 16269 return -EIO;
16427 } 16270 }
16428 16271
16429 rc = DRXJ_DAP.read_reg16func(dev_addr, ORX_CON_CTI_DTI_R__A, &data, 0); 16272 rc = drxj_dap_read_reg16(dev_addr, ORX_CON_CTI_DTI_R__A, &data, 0);
16430 if (rc != 0) { 16273 if (rc != 0) {
16431 pr_err("error %d\n", rc); 16274 pr_err("error %d\n", rc);
16432 goto rw_error; 16275 goto rw_error;
@@ -16496,7 +16339,7 @@ get_oob_freq_offset(struct drx_demod_instance *demod, s32 *freq_offset)
16496 *freq_offset = 0; 16339 *freq_offset = 0;
16497 16340
16498 /* read sign (spectrum inversion) */ 16341 /* read sign (spectrum inversion) */
16499 rc = DRXJ_DAP.read_reg16func(dev_addr, ORX_FWP_IQM_FRQ_W__A, &rot, 0); 16342 rc = drxj_dap_read_reg16(dev_addr, ORX_FWP_IQM_FRQ_W__A, &rot, 0);
16500 if (rc != 0) { 16343 if (rc != 0) {
16501 pr_err("error %d\n", rc); 16344 pr_err("error %d\n", rc);
16502 goto rw_error; 16345 goto rw_error;
@@ -16547,7 +16390,7 @@ get_oob_freq_offset(struct drx_demod_instance *demod, s32 *freq_offset)
16547 16390
16548 /* find FINE frequency offset */ 16391 /* find FINE frequency offset */
16549 /* fine_freq_offset = ( (CORRECTION_VALUE*symbol_rate) >> 18 ); */ 16392 /* fine_freq_offset = ( (CORRECTION_VALUE*symbol_rate) >> 18 ); */
16550 rc = DRXJ_DAP.read_reg16func(dev_addr, ORX_CON_CPH_FRQ_R__A, &data, 0); 16393 rc = drxj_dap_read_reg16(dev_addr, ORX_CON_CPH_FRQ_R__A, &data, 0);
16551 if (rc != 0) { 16394 if (rc != 0) {
16552 pr_err("error %d\n", rc); 16395 pr_err("error %d\n", rc);
16553 goto rw_error; 16396 goto rw_error;
@@ -16636,7 +16479,7 @@ static int get_oobmer(struct i2c_device_addr *dev_addr, u32 *mer)
16636 16479
16637 *mer = 0; 16480 *mer = 0;
16638 /* READ MER */ 16481 /* READ MER */
16639 rc = DRXJ_DAP.read_reg16func(dev_addr, ORX_EQU_MER_MER_R__A, &data, 0); 16482 rc = drxj_dap_read_reg16(dev_addr, ORX_EQU_MER_MER_R__A, &data, 0);
16640 if (rc != 0) { 16483 if (rc != 0) {
16641 pr_err("error %d\n", rc); 16484 pr_err("error %d\n", rc);
16642 goto rw_error; 16485 goto rw_error;
@@ -16782,7 +16625,7 @@ static int set_orx_nsu_aox(struct drx_demod_instance *demod, bool active)
16782 u16 data = 0; 16625 u16 data = 0;
16783 16626
16784 /* Configure NSU_AOX */ 16627 /* Configure NSU_AOX */
16785 rc = DRXJ_DAP.read_reg16func(dev_addr, ORX_NSU_AOX_STDBY_W__A, &data, 0); 16628 rc = drxj_dap_read_reg16(dev_addr, ORX_NSU_AOX_STDBY_W__A, &data, 0);
16786 if (rc != 0) { 16629 if (rc != 0) {
16787 pr_err("error %d\n", rc); 16630 pr_err("error %d\n", rc);
16788 goto rw_error; 16631 goto rw_error;
@@ -16791,7 +16634,7 @@ static int set_orx_nsu_aox(struct drx_demod_instance *demod, bool active)
16791 data &= ((~ORX_NSU_AOX_STDBY_W_STDBYADC_A2_ON) & (~ORX_NSU_AOX_STDBY_W_STDBYAMP_A2_ON) & (~ORX_NSU_AOX_STDBY_W_STDBYBIAS_A2_ON) & (~ORX_NSU_AOX_STDBY_W_STDBYPLL_A2_ON) & (~ORX_NSU_AOX_STDBY_W_STDBYPD_A2_ON) & (~ORX_NSU_AOX_STDBY_W_STDBYTAGC_IF_A2_ON) & (~ORX_NSU_AOX_STDBY_W_STDBYTAGC_RF_A2_ON) & (~ORX_NSU_AOX_STDBY_W_STDBYFLT_A2_ON)); 16634 data &= ((~ORX_NSU_AOX_STDBY_W_STDBYADC_A2_ON) & (~ORX_NSU_AOX_STDBY_W_STDBYAMP_A2_ON) & (~ORX_NSU_AOX_STDBY_W_STDBYBIAS_A2_ON) & (~ORX_NSU_AOX_STDBY_W_STDBYPLL_A2_ON) & (~ORX_NSU_AOX_STDBY_W_STDBYPD_A2_ON) & (~ORX_NSU_AOX_STDBY_W_STDBYTAGC_IF_A2_ON) & (~ORX_NSU_AOX_STDBY_W_STDBYTAGC_RF_A2_ON) & (~ORX_NSU_AOX_STDBY_W_STDBYFLT_A2_ON));
16792 else 16635 else
16793 data |= (ORX_NSU_AOX_STDBY_W_STDBYADC_A2_ON | ORX_NSU_AOX_STDBY_W_STDBYAMP_A2_ON | ORX_NSU_AOX_STDBY_W_STDBYBIAS_A2_ON | ORX_NSU_AOX_STDBY_W_STDBYPLL_A2_ON | ORX_NSU_AOX_STDBY_W_STDBYPD_A2_ON | ORX_NSU_AOX_STDBY_W_STDBYTAGC_IF_A2_ON | ORX_NSU_AOX_STDBY_W_STDBYTAGC_RF_A2_ON | ORX_NSU_AOX_STDBY_W_STDBYFLT_A2_ON); 16636 data |= (ORX_NSU_AOX_STDBY_W_STDBYADC_A2_ON | ORX_NSU_AOX_STDBY_W_STDBYAMP_A2_ON | ORX_NSU_AOX_STDBY_W_STDBYBIAS_A2_ON | ORX_NSU_AOX_STDBY_W_STDBYPLL_A2_ON | ORX_NSU_AOX_STDBY_W_STDBYPD_A2_ON | ORX_NSU_AOX_STDBY_W_STDBYTAGC_IF_A2_ON | ORX_NSU_AOX_STDBY_W_STDBYTAGC_RF_A2_ON | ORX_NSU_AOX_STDBY_W_STDBYFLT_A2_ON);
16794 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_NSU_AOX_STDBY_W__A, data, 0); 16637 rc = drxj_dap_write_reg16(dev_addr, ORX_NSU_AOX_STDBY_W__A, data, 0);
16795 if (rc != 0) { 16638 if (rc != 0) {
16796 pr_err("error %d\n", rc); 16639 pr_err("error %d\n", rc);
16797 goto rw_error; 16640 goto rw_error;
@@ -16876,7 +16719,7 @@ static int ctrl_set_oob(struct drx_demod_instance *demod, struct drxoob *oob_par
16876 pr_err("error %d\n", rc); 16719 pr_err("error %d\n", rc);
16877 goto rw_error; 16720 goto rw_error;
16878 } 16721 }
16879 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_COMM_EXEC__A, ORX_COMM_EXEC_STOP, 0); 16722 rc = drxj_dap_write_reg16(dev_addr, ORX_COMM_EXEC__A, ORX_COMM_EXEC_STOP, 0);
16880 if (rc != 0) { 16723 if (rc != 0) {
16881 pr_err("error %d\n", rc); 16724 pr_err("error %d\n", rc);
16882 goto rw_error; 16725 goto rw_error;
@@ -16908,7 +16751,7 @@ static int ctrl_set_oob(struct drx_demod_instance *demod, struct drxoob *oob_par
16908 /*********/ 16751 /*********/
16909 /* Stop */ 16752 /* Stop */
16910 /*********/ 16753 /*********/
16911 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_COMM_EXEC__A, ORX_COMM_EXEC_STOP, 0); 16754 rc = drxj_dap_write_reg16(dev_addr, ORX_COMM_EXEC__A, ORX_COMM_EXEC_STOP, 0);
16912 if (rc != 0) { 16755 if (rc != 0) {
16913 pr_err("error %d\n", rc); 16756 pr_err("error %d\n", rc);
16914 goto rw_error; 16757 goto rw_error;
@@ -17013,260 +16856,260 @@ static int ctrl_set_oob(struct drx_demod_instance *demod, struct drxoob *oob_par
17013 goto rw_error; 16856 goto rw_error;
17014 } 16857 }
17015 16858
17016 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, 0xFABA, 0); 16859 rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, 0xFABA, 0);
17017 if (rc != 0) { 16860 if (rc != 0) {
17018 pr_err("error %d\n", rc); 16861 pr_err("error %d\n", rc);
17019 goto rw_error; 16862 goto rw_error;
17020 } /* Write magic word to enable pdr reg write */ 16863 } /* Write magic word to enable pdr reg write */
17021 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_OOB_CRX_CFG__A, OOB_CRX_DRIVE_STRENGTH << SIO_PDR_OOB_CRX_CFG_DRIVE__B | 0x03 << SIO_PDR_OOB_CRX_CFG_MODE__B, 0); 16864 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_OOB_CRX_CFG__A, OOB_CRX_DRIVE_STRENGTH << SIO_PDR_OOB_CRX_CFG_DRIVE__B | 0x03 << SIO_PDR_OOB_CRX_CFG_MODE__B, 0);
17022 if (rc != 0) { 16865 if (rc != 0) {
17023 pr_err("error %d\n", rc); 16866 pr_err("error %d\n", rc);
17024 goto rw_error; 16867 goto rw_error;
17025 } 16868 }
17026 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_OOB_DRX_CFG__A, OOB_DRX_DRIVE_STRENGTH << SIO_PDR_OOB_DRX_CFG_DRIVE__B | 0x03 << SIO_PDR_OOB_DRX_CFG_MODE__B, 0); 16869 rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_OOB_DRX_CFG__A, OOB_DRX_DRIVE_STRENGTH << SIO_PDR_OOB_DRX_CFG_DRIVE__B | 0x03 << SIO_PDR_OOB_DRX_CFG_MODE__B, 0);
17027 if (rc != 0) { 16870 if (rc != 0) {
17028 pr_err("error %d\n", rc); 16871 pr_err("error %d\n", rc);
17029 goto rw_error; 16872 goto rw_error;
17030 } 16873 }
17031 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0); 16874 rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0);
17032 if (rc != 0) { 16875 if (rc != 0) {
17033 pr_err("error %d\n", rc); 16876 pr_err("error %d\n", rc);
17034 goto rw_error; 16877 goto rw_error;
17035 } /* Write magic word to disable pdr reg write */ 16878 } /* Write magic word to disable pdr reg write */
17036 16879
17037 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_TOP_COMM_KEY__A, 0, 0); 16880 rc = drxj_dap_write_reg16(dev_addr, ORX_TOP_COMM_KEY__A, 0, 0);
17038 if (rc != 0) { 16881 if (rc != 0) {
17039 pr_err("error %d\n", rc); 16882 pr_err("error %d\n", rc);
17040 goto rw_error; 16883 goto rw_error;
17041 } 16884 }
17042 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_FWP_AAG_LEN_W__A, 16000, 0); 16885 rc = drxj_dap_write_reg16(dev_addr, ORX_FWP_AAG_LEN_W__A, 16000, 0);
17043 if (rc != 0) { 16886 if (rc != 0) {
17044 pr_err("error %d\n", rc); 16887 pr_err("error %d\n", rc);
17045 goto rw_error; 16888 goto rw_error;
17046 } 16889 }
17047 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_FWP_AAG_THR_W__A, 40, 0); 16890 rc = drxj_dap_write_reg16(dev_addr, ORX_FWP_AAG_THR_W__A, 40, 0);
17048 if (rc != 0) { 16891 if (rc != 0) {
17049 pr_err("error %d\n", rc); 16892 pr_err("error %d\n", rc);
17050 goto rw_error; 16893 goto rw_error;
17051 } 16894 }
17052 16895
17053 /* ddc */ 16896 /* ddc */
17054 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_DDC_OFO_SET_W__A, ORX_DDC_OFO_SET_W__PRE, 0); 16897 rc = drxj_dap_write_reg16(dev_addr, ORX_DDC_OFO_SET_W__A, ORX_DDC_OFO_SET_W__PRE, 0);
17055 if (rc != 0) { 16898 if (rc != 0) {
17056 pr_err("error %d\n", rc); 16899 pr_err("error %d\n", rc);
17057 goto rw_error; 16900 goto rw_error;
17058 } 16901 }
17059 16902
17060 /* nsu */ 16903 /* nsu */
17061 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_NSU_AOX_LOPOW_W__A, ext_attr->oob_lo_pow, 0); 16904 rc = drxj_dap_write_reg16(dev_addr, ORX_NSU_AOX_LOPOW_W__A, ext_attr->oob_lo_pow, 0);
17062 if (rc != 0) { 16905 if (rc != 0) {
17063 pr_err("error %d\n", rc); 16906 pr_err("error %d\n", rc);
17064 goto rw_error; 16907 goto rw_error;
17065 } 16908 }
17066 16909
17067 /* initialization for target mode */ 16910 /* initialization for target mode */
17068 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_TARGET_MODE__A, SCU_RAM_ORX_TARGET_MODE_2048KBPS_SQRT, 0); 16911 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_TARGET_MODE__A, SCU_RAM_ORX_TARGET_MODE_2048KBPS_SQRT, 0);
17069 if (rc != 0) { 16912 if (rc != 0) {
17070 pr_err("error %d\n", rc); 16913 pr_err("error %d\n", rc);
17071 goto rw_error; 16914 goto rw_error;
17072 } 16915 }
17073 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_FREQ_GAIN_CORR__A, SCU_RAM_ORX_FREQ_GAIN_CORR_2048KBPS, 0); 16916 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_FREQ_GAIN_CORR__A, SCU_RAM_ORX_FREQ_GAIN_CORR_2048KBPS, 0);
17074 if (rc != 0) { 16917 if (rc != 0) {
17075 pr_err("error %d\n", rc); 16918 pr_err("error %d\n", rc);
17076 goto rw_error; 16919 goto rw_error;
17077 } 16920 }
17078 16921
17079 /* Reset bits for timing and freq. recovery */ 16922 /* Reset bits for timing and freq. recovery */
17080 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_RST_CPH__A, 0x0001, 0); 16923 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_RST_CPH__A, 0x0001, 0);
17081 if (rc != 0) { 16924 if (rc != 0) {
17082 pr_err("error %d\n", rc); 16925 pr_err("error %d\n", rc);
17083 goto rw_error; 16926 goto rw_error;
17084 } 16927 }
17085 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_RST_CTI__A, 0x0002, 0); 16928 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_RST_CTI__A, 0x0002, 0);
17086 if (rc != 0) { 16929 if (rc != 0) {
17087 pr_err("error %d\n", rc); 16930 pr_err("error %d\n", rc);
17088 goto rw_error; 16931 goto rw_error;
17089 } 16932 }
17090 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_RST_KRN__A, 0x0004, 0); 16933 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_RST_KRN__A, 0x0004, 0);
17091 if (rc != 0) { 16934 if (rc != 0) {
17092 pr_err("error %d\n", rc); 16935 pr_err("error %d\n", rc);
17093 goto rw_error; 16936 goto rw_error;
17094 } 16937 }
17095 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_RST_KRP__A, 0x0008, 0); 16938 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_RST_KRP__A, 0x0008, 0);
17096 if (rc != 0) { 16939 if (rc != 0) {
17097 pr_err("error %d\n", rc); 16940 pr_err("error %d\n", rc);
17098 goto rw_error; 16941 goto rw_error;
17099 } 16942 }
17100 16943
17101 /* AGN_LOCK = {2048>>3, -2048, 8, -8, 0, 1}; */ 16944 /* AGN_LOCK = {2048>>3, -2048, 8, -8, 0, 1}; */
17102 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_AGN_LOCK_TH__A, 2048 >> 3, 0); 16945 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_AGN_LOCK_TH__A, 2048 >> 3, 0);
17103 if (rc != 0) { 16946 if (rc != 0) {
17104 pr_err("error %d\n", rc); 16947 pr_err("error %d\n", rc);
17105 goto rw_error; 16948 goto rw_error;
17106 } 16949 }
17107 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_AGN_LOCK_TOTH__A, (u16)(-2048), 0); 16950 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_AGN_LOCK_TOTH__A, (u16)(-2048), 0);
17108 if (rc != 0) { 16951 if (rc != 0) {
17109 pr_err("error %d\n", rc); 16952 pr_err("error %d\n", rc);
17110 goto rw_error; 16953 goto rw_error;
17111 } 16954 }
17112 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_AGN_ONLOCK_TTH__A, 8, 0); 16955 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_AGN_ONLOCK_TTH__A, 8, 0);
17113 if (rc != 0) { 16956 if (rc != 0) {
17114 pr_err("error %d\n", rc); 16957 pr_err("error %d\n", rc);
17115 goto rw_error; 16958 goto rw_error;
17116 } 16959 }
17117 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_AGN_UNLOCK_TTH__A, (u16)(-8), 0); 16960 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_AGN_UNLOCK_TTH__A, (u16)(-8), 0);
17118 if (rc != 0) { 16961 if (rc != 0) {
17119 pr_err("error %d\n", rc); 16962 pr_err("error %d\n", rc);
17120 goto rw_error; 16963 goto rw_error;
17121 } 16964 }
17122 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_AGN_LOCK_MASK__A, 1, 0); 16965 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_AGN_LOCK_MASK__A, 1, 0);
17123 if (rc != 0) { 16966 if (rc != 0) {
17124 pr_err("error %d\n", rc); 16967 pr_err("error %d\n", rc);
17125 goto rw_error; 16968 goto rw_error;
17126 } 16969 }
17127 16970
17128 /* DGN_LOCK = {10, -2048, 8, -8, 0, 1<<1}; */ 16971 /* DGN_LOCK = {10, -2048, 8, -8, 0, 1<<1}; */
17129 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_DGN_LOCK_TH__A, 10, 0); 16972 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_DGN_LOCK_TH__A, 10, 0);
17130 if (rc != 0) { 16973 if (rc != 0) {
17131 pr_err("error %d\n", rc); 16974 pr_err("error %d\n", rc);
17132 goto rw_error; 16975 goto rw_error;
17133 } 16976 }
17134 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_DGN_LOCK_TOTH__A, (u16)(-2048), 0); 16977 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_DGN_LOCK_TOTH__A, (u16)(-2048), 0);
17135 if (rc != 0) { 16978 if (rc != 0) {
17136 pr_err("error %d\n", rc); 16979 pr_err("error %d\n", rc);
17137 goto rw_error; 16980 goto rw_error;
17138 } 16981 }
17139 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_DGN_ONLOCK_TTH__A, 8, 0); 16982 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_DGN_ONLOCK_TTH__A, 8, 0);
17140 if (rc != 0) { 16983 if (rc != 0) {
17141 pr_err("error %d\n", rc); 16984 pr_err("error %d\n", rc);
17142 goto rw_error; 16985 goto rw_error;
17143 } 16986 }
17144 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_DGN_UNLOCK_TTH__A, (u16)(-8), 0); 16987 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_DGN_UNLOCK_TTH__A, (u16)(-8), 0);
17145 if (rc != 0) { 16988 if (rc != 0) {
17146 pr_err("error %d\n", rc); 16989 pr_err("error %d\n", rc);
17147 goto rw_error; 16990 goto rw_error;
17148 } 16991 }
17149 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_DGN_LOCK_MASK__A, 1 << 1, 0); 16992 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_DGN_LOCK_MASK__A, 1 << 1, 0);
17150 if (rc != 0) { 16993 if (rc != 0) {
17151 pr_err("error %d\n", rc); 16994 pr_err("error %d\n", rc);
17152 goto rw_error; 16995 goto rw_error;
17153 } 16996 }
17154 16997
17155 /* FRQ_LOCK = {15,-2048, 8, -8, 0, 1<<2}; */ 16998 /* FRQ_LOCK = {15,-2048, 8, -8, 0, 1<<2}; */
17156 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_FRQ_LOCK_TH__A, 17, 0); 16999 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_FRQ_LOCK_TH__A, 17, 0);
17157 if (rc != 0) { 17000 if (rc != 0) {
17158 pr_err("error %d\n", rc); 17001 pr_err("error %d\n", rc);
17159 goto rw_error; 17002 goto rw_error;
17160 } 17003 }
17161 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_FRQ_LOCK_TOTH__A, (u16)(-2048), 0); 17004 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_FRQ_LOCK_TOTH__A, (u16)(-2048), 0);
17162 if (rc != 0) { 17005 if (rc != 0) {
17163 pr_err("error %d\n", rc); 17006 pr_err("error %d\n", rc);
17164 goto rw_error; 17007 goto rw_error;
17165 } 17008 }
17166 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_FRQ_ONLOCK_TTH__A, 8, 0); 17009 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_FRQ_ONLOCK_TTH__A, 8, 0);
17167 if (rc != 0) { 17010 if (rc != 0) {
17168 pr_err("error %d\n", rc); 17011 pr_err("error %d\n", rc);
17169 goto rw_error; 17012 goto rw_error;
17170 } 17013 }
17171 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_FRQ_UNLOCK_TTH__A, (u16)(-8), 0); 17014 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_FRQ_UNLOCK_TTH__A, (u16)(-8), 0);
17172 if (rc != 0) { 17015 if (rc != 0) {
17173 pr_err("error %d\n", rc); 17016 pr_err("error %d\n", rc);
17174 goto rw_error; 17017 goto rw_error;
17175 } 17018 }
17176 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_FRQ_LOCK_MASK__A, 1 << 2, 0); 17019 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_FRQ_LOCK_MASK__A, 1 << 2, 0);
17177 if (rc != 0) { 17020 if (rc != 0) {
17178 pr_err("error %d\n", rc); 17021 pr_err("error %d\n", rc);
17179 goto rw_error; 17022 goto rw_error;
17180 } 17023 }
17181 17024
17182 /* PHA_LOCK = {5000, -2048, 8, -8, 0, 1<<3}; */ 17025 /* PHA_LOCK = {5000, -2048, 8, -8, 0, 1<<3}; */
17183 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_PHA_LOCK_TH__A, 3000, 0); 17026 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_PHA_LOCK_TH__A, 3000, 0);
17184 if (rc != 0) { 17027 if (rc != 0) {
17185 pr_err("error %d\n", rc); 17028 pr_err("error %d\n", rc);
17186 goto rw_error; 17029 goto rw_error;
17187 } 17030 }
17188 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_PHA_LOCK_TOTH__A, (u16)(-2048), 0); 17031 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_PHA_LOCK_TOTH__A, (u16)(-2048), 0);
17189 if (rc != 0) { 17032 if (rc != 0) {
17190 pr_err("error %d\n", rc); 17033 pr_err("error %d\n", rc);
17191 goto rw_error; 17034 goto rw_error;
17192 } 17035 }
17193 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_PHA_ONLOCK_TTH__A, 8, 0); 17036 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_PHA_ONLOCK_TTH__A, 8, 0);
17194 if (rc != 0) { 17037 if (rc != 0) {
17195 pr_err("error %d\n", rc); 17038 pr_err("error %d\n", rc);
17196 goto rw_error; 17039 goto rw_error;
17197 } 17040 }
17198 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_PHA_UNLOCK_TTH__A, (u16)(-8), 0); 17041 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_PHA_UNLOCK_TTH__A, (u16)(-8), 0);
17199 if (rc != 0) { 17042 if (rc != 0) {
17200 pr_err("error %d\n", rc); 17043 pr_err("error %d\n", rc);
17201 goto rw_error; 17044 goto rw_error;
17202 } 17045 }
17203 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_PHA_LOCK_MASK__A, 1 << 3, 0); 17046 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_PHA_LOCK_MASK__A, 1 << 3, 0);
17204 if (rc != 0) { 17047 if (rc != 0) {
17205 pr_err("error %d\n", rc); 17048 pr_err("error %d\n", rc);
17206 goto rw_error; 17049 goto rw_error;
17207 } 17050 }
17208 17051
17209 /* TIM_LOCK = {300, -2048, 8, -8, 0, 1<<4}; */ 17052 /* TIM_LOCK = {300, -2048, 8, -8, 0, 1<<4}; */
17210 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_TIM_LOCK_TH__A, 400, 0); 17053 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_TIM_LOCK_TH__A, 400, 0);
17211 if (rc != 0) { 17054 if (rc != 0) {
17212 pr_err("error %d\n", rc); 17055 pr_err("error %d\n", rc);
17213 goto rw_error; 17056 goto rw_error;
17214 } 17057 }
17215 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_TIM_LOCK_TOTH__A, (u16)(-2048), 0); 17058 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_TIM_LOCK_TOTH__A, (u16)(-2048), 0);
17216 if (rc != 0) { 17059 if (rc != 0) {
17217 pr_err("error %d\n", rc); 17060 pr_err("error %d\n", rc);
17218 goto rw_error; 17061 goto rw_error;
17219 } 17062 }
17220 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_TIM_ONLOCK_TTH__A, 8, 0); 17063 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_TIM_ONLOCK_TTH__A, 8, 0);
17221 if (rc != 0) { 17064 if (rc != 0) {
17222 pr_err("error %d\n", rc); 17065 pr_err("error %d\n", rc);
17223 goto rw_error; 17066 goto rw_error;
17224 } 17067 }
17225 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_TIM_UNLOCK_TTH__A, (u16)(-8), 0); 17068 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_TIM_UNLOCK_TTH__A, (u16)(-8), 0);
17226 if (rc != 0) { 17069 if (rc != 0) {
17227 pr_err("error %d\n", rc); 17070 pr_err("error %d\n", rc);
17228 goto rw_error; 17071 goto rw_error;
17229 } 17072 }
17230 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_TIM_LOCK_MASK__A, 1 << 4, 0); 17073 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_TIM_LOCK_MASK__A, 1 << 4, 0);
17231 if (rc != 0) { 17074 if (rc != 0) {
17232 pr_err("error %d\n", rc); 17075 pr_err("error %d\n", rc);
17233 goto rw_error; 17076 goto rw_error;
17234 } 17077 }
17235 17078
17236 /* EQU_LOCK = {20, -2048, 8, -8, 0, 1<<5}; */ 17079 /* EQU_LOCK = {20, -2048, 8, -8, 0, 1<<5}; */
17237 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_EQU_LOCK_TH__A, 20, 0); 17080 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_EQU_LOCK_TH__A, 20, 0);
17238 if (rc != 0) { 17081 if (rc != 0) {
17239 pr_err("error %d\n", rc); 17082 pr_err("error %d\n", rc);
17240 goto rw_error; 17083 goto rw_error;
17241 } 17084 }
17242 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_EQU_LOCK_TOTH__A, (u16)(-2048), 0); 17085 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_EQU_LOCK_TOTH__A, (u16)(-2048), 0);
17243 if (rc != 0) { 17086 if (rc != 0) {
17244 pr_err("error %d\n", rc); 17087 pr_err("error %d\n", rc);
17245 goto rw_error; 17088 goto rw_error;
17246 } 17089 }
17247 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_EQU_ONLOCK_TTH__A, 4, 0); 17090 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_EQU_ONLOCK_TTH__A, 4, 0);
17248 if (rc != 0) { 17091 if (rc != 0) {
17249 pr_err("error %d\n", rc); 17092 pr_err("error %d\n", rc);
17250 goto rw_error; 17093 goto rw_error;
17251 } 17094 }
17252 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_EQU_UNLOCK_TTH__A, (u16)(-4), 0); 17095 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_EQU_UNLOCK_TTH__A, (u16)(-4), 0);
17253 if (rc != 0) { 17096 if (rc != 0) {
17254 pr_err("error %d\n", rc); 17097 pr_err("error %d\n", rc);
17255 goto rw_error; 17098 goto rw_error;
17256 } 17099 }
17257 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_ORX_EQU_LOCK_MASK__A, 1 << 5, 0); 17100 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_ORX_EQU_LOCK_MASK__A, 1 << 5, 0);
17258 if (rc != 0) { 17101 if (rc != 0) {
17259 pr_err("error %d\n", rc); 17102 pr_err("error %d\n", rc);
17260 goto rw_error; 17103 goto rw_error;
17261 } 17104 }
17262 17105
17263 /* PRE-Filter coefficients (PFI) */ 17106 /* PRE-Filter coefficients (PFI) */
17264 rc = DRXJ_DAP.write_block_func(dev_addr, ORX_FWP_PFI_A_W__A, sizeof(pfi_coeffs[mode_index]), ((u8 *)pfi_coeffs[mode_index]), 0); 17107 rc = drxdap_fasi_write_block(dev_addr, ORX_FWP_PFI_A_W__A, sizeof(pfi_coeffs[mode_index]), ((u8 *)pfi_coeffs[mode_index]), 0);
17265 if (rc != 0) { 17108 if (rc != 0) {
17266 pr_err("error %d\n", rc); 17109 pr_err("error %d\n", rc);
17267 goto rw_error; 17110 goto rw_error;
17268 } 17111 }
17269 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_TOP_MDE_W__A, mode_index, 0); 17112 rc = drxj_dap_write_reg16(dev_addr, ORX_TOP_MDE_W__A, mode_index, 0);
17270 if (rc != 0) { 17113 if (rc != 0) {
17271 pr_err("error %d\n", rc); 17114 pr_err("error %d\n", rc);
17272 goto rw_error; 17115 goto rw_error;
@@ -17274,23 +17117,23 @@ static int ctrl_set_oob(struct drx_demod_instance *demod, struct drxoob *oob_par
17274 17117
17275 /* NYQUIST-Filter coefficients (NYQ) */ 17118 /* NYQUIST-Filter coefficients (NYQ) */
17276 for (i = 0; i < (NYQFILTERLEN + 1) / 2; i++) { 17119 for (i = 0; i < (NYQFILTERLEN + 1) / 2; i++) {
17277 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_FWP_NYQ_ADR_W__A, i, 0); 17120 rc = drxj_dap_write_reg16(dev_addr, ORX_FWP_NYQ_ADR_W__A, i, 0);
17278 if (rc != 0) { 17121 if (rc != 0) {
17279 pr_err("error %d\n", rc); 17122 pr_err("error %d\n", rc);
17280 goto rw_error; 17123 goto rw_error;
17281 } 17124 }
17282 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_FWP_NYQ_COF_RW__A, nyquist_coeffs[mode_index][i], 0); 17125 rc = drxj_dap_write_reg16(dev_addr, ORX_FWP_NYQ_COF_RW__A, nyquist_coeffs[mode_index][i], 0);
17283 if (rc != 0) { 17126 if (rc != 0) {
17284 pr_err("error %d\n", rc); 17127 pr_err("error %d\n", rc);
17285 goto rw_error; 17128 goto rw_error;
17286 } 17129 }
17287 } 17130 }
17288 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_FWP_NYQ_ADR_W__A, 31, 0); 17131 rc = drxj_dap_write_reg16(dev_addr, ORX_FWP_NYQ_ADR_W__A, 31, 0);
17289 if (rc != 0) { 17132 if (rc != 0) {
17290 pr_err("error %d\n", rc); 17133 pr_err("error %d\n", rc);
17291 goto rw_error; 17134 goto rw_error;
17292 } 17135 }
17293 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_COMM_EXEC__A, ORX_COMM_EXEC_ACTIVE, 0); 17136 rc = drxj_dap_write_reg16(dev_addr, ORX_COMM_EXEC__A, ORX_COMM_EXEC_ACTIVE, 0);
17294 if (rc != 0) { 17137 if (rc != 0) {
17295 pr_err("error %d\n", rc); 17138 pr_err("error %d\n", rc);
17296 goto rw_error; 17139 goto rw_error;
@@ -17314,7 +17157,7 @@ static int ctrl_set_oob(struct drx_demod_instance *demod, struct drxoob *oob_par
17314 pr_err("error %d\n", rc); 17157 pr_err("error %d\n", rc);
17315 goto rw_error; 17158 goto rw_error;
17316 } 17159 }
17317 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_NSU_AOX_STHR_W__A, ext_attr->oob_pre_saw, 0); 17160 rc = drxj_dap_write_reg16(dev_addr, ORX_NSU_AOX_STHR_W__A, ext_attr->oob_pre_saw, 0);
17318 if (rc != 0) { 17161 if (rc != 0) {
17319 pr_err("error %d\n", rc); 17162 pr_err("error %d\n", rc);
17320 goto rw_error; 17163 goto rw_error;
@@ -17352,17 +17195,17 @@ ctrl_get_oob(struct drx_demod_instance *demod, struct drxoob_status *oob_status)
17352 if (!ext_attr->oob_power_on) 17195 if (!ext_attr->oob_power_on)
17353 return -EIO; 17196 return -EIO;
17354 17197
17355 rc = DRXJ_DAP.read_reg16func(dev_addr, ORX_DDC_OFO_SET_W__A, &data, 0); 17198 rc = drxj_dap_read_reg16(dev_addr, ORX_DDC_OFO_SET_W__A, &data, 0);
17356 if (rc != 0) { 17199 if (rc != 0) {
17357 pr_err("error %d\n", rc); 17200 pr_err("error %d\n", rc);
17358 goto rw_error; 17201 goto rw_error;
17359 } 17202 }
17360 rc = DRXJ_DAP.read_reg16func(dev_addr, ORX_NSU_TUN_RFGAIN_W__A, &data, 0); 17203 rc = drxj_dap_read_reg16(dev_addr, ORX_NSU_TUN_RFGAIN_W__A, &data, 0);
17361 if (rc != 0) { 17204 if (rc != 0) {
17362 pr_err("error %d\n", rc); 17205 pr_err("error %d\n", rc);
17363 goto rw_error; 17206 goto rw_error;
17364 } 17207 }
17365 rc = DRXJ_DAP.read_reg16func(dev_addr, ORX_FWP_AAG_THR_W__A, &data, 0); 17208 rc = drxj_dap_read_reg16(dev_addr, ORX_FWP_AAG_THR_W__A, &data, 0);
17366 if (rc != 0) { 17209 if (rc != 0) {
17367 pr_err("error %d\n", rc); 17210 pr_err("error %d\n", rc);
17368 goto rw_error; 17211 goto rw_error;
@@ -17372,7 +17215,7 @@ ctrl_get_oob(struct drx_demod_instance *demod, struct drxoob_status *oob_status)
17372 pr_err("error %d\n", rc); 17215 pr_err("error %d\n", rc);
17373 goto rw_error; 17216 goto rw_error;
17374 } 17217 }
17375 rc = DRXJ_DAP.read_reg16func(dev_addr, ORX_FWP_SRC_DGN_W__A, &data, 0); 17218 rc = drxj_dap_read_reg16(dev_addr, ORX_FWP_SRC_DGN_W__A, &data, 0);
17376 if (rc != 0) { 17219 if (rc != 0) {
17377 pr_err("error %d\n", rc); 17220 pr_err("error %d\n", rc);
17378 goto rw_error; 17221 goto rw_error;
@@ -17423,7 +17266,7 @@ ctrl_set_cfg_oob_pre_saw(struct drx_demod_instance *demod, u16 *cfg_data)
17423 dev_addr = demod->my_i2c_dev_addr; 17266 dev_addr = demod->my_i2c_dev_addr;
17424 ext_attr = (struct drxj_data *) demod->my_ext_attr; 17267 ext_attr = (struct drxj_data *) demod->my_ext_attr;
17425 17268
17426 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_NSU_AOX_STHR_W__A, *cfg_data, 0); 17269 rc = drxj_dap_write_reg16(dev_addr, ORX_NSU_AOX_STHR_W__A, *cfg_data, 0);
17427 if (rc != 0) { 17270 if (rc != 0) {
17428 pr_err("error %d\n", rc); 17271 pr_err("error %d\n", rc);
17429 goto rw_error; 17272 goto rw_error;
@@ -17473,7 +17316,7 @@ ctrl_set_cfg_oob_lo_power(struct drx_demod_instance *demod, enum drxj_cfg_oob_lo
17473 dev_addr = demod->my_i2c_dev_addr; 17316 dev_addr = demod->my_i2c_dev_addr;
17474 ext_attr = (struct drxj_data *) demod->my_ext_attr; 17317 ext_attr = (struct drxj_data *) demod->my_ext_attr;
17475 17318
17476 rc = DRXJ_DAP.write_reg16func(dev_addr, ORX_NSU_AOX_LOPOW_W__A, *cfg_data, 0); 17319 rc = drxj_dap_write_reg16(dev_addr, ORX_NSU_AOX_LOPOW_W__A, *cfg_data, 0);
17477 if (rc != 0) { 17320 if (rc != 0) {
17478 pr_err("error %d\n", rc); 17321 pr_err("error %d\n", rc);
17479 goto rw_error; 17322 goto rw_error;
@@ -17737,7 +17580,7 @@ ctrl_set_channel(struct drx_demod_instance *demod, struct drx_channel *channel)
17737 } 17580 }
17738 } 17581 }
17739#endif /* DRXJ_VSB_ONLY */ 17582#endif /* DRXJ_VSB_ONLY */
17740 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE, 0); 17583 rc = drxj_dap_write_reg16(dev_addr, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE, 0);
17741 if (rc != 0) { 17584 if (rc != 0) {
17742 pr_err("error %d\n", rc); 17585 pr_err("error %d\n", rc);
17743 goto rw_error; 17586 goto rw_error;
@@ -18451,7 +18294,7 @@ ctrl_set_standard(struct drx_demod_instance *demod, enum drx_standard *standard)
18451 case DRX_STANDARD_ITU_C: 18294 case DRX_STANDARD_ITU_C:
18452 do { 18295 do {
18453 u16 dummy; 18296 u16 dummy;
18454 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SCU_RAM_VERSION_HI__A, &dummy, 0); 18297 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SCU_RAM_VERSION_HI__A, &dummy, 0);
18455 if (rc != 0) { 18298 if (rc != 0) {
18456 pr_err("error %d\n", rc); 18299 pr_err("error %d\n", rc);
18457 goto rw_error; 18300 goto rw_error;
@@ -18525,7 +18368,7 @@ ctrl_get_standard(struct drx_demod_instance *demod, enum drx_standard *standard)
18525 *standard = ext_attr->standard; 18368 *standard = ext_attr->standard;
18526 do { 18369 do {
18527 u16 dummy; 18370 u16 dummy;
18528 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SCU_RAM_VERSION_HI__A, &dummy, 0); 18371 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SCU_RAM_VERSION_HI__A, &dummy, 0);
18529 if (rc != 0) { 18372 if (rc != 0) {
18530 pr_err("error %d\n", rc); 18373 pr_err("error %d\n", rc);
18531 goto rw_error; 18374 goto rw_error;
@@ -18780,12 +18623,12 @@ ctrl_power_mode(struct drx_demod_instance *demod, enum drx_power_mode *mode)
18780 } 18623 }
18781 18624
18782 if (*mode != DRXJ_POWER_DOWN_MAIN_PATH) { 18625 if (*mode != DRXJ_POWER_DOWN_MAIN_PATH) {
18783 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_CC_PWD_MODE__A, sio_cc_pwd_mode, 0); 18626 rc = drxj_dap_write_reg16(dev_addr, SIO_CC_PWD_MODE__A, sio_cc_pwd_mode, 0);
18784 if (rc != 0) { 18627 if (rc != 0) {
18785 pr_err("error %d\n", rc); 18628 pr_err("error %d\n", rc);
18786 goto rw_error; 18629 goto rw_error;
18787 } 18630 }
18788 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY, 0); 18631 rc = drxj_dap_write_reg16(dev_addr, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY, 0);
18789 if (rc != 0) { 18632 if (rc != 0) {
18790 pr_err("error %d\n", rc); 18633 pr_err("error %d\n", rc);
18791 goto rw_error; 18634 goto rw_error;
@@ -18873,7 +18716,7 @@ static int ctrl_probe_device(struct drx_demod_instance *demod)
18873 } 18716 }
18874 18717
18875 /* Check device id */ 18718 /* Check device id */
18876 rc = DRXJ_DAP.read_reg32func(dev_addr, SIO_TOP_JTAGID_LO__A, &jtag, 0); 18719 rc = drxdap_fasi_read_reg32(dev_addr, SIO_TOP_JTAGID_LO__A, &jtag, 0);
18877 if (rc != 0) { 18720 if (rc != 0) {
18878 pr_err("error %d\n", rc); 18721 pr_err("error %d\n", rc);
18879 goto rw_error; 18722 goto rw_error;
@@ -18909,7 +18752,7 @@ static int ctrl_probe_device(struct drx_demod_instance *demod)
18909 suddenly disappears after a succesful drx_open */ 18752 suddenly disappears after a succesful drx_open */
18910 do { 18753 do {
18911 u16 dummy; 18754 u16 dummy;
18912 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SCU_RAM_VERSION_HI__A, &dummy, 0); 18755 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SCU_RAM_VERSION_HI__A, &dummy, 0);
18913 if (rc != 0) { 18756 if (rc != 0) {
18914 pr_err("error %d\n", rc); 18757 pr_err("error %d\n", rc);
18915 goto rw_error; 18758 goto rw_error;
@@ -19023,17 +18866,17 @@ ctrl_get_cfg_oob_misc(struct drx_demod_instance *demod, struct drxj_cfg_oob_misc
19023 18866
19024 /* TODO */ 18867 /* TODO */
19025 /* check if the same registers are used for all standards (QAM/VSB/ATV) */ 18868 /* check if the same registers are used for all standards (QAM/VSB/ATV) */
19026 rc = DRXJ_DAP.read_reg16func(dev_addr, ORX_NSU_TUN_IFGAIN_W__A, &misc->agc.IFAGC, 0); 18869 rc = drxj_dap_read_reg16(dev_addr, ORX_NSU_TUN_IFGAIN_W__A, &misc->agc.IFAGC, 0);
19027 if (rc != 0) { 18870 if (rc != 0) {
19028 pr_err("error %d\n", rc); 18871 pr_err("error %d\n", rc);
19029 goto rw_error; 18872 goto rw_error;
19030 } 18873 }
19031 rc = DRXJ_DAP.read_reg16func(dev_addr, ORX_NSU_TUN_RFGAIN_W__A, &misc->agc.RFAGC, 0); 18874 rc = drxj_dap_read_reg16(dev_addr, ORX_NSU_TUN_RFGAIN_W__A, &misc->agc.RFAGC, 0);
19032 if (rc != 0) { 18875 if (rc != 0) {
19033 pr_err("error %d\n", rc); 18876 pr_err("error %d\n", rc);
19034 goto rw_error; 18877 goto rw_error;
19035 } 18878 }
19036 rc = DRXJ_DAP.read_reg16func(dev_addr, ORX_FWP_SRC_DGN_W__A, &data, 0); 18879 rc = drxj_dap_read_reg16(dev_addr, ORX_FWP_SRC_DGN_W__A, &data, 0);
19037 if (rc != 0) { 18880 if (rc != 0) {
19038 pr_err("error %d\n", rc); 18881 pr_err("error %d\n", rc);
19039 goto rw_error; 18882 goto rw_error;
@@ -19366,17 +19209,17 @@ ctrl_get_cfg_agc_internal(struct drx_demod_instance *demod, u16 *agc_internal)
19366 return -EINVAL; 19209 return -EINVAL;
19367 } 19210 }
19368 19211
19369 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_CF_POW__A, &iqm_cf_power, 0); 19212 rc = drxj_dap_read_reg16(dev_addr, IQM_CF_POW__A, &iqm_cf_power, 0);
19370 if (rc != 0) { 19213 if (rc != 0) {
19371 pr_err("error %d\n", rc); 19214 pr_err("error %d\n", rc);
19372 goto rw_error; 19215 goto rw_error;
19373 } 19216 }
19374 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_CF_SCALE_SH__A, &iqm_cf_scale_sh, 0); 19217 rc = drxj_dap_read_reg16(dev_addr, IQM_CF_SCALE_SH__A, &iqm_cf_scale_sh, 0);
19375 if (rc != 0) { 19218 if (rc != 0) {
19376 pr_err("error %d\n", rc); 19219 pr_err("error %d\n", rc);
19377 goto rw_error; 19220 goto rw_error;
19378 } 19221 }
19379 rc = DRXJ_DAP.read_reg16func(dev_addr, IQM_CF_AMP__A, &iqm_cf_amp, 0); 19222 rc = drxj_dap_read_reg16(dev_addr, IQM_CF_AMP__A, &iqm_cf_amp, 0);
19380 if (rc != 0) { 19223 if (rc != 0) {
19381 pr_err("error %d\n", rc); 19224 pr_err("error %d\n", rc);
19382 goto rw_error; 19225 goto rw_error;
@@ -19432,7 +19275,7 @@ ctrl_set_cfg_pre_saw(struct drx_demod_instance *demod, struct drxj_cfg_pre_saw *
19432 DRXJ_ISQAMSTD(pre_saw->standard)) || 19275 DRXJ_ISQAMSTD(pre_saw->standard)) ||
19433 (DRXJ_ISATVSTD(ext_attr->standard) && 19276 (DRXJ_ISATVSTD(ext_attr->standard) &&
19434 DRXJ_ISATVSTD(pre_saw->standard))) { 19277 DRXJ_ISATVSTD(pre_saw->standard))) {
19435 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_PDREF__A, pre_saw->reference, 0); 19278 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_PDREF__A, pre_saw->reference, 0);
19436 if (rc != 0) { 19279 if (rc != 0) {
19437 pr_err("error %d\n", rc); 19280 pr_err("error %d\n", rc);
19438 goto rw_error; 19281 goto rw_error;
@@ -19524,7 +19367,7 @@ ctrl_set_cfg_afe_gain(struct drx_demod_instance *demod, struct drxj_cfg_afe_gain
19524 19367
19525 /* Only if standard is currently active */ 19368 /* Only if standard is currently active */
19526 if (ext_attr->standard == afe_gain->standard) { 19369 if (ext_attr->standard == afe_gain->standard) {
19527 rc = DRXJ_DAP.write_reg16func(dev_addr, IQM_AF_PGA_GAIN__A, gain, 0); 19370 rc = drxj_dap_write_reg16(dev_addr, IQM_AF_PGA_GAIN__A, gain, 0);
19528 if (rc != 0) { 19371 if (rc != 0) {
19529 pr_err("error %d\n", rc); 19372 pr_err("error %d\n", rc);
19530 goto rw_error; 19373 goto rw_error;
@@ -19672,7 +19515,7 @@ ctrl_get_fec_meas_seq_count(struct drx_demod_instance *demod, u16 *fec_meas_seq_
19672 if (fec_meas_seq_count == NULL) 19515 if (fec_meas_seq_count == NULL)
19673 return -EINVAL; 19516 return -EINVAL;
19674 19517
19675 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SCU_RAM_FEC_MEAS_COUNT__A, fec_meas_seq_count, 0); 19518 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SCU_RAM_FEC_MEAS_COUNT__A, fec_meas_seq_count, 0);
19676 if (rc != 0) { 19519 if (rc != 0) {
19677 pr_err("error %d\n", rc); 19520 pr_err("error %d\n", rc);
19678 goto rw_error; 19521 goto rw_error;
@@ -19703,7 +19546,7 @@ ctrl_get_accum_cr_rs_cw_err(struct drx_demod_instance *demod, u32 *accum_cr_rs_c
19703 if (accum_cr_rs_cw_err == NULL) 19546 if (accum_cr_rs_cw_err == NULL)
19704 return -EINVAL; 19547 return -EINVAL;
19705 19548
19706 rc = DRXJ_DAP.read_reg32func(demod->my_i2c_dev_addr, SCU_RAM_FEC_ACCUM_CW_CORRECTED_LO__A, accum_cr_rs_cw_err, 0); 19549 rc = drxdap_fasi_read_reg32(demod->my_i2c_dev_addr, SCU_RAM_FEC_ACCUM_CW_CORRECTED_LO__A, accum_cr_rs_cw_err, 0);
19707 if (rc != 0) { 19550 if (rc != 0) {
19708 pr_err("error %d\n", rc); 19551 pr_err("error %d\n", rc);
19709 goto rw_error; 19552 goto rw_error;
@@ -19731,7 +19574,7 @@ static int ctrl_set_cfg(struct drx_demod_instance *demod, struct drx_cfg *config
19731 19574
19732 do { 19575 do {
19733 u16 dummy; 19576 u16 dummy;
19734 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SCU_RAM_VERSION_HI__A, &dummy, 0); 19577 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SCU_RAM_VERSION_HI__A, &dummy, 0);
19735 if (rc != 0) { 19578 if (rc != 0) {
19736 pr_err("error %d\n", rc); 19579 pr_err("error %d\n", rc);
19737 goto rw_error; 19580 goto rw_error;
@@ -19847,7 +19690,7 @@ static int ctrl_get_cfg(struct drx_demod_instance *demod, struct drx_cfg *config
19847 19690
19848 do { 19691 do {
19849 u16 dummy; 19692 u16 dummy;
19850 rc = DRXJ_DAP.read_reg16func(demod->my_i2c_dev_addr, SCU_RAM_VERSION_HI__A, &dummy, 0); 19693 rc = drxj_dap_read_reg16(demod->my_i2c_dev_addr, SCU_RAM_VERSION_HI__A, &dummy, 0);
19851 if (rc != 0) { 19694 if (rc != 0) {
19852 pr_err("error %d\n", rc); 19695 pr_err("error %d\n", rc);
19853 goto rw_error; 19696 goto rw_error;
@@ -20028,12 +19871,12 @@ int drxj_open(struct drx_demod_instance *demod)
20028 } 19871 }
20029 19872
20030 /* Soft reset of sys- and osc-clockdomain */ 19873 /* Soft reset of sys- and osc-clockdomain */
20031 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_CC_SOFT_RST__A, (SIO_CC_SOFT_RST_SYS__M | SIO_CC_SOFT_RST_OSC__M), 0); 19874 rc = drxj_dap_write_reg16(dev_addr, SIO_CC_SOFT_RST__A, (SIO_CC_SOFT_RST_SYS__M | SIO_CC_SOFT_RST_OSC__M), 0);
20032 if (rc != 0) { 19875 if (rc != 0) {
20033 pr_err("error %d\n", rc); 19876 pr_err("error %d\n", rc);
20034 goto rw_error; 19877 goto rw_error;
20035 } 19878 }
20036 rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY, 0); 19879 rc = drxj_dap_write_reg16(dev_addr, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY, 0);
20037 if (rc != 0) { 19880 if (rc != 0) {
20038 pr_err("error %d\n", rc); 19881 pr_err("error %d\n", rc);
20039 goto rw_error; 19882 goto rw_error;
@@ -20042,7 +19885,7 @@ int drxj_open(struct drx_demod_instance *demod)
20042 19885
20043 /* TODO first make sure that everything keeps working before enabling this */ 19886 /* TODO first make sure that everything keeps working before enabling this */
20044 /* PowerDownAnalogBlocks() */ 19887 /* PowerDownAnalogBlocks() */
20045 rc = DRXJ_DAP.write_reg16func(dev_addr, ATV_TOP_STDBY__A, (~ATV_TOP_STDBY_CVBS_STDBY_A2_ACTIVE) | ATV_TOP_STDBY_SIF_STDBY_STANDBY, 0); 19888 rc = drxj_dap_write_reg16(dev_addr, ATV_TOP_STDBY__A, (~ATV_TOP_STDBY_CVBS_STDBY_A2_ACTIVE) | ATV_TOP_STDBY_SIF_STDBY_STANDBY, 0);
20046 if (rc != 0) { 19889 if (rc != 0) {
20047 pr_err("error %d\n", rc); 19890 pr_err("error %d\n", rc);
20048 goto rw_error; 19891 goto rw_error;
@@ -20079,7 +19922,7 @@ int drxj_open(struct drx_demod_instance *demod)
20079 goto rw_error; 19922 goto rw_error;
20080 } 19923 }
20081 /* Stop SCU */ 19924 /* Stop SCU */
20082 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_COMM_EXEC__A, SCU_COMM_EXEC_STOP, 0); 19925 rc = drxj_dap_write_reg16(dev_addr, SCU_COMM_EXEC__A, SCU_COMM_EXEC_STOP, 0);
20083 if (rc != 0) { 19926 if (rc != 0) {
20084 pr_err("error %d\n", rc); 19927 pr_err("error %d\n", rc);
20085 goto rw_error; 19928 goto rw_error;
@@ -20114,7 +19957,7 @@ int drxj_open(struct drx_demod_instance *demod)
20114 } 19957 }
20115 19958
20116 /* Run SCU for a little while to initialize microcode version numbers */ 19959 /* Run SCU for a little while to initialize microcode version numbers */
20117 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE, 0); 19960 rc = drxj_dap_write_reg16(dev_addr, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE, 0);
20118 if (rc != 0) { 19961 if (rc != 0) {
20119 pr_err("error %d\n", rc); 19962 pr_err("error %d\n", rc);
20120 goto rw_error; 19963 goto rw_error;
@@ -20152,12 +19995,12 @@ int drxj_open(struct drx_demod_instance *demod)
20152 driver_version += (VERSION_PATCH / 10) % 10; 19995 driver_version += (VERSION_PATCH / 10) % 10;
20153 driver_version <<= 4; 19996 driver_version <<= 4;
20154 driver_version += (VERSION_PATCH % 10); 19997 driver_version += (VERSION_PATCH % 10);
20155 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_DRIVER_VER_HI__A, (u16)(driver_version >> 16), 0); 19998 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_DRIVER_VER_HI__A, (u16)(driver_version >> 16), 0);
20156 if (rc != 0) { 19999 if (rc != 0) {
20157 pr_err("error %d\n", rc); 20000 pr_err("error %d\n", rc);
20158 goto rw_error; 20001 goto rw_error;
20159 } 20002 }
20160 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_DRIVER_VER_LO__A, (u16)(driver_version & 0xFFFF), 0); 20003 rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_DRIVER_VER_LO__A, (u16)(driver_version & 0xFFFF), 0);
20161 if (rc != 0) { 20004 if (rc != 0) {
20162 pr_err("error %d\n", rc); 20005 pr_err("error %d\n", rc);
20163 goto rw_error; 20006 goto rw_error;
@@ -20201,7 +20044,7 @@ int drxj_close(struct drx_demod_instance *demod)
20201 goto rw_error; 20044 goto rw_error;
20202 } 20045 }
20203 20046
20204 rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE, 0); 20047 rc = drxj_dap_write_reg16(dev_addr, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE, 0);
20205 if (rc != 0) { 20048 if (rc != 0) {
20206 pr_err("error %d\n", rc); 20049 pr_err("error %d\n", rc);
20207 goto rw_error; 20050 goto rw_error;
@@ -20463,7 +20306,7 @@ static int drx_ctrl_u_code(struct drx_demod_instance *demod,
20463 /* Perform the desired action */ 20306 /* Perform the desired action */
20464 switch (action) { 20307 switch (action) {
20465 case UCODE_UPLOAD: /* Upload microcode */ 20308 case UCODE_UPLOAD: /* Upload microcode */
20466 if (demod->my_access_funct->write_block_func(dev_addr, 20309 if (drxdap_fasi_write_block(dev_addr,
20467 block_hdr.addr, 20310 block_hdr.addr,
20468 mc_block_nr_bytes, 20311 mc_block_nr_bytes,
20469 mc_data, 0x0000)) { 20312 mc_data, 0x0000)) {
@@ -20487,8 +20330,7 @@ static int drx_ctrl_u_code(struct drx_demod_instance *demod,
20487 else 20330 else
20488 bytes_to_comp = bytes_left; 20331 bytes_to_comp = bytes_left;
20489 20332
20490 if (demod->my_access_funct-> 20333 if (drxdap_fasi_read_block(dev_addr,
20491 read_block_func(dev_addr,
20492 curr_addr, 20334 curr_addr,
20493 (u16)bytes_to_comp, 20335 (u16)bytes_to_comp,
20494 (u8 *)mc_data_buffer, 20336 (u8 *)mc_data_buffer,
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-28 14:43:25 -0500