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authorAntti Palosaari <crope@iki.fi>2013-12-02 11:11:21 -0500
committerMauro Carvalho Chehab <m.chehab@samsung.com>2013-12-19 06:22:29 -0500
commit58b7450d56cacaa12d82ff9e2f5b461f65f2ade0 (patch)
tree0871ad6078aa1b50060bcec187c0ab408ddd1977 /drivers/media/dvb-frontends/m88ds3103.h
parentc19314b09bc0839736f2c74422b21de36a86e7b7 (diff)
[media] m88ds3103: remove unneeded AGC from inittab
Optimal AGC is highly depended on used RF tuner and due to that it is already included to chip configuration. However, inittab has default AGC value, which was later replaced by one from config. Add also comment to all chip configuration options about default values and if those are needed to set or not. Reported-by: David Howells <dhowells@redhat.com> Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'drivers/media/dvb-frontends/m88ds3103.h')
-rw-r--r--drivers/media/dvb-frontends/m88ds3103.h14
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/media/dvb-frontends/m88ds3103.h b/drivers/media/dvb-frontends/m88ds3103.h
index 287d62a4ba7f..eaa5d10921d3 100644
--- a/drivers/media/dvb-frontends/m88ds3103.h
+++ b/drivers/media/dvb-frontends/m88ds3103.h
@@ -26,26 +26,28 @@
26struct m88ds3103_config { 26struct m88ds3103_config {
27 /* 27 /*
28 * I2C address 28 * I2C address
29 * Default: none, must set
29 * 0x68, ... 30 * 0x68, ...
30 */ 31 */
31 u8 i2c_addr; 32 u8 i2c_addr;
32 33
33 /* 34 /*
34 * clock 35 * clock
36 * Default: none, must set
35 * 27000000 37 * 27000000
36 */ 38 */
37 u32 clock; 39 u32 clock;
38 40
39 /* 41 /*
40 * max bytes I2C provider is asked to write at once 42 * max bytes I2C provider is asked to write at once
41 * Note: Buffer is taken from the stack currently! 43 * Default: none, must set
42 * Value must be set.
43 * 33, 65, ... 44 * 33, 65, ...
44 */ 45 */
45 u16 i2c_wr_max; 46 u16 i2c_wr_max;
46 47
47 /* 48 /*
48 * TS output mode 49 * TS output mode
50 * Default: M88DS3103_TS_SERIAL
49 */ 51 */
50#define M88DS3103_TS_SERIAL 0 /* TS output pin D0, normal */ 52#define M88DS3103_TS_SERIAL 0 /* TS output pin D0, normal */
51#define M88DS3103_TS_SERIAL_D7 1 /* TS output pin D7 */ 53#define M88DS3103_TS_SERIAL_D7 1 /* TS output pin D7 */
@@ -58,16 +60,19 @@ struct m88ds3103_config {
58 60
59 /* 61 /*
60 * spectrum inversion 62 * spectrum inversion
63 * Default: 0
61 */ 64 */
62 u8 spec_inv:1; 65 u8 spec_inv:1;
63 66
64 /* 67 /*
65 * AGC polarity 68 * AGC polarity
69 * Default: 0
66 */ 70 */
67 u8 agc_inv:1; 71 u8 agc_inv:1;
68 72
69 /* 73 /*
70 * clock output 74 * clock output
75 * Default: M88DS3103_CLOCK_OUT_DISABLED
71 */ 76 */
72#define M88DS3103_CLOCK_OUT_DISABLED 0 77#define M88DS3103_CLOCK_OUT_DISABLED 0
73#define M88DS3103_CLOCK_OUT_ENABLED 1 78#define M88DS3103_CLOCK_OUT_ENABLED 1
@@ -76,9 +81,14 @@ struct m88ds3103_config {
76 81
77 /* 82 /*
78 * DiSEqC envelope mode 83 * DiSEqC envelope mode
84 * Default: 0
79 */ 85 */
80 u8 envelope_mode:1; 86 u8 envelope_mode:1;
81 87
88 /*
89 * AGC configuration
90 * Default: none, must set
91 */
82 u8 agc; 92 u8 agc;
83}; 93};
84 94