diff options
author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-08-13 22:13:41 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-08-13 22:13:41 -0400 |
commit | 9a0bf528b4d66b605f02634236da085595c22101 (patch) | |
tree | e9ff008ff15c3ee5add6d41173ee5e61939480dd /drivers/media/dvb-frontends/af9033_priv.h | |
parent | 3d6c2bc08ac4f75bf3597740357c98f2207ca412 (diff) |
[media] move the dvb/frontends to drivers/media/dvb-frontends
Raise the DVB frontends one level up, as the intention is to remove
the drivers/media/dvb directory.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb-frontends/af9033_priv.h')
-rw-r--r-- | drivers/media/dvb-frontends/af9033_priv.h | 470 |
1 files changed, 470 insertions, 0 deletions
diff --git a/drivers/media/dvb-frontends/af9033_priv.h b/drivers/media/dvb-frontends/af9033_priv.h new file mode 100644 index 000000000000..0b783b9ed75e --- /dev/null +++ b/drivers/media/dvb-frontends/af9033_priv.h | |||
@@ -0,0 +1,470 @@ | |||
1 | /* | ||
2 | * Afatech AF9033 demodulator driver | ||
3 | * | ||
4 | * Copyright (C) 2009 Antti Palosaari <crope@iki.fi> | ||
5 | * Copyright (C) 2012 Antti Palosaari <crope@iki.fi> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License along | ||
18 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | ||
20 | */ | ||
21 | |||
22 | #ifndef AF9033_PRIV_H | ||
23 | #define AF9033_PRIV_H | ||
24 | |||
25 | #include "dvb_frontend.h" | ||
26 | #include "af9033.h" | ||
27 | |||
28 | struct reg_val { | ||
29 | u32 reg; | ||
30 | u8 val; | ||
31 | }; | ||
32 | |||
33 | struct reg_val_mask { | ||
34 | u32 reg; | ||
35 | u8 val; | ||
36 | u8 mask; | ||
37 | }; | ||
38 | |||
39 | struct coeff { | ||
40 | u32 clock; | ||
41 | u32 bandwidth_hz; | ||
42 | u8 val[36]; | ||
43 | }; | ||
44 | |||
45 | struct clock_adc { | ||
46 | u32 clock; | ||
47 | u32 adc; | ||
48 | }; | ||
49 | |||
50 | struct val_snr { | ||
51 | u32 val; | ||
52 | u8 snr; | ||
53 | }; | ||
54 | |||
55 | /* Xtal clock vs. ADC clock lookup table */ | ||
56 | static const struct clock_adc clock_adc_lut[] = { | ||
57 | { 16384000, 20480000 }, | ||
58 | { 20480000, 20480000 }, | ||
59 | { 36000000, 20250000 }, | ||
60 | { 30000000, 20156250 }, | ||
61 | { 26000000, 20583333 }, | ||
62 | { 28000000, 20416667 }, | ||
63 | { 32000000, 20500000 }, | ||
64 | { 34000000, 20187500 }, | ||
65 | { 24000000, 20500000 }, | ||
66 | { 22000000, 20625000 }, | ||
67 | { 12000000, 20250000 }, | ||
68 | }; | ||
69 | |||
70 | /* pre-calculated coeff lookup table */ | ||
71 | static const struct coeff coeff_lut[] = { | ||
72 | /* 12.000 MHz */ | ||
73 | { 12000000, 8000000, { | ||
74 | 0x01, 0xce, 0x55, 0xc9, 0x00, 0xe7, 0x2a, 0xe4, 0x00, 0x73, | ||
75 | 0x99, 0x0f, 0x00, 0x73, 0x95, 0x72, 0x00, 0x73, 0x91, 0xd5, | ||
76 | 0x00, 0x39, 0xca, 0xb9, 0x00, 0xe7, 0x2a, 0xe4, 0x00, 0x73, | ||
77 | 0x95, 0x72, 0x37, 0x02, 0xce, 0x01 } | ||
78 | }, | ||
79 | { 12000000, 7000000, { | ||
80 | 0x01, 0x94, 0x8b, 0x10, 0x00, 0xca, 0x45, 0x88, 0x00, 0x65, | ||
81 | 0x25, 0xed, 0x00, 0x65, 0x22, 0xc4, 0x00, 0x65, 0x1f, 0x9b, | ||
82 | 0x00, 0x32, 0x91, 0x62, 0x00, 0xca, 0x45, 0x88, 0x00, 0x65, | ||
83 | 0x22, 0xc4, 0x88, 0x02, 0x95, 0x01 } | ||
84 | }, | ||
85 | { 12000000, 6000000, { | ||
86 | 0x01, 0x5a, 0xc0, 0x56, 0x00, 0xad, 0x60, 0x2b, 0x00, 0x56, | ||
87 | 0xb2, 0xcb, 0x00, 0x56, 0xb0, 0x15, 0x00, 0x56, 0xad, 0x60, | ||
88 | 0x00, 0x2b, 0x58, 0x0b, 0x00, 0xad, 0x60, 0x2b, 0x00, 0x56, | ||
89 | 0xb0, 0x15, 0xf4, 0x02, 0x5b, 0x01 } | ||
90 | }, | ||
91 | }; | ||
92 | |||
93 | /* QPSK SNR lookup table */ | ||
94 | static const struct val_snr qpsk_snr_lut[] = { | ||
95 | { 0x0b4771, 0 }, | ||
96 | { 0x0c1aed, 1 }, | ||
97 | { 0x0d0d27, 2 }, | ||
98 | { 0x0e4d19, 3 }, | ||
99 | { 0x0e5da8, 4 }, | ||
100 | { 0x107097, 5 }, | ||
101 | { 0x116975, 6 }, | ||
102 | { 0x1252d9, 7 }, | ||
103 | { 0x131fa4, 8 }, | ||
104 | { 0x13d5e1, 9 }, | ||
105 | { 0x148e53, 10 }, | ||
106 | { 0x15358b, 11 }, | ||
107 | { 0x15dd29, 12 }, | ||
108 | { 0x168112, 13 }, | ||
109 | { 0x170b61, 14 }, | ||
110 | { 0x17a532, 15 }, | ||
111 | { 0x180f94, 16 }, | ||
112 | { 0x186ed2, 17 }, | ||
113 | { 0x18b271, 18 }, | ||
114 | { 0x18e118, 19 }, | ||
115 | { 0x18ff4b, 20 }, | ||
116 | { 0x190af1, 21 }, | ||
117 | { 0x191451, 22 }, | ||
118 | { 0xffffff, 23 }, | ||
119 | }; | ||
120 | |||
121 | /* QAM16 SNR lookup table */ | ||
122 | static const struct val_snr qam16_snr_lut[] = { | ||
123 | { 0x04f0d5, 0 }, | ||
124 | { 0x05387a, 1 }, | ||
125 | { 0x0573a4, 2 }, | ||
126 | { 0x05a99e, 3 }, | ||
127 | { 0x05cc80, 4 }, | ||
128 | { 0x05eb62, 5 }, | ||
129 | { 0x05fecf, 6 }, | ||
130 | { 0x060b80, 7 }, | ||
131 | { 0x062501, 8 }, | ||
132 | { 0x064865, 9 }, | ||
133 | { 0x069604, 10 }, | ||
134 | { 0x06f356, 11 }, | ||
135 | { 0x07706a, 12 }, | ||
136 | { 0x0804d3, 13 }, | ||
137 | { 0x089d1a, 14 }, | ||
138 | { 0x093e3d, 15 }, | ||
139 | { 0x09e35d, 16 }, | ||
140 | { 0x0a7c3c, 17 }, | ||
141 | { 0x0afaf8, 18 }, | ||
142 | { 0x0b719d, 19 }, | ||
143 | { 0x0bda6a, 20 }, | ||
144 | { 0x0c0c75, 21 }, | ||
145 | { 0x0c3f7d, 22 }, | ||
146 | { 0x0c5e62, 23 }, | ||
147 | { 0x0c6c31, 24 }, | ||
148 | { 0x0c7925, 25 }, | ||
149 | { 0xffffff, 26 }, | ||
150 | }; | ||
151 | |||
152 | /* QAM64 SNR lookup table */ | ||
153 | static const struct val_snr qam64_snr_lut[] = { | ||
154 | { 0x0256d0, 0 }, | ||
155 | { 0x027a65, 1 }, | ||
156 | { 0x029873, 2 }, | ||
157 | { 0x02b7fe, 3 }, | ||
158 | { 0x02cf1e, 4 }, | ||
159 | { 0x02e234, 5 }, | ||
160 | { 0x02f409, 6 }, | ||
161 | { 0x030046, 7 }, | ||
162 | { 0x030844, 8 }, | ||
163 | { 0x030a02, 9 }, | ||
164 | { 0x030cde, 10 }, | ||
165 | { 0x031031, 11 }, | ||
166 | { 0x03144c, 12 }, | ||
167 | { 0x0315dd, 13 }, | ||
168 | { 0x031920, 14 }, | ||
169 | { 0x0322d0, 15 }, | ||
170 | { 0x0339fc, 16 }, | ||
171 | { 0x0364a1, 17 }, | ||
172 | { 0x038bcc, 18 }, | ||
173 | { 0x03c7d3, 19 }, | ||
174 | { 0x0408cc, 20 }, | ||
175 | { 0x043bed, 21 }, | ||
176 | { 0x048061, 22 }, | ||
177 | { 0x04be95, 23 }, | ||
178 | { 0x04fa7d, 24 }, | ||
179 | { 0x052405, 25 }, | ||
180 | { 0x05570d, 26 }, | ||
181 | { 0x059feb, 27 }, | ||
182 | { 0x05bf38, 28 }, | ||
183 | { 0xffffff, 29 }, | ||
184 | }; | ||
185 | |||
186 | static const struct reg_val ofsm_init[] = { | ||
187 | { 0x800051, 0x01 }, | ||
188 | { 0x800070, 0x0a }, | ||
189 | { 0x80007e, 0x04 }, | ||
190 | { 0x800081, 0x0a }, | ||
191 | { 0x80008a, 0x01 }, | ||
192 | { 0x80008e, 0x01 }, | ||
193 | { 0x800092, 0x06 }, | ||
194 | { 0x800099, 0x01 }, | ||
195 | { 0x80009f, 0xe1 }, | ||
196 | { 0x8000a0, 0xcf }, | ||
197 | { 0x8000a3, 0x01 }, | ||
198 | { 0x8000a5, 0x01 }, | ||
199 | { 0x8000a6, 0x01 }, | ||
200 | { 0x8000a9, 0x00 }, | ||
201 | { 0x8000aa, 0x01 }, | ||
202 | { 0x8000ab, 0x01 }, | ||
203 | { 0x8000b0, 0x01 }, | ||
204 | { 0x8000c0, 0x05 }, | ||
205 | { 0x8000c4, 0x19 }, | ||
206 | { 0x80f000, 0x0f }, | ||
207 | { 0x80f016, 0x10 }, | ||
208 | { 0x80f017, 0x04 }, | ||
209 | { 0x80f018, 0x05 }, | ||
210 | { 0x80f019, 0x04 }, | ||
211 | { 0x80f01a, 0x05 }, | ||
212 | { 0x80f021, 0x03 }, | ||
213 | { 0x80f022, 0x0a }, | ||
214 | { 0x80f023, 0x0a }, | ||
215 | { 0x80f02b, 0x00 }, | ||
216 | { 0x80f02c, 0x01 }, | ||
217 | { 0x80f064, 0x03 }, | ||
218 | { 0x80f065, 0xf9 }, | ||
219 | { 0x80f066, 0x03 }, | ||
220 | { 0x80f067, 0x01 }, | ||
221 | { 0x80f06f, 0xe0 }, | ||
222 | { 0x80f070, 0x03 }, | ||
223 | { 0x80f072, 0x0f }, | ||
224 | { 0x80f073, 0x03 }, | ||
225 | { 0x80f078, 0x00 }, | ||
226 | { 0x80f087, 0x00 }, | ||
227 | { 0x80f09b, 0x3f }, | ||
228 | { 0x80f09c, 0x00 }, | ||
229 | { 0x80f09d, 0x20 }, | ||
230 | { 0x80f09e, 0x00 }, | ||
231 | { 0x80f09f, 0x0c }, | ||
232 | { 0x80f0a0, 0x00 }, | ||
233 | { 0x80f130, 0x04 }, | ||
234 | { 0x80f132, 0x04 }, | ||
235 | { 0x80f144, 0x1a }, | ||
236 | { 0x80f146, 0x00 }, | ||
237 | { 0x80f14a, 0x01 }, | ||
238 | { 0x80f14c, 0x00 }, | ||
239 | { 0x80f14d, 0x00 }, | ||
240 | { 0x80f14f, 0x04 }, | ||
241 | { 0x80f158, 0x7f }, | ||
242 | { 0x80f15a, 0x00 }, | ||
243 | { 0x80f15b, 0x08 }, | ||
244 | { 0x80f15d, 0x03 }, | ||
245 | { 0x80f15e, 0x05 }, | ||
246 | { 0x80f163, 0x05 }, | ||
247 | { 0x80f166, 0x01 }, | ||
248 | { 0x80f167, 0x40 }, | ||
249 | { 0x80f168, 0x0f }, | ||
250 | { 0x80f17a, 0x00 }, | ||
251 | { 0x80f17b, 0x00 }, | ||
252 | { 0x80f183, 0x01 }, | ||
253 | { 0x80f19d, 0x40 }, | ||
254 | { 0x80f1bc, 0x36 }, | ||
255 | { 0x80f1bd, 0x00 }, | ||
256 | { 0x80f1cb, 0xa0 }, | ||
257 | { 0x80f1cc, 0x01 }, | ||
258 | { 0x80f204, 0x10 }, | ||
259 | { 0x80f214, 0x00 }, | ||
260 | { 0x80f40e, 0x0a }, | ||
261 | { 0x80f40f, 0x40 }, | ||
262 | { 0x80f410, 0x08 }, | ||
263 | { 0x80f55f, 0x0a }, | ||
264 | { 0x80f561, 0x15 }, | ||
265 | { 0x80f562, 0x20 }, | ||
266 | { 0x80f5df, 0xfb }, | ||
267 | { 0x80f5e0, 0x00 }, | ||
268 | { 0x80f5e3, 0x09 }, | ||
269 | { 0x80f5e4, 0x01 }, | ||
270 | { 0x80f5e5, 0x01 }, | ||
271 | { 0x80f5f8, 0x01 }, | ||
272 | { 0x80f5fd, 0x01 }, | ||
273 | { 0x80f600, 0x05 }, | ||
274 | { 0x80f601, 0x08 }, | ||
275 | { 0x80f602, 0x0b }, | ||
276 | { 0x80f603, 0x0e }, | ||
277 | { 0x80f604, 0x11 }, | ||
278 | { 0x80f605, 0x14 }, | ||
279 | { 0x80f606, 0x17 }, | ||
280 | { 0x80f607, 0x1f }, | ||
281 | { 0x80f60e, 0x00 }, | ||
282 | { 0x80f60f, 0x04 }, | ||
283 | { 0x80f610, 0x32 }, | ||
284 | { 0x80f611, 0x10 }, | ||
285 | { 0x80f707, 0xfc }, | ||
286 | { 0x80f708, 0x00 }, | ||
287 | { 0x80f709, 0x37 }, | ||
288 | { 0x80f70a, 0x00 }, | ||
289 | { 0x80f78b, 0x01 }, | ||
290 | { 0x80f80f, 0x40 }, | ||
291 | { 0x80f810, 0x54 }, | ||
292 | { 0x80f811, 0x5a }, | ||
293 | { 0x80f905, 0x01 }, | ||
294 | { 0x80fb06, 0x03 }, | ||
295 | { 0x80fd8b, 0x00 }, | ||
296 | }; | ||
297 | |||
298 | /* Infineon TUA 9001 tuner init | ||
299 | AF9033_TUNER_TUA9001 = 0x27 */ | ||
300 | static const struct reg_val tuner_init_tua9001[] = { | ||
301 | { 0x800046, 0x27 }, | ||
302 | { 0x800057, 0x00 }, | ||
303 | { 0x800058, 0x01 }, | ||
304 | { 0x80005f, 0x00 }, | ||
305 | { 0x800060, 0x00 }, | ||
306 | { 0x80006d, 0x00 }, | ||
307 | { 0x800071, 0x05 }, | ||
308 | { 0x800072, 0x02 }, | ||
309 | { 0x800074, 0x01 }, | ||
310 | { 0x800075, 0x03 }, | ||
311 | { 0x800076, 0x02 }, | ||
312 | { 0x800077, 0x00 }, | ||
313 | { 0x800078, 0x01 }, | ||
314 | { 0x800079, 0x00 }, | ||
315 | { 0x80007a, 0x7e }, | ||
316 | { 0x80007b, 0x3e }, | ||
317 | { 0x800093, 0x00 }, | ||
318 | { 0x800094, 0x01 }, | ||
319 | { 0x800095, 0x02 }, | ||
320 | { 0x800096, 0x01 }, | ||
321 | { 0x800098, 0x0a }, | ||
322 | { 0x80009b, 0x05 }, | ||
323 | { 0x80009c, 0x80 }, | ||
324 | { 0x8000b3, 0x00 }, | ||
325 | { 0x8000c1, 0x01 }, | ||
326 | { 0x8000c2, 0x00 }, | ||
327 | { 0x80f007, 0x00 }, | ||
328 | { 0x80f01f, 0x82 }, | ||
329 | { 0x80f020, 0x00 }, | ||
330 | { 0x80f029, 0x82 }, | ||
331 | { 0x80f02a, 0x00 }, | ||
332 | { 0x80f047, 0x00 }, | ||
333 | { 0x80f054, 0x00 }, | ||
334 | { 0x80f055, 0x00 }, | ||
335 | { 0x80f077, 0x01 }, | ||
336 | { 0x80f1e6, 0x00 }, | ||
337 | }; | ||
338 | |||
339 | /* Fitipower fc0011 tuner init | ||
340 | AF9033_TUNER_FC0011 = 0x28 */ | ||
341 | static const struct reg_val tuner_init_fc0011[] = { | ||
342 | { 0x800046, AF9033_TUNER_FC0011 }, | ||
343 | { 0x800057, 0x00 }, | ||
344 | { 0x800058, 0x01 }, | ||
345 | { 0x80005f, 0x00 }, | ||
346 | { 0x800060, 0x00 }, | ||
347 | { 0x800068, 0xa5 }, | ||
348 | { 0x80006e, 0x01 }, | ||
349 | { 0x800071, 0x0A }, | ||
350 | { 0x800072, 0x02 }, | ||
351 | { 0x800074, 0x01 }, | ||
352 | { 0x800079, 0x01 }, | ||
353 | { 0x800093, 0x00 }, | ||
354 | { 0x800094, 0x00 }, | ||
355 | { 0x800095, 0x00 }, | ||
356 | { 0x800096, 0x00 }, | ||
357 | { 0x80009b, 0x2D }, | ||
358 | { 0x80009c, 0x60 }, | ||
359 | { 0x80009d, 0x23 }, | ||
360 | { 0x8000a4, 0x50 }, | ||
361 | { 0x8000ad, 0x50 }, | ||
362 | { 0x8000b3, 0x01 }, | ||
363 | { 0x8000b7, 0x88 }, | ||
364 | { 0x8000b8, 0xa6 }, | ||
365 | { 0x8000c3, 0x01 }, | ||
366 | { 0x8000c4, 0x01 }, | ||
367 | { 0x8000c7, 0x69 }, | ||
368 | { 0x80F007, 0x00 }, | ||
369 | { 0x80F00A, 0x1B }, | ||
370 | { 0x80F00B, 0x1B }, | ||
371 | { 0x80F00C, 0x1B }, | ||
372 | { 0x80F00D, 0x1B }, | ||
373 | { 0x80F00E, 0xFF }, | ||
374 | { 0x80F00F, 0x01 }, | ||
375 | { 0x80F010, 0x00 }, | ||
376 | { 0x80F011, 0x02 }, | ||
377 | { 0x80F012, 0xFF }, | ||
378 | { 0x80F013, 0x01 }, | ||
379 | { 0x80F014, 0x00 }, | ||
380 | { 0x80F015, 0x02 }, | ||
381 | { 0x80F01B, 0xEF }, | ||
382 | { 0x80F01C, 0x01 }, | ||
383 | { 0x80F01D, 0x0f }, | ||
384 | { 0x80F01E, 0x02 }, | ||
385 | { 0x80F01F, 0x6E }, | ||
386 | { 0x80F020, 0x00 }, | ||
387 | { 0x80F025, 0xDE }, | ||
388 | { 0x80F026, 0x00 }, | ||
389 | { 0x80F027, 0x0A }, | ||
390 | { 0x80F028, 0x03 }, | ||
391 | { 0x80F029, 0x6E }, | ||
392 | { 0x80F02A, 0x00 }, | ||
393 | { 0x80F047, 0x00 }, | ||
394 | { 0x80F054, 0x00 }, | ||
395 | { 0x80F055, 0x00 }, | ||
396 | { 0x80F077, 0x01 }, | ||
397 | { 0x80F1E6, 0x00 }, | ||
398 | }; | ||
399 | |||
400 | /* MaxLinear MxL5007T tuner init | ||
401 | AF9033_TUNER_MXL5007T = 0xa0 */ | ||
402 | static const struct reg_val tuner_init_mxl5007t[] = { | ||
403 | { 0x800046, 0x1b }, | ||
404 | { 0x800057, 0x01 }, | ||
405 | { 0x800058, 0x01 }, | ||
406 | { 0x80005f, 0x00 }, | ||
407 | { 0x800060, 0x00 }, | ||
408 | { 0x800068, 0x96 }, | ||
409 | { 0x800071, 0x05 }, | ||
410 | { 0x800072, 0x02 }, | ||
411 | { 0x800074, 0x01 }, | ||
412 | { 0x800079, 0x01 }, | ||
413 | { 0x800093, 0x00 }, | ||
414 | { 0x800094, 0x00 }, | ||
415 | { 0x800095, 0x00 }, | ||
416 | { 0x800096, 0x00 }, | ||
417 | { 0x8000b3, 0x01 }, | ||
418 | { 0x8000c1, 0x01 }, | ||
419 | { 0x8000c2, 0x00 }, | ||
420 | { 0x80f007, 0x00 }, | ||
421 | { 0x80f00c, 0x19 }, | ||
422 | { 0x80f00d, 0x1a }, | ||
423 | { 0x80f012, 0xda }, | ||
424 | { 0x80f013, 0x00 }, | ||
425 | { 0x80f014, 0x00 }, | ||
426 | { 0x80f015, 0x02 }, | ||
427 | { 0x80f01f, 0x82 }, | ||
428 | { 0x80f020, 0x00 }, | ||
429 | { 0x80f029, 0x82 }, | ||
430 | { 0x80f02a, 0x00 }, | ||
431 | { 0x80f077, 0x02 }, | ||
432 | { 0x80f1e6, 0x00 }, | ||
433 | }; | ||
434 | |||
435 | /* NXP TDA 18218HN tuner init | ||
436 | AF9033_TUNER_TDA18218 = 0xa1 */ | ||
437 | static const struct reg_val tuner_init_tda18218[] = { | ||
438 | {0x800046, 0xa1}, | ||
439 | {0x800057, 0x01}, | ||
440 | {0x800058, 0x01}, | ||
441 | {0x80005f, 0x00}, | ||
442 | {0x800060, 0x00}, | ||
443 | {0x800071, 0x05}, | ||
444 | {0x800072, 0x02}, | ||
445 | {0x800074, 0x01}, | ||
446 | {0x800079, 0x01}, | ||
447 | {0x800093, 0x00}, | ||
448 | {0x800094, 0x00}, | ||
449 | {0x800095, 0x00}, | ||
450 | {0x800096, 0x00}, | ||
451 | {0x8000b3, 0x01}, | ||
452 | {0x8000c3, 0x01}, | ||
453 | {0x8000c4, 0x00}, | ||
454 | {0x80f007, 0x00}, | ||
455 | {0x80f00c, 0x19}, | ||
456 | {0x80f00d, 0x1a}, | ||
457 | {0x80f012, 0xda}, | ||
458 | {0x80f013, 0x00}, | ||
459 | {0x80f014, 0x00}, | ||
460 | {0x80f015, 0x02}, | ||
461 | {0x80f01f, 0x82}, | ||
462 | {0x80f020, 0x00}, | ||
463 | {0x80f029, 0x82}, | ||
464 | {0x80f02a, 0x00}, | ||
465 | {0x80f077, 0x02}, | ||
466 | {0x80f1e6, 0x00}, | ||
467 | }; | ||
468 | |||
469 | #endif /* AF9033_PRIV_H */ | ||
470 | |||