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authorOliver Endriss <o.endriss@gmx.de>2005-07-07 20:58:28 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-07-07 21:24:02 -0400
commit25de192660627e1e8dc8ee6a120ff8b54d108593 (patch)
tree45e15b799e09f6b5fe478082303a8c276529edc1 /drivers/media/common
parente161f817bebecc1c1cc461dc83cce2eafbed9ee9 (diff)
[PATCH] dvb: ttpci: fix timeout handling to be save with PREEMPT
Timeout handling fixed, especially for preemtible kernels and/or high system load. Signed-off-by: Oliver Endriss <o.endriss@gmx.de> Signed-off-by: Johannes Stezenbach <js@linuxtv.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/media/common')
-rw-r--r--drivers/media/common/saa7146_core.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/media/common/saa7146_core.c b/drivers/media/common/saa7146_core.c
index 77ff22911566..cd5828b5e9e3 100644
--- a/drivers/media/common/saa7146_core.c
+++ b/drivers/media/common/saa7146_core.c
@@ -62,13 +62,15 @@ void saa7146_setgpio(struct saa7146_dev *dev, int port, u32 data)
62int saa7146_wait_for_debi_done(struct saa7146_dev *dev, int nobusyloop) 62int saa7146_wait_for_debi_done(struct saa7146_dev *dev, int nobusyloop)
63{ 63{
64 unsigned long start; 64 unsigned long start;
65 int err;
65 66
66 /* wait for registers to be programmed */ 67 /* wait for registers to be programmed */
67 start = jiffies; 68 start = jiffies;
68 while (1) { 69 while (1) {
69 if (saa7146_read(dev, MC2) & 2) 70 err = time_after(jiffies, start + HZ/20);
70 break; 71 if (saa7146_read(dev, MC2) & 2)
71 if (time_after(jiffies, start + HZ/20)) { 72 break;
73 if (err) {
72 DEB_S(("timed out while waiting for registers getting programmed\n")); 74 DEB_S(("timed out while waiting for registers getting programmed\n"));
73 return -ETIMEDOUT; 75 return -ETIMEDOUT;
74 } 76 }
@@ -79,10 +81,11 @@ int saa7146_wait_for_debi_done(struct saa7146_dev *dev, int nobusyloop)
79 /* wait for transfer to complete */ 81 /* wait for transfer to complete */
80 start = jiffies; 82 start = jiffies;
81 while (1) { 83 while (1) {
84 err = time_after(jiffies, start + HZ/4);
82 if (!(saa7146_read(dev, PSR) & SPCI_DEBI_S)) 85 if (!(saa7146_read(dev, PSR) & SPCI_DEBI_S))
83 break; 86 break;
84 saa7146_read(dev, MC2); 87 saa7146_read(dev, MC2);
85 if (time_after(jiffies, start + HZ/4)) { 88 if (err) {
86 DEB_S(("timed out while waiting for transfer completion\n")); 89 DEB_S(("timed out while waiting for transfer completion\n"));
87 return -ETIMEDOUT; 90 return -ETIMEDOUT;
88 } 91 }