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authorMauro Carvalho Chehab <mchehab@redhat.com>2011-07-21 02:57:10 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-01-04 19:20:16 -0500
commit66aea30d32b8938f0b6ef06b0a2811272bd9968d (patch)
treed6cf1da4c57cbda20ae74a9068ae2a12d1c1d675 /drivers/media/common
parentfd1126cac093f626e412c0419c763ea3ee304dfe (diff)
[media] mt2063: Remove several unused parameters
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/common')
-rw-r--r--drivers/media/common/tuners/mt2063.c364
1 files changed, 2 insertions, 362 deletions
diff --git a/drivers/media/common/tuners/mt2063.c b/drivers/media/common/tuners/mt2063.c
index 86620073c174..a43a859cf063 100644
--- a/drivers/media/common/tuners/mt2063.c
+++ b/drivers/media/common/tuners/mt2063.c
@@ -124,18 +124,6 @@ enum MT2063_Mask_Bits {
124 * specifies the tuning algorithm parameter to be read/written. 124 * specifies the tuning algorithm parameter to be read/written.
125 */ 125 */
126enum MT2063_Param { 126enum MT2063_Param {
127 /* tuner address set by MT2063_Open() */
128 MT2063_IC_ADDR,
129
130 /* max number of MT2063 tuners set by MT_TUNER_CNT in mt_userdef.h */
131 MT2063_MAX_OPEN,
132
133 /* current number of open MT2063 tuners set by MT2063_Open() */
134 MT2063_NUM_OPEN,
135
136 /* crystal frequency (default: 16000000 Hz) */
137 MT2063_SRO_FREQ,
138
139 /* min tuning step size (default: 50000 Hz) */ 127 /* min tuning step size (default: 50000 Hz) */
140 MT2063_STEPSIZE, 128 MT2063_STEPSIZE,
141 129
@@ -145,66 +133,15 @@ enum MT2063_Param {
145 /* LO1 Frequency set by MT2063_Tune() */ 133 /* LO1 Frequency set by MT2063_Tune() */
146 MT2063_LO1_FREQ, 134 MT2063_LO1_FREQ,
147 135
148 /* LO1 minimum step size (default: 250000 Hz) */
149 MT2063_LO1_STEPSIZE,
150
151 /* LO1 FracN keep-out region (default: 999999 Hz) */
152 MT2063_LO1_FRACN_AVOID_PARAM,
153
154 /* Current 1st IF in use set by MT2063_Tune() */
155 MT2063_IF1_ACTUAL,
156
157 /* Requested 1st IF set by MT2063_Tune() */
158 MT2063_IF1_REQUEST,
159
160 /* Center of 1st IF SAW filter (default: 1218000000 Hz) */
161 MT2063_IF1_CENTER,
162
163 /* Bandwidth of 1st IF SAW filter (default: 20000000 Hz) */
164 MT2063_IF1_BW,
165
166 /* zero-IF bandwidth (default: 2000000 Hz) */
167 MT2063_ZIF_BW,
168
169 /* LO2 Frequency set by MT2063_Tune() */ 136 /* LO2 Frequency set by MT2063_Tune() */
170 MT2063_LO2_FREQ, 137 MT2063_LO2_FREQ,
171 138
172 /* LO2 minimum step size (default: 50000 Hz) */
173 MT2063_LO2_STEPSIZE,
174
175 /* LO2 FracN keep-out region (default: 374999 Hz) */
176 MT2063_LO2_FRACN_AVOID,
177
178 /* output center frequency set by MT2063_Tune() */ 139 /* output center frequency set by MT2063_Tune() */
179 MT2063_OUTPUT_FREQ, 140 MT2063_OUTPUT_FREQ,
180 141
181 /* output bandwidth set by MT2063_Tune() */ 142 /* output bandwidth set by MT2063_Tune() */
182 MT2063_OUTPUT_BW, 143 MT2063_OUTPUT_BW,
183 144
184 /* min inter-tuner LO separation (default: 1000000 Hz) */
185 MT2063_LO_SEPARATION,
186
187 /* ID of avoid-spurs algorithm in use compile-time constant */
188 MT2063_AS_ALG,
189
190 /* max # of intra-tuner harmonics (default: 15) */
191 MT2063_MAX_HARM1,
192
193 /* max # of inter-tuner harmonics (default: 7) */
194 MT2063_MAX_HARM2,
195
196 /* # of 1st IF exclusion zones used set by MT2063_Tune() */
197 MT2063_EXCL_ZONES,
198
199 /* # of spurs found/avoided set by MT2063_Tune() */
200 MT2063_NUM_SPURS,
201
202 /* >0 spurs avoided set by MT2063_Tune() */
203 MT2063_SPUR_AVOIDED,
204
205 /* >0 spurs in output (mathematically) set by MT2063_Tune() */
206 MT2063_SPUR_PRESENT,
207
208 /* Receiver Mode for some parameters. 1 is DVB-T */ 145 /* Receiver Mode for some parameters. 1 is DVB-T */
209 MT2063_RCVR_MODE, 146 MT2063_RCVR_MODE,
210 147
@@ -247,24 +184,6 @@ enum MT2063_Param {
247 /* Selects, which DNC is activ */ 184 /* Selects, which DNC is activ */
248 MT2063_DNC_OUTPUT_ENABLE, 185 MT2063_DNC_OUTPUT_ENABLE,
249 186
250 /* VGA gain code */
251 MT2063_VGAGC,
252
253 /* VGA bias current */
254 MT2063_VGAOI,
255
256 /* TAGC, determins the speed of the AGC */
257 MT2063_TAGC,
258
259 /* AMP gain code */
260 MT2063_AMPGC,
261
262 /* Control setting to avoid DECT freqs (default: MT_AVOID_BOTH) */
263 MT2063_AVOID_DECT,
264
265 /* Cleartune filter selection: 0 - by IC (default), 1 - by software */
266 MT2063_CTFILT_SW,
267
268 MT2063_EOP /* last entry in enumerated list */ 187 MT2063_EOP /* last entry in enumerated list */
269}; 188};
270 189
@@ -1184,16 +1103,10 @@ static u32 MT2063_AvoidSpurs(void *h, struct MT2063_AvoidSpursData_t * pAS_Info)
1184 return (status); 1103 return (status);
1185} 1104}
1186 1105
1187//end of mt2063_spuravoid.c
1188//=================================================================
1189//#################################################################
1190//=================================================================
1191
1192/* 1106/*
1193** The expected version of MT_AvoidSpursData_t 1107** The expected version of MT_AvoidSpursData_t
1194** If the version is different, an updated file is needed from Microtune 1108** If the version is different, an updated file is needed from Microtune
1195*/ 1109*/
1196/* Expecting version 1.21 of the Spur Avoidance API */
1197 1110
1198typedef enum { 1111typedef enum {
1199 MT2063_SET_ATTEN, 1112 MT2063_SET_ATTEN,
@@ -1201,10 +1114,9 @@ typedef enum {
1201 MT2063_DECR_ATTEN 1114 MT2063_DECR_ATTEN
1202} MT2063_ATTEN_CNTL_MODE; 1115} MT2063_ATTEN_CNTL_MODE;
1203 1116
1204//#define TUNER_MT2063_OPTIMIZATION
1205/* 1117/*
1206** Constants used by the tuning algorithm 1118 * Constants used by the tuning algorithm
1207*/ 1119 */
1208#define MT2063_REF_FREQ (16000000UL) /* Reference oscillator Frequency (in Hz) */ 1120#define MT2063_REF_FREQ (16000000UL) /* Reference oscillator Frequency (in Hz) */
1209#define MT2063_IF1_BW (22000000UL) /* The IF1 filter bandwidth (in Hz) */ 1121#define MT2063_IF1_BW (22000000UL) /* The IF1 filter bandwidth (in Hz) */
1210#define MT2063_TUNE_STEP_SIZE (50000UL) /* Tune in steps of 50 kHz */ 1122#define MT2063_TUNE_STEP_SIZE (50000UL) /* Tune in steps of 50 kHz */
@@ -1233,16 +1145,6 @@ typedef enum {
1233#define MT2063_B3 (0x9E) 1145#define MT2063_B3 (0x9E)
1234 1146
1235/* 1147/*
1236** The number of Tuner Registers
1237*/
1238static const u32 MT2063_Num_Registers = MT2063_REG_END_REGS;
1239
1240#define USE_GLOBAL_TUNER 0
1241
1242static u32 nMT2063MaxTuners = 1;
1243static u32 nMT2063OpenTuners = 0;
1244
1245/*
1246** Constants for setting receiver modes. 1148** Constants for setting receiver modes.
1247** (6 modes defined at this time, enumerated by MT2063_RCVR_MODES) 1149** (6 modes defined at this time, enumerated by MT2063_RCVR_MODES)
1248** (DNC1GC & DNC2GC are the values, which are used, when the specific 1150** (DNC1GC & DNC2GC are the values, which are used, when the specific
@@ -1372,8 +1274,6 @@ static u32 MT2063_GetLocked(struct mt2063_state *state)
1372** param Description 1274** param Description
1373** ---------------------- -------------------------------- 1275** ---------------------- --------------------------------
1374** MT2063_IC_ADDR Serial Bus address of this tuner 1276** MT2063_IC_ADDR Serial Bus address of this tuner
1375** MT2063_MAX_OPEN Max # of MT2063's allowed open
1376** MT2063_NUM_OPEN # of MT2063's open
1377** MT2063_SRO_FREQ crystal frequency 1277** MT2063_SRO_FREQ crystal frequency
1378** MT2063_STEPSIZE minimum tuning step size 1278** MT2063_STEPSIZE minimum tuning step size
1379** MT2063_INPUT_FREQ input center frequency 1279** MT2063_INPUT_FREQ input center frequency
@@ -1457,31 +1357,6 @@ static u32 MT2063_GetParam(struct mt2063_state *state, enum MT2063_Param param,
1457 return -EINVAL; 1357 return -EINVAL;
1458 1358
1459 switch (param) { 1359 switch (param) {
1460 /* Serial Bus address of this tuner */
1461 case MT2063_IC_ADDR:
1462 *pValue = state->config->tuner_address;
1463 break;
1464
1465 /* Max # of MT2063's allowed to be open */
1466 case MT2063_MAX_OPEN:
1467 *pValue = nMT2063MaxTuners;
1468 break;
1469
1470 /* # of MT2063's open */
1471 case MT2063_NUM_OPEN:
1472 *pValue = nMT2063OpenTuners;
1473 break;
1474
1475 /* crystal frequency */
1476 case MT2063_SRO_FREQ:
1477 *pValue = state->AS_Data.f_ref;
1478 break;
1479
1480 /* minimum tuning step size */
1481 case MT2063_STEPSIZE:
1482 *pValue = state->AS_Data.f_LO2_Step;
1483 break;
1484
1485 /* input center frequency */ 1360 /* input center frequency */
1486 case MT2063_INPUT_FREQ: 1361 case MT2063_INPUT_FREQ:
1487 *pValue = state->AS_Data.f_in; 1362 *pValue = state->AS_Data.f_in;
@@ -1506,31 +1381,6 @@ static u32 MT2063_GetParam(struct mt2063_state *state, enum MT2063_Param param,
1506 *pValue = state->AS_Data.f_LO1; 1381 *pValue = state->AS_Data.f_LO1;
1507 break; 1382 break;
1508 1383
1509 /* LO1 minimum step size */
1510 case MT2063_LO1_STEPSIZE:
1511 *pValue = state->AS_Data.f_LO1_Step;
1512 break;
1513
1514 /* LO1 FracN keep-out region */
1515 case MT2063_LO1_FRACN_AVOID_PARAM:
1516 *pValue = state->AS_Data.f_LO1_FracN_Avoid;
1517 break;
1518
1519 /* Current 1st IF in use */
1520 case MT2063_IF1_ACTUAL:
1521 *pValue = state->f_IF1_actual;
1522 break;
1523
1524 /* Requested 1st IF */
1525 case MT2063_IF1_REQUEST:
1526 *pValue = state->AS_Data.f_if1_Request;
1527 break;
1528
1529 /* Center of 1st IF SAW filter */
1530 case MT2063_IF1_CENTER:
1531 *pValue = state->AS_Data.f_if1_Center;
1532 break;
1533
1534 /* Bandwidth of 1st IF SAW filter */ 1384 /* Bandwidth of 1st IF SAW filter */
1535 case MT2063_IF1_BW: 1385 case MT2063_IF1_BW:
1536 *pValue = state->AS_Data.f_if1_bw; 1386 *pValue = state->AS_Data.f_if1_bw;
@@ -1568,11 +1418,6 @@ static u32 MT2063_GetParam(struct mt2063_state *state, enum MT2063_Param param,
1568 *pValue = state->AS_Data.f_LO2; 1418 *pValue = state->AS_Data.f_LO2;
1569 break; 1419 break;
1570 1420
1571 /* LO2 minimum step size */
1572 case MT2063_LO2_STEPSIZE:
1573 *pValue = state->AS_Data.f_LO2_Step;
1574 break;
1575
1576 /* LO2 FracN keep-out region */ 1421 /* LO2 FracN keep-out region */
1577 case MT2063_LO2_FRACN_AVOID: 1422 case MT2063_LO2_FRACN_AVOID:
1578 *pValue = state->AS_Data.f_LO2_FracN_Avoid; 1423 *pValue = state->AS_Data.f_LO2_FracN_Avoid;
@@ -1588,41 +1433,6 @@ static u32 MT2063_GetParam(struct mt2063_state *state, enum MT2063_Param param,
1588 *pValue = state->AS_Data.f_out_bw - 750000; 1433 *pValue = state->AS_Data.f_out_bw - 750000;
1589 break; 1434 break;
1590 1435
1591 /* min inter-tuner LO separation */
1592 case MT2063_LO_SEPARATION:
1593 *pValue = state->AS_Data.f_min_LO_Separation;
1594 break;
1595
1596 /* max # of intra-tuner harmonics */
1597 case MT2063_MAX_HARM1:
1598 *pValue = state->AS_Data.maxH1;
1599 break;
1600
1601 /* max # of inter-tuner harmonics */
1602 case MT2063_MAX_HARM2:
1603 *pValue = state->AS_Data.maxH2;
1604 break;
1605
1606 /* # of 1st IF exclusion zones */
1607 case MT2063_EXCL_ZONES:
1608 *pValue = state->AS_Data.nZones;
1609 break;
1610
1611 /* # of spurs found/avoided */
1612 case MT2063_NUM_SPURS:
1613 *pValue = state->AS_Data.nSpursFound;
1614 break;
1615
1616 /* >0 spurs avoided */
1617 case MT2063_SPUR_AVOIDED:
1618 *pValue = state->AS_Data.bSpurAvoided;
1619 break;
1620
1621 /* >0 spurs in output (mathematically) */
1622 case MT2063_SPUR_PRESENT:
1623 *pValue = state->AS_Data.bSpurPresent;
1624 break;
1625
1626 /* Predefined receiver setup combination */ 1436 /* Predefined receiver setup combination */
1627 case MT2063_RCVR_MODE: 1437 case MT2063_RCVR_MODE:
1628 *pValue = state->rcvr_mode; 1438 *pValue = state->rcvr_mode;
@@ -1766,37 +1576,6 @@ static u32 MT2063_GetParam(struct mt2063_state *state, enum MT2063_Param param,
1766 } 1576 }
1767 break; 1577 break;
1768 1578
1769 /* Get VGA Gain Code */
1770 case MT2063_VGAGC:
1771 *pValue = ((state->reg[MT2063_REG_VGA_GAIN] & 0x0C) >> 2);
1772 break;
1773
1774 /* Get VGA bias current */
1775 case MT2063_VGAOI:
1776 *pValue = (state->reg[MT2063_REG_RSVD_31] & 0x07);
1777 break;
1778
1779 /* Get TAGC setting */
1780 case MT2063_TAGC:
1781 *pValue = (state->reg[MT2063_REG_RSVD_1E] & 0x03);
1782 break;
1783
1784 /* Get AMP Gain Code */
1785 case MT2063_AMPGC:
1786 *pValue = (state->reg[MT2063_REG_TEMP_SEL] & 0x03);
1787 break;
1788
1789 /* Avoid DECT Frequencies */
1790 case MT2063_AVOID_DECT:
1791 *pValue = state->AS_Data.avoidDECT;
1792 break;
1793
1794 /* Cleartune filter selection: 0 - by IC (default), 1 - by software */
1795 case MT2063_CTFILT_SW:
1796 *pValue = state->ctfilt_sw;
1797 break;
1798
1799 case MT2063_EOP:
1800 default: 1579 default:
1801 status |= -ERANGE; 1580 status |= -ERANGE;
1802 } 1581 }
@@ -2136,22 +1915,6 @@ static u32 MT2063_SetParam(struct mt2063_state *state,
2136 u8 val = 0; 1915 u8 val = 0;
2137 1916
2138 switch (param) { 1917 switch (param) {
2139 /* crystal frequency */
2140 case MT2063_SRO_FREQ:
2141 state->AS_Data.f_ref = nValue;
2142 state->AS_Data.f_LO1_FracN_Avoid = 0;
2143 state->AS_Data.f_LO2_FracN_Avoid = nValue / 80 - 1;
2144 state->AS_Data.f_LO1_Step = nValue / 64;
2145 state->AS_Data.f_if1_Center =
2146 (state->AS_Data.f_ref / 8) *
2147 (state->reg[MT2063_REG_FIFFC] + 640);
2148 break;
2149
2150 /* minimum tuning step size */
2151 case MT2063_STEPSIZE:
2152 state->AS_Data.f_LO2_Step = nValue;
2153 break;
2154
2155 /* LO1 frequency */ 1918 /* LO1 frequency */
2156 case MT2063_LO1_FREQ: 1919 case MT2063_LO1_FREQ:
2157 { 1920 {
@@ -2245,21 +2008,6 @@ static u32 MT2063_SetParam(struct mt2063_state *state,
2245 } 2008 }
2246 break; 2009 break;
2247 2010
2248 /* LO1 minimum step size */
2249 case MT2063_LO1_STEPSIZE:
2250 state->AS_Data.f_LO1_Step = nValue;
2251 break;
2252
2253 /* LO1 FracN keep-out region */
2254 case MT2063_LO1_FRACN_AVOID_PARAM:
2255 state->AS_Data.f_LO1_FracN_Avoid = nValue;
2256 break;
2257
2258 /* Requested 1st IF */
2259 case MT2063_IF1_REQUEST:
2260 state->AS_Data.f_if1_Request = nValue;
2261 break;
2262
2263 /* zero-IF bandwidth */ 2011 /* zero-IF bandwidth */
2264 case MT2063_ZIF_BW: 2012 case MT2063_ZIF_BW:
2265 state->AS_Data.f_zif_bw = nValue; 2013 state->AS_Data.f_zif_bw = nValue;
@@ -2352,11 +2100,6 @@ static u32 MT2063_SetParam(struct mt2063_state *state,
2352 } 2100 }
2353 break; 2101 break;
2354 2102
2355 /* LO2 minimum step size */
2356 case MT2063_LO2_STEPSIZE:
2357 state->AS_Data.f_LO2_Step = nValue;
2358 break;
2359
2360 /* LO2 FracN keep-out region */ 2103 /* LO2 FracN keep-out region */
2361 case MT2063_LO2_FRACN_AVOID: 2104 case MT2063_LO2_FRACN_AVOID:
2362 state->AS_Data.f_LO2_FracN_Avoid = nValue; 2105 state->AS_Data.f_LO2_FracN_Avoid = nValue;
@@ -2372,21 +2115,6 @@ static u32 MT2063_SetParam(struct mt2063_state *state,
2372 state->AS_Data.f_out_bw = nValue + 750000; 2115 state->AS_Data.f_out_bw = nValue + 750000;
2373 break; 2116 break;
2374 2117
2375 /* min inter-tuner LO separation */
2376 case MT2063_LO_SEPARATION:
2377 state->AS_Data.f_min_LO_Separation = nValue;
2378 break;
2379
2380 /* max # of intra-tuner harmonics */
2381 case MT2063_MAX_HARM1:
2382 state->AS_Data.maxH1 = nValue;
2383 break;
2384
2385 /* max # of inter-tuner harmonics */
2386 case MT2063_MAX_HARM2:
2387 state->AS_Data.maxH2 = nValue;
2388 break;
2389
2390 case MT2063_RCVR_MODE: 2118 case MT2063_RCVR_MODE:
2391 status |= 2119 status |=
2392 MT2063_SetReceiverMode(state, 2120 MT2063_SetReceiverMode(state,
@@ -2610,94 +2338,6 @@ static u32 MT2063_SetParam(struct mt2063_state *state,
2610 } 2338 }
2611 break; 2339 break;
2612 2340
2613 case MT2063_VGAGC:
2614 /* Set VGA gain code */
2615 val =
2616 (state->
2617 reg[MT2063_REG_VGA_GAIN] & (u8) ~ 0x0C) |
2618 ((nValue & 0x03) << 2);
2619 if (state->reg[MT2063_REG_VGA_GAIN] != val) {
2620 status |=
2621 MT2063_SetReg(state, MT2063_REG_VGA_GAIN,
2622 val);
2623 }
2624 break;
2625
2626 case MT2063_VGAOI:
2627 /* Set VGA bias current */
2628 val =
2629 (state->
2630 reg[MT2063_REG_RSVD_31] & (u8) ~ 0x07) |
2631 (nValue & 0x07);
2632 if (state->reg[MT2063_REG_RSVD_31] != val) {
2633 status |=
2634 MT2063_SetReg(state, MT2063_REG_RSVD_31,
2635 val);
2636 }
2637 break;
2638
2639 case MT2063_TAGC:
2640 /* Set TAGC */
2641 val =
2642 (state->
2643 reg[MT2063_REG_RSVD_1E] & (u8) ~ 0x03) |
2644 (nValue & 0x03);
2645 if (state->reg[MT2063_REG_RSVD_1E] != val) {
2646 status |=
2647 MT2063_SetReg(state, MT2063_REG_RSVD_1E,
2648 val);
2649 }
2650 break;
2651
2652 case MT2063_AMPGC:
2653 /* Set Amp gain code */
2654 val =
2655 (state->
2656 reg[MT2063_REG_TEMP_SEL] & (u8) ~ 0x03) |
2657 (nValue & 0x03);
2658 if (state->reg[MT2063_REG_TEMP_SEL] != val) {
2659 status |=
2660 MT2063_SetReg(state, MT2063_REG_TEMP_SEL,
2661 val);
2662 }
2663 break;
2664
2665 /* Avoid DECT Frequencies */
2666 case MT2063_AVOID_DECT:
2667 {
2668 enum MT2063_DECT_Avoid_Type newAvoidSetting =
2669 (enum MT2063_DECT_Avoid_Type)nValue;
2670 if ((newAvoidSetting >=
2671 MT2063_NO_DECT_AVOIDANCE)
2672 && (newAvoidSetting <= MT2063_AVOID_BOTH)) {
2673 state->AS_Data.avoidDECT =
2674 newAvoidSetting;
2675 }
2676 }
2677 break;
2678
2679 /* Cleartune filter selection: 0 - by IC (default), 1 - by software */
2680 case MT2063_CTFILT_SW:
2681 state->ctfilt_sw = (nValue & 0x01);
2682 break;
2683
2684 /* These parameters are read-only */
2685 case MT2063_IC_ADDR:
2686 case MT2063_MAX_OPEN:
2687 case MT2063_NUM_OPEN:
2688 case MT2063_INPUT_FREQ:
2689 case MT2063_IF1_ACTUAL:
2690 case MT2063_IF1_CENTER:
2691 case MT2063_IF1_BW:
2692 case MT2063_AS_ALG:
2693 case MT2063_EXCL_ZONES:
2694 case MT2063_SPUR_AVOIDED:
2695 case MT2063_NUM_SPURS:
2696 case MT2063_SPUR_PRESENT:
2697 case MT2063_ACLNA:
2698 case MT2063_ACRF:
2699 case MT2063_ACFIF:
2700 case MT2063_EOP:
2701 default: 2341 default:
2702 status |= -ERANGE; 2342 status |= -ERANGE;
2703 } 2343 }
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