diff options
author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-07-21 16:20:49 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-01-04 19:22:20 -0500 |
commit | 8fdb226ee11a417e19d17483aea244d6d5e00122 (patch) | |
tree | 36e7ca333225dadaf955a479485e6f4c6cfcb4ed /drivers/media/common/tuners/mt2063.c | |
parent | 54a4613fdb84786d71ef4b26ab59eed97cad0e7c (diff) |
[media] mt2063: Rearrange the delivery system functions
No functional changes on this patch. Better organize the delivery
system information and data types, putting everything together,
to improve readability.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/common/tuners/mt2063.c')
-rw-r--r-- | drivers/media/common/tuners/mt2063.c | 143 |
1 files changed, 66 insertions, 77 deletions
diff --git a/drivers/media/common/tuners/mt2063.c b/drivers/media/common/tuners/mt2063.c index 181deac72008..5e9655a21e12 100644 --- a/drivers/media/common/tuners/mt2063.c +++ b/drivers/media/common/tuners/mt2063.c | |||
@@ -130,19 +130,6 @@ enum MT2063_Mask_Bits { | |||
130 | }; | 130 | }; |
131 | 131 | ||
132 | /* | 132 | /* |
133 | * Parameter for selecting tuner mode | ||
134 | */ | ||
135 | enum MT2063_RCVR_MODES { | ||
136 | MT2063_CABLE_QAM = 0, /* Digital cable */ | ||
137 | MT2063_CABLE_ANALOG, /* Analog cable */ | ||
138 | MT2063_OFFAIR_COFDM, /* Digital offair */ | ||
139 | MT2063_OFFAIR_COFDM_SAWLESS, /* Digital offair without SAW */ | ||
140 | MT2063_OFFAIR_ANALOG, /* Analog offair */ | ||
141 | MT2063_OFFAIR_8VSB, /* Analog offair */ | ||
142 | MT2063_NUM_RCVR_MODES | ||
143 | }; | ||
144 | |||
145 | /* | ||
146 | * Possible values for MT2063_DNC_OUTPUT | 133 | * Possible values for MT2063_DNC_OUTPUT |
147 | */ | 134 | */ |
148 | enum MT2063_DNC_Output_Enable { | 135 | enum MT2063_DNC_Output_Enable { |
@@ -904,37 +891,6 @@ static u32 MT2063_AvoidSpurs(struct MT2063_AvoidSpursData_t *pAS_Info) | |||
904 | #define MT2063_B2 (0x9D) | 891 | #define MT2063_B2 (0x9D) |
905 | #define MT2063_B3 (0x9E) | 892 | #define MT2063_B3 (0x9E) |
906 | 893 | ||
907 | /* | ||
908 | * Constants for setting receiver modes. | ||
909 | * (6 modes defined at this time, enumerated by MT2063_RCVR_MODES) | ||
910 | * (DNC1GC & DNC2GC are the values, which are used, when the specific | ||
911 | * DNC Output is selected, the other is always off) | ||
912 | * | ||
913 | * enum MT2063_RCVR_MODES | ||
914 | * -------------+---------------------------------------------- | ||
915 | * Mode 0 : | MT2063_CABLE_QAM | ||
916 | * Mode 1 : | MT2063_CABLE_ANALOG | ||
917 | * Mode 2 : | MT2063_OFFAIR_COFDM | ||
918 | * Mode 3 : | MT2063_OFFAIR_COFDM_SAWLESS | ||
919 | * Mode 4 : | MT2063_OFFAIR_ANALOG | ||
920 | * Mode 5 : | MT2063_OFFAIR_8VSB | ||
921 | * --------------+---------------------------------------------- | ||
922 | */ | ||
923 | static const u8 RFAGCEN[] = { 0, 0, 0, 0, 0, 0 }; | ||
924 | static const u8 LNARIN[] = { 0, 0, 3, 3, 3, 3 }; | ||
925 | static const u8 FIFFQEN[] = { 1, 1, 1, 1, 1, 1 }; | ||
926 | static const u8 FIFFQ[] = { 0, 0, 0, 0, 0, 0 }; | ||
927 | static const u8 DNC1GC[] = { 0, 0, 0, 0, 0, 0 }; | ||
928 | static const u8 DNC2GC[] = { 0, 0, 0, 0, 0, 0 }; | ||
929 | static const u8 ACLNAMAX[] = { 31, 31, 31, 31, 31, 31 }; | ||
930 | static const u8 LNATGT[] = { 44, 43, 43, 43, 43, 43 }; | ||
931 | static const u8 RFOVDIS[] = { 0, 0, 0, 0, 0, 0 }; | ||
932 | static const u8 ACRFMAX[] = { 31, 31, 31, 31, 31, 31 }; | ||
933 | static const u8 PD1TGT[] = { 36, 36, 38, 38, 36, 38 }; | ||
934 | static const u8 FIFOVDIS[] = { 0, 0, 0, 0, 0, 0 }; | ||
935 | static const u8 ACFIFMAX[] = { 29, 29, 29, 29, 29, 29 }; | ||
936 | static const u8 PD2TGT[] = { 40, 33, 38, 42, 30, 38 }; | ||
937 | |||
938 | /** | 894 | /** |
939 | * mt2063_lockStatus - Checks to see if LO1 and LO2 are locked | 895 | * mt2063_lockStatus - Checks to see if LO1 and LO2 are locked |
940 | * | 896 | * |
@@ -977,6 +933,67 @@ static unsigned int mt2063_lockStatus(struct mt2063_state *state) | |||
977 | } | 933 | } |
978 | 934 | ||
979 | /* | 935 | /* |
936 | * Constants for setting receiver modes. | ||
937 | * (6 modes defined at this time, enumerated by mt2063_delivery_sys) | ||
938 | * (DNC1GC & DNC2GC are the values, which are used, when the specific | ||
939 | * DNC Output is selected, the other is always off) | ||
940 | * | ||
941 | * enum mt2063_delivery_sys | ||
942 | * -------------+---------------------------------------------- | ||
943 | * Mode 0 : | MT2063_CABLE_QAM | ||
944 | * Mode 1 : | MT2063_CABLE_ANALOG | ||
945 | * Mode 2 : | MT2063_OFFAIR_COFDM | ||
946 | * Mode 3 : | MT2063_OFFAIR_COFDM_SAWLESS | ||
947 | * Mode 4 : | MT2063_OFFAIR_ANALOG | ||
948 | * Mode 5 : | MT2063_OFFAIR_8VSB | ||
949 | * --------------+---------------------------------------------- | ||
950 | * | ||
951 | * |<---------- Mode -------------->| | ||
952 | * Reg Field | 0 | 1 | 2 | 3 | 4 | 5 | | ||
953 | * ------------+-----+-----+-----+-----+-----+-----+ | ||
954 | * RFAGCen | OFF | OFF | OFF | OFF | OFF | OFF | ||
955 | * LNARin | 0 | 0 | 3 | 3 | 3 | 3 | ||
956 | * FIFFQen | 1 | 1 | 1 | 1 | 1 | 1 | ||
957 | * FIFFq | 0 | 0 | 0 | 0 | 0 | 0 | ||
958 | * DNC1gc | 0 | 0 | 0 | 0 | 0 | 0 | ||
959 | * DNC2gc | 0 | 0 | 0 | 0 | 0 | 0 | ||
960 | * GCU Auto | 1 | 1 | 1 | 1 | 1 | 1 | ||
961 | * LNA max Atn | 31 | 31 | 31 | 31 | 31 | 31 | ||
962 | * LNA Target | 44 | 43 | 43 | 43 | 43 | 43 | ||
963 | * ign RF Ovl | 0 | 0 | 0 | 0 | 0 | 0 | ||
964 | * RF max Atn | 31 | 31 | 31 | 31 | 31 | 31 | ||
965 | * PD1 Target | 36 | 36 | 38 | 38 | 36 | 38 | ||
966 | * ign FIF Ovl | 0 | 0 | 0 | 0 | 0 | 0 | ||
967 | * FIF max Atn | 5 | 5 | 5 | 5 | 5 | 5 | ||
968 | * PD2 Target | 40 | 33 | 42 | 42 | 33 | 42 | ||
969 | */ | ||
970 | |||
971 | enum mt2063_delivery_sys { | ||
972 | MT2063_CABLE_QAM = 0, /* Digital cable */ | ||
973 | MT2063_CABLE_ANALOG, /* Analog cable */ | ||
974 | MT2063_OFFAIR_COFDM, /* Digital offair */ | ||
975 | MT2063_OFFAIR_COFDM_SAWLESS, /* Digital offair without SAW */ | ||
976 | MT2063_OFFAIR_ANALOG, /* Analog offair */ | ||
977 | MT2063_OFFAIR_8VSB, /* Analog offair */ | ||
978 | MT2063_NUM_RCVR_MODES | ||
979 | }; | ||
980 | |||
981 | static const u8 RFAGCEN[] = { 0, 0, 0, 0, 0, 0 }; | ||
982 | static const u8 LNARIN[] = { 0, 0, 3, 3, 3, 3 }; | ||
983 | static const u8 FIFFQEN[] = { 1, 1, 1, 1, 1, 1 }; | ||
984 | static const u8 FIFFQ[] = { 0, 0, 0, 0, 0, 0 }; | ||
985 | static const u8 DNC1GC[] = { 0, 0, 0, 0, 0, 0 }; | ||
986 | static const u8 DNC2GC[] = { 0, 0, 0, 0, 0, 0 }; | ||
987 | static const u8 ACLNAMAX[] = { 31, 31, 31, 31, 31, 31 }; | ||
988 | static const u8 LNATGT[] = { 44, 43, 43, 43, 43, 43 }; | ||
989 | static const u8 RFOVDIS[] = { 0, 0, 0, 0, 0, 0 }; | ||
990 | static const u8 ACRFMAX[] = { 31, 31, 31, 31, 31, 31 }; | ||
991 | static const u8 PD1TGT[] = { 36, 36, 38, 38, 36, 38 }; | ||
992 | static const u8 FIFOVDIS[] = { 0, 0, 0, 0, 0, 0 }; | ||
993 | static const u8 ACFIFMAX[] = { 29, 29, 29, 29, 29, 29 }; | ||
994 | static const u8 PD2TGT[] = { 40, 33, 38, 42, 30, 38 }; | ||
995 | |||
996 | /* | ||
980 | * mt2063_set_dnc_output_enable() | 997 | * mt2063_set_dnc_output_enable() |
981 | */ | 998 | */ |
982 | static u32 mt2063_get_dnc_output_enable(struct mt2063_state *state, | 999 | static u32 mt2063_get_dnc_output_enable(struct mt2063_state *state, |
@@ -1119,48 +1136,20 @@ static u32 mt2063_set_dnc_output_enable(struct mt2063_state *state, | |||
1119 | } | 1136 | } |
1120 | 1137 | ||
1121 | /* | 1138 | /* |
1122 | * MT2063_SetReceiverMode() - Set the MT2063 receiver mode | 1139 | * MT2063_SetReceiverMode() - Set the MT2063 receiver mode, according with |
1123 | ** | 1140 | * the selected enum mt2063_delivery_sys type. |
1124 | * enum MT2063_RCVR_MODES | 1141 | * |
1125 | * --------------+---------------------------------------------- | ||
1126 | * Mode 0 : | MT2063_CABLE_QAM | ||
1127 | * Mode 1 : | MT2063_CABLE_ANALOG | ||
1128 | * Mode 2 : | MT2063_OFFAIR_COFDM | ||
1129 | * Mode 3 : | MT2063_OFFAIR_COFDM_SAWLESS | ||
1130 | * Mode 4 : | MT2063_OFFAIR_ANALOG | ||
1131 | * Mode 5 : | MT2063_OFFAIR_8VSB | ||
1132 | * --------------+---------------------------------------------- | ||
1133 | * (DNC1GC & DNC2GC are the values, which are used, when the specific | 1142 | * (DNC1GC & DNC2GC are the values, which are used, when the specific |
1134 | * DNC Output is selected, the other is always off) | 1143 | * DNC Output is selected, the other is always off) |
1135 | * | 1144 | * |
1136 | * |<---------- Mode -------------->| | ||
1137 | * Reg Field | 0 | 1 | 2 | 3 | 4 | 5 | | ||
1138 | * ------------+-----+-----+-----+-----+-----+-----+ | ||
1139 | * RFAGCen | OFF | OFF | OFF | OFF | OFF | OFF | ||
1140 | * LNARin | 0 | 0 | 3 | 3 | 3 | 3 | ||
1141 | * FIFFQen | 1 | 1 | 1 | 1 | 1 | 1 | ||
1142 | * FIFFq | 0 | 0 | 0 | 0 | 0 | 0 | ||
1143 | * DNC1gc | 0 | 0 | 0 | 0 | 0 | 0 | ||
1144 | * DNC2gc | 0 | 0 | 0 | 0 | 0 | 0 | ||
1145 | * GCU Auto | 1 | 1 | 1 | 1 | 1 | 1 | ||
1146 | * LNA max Atn | 31 | 31 | 31 | 31 | 31 | 31 | ||
1147 | * LNA Target | 44 | 43 | 43 | 43 | 43 | 43 | ||
1148 | * ign RF Ovl | 0 | 0 | 0 | 0 | 0 | 0 | ||
1149 | * RF max Atn | 31 | 31 | 31 | 31 | 31 | 31 | ||
1150 | * PD1 Target | 36 | 36 | 38 | 38 | 36 | 38 | ||
1151 | * ign FIF Ovl | 0 | 0 | 0 | 0 | 0 | 0 | ||
1152 | * FIF max Atn | 5 | 5 | 5 | 5 | 5 | 5 | ||
1153 | * PD2 Target | 40 | 33 | 42 | 42 | 33 | 42 | ||
1154 | * | ||
1155 | * | ||
1156 | * @state: ptr to mt2063_state structure | 1145 | * @state: ptr to mt2063_state structure |
1157 | * @Mode: desired reciever mode | 1146 | * @Mode: desired reciever delivery system |
1158 | * | 1147 | * |
1159 | * Note: Register cache must be valid for it to work | 1148 | * Note: Register cache must be valid for it to work |
1160 | */ | 1149 | */ |
1161 | 1150 | ||
1162 | static u32 MT2063_SetReceiverMode(struct mt2063_state *state, | 1151 | static u32 MT2063_SetReceiverMode(struct mt2063_state *state, |
1163 | enum MT2063_RCVR_MODES Mode) | 1152 | enum mt2063_delivery_sys Mode) |
1164 | { | 1153 | { |
1165 | u32 status = 0; /* Status to be returned */ | 1154 | u32 status = 0; /* Status to be returned */ |
1166 | u8 val; | 1155 | u8 val; |